Loading...
1/*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24/**
25 * DOC: atomic modeset support
26 *
27 * The functions here implement the state management and hardware programming
28 * dispatch required by the atomic modeset infrastructure.
29 * See intel_atomic_plane.c for the plane-specific atomic functionality.
30 */
31
32#include <drm/display/drm_dp_tunnel.h>
33#include <drm/drm_atomic.h>
34#include <drm/drm_atomic_helper.h>
35#include <drm/drm_fourcc.h>
36
37#include "i915_drv.h"
38#include "intel_atomic.h"
39#include "intel_cdclk.h"
40#include "intel_display_types.h"
41#include "intel_dp_tunnel.h"
42#include "intel_global_state.h"
43#include "intel_hdcp.h"
44#include "intel_psr.h"
45#include "intel_fb.h"
46#include "skl_universal_plane.h"
47
48/**
49 * intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
50 * @connector: Connector to get the property for.
51 * @state: Connector state to retrieve the property from.
52 * @property: Property to retrieve.
53 * @val: Return value for the property.
54 *
55 * Returns the atomic property value for a digital connector.
56 */
57int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
58 const struct drm_connector_state *state,
59 struct drm_property *property,
60 u64 *val)
61{
62 struct drm_device *dev = connector->dev;
63 struct drm_i915_private *dev_priv = to_i915(dev);
64 const struct intel_digital_connector_state *intel_conn_state =
65 to_intel_digital_connector_state(state);
66
67 if (property == dev_priv->display.properties.force_audio)
68 *val = intel_conn_state->force_audio;
69 else if (property == dev_priv->display.properties.broadcast_rgb)
70 *val = intel_conn_state->broadcast_rgb;
71 else {
72 drm_dbg_atomic(&dev_priv->drm,
73 "Unknown property [PROP:%d:%s]\n",
74 property->base.id, property->name);
75 return -EINVAL;
76 }
77
78 return 0;
79}
80
81/**
82 * intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
83 * @connector: Connector to set the property for.
84 * @state: Connector state to set the property on.
85 * @property: Property to set.
86 * @val: New value for the property.
87 *
88 * Sets the atomic property value for a digital connector.
89 */
90int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
91 struct drm_connector_state *state,
92 struct drm_property *property,
93 u64 val)
94{
95 struct drm_device *dev = connector->dev;
96 struct drm_i915_private *dev_priv = to_i915(dev);
97 struct intel_digital_connector_state *intel_conn_state =
98 to_intel_digital_connector_state(state);
99
100 if (property == dev_priv->display.properties.force_audio) {
101 intel_conn_state->force_audio = val;
102 return 0;
103 }
104
105 if (property == dev_priv->display.properties.broadcast_rgb) {
106 intel_conn_state->broadcast_rgb = val;
107 return 0;
108 }
109
110 drm_dbg_atomic(&dev_priv->drm, "Unknown property [PROP:%d:%s]\n",
111 property->base.id, property->name);
112 return -EINVAL;
113}
114
115int intel_digital_connector_atomic_check(struct drm_connector *conn,
116 struct drm_atomic_state *state)
117{
118 struct drm_connector_state *new_state =
119 drm_atomic_get_new_connector_state(state, conn);
120 struct intel_digital_connector_state *new_conn_state =
121 to_intel_digital_connector_state(new_state);
122 struct drm_connector_state *old_state =
123 drm_atomic_get_old_connector_state(state, conn);
124 struct intel_digital_connector_state *old_conn_state =
125 to_intel_digital_connector_state(old_state);
126 struct drm_crtc_state *crtc_state;
127
128 intel_hdcp_atomic_check(conn, old_state, new_state);
129
130 if (!new_state->crtc)
131 return 0;
132
133 crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
134
135 /*
136 * These properties are handled by fastset, and might not end
137 * up in a modeset.
138 */
139 if (new_conn_state->force_audio != old_conn_state->force_audio ||
140 new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
141 new_conn_state->base.colorspace != old_conn_state->base.colorspace ||
142 new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
143 new_conn_state->base.content_type != old_conn_state->base.content_type ||
144 new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode ||
145 new_conn_state->base.privacy_screen_sw_state != old_conn_state->base.privacy_screen_sw_state ||
146 !drm_connector_atomic_hdr_metadata_equal(old_state, new_state))
147 crtc_state->mode_changed = true;
148
149 return 0;
150}
151
152/**
153 * intel_digital_connector_duplicate_state - duplicate connector state
154 * @connector: digital connector
155 *
156 * Allocates and returns a copy of the connector state (both common and
157 * digital connector specific) for the specified connector.
158 *
159 * Returns: The newly allocated connector state, or NULL on failure.
160 */
161struct drm_connector_state *
162intel_digital_connector_duplicate_state(struct drm_connector *connector)
163{
164 struct intel_digital_connector_state *state;
165
166 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
167 if (!state)
168 return NULL;
169
170 __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
171 return &state->base;
172}
173
174/**
175 * intel_connector_needs_modeset - check if connector needs a modeset
176 * @state: the atomic state corresponding to this modeset
177 * @connector: the connector
178 */
179bool
180intel_connector_needs_modeset(struct intel_atomic_state *state,
181 struct drm_connector *connector)
182{
183 const struct drm_connector_state *old_conn_state, *new_conn_state;
184
185 old_conn_state = drm_atomic_get_old_connector_state(&state->base, connector);
186 new_conn_state = drm_atomic_get_new_connector_state(&state->base, connector);
187
188 return old_conn_state->crtc != new_conn_state->crtc ||
189 (new_conn_state->crtc &&
190 drm_atomic_crtc_needs_modeset(drm_atomic_get_new_crtc_state(&state->base,
191 new_conn_state->crtc)));
192}
193
194/**
195 * intel_any_crtc_needs_modeset - check if any CRTC needs a modeset
196 * @state: the atomic state corresponding to this modeset
197 *
198 * Returns true if any CRTC in @state needs a modeset.
199 */
200bool intel_any_crtc_needs_modeset(struct intel_atomic_state *state)
201{
202 struct intel_crtc *crtc;
203 struct intel_crtc_state *crtc_state;
204 int i;
205
206 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) {
207 if (intel_crtc_needs_modeset(crtc_state))
208 return true;
209 }
210
211 return false;
212}
213
214struct intel_digital_connector_state *
215intel_atomic_get_digital_connector_state(struct intel_atomic_state *state,
216 struct intel_connector *connector)
217{
218 struct drm_connector_state *conn_state;
219
220 conn_state = drm_atomic_get_connector_state(&state->base,
221 &connector->base);
222 if (IS_ERR(conn_state))
223 return ERR_CAST(conn_state);
224
225 return to_intel_digital_connector_state(conn_state);
226}
227
228/**
229 * intel_crtc_duplicate_state - duplicate crtc state
230 * @crtc: drm crtc
231 *
232 * Allocates and returns a copy of the crtc state (both common and
233 * Intel-specific) for the specified crtc.
234 *
235 * Returns: The newly allocated crtc state, or NULL on failure.
236 */
237struct drm_crtc_state *
238intel_crtc_duplicate_state(struct drm_crtc *crtc)
239{
240 const struct intel_crtc_state *old_crtc_state = to_intel_crtc_state(crtc->state);
241 struct intel_crtc_state *crtc_state;
242
243 crtc_state = kmemdup(old_crtc_state, sizeof(*crtc_state), GFP_KERNEL);
244 if (!crtc_state)
245 return NULL;
246
247 __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->uapi);
248
249 /* copy color blobs */
250 if (crtc_state->hw.degamma_lut)
251 drm_property_blob_get(crtc_state->hw.degamma_lut);
252 if (crtc_state->hw.ctm)
253 drm_property_blob_get(crtc_state->hw.ctm);
254 if (crtc_state->hw.gamma_lut)
255 drm_property_blob_get(crtc_state->hw.gamma_lut);
256
257 if (crtc_state->pre_csc_lut)
258 drm_property_blob_get(crtc_state->pre_csc_lut);
259 if (crtc_state->post_csc_lut)
260 drm_property_blob_get(crtc_state->post_csc_lut);
261
262 if (crtc_state->dp_tunnel_ref.tunnel)
263 drm_dp_tunnel_ref_get(crtc_state->dp_tunnel_ref.tunnel,
264 &crtc_state->dp_tunnel_ref);
265
266 crtc_state->update_pipe = false;
267 crtc_state->update_m_n = false;
268 crtc_state->update_lrr = false;
269 crtc_state->disable_cxsr = false;
270 crtc_state->update_wm_pre = false;
271 crtc_state->update_wm_post = false;
272 crtc_state->fifo_changed = false;
273 crtc_state->preload_luts = false;
274 crtc_state->wm.need_postvbl_update = false;
275 crtc_state->do_async_flip = false;
276 crtc_state->fb_bits = 0;
277 crtc_state->update_planes = 0;
278 crtc_state->dsb_color_vblank = NULL;
279 crtc_state->dsb_commit = NULL;
280 crtc_state->use_dsb = false;
281
282 return &crtc_state->uapi;
283}
284
285static void intel_crtc_put_color_blobs(struct intel_crtc_state *crtc_state)
286{
287 drm_property_blob_put(crtc_state->hw.degamma_lut);
288 drm_property_blob_put(crtc_state->hw.gamma_lut);
289 drm_property_blob_put(crtc_state->hw.ctm);
290
291 drm_property_blob_put(crtc_state->pre_csc_lut);
292 drm_property_blob_put(crtc_state->post_csc_lut);
293}
294
295void intel_crtc_free_hw_state(struct intel_crtc_state *crtc_state)
296{
297 intel_crtc_put_color_blobs(crtc_state);
298}
299
300/**
301 * intel_crtc_destroy_state - destroy crtc state
302 * @crtc: drm crtc
303 * @state: the state to destroy
304 *
305 * Destroys the crtc state (both common and Intel-specific) for the
306 * specified crtc.
307 */
308void
309intel_crtc_destroy_state(struct drm_crtc *crtc,
310 struct drm_crtc_state *state)
311{
312 struct intel_crtc_state *crtc_state = to_intel_crtc_state(state);
313
314 drm_WARN_ON(crtc->dev, crtc_state->dsb_color_vblank);
315 drm_WARN_ON(crtc->dev, crtc_state->dsb_commit);
316
317 __drm_atomic_helper_crtc_destroy_state(&crtc_state->uapi);
318 intel_crtc_free_hw_state(crtc_state);
319 if (crtc_state->dp_tunnel_ref.tunnel)
320 drm_dp_tunnel_ref_put(&crtc_state->dp_tunnel_ref);
321 kfree(crtc_state);
322}
323
324struct drm_atomic_state *
325intel_atomic_state_alloc(struct drm_device *dev)
326{
327 struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
328
329 if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
330 kfree(state);
331 return NULL;
332 }
333
334 return &state->base;
335}
336
337void intel_atomic_state_free(struct drm_atomic_state *_state)
338{
339 struct intel_atomic_state *state = to_intel_atomic_state(_state);
340
341 drm_atomic_state_default_release(&state->base);
342 kfree(state->global_objs);
343 kfree(state);
344}
345
346void intel_atomic_state_clear(struct drm_atomic_state *s)
347{
348 struct intel_atomic_state *state = to_intel_atomic_state(s);
349
350 drm_atomic_state_default_clear(&state->base);
351 intel_atomic_clear_global_state(state);
352
353 /* state->internal not reset on purpose */
354
355 state->dpll_set = state->modeset = false;
356
357 intel_dp_tunnel_atomic_cleanup_inherited_state(state);
358}
359
360struct intel_crtc_state *
361intel_atomic_get_crtc_state(struct drm_atomic_state *state,
362 struct intel_crtc *crtc)
363{
364 struct drm_crtc_state *crtc_state;
365 crtc_state = drm_atomic_get_crtc_state(state, &crtc->base);
366 if (IS_ERR(crtc_state))
367 return ERR_CAST(crtc_state);
368
369 return to_intel_crtc_state(crtc_state);
370}
1/*
2 * Copyright © 2015 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23
24/**
25 * DOC: atomic modeset support
26 *
27 * The functions here implement the state management and hardware programming
28 * dispatch required by the atomic modeset infrastructure.
29 * See intel_atomic_plane.c for the plane-specific atomic functionality.
30 */
31
32#include <drm/drm_atomic.h>
33#include <drm/drm_atomic_helper.h>
34#include <drm/drm_fourcc.h>
35#include <drm/drm_plane_helper.h>
36
37#include "intel_atomic.h"
38#include "intel_display_types.h"
39#include "intel_hdcp.h"
40#include "intel_sprite.h"
41
42/**
43 * intel_digital_connector_atomic_get_property - hook for connector->atomic_get_property.
44 * @connector: Connector to get the property for.
45 * @state: Connector state to retrieve the property from.
46 * @property: Property to retrieve.
47 * @val: Return value for the property.
48 *
49 * Returns the atomic property value for a digital connector.
50 */
51int intel_digital_connector_atomic_get_property(struct drm_connector *connector,
52 const struct drm_connector_state *state,
53 struct drm_property *property,
54 u64 *val)
55{
56 struct drm_device *dev = connector->dev;
57 struct drm_i915_private *dev_priv = to_i915(dev);
58 struct intel_digital_connector_state *intel_conn_state =
59 to_intel_digital_connector_state(state);
60
61 if (property == dev_priv->force_audio_property)
62 *val = intel_conn_state->force_audio;
63 else if (property == dev_priv->broadcast_rgb_property)
64 *val = intel_conn_state->broadcast_rgb;
65 else {
66 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
67 property->base.id, property->name);
68 return -EINVAL;
69 }
70
71 return 0;
72}
73
74/**
75 * intel_digital_connector_atomic_set_property - hook for connector->atomic_set_property.
76 * @connector: Connector to set the property for.
77 * @state: Connector state to set the property on.
78 * @property: Property to set.
79 * @val: New value for the property.
80 *
81 * Sets the atomic property value for a digital connector.
82 */
83int intel_digital_connector_atomic_set_property(struct drm_connector *connector,
84 struct drm_connector_state *state,
85 struct drm_property *property,
86 u64 val)
87{
88 struct drm_device *dev = connector->dev;
89 struct drm_i915_private *dev_priv = to_i915(dev);
90 struct intel_digital_connector_state *intel_conn_state =
91 to_intel_digital_connector_state(state);
92
93 if (property == dev_priv->force_audio_property) {
94 intel_conn_state->force_audio = val;
95 return 0;
96 }
97
98 if (property == dev_priv->broadcast_rgb_property) {
99 intel_conn_state->broadcast_rgb = val;
100 return 0;
101 }
102
103 DRM_DEBUG_ATOMIC("Unknown property [PROP:%d:%s]\n",
104 property->base.id, property->name);
105 return -EINVAL;
106}
107
108static bool blob_equal(const struct drm_property_blob *a,
109 const struct drm_property_blob *b)
110{
111 if (a && b)
112 return a->length == b->length &&
113 !memcmp(a->data, b->data, a->length);
114
115 return !a == !b;
116}
117
118int intel_digital_connector_atomic_check(struct drm_connector *conn,
119 struct drm_atomic_state *state)
120{
121 struct drm_connector_state *new_state =
122 drm_atomic_get_new_connector_state(state, conn);
123 struct intel_digital_connector_state *new_conn_state =
124 to_intel_digital_connector_state(new_state);
125 struct drm_connector_state *old_state =
126 drm_atomic_get_old_connector_state(state, conn);
127 struct intel_digital_connector_state *old_conn_state =
128 to_intel_digital_connector_state(old_state);
129 struct drm_crtc_state *crtc_state;
130
131 intel_hdcp_atomic_check(conn, old_state, new_state);
132
133 if (!new_state->crtc)
134 return 0;
135
136 crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc);
137
138 /*
139 * These properties are handled by fastset, and might not end
140 * up in a modeset.
141 */
142 if (new_conn_state->force_audio != old_conn_state->force_audio ||
143 new_conn_state->broadcast_rgb != old_conn_state->broadcast_rgb ||
144 new_conn_state->base.colorspace != old_conn_state->base.colorspace ||
145 new_conn_state->base.picture_aspect_ratio != old_conn_state->base.picture_aspect_ratio ||
146 new_conn_state->base.content_type != old_conn_state->base.content_type ||
147 new_conn_state->base.scaling_mode != old_conn_state->base.scaling_mode ||
148 !blob_equal(new_conn_state->base.hdr_output_metadata,
149 old_conn_state->base.hdr_output_metadata))
150 crtc_state->mode_changed = true;
151
152 return 0;
153}
154
155/**
156 * intel_digital_connector_duplicate_state - duplicate connector state
157 * @connector: digital connector
158 *
159 * Allocates and returns a copy of the connector state (both common and
160 * digital connector specific) for the specified connector.
161 *
162 * Returns: The newly allocated connector state, or NULL on failure.
163 */
164struct drm_connector_state *
165intel_digital_connector_duplicate_state(struct drm_connector *connector)
166{
167 struct intel_digital_connector_state *state;
168
169 state = kmemdup(connector->state, sizeof(*state), GFP_KERNEL);
170 if (!state)
171 return NULL;
172
173 __drm_atomic_helper_connector_duplicate_state(connector, &state->base);
174 return &state->base;
175}
176
177/**
178 * intel_crtc_duplicate_state - duplicate crtc state
179 * @crtc: drm crtc
180 *
181 * Allocates and returns a copy of the crtc state (both common and
182 * Intel-specific) for the specified crtc.
183 *
184 * Returns: The newly allocated crtc state, or NULL on failure.
185 */
186struct drm_crtc_state *
187intel_crtc_duplicate_state(struct drm_crtc *crtc)
188{
189 struct intel_crtc_state *crtc_state;
190
191 crtc_state = kmemdup(crtc->state, sizeof(*crtc_state), GFP_KERNEL);
192 if (!crtc_state)
193 return NULL;
194
195 __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->base);
196
197 crtc_state->update_pipe = false;
198 crtc_state->disable_lp_wm = false;
199 crtc_state->disable_cxsr = false;
200 crtc_state->update_wm_pre = false;
201 crtc_state->update_wm_post = false;
202 crtc_state->fb_changed = false;
203 crtc_state->fifo_changed = false;
204 crtc_state->preload_luts = false;
205 crtc_state->wm.need_postvbl_update = false;
206 crtc_state->fb_bits = 0;
207 crtc_state->update_planes = 0;
208
209 return &crtc_state->base;
210}
211
212/**
213 * intel_crtc_destroy_state - destroy crtc state
214 * @crtc: drm crtc
215 * @state: the state to destroy
216 *
217 * Destroys the crtc state (both common and Intel-specific) for the
218 * specified crtc.
219 */
220void
221intel_crtc_destroy_state(struct drm_crtc *crtc,
222 struct drm_crtc_state *state)
223{
224 drm_atomic_helper_crtc_destroy_state(crtc, state);
225}
226
227static void intel_atomic_setup_scaler(struct intel_crtc_scaler_state *scaler_state,
228 int num_scalers_need, struct intel_crtc *intel_crtc,
229 const char *name, int idx,
230 struct intel_plane_state *plane_state,
231 int *scaler_id)
232{
233 struct drm_i915_private *dev_priv = to_i915(intel_crtc->base.dev);
234 int j;
235 u32 mode;
236
237 if (*scaler_id < 0) {
238 /* find a free scaler */
239 for (j = 0; j < intel_crtc->num_scalers; j++) {
240 if (scaler_state->scalers[j].in_use)
241 continue;
242
243 *scaler_id = j;
244 scaler_state->scalers[*scaler_id].in_use = 1;
245 break;
246 }
247 }
248
249 if (WARN(*scaler_id < 0, "Cannot find scaler for %s:%d\n", name, idx))
250 return;
251
252 /* set scaler mode */
253 if (plane_state && plane_state->base.fb &&
254 plane_state->base.fb->format->is_yuv &&
255 plane_state->base.fb->format->num_planes > 1) {
256 struct intel_plane *plane = to_intel_plane(plane_state->base.plane);
257 if (IS_GEN(dev_priv, 9) &&
258 !IS_GEMINILAKE(dev_priv)) {
259 mode = SKL_PS_SCALER_MODE_NV12;
260 } else if (icl_is_hdr_plane(dev_priv, plane->id)) {
261 /*
262 * On gen11+'s HDR planes we only use the scaler for
263 * scaling. They have a dedicated chroma upsampler, so
264 * we don't need the scaler to upsample the UV plane.
265 */
266 mode = PS_SCALER_MODE_NORMAL;
267 } else {
268 mode = PS_SCALER_MODE_PLANAR;
269
270 if (plane_state->linked_plane)
271 mode |= PS_PLANE_Y_SEL(plane_state->linked_plane->id);
272 }
273 } else if (INTEL_GEN(dev_priv) > 9 || IS_GEMINILAKE(dev_priv)) {
274 mode = PS_SCALER_MODE_NORMAL;
275 } else if (num_scalers_need == 1 && intel_crtc->num_scalers > 1) {
276 /*
277 * when only 1 scaler is in use on a pipe with 2 scalers
278 * scaler 0 operates in high quality (HQ) mode.
279 * In this case use scaler 0 to take advantage of HQ mode
280 */
281 scaler_state->scalers[*scaler_id].in_use = 0;
282 *scaler_id = 0;
283 scaler_state->scalers[0].in_use = 1;
284 mode = SKL_PS_SCALER_MODE_HQ;
285 } else {
286 mode = SKL_PS_SCALER_MODE_DYN;
287 }
288
289 DRM_DEBUG_KMS("Attached scaler id %u.%u to %s:%d\n",
290 intel_crtc->pipe, *scaler_id, name, idx);
291 scaler_state->scalers[*scaler_id].mode = mode;
292}
293
294/**
295 * intel_atomic_setup_scalers() - setup scalers for crtc per staged requests
296 * @dev_priv: i915 device
297 * @intel_crtc: intel crtc
298 * @crtc_state: incoming crtc_state to validate and setup scalers
299 *
300 * This function sets up scalers based on staged scaling requests for
301 * a @crtc and its planes. It is called from crtc level check path. If request
302 * is a supportable request, it attaches scalers to requested planes and crtc.
303 *
304 * This function takes into account the current scaler(s) in use by any planes
305 * not being part of this atomic state
306 *
307 * Returns:
308 * 0 - scalers were setup succesfully
309 * error code - otherwise
310 */
311int intel_atomic_setup_scalers(struct drm_i915_private *dev_priv,
312 struct intel_crtc *intel_crtc,
313 struct intel_crtc_state *crtc_state)
314{
315 struct drm_plane *plane = NULL;
316 struct intel_plane *intel_plane;
317 struct intel_plane_state *plane_state = NULL;
318 struct intel_crtc_scaler_state *scaler_state =
319 &crtc_state->scaler_state;
320 struct drm_atomic_state *drm_state = crtc_state->base.state;
321 struct intel_atomic_state *intel_state = to_intel_atomic_state(drm_state);
322 int num_scalers_need;
323 int i;
324
325 num_scalers_need = hweight32(scaler_state->scaler_users);
326
327 /*
328 * High level flow:
329 * - staged scaler requests are already in scaler_state->scaler_users
330 * - check whether staged scaling requests can be supported
331 * - add planes using scalers that aren't in current transaction
332 * - assign scalers to requested users
333 * - as part of plane commit, scalers will be committed
334 * (i.e., either attached or detached) to respective planes in hw
335 * - as part of crtc_commit, scaler will be either attached or detached
336 * to crtc in hw
337 */
338
339 /* fail if required scalers > available scalers */
340 if (num_scalers_need > intel_crtc->num_scalers){
341 DRM_DEBUG_KMS("Too many scaling requests %d > %d\n",
342 num_scalers_need, intel_crtc->num_scalers);
343 return -EINVAL;
344 }
345
346 /* walkthrough scaler_users bits and start assigning scalers */
347 for (i = 0; i < sizeof(scaler_state->scaler_users) * 8; i++) {
348 int *scaler_id;
349 const char *name;
350 int idx;
351
352 /* skip if scaler not required */
353 if (!(scaler_state->scaler_users & (1 << i)))
354 continue;
355
356 if (i == SKL_CRTC_INDEX) {
357 name = "CRTC";
358 idx = intel_crtc->base.base.id;
359
360 /* panel fitter case: assign as a crtc scaler */
361 scaler_id = &scaler_state->scaler_id;
362 } else {
363 name = "PLANE";
364
365 /* plane scaler case: assign as a plane scaler */
366 /* find the plane that set the bit as scaler_user */
367 plane = drm_state->planes[i].ptr;
368
369 /*
370 * to enable/disable hq mode, add planes that are using scaler
371 * into this transaction
372 */
373 if (!plane) {
374 struct drm_plane_state *state;
375 plane = drm_plane_from_index(&dev_priv->drm, i);
376 state = drm_atomic_get_plane_state(drm_state, plane);
377 if (IS_ERR(state)) {
378 DRM_DEBUG_KMS("Failed to add [PLANE:%d] to drm_state\n",
379 plane->base.id);
380 return PTR_ERR(state);
381 }
382
383 /*
384 * the plane is added after plane checks are run,
385 * but since this plane is unchanged just do the
386 * minimum required validation.
387 */
388 crtc_state->base.planes_changed = true;
389 }
390
391 intel_plane = to_intel_plane(plane);
392 idx = plane->base.id;
393
394 /* plane on different crtc cannot be a scaler user of this crtc */
395 if (WARN_ON(intel_plane->pipe != intel_crtc->pipe))
396 continue;
397
398 plane_state = intel_atomic_get_new_plane_state(intel_state,
399 intel_plane);
400 scaler_id = &plane_state->scaler_id;
401 }
402
403 intel_atomic_setup_scaler(scaler_state, num_scalers_need,
404 intel_crtc, name, idx,
405 plane_state, scaler_id);
406 }
407
408 return 0;
409}
410
411struct drm_atomic_state *
412intel_atomic_state_alloc(struct drm_device *dev)
413{
414 struct intel_atomic_state *state = kzalloc(sizeof(*state), GFP_KERNEL);
415
416 if (!state || drm_atomic_state_init(dev, &state->base) < 0) {
417 kfree(state);
418 return NULL;
419 }
420
421 return &state->base;
422}
423
424void intel_atomic_state_clear(struct drm_atomic_state *s)
425{
426 struct intel_atomic_state *state = to_intel_atomic_state(s);
427 drm_atomic_state_default_clear(&state->base);
428 state->dpll_set = state->modeset = false;
429}
430
431struct intel_crtc_state *
432intel_atomic_get_crtc_state(struct drm_atomic_state *state,
433 struct intel_crtc *crtc)
434{
435 struct drm_crtc_state *crtc_state;
436 crtc_state = drm_atomic_get_crtc_state(state, &crtc->base);
437 if (IS_ERR(crtc_state))
438 return ERR_CAST(crtc_state);
439
440 return to_intel_crtc_state(crtc_state);
441}