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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * linux/arch/arm/mach-omap1/devices.c
4 *
5 * OMAP1 platform device setup/initialization
6 */
7
8#include <linux/dma-mapping.h>
9#include <linux/module.h>
10#include <linux/kernel.h>
11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/spi/spi.h>
14
15#include <linux/platform_data/omap-wd-timer.h>
16#include <linux/soc/ti/omap1-io.h>
17
18#include <asm/mach/map.h>
19
20#include "tc.h"
21#include "mux.h"
22
23#include "hardware.h"
24#include "common.h"
25#include "clock.h"
26#include "mmc.h"
27#include "sram.h"
28
29#if IS_ENABLED(CONFIG_RTC_DRV_OMAP)
30
31#define OMAP_RTC_BASE 0xfffb4800
32
33static struct resource rtc_resources[] = {
34 {
35 .start = OMAP_RTC_BASE,
36 .end = OMAP_RTC_BASE + 0x5f,
37 .flags = IORESOURCE_MEM,
38 },
39 {
40 .start = INT_RTC_TIMER,
41 .flags = IORESOURCE_IRQ,
42 },
43 {
44 .start = INT_RTC_ALARM,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static struct platform_device omap_rtc_device = {
50 .name = "omap_rtc",
51 .id = -1,
52 .num_resources = ARRAY_SIZE(rtc_resources),
53 .resource = rtc_resources,
54};
55
56static void omap_init_rtc(void)
57{
58 (void) platform_device_register(&omap_rtc_device);
59}
60#else
61static inline void omap_init_rtc(void) {}
62#endif
63
64/*-------------------------------------------------------------------------*/
65
66#if IS_ENABLED(CONFIG_MMC_OMAP)
67
68static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
69 int controller_nr)
70{
71 if (controller_nr == 0) {
72 omap_cfg_reg(MMC_CMD);
73 omap_cfg_reg(MMC_CLK);
74 omap_cfg_reg(MMC_DAT0);
75
76 if (cpu_is_omap1710()) {
77 omap_cfg_reg(M15_1710_MMC_CLKI);
78 omap_cfg_reg(P19_1710_MMC_CMDDIR);
79 omap_cfg_reg(P20_1710_MMC_DATDIR0);
80 }
81 if (mmc_controller->slots[0].wires == 4) {
82 omap_cfg_reg(MMC_DAT1);
83 /* NOTE: DAT2 can be on W10 (here) or M15 */
84 if (!mmc_controller->slots[0].nomux)
85 omap_cfg_reg(MMC_DAT2);
86 omap_cfg_reg(MMC_DAT3);
87 }
88 }
89
90 /* Block 2 is on newer chips, and has many pinout options */
91 if (cpu_is_omap16xx() && controller_nr == 1) {
92 if (!mmc_controller->slots[1].nomux) {
93 omap_cfg_reg(Y8_1610_MMC2_CMD);
94 omap_cfg_reg(Y10_1610_MMC2_CLK);
95 omap_cfg_reg(R18_1610_MMC2_CLKIN);
96 omap_cfg_reg(W8_1610_MMC2_DAT0);
97 if (mmc_controller->slots[1].wires == 4) {
98 omap_cfg_reg(V8_1610_MMC2_DAT1);
99 omap_cfg_reg(W15_1610_MMC2_DAT2);
100 omap_cfg_reg(R10_1610_MMC2_DAT3);
101 }
102
103 /* These are needed for the level shifter */
104 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
105 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
106 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
107 }
108
109 /* Feedback clock must be set on OMAP-1710 MMC2 */
110 if (cpu_is_omap1710())
111 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
112 MOD_CONF_CTRL_1);
113 }
114}
115
116#define OMAP_MMC_NR_RES 4
117
118/*
119 * Register MMC devices.
120 */
121static int __init omap_mmc_add(const char *name, int id, unsigned long base,
122 unsigned long size, unsigned int irq,
123 unsigned rx_req, unsigned tx_req,
124 struct omap_mmc_platform_data *data)
125{
126 struct platform_device *pdev;
127 struct resource res[OMAP_MMC_NR_RES];
128 int ret;
129
130 pdev = platform_device_alloc(name, id);
131 if (!pdev)
132 return -ENOMEM;
133
134 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
135 res[0].start = base;
136 res[0].end = base + size - 1;
137 res[0].flags = IORESOURCE_MEM;
138 res[1].start = res[1].end = irq;
139 res[1].flags = IORESOURCE_IRQ;
140 res[2].start = rx_req;
141 res[2].name = "rx";
142 res[2].flags = IORESOURCE_DMA;
143 res[3].start = tx_req;
144 res[3].name = "tx";
145 res[3].flags = IORESOURCE_DMA;
146
147 if (cpu_is_omap15xx())
148 data->slots[0].features = MMC_OMAP15XX;
149 if (cpu_is_omap16xx())
150 data->slots[0].features = MMC_OMAP16XX;
151
152 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
153 if (ret == 0)
154 ret = platform_device_add_data(pdev, data, sizeof(*data));
155 if (ret)
156 goto fail;
157
158 ret = platform_device_add(pdev);
159 if (ret)
160 goto fail;
161
162 /* return device handle to board setup code */
163 data->dev = &pdev->dev;
164 return 0;
165
166fail:
167 platform_device_put(pdev);
168 return ret;
169}
170
171void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
172 int nr_controllers)
173{
174 int i;
175
176 for (i = 0; i < nr_controllers; i++) {
177 unsigned long base, size;
178 unsigned rx_req, tx_req;
179 unsigned int irq = 0;
180
181 if (!mmc_data[i])
182 continue;
183
184 omap1_mmc_mux(mmc_data[i], i);
185
186 switch (i) {
187 case 0:
188 base = OMAP1_MMC1_BASE;
189 irq = INT_MMC;
190 rx_req = 22;
191 tx_req = 21;
192 break;
193 case 1:
194 if (!cpu_is_omap16xx())
195 return;
196 base = OMAP1_MMC2_BASE;
197 irq = INT_1610_MMC2;
198 rx_req = 55;
199 tx_req = 54;
200 break;
201 default:
202 continue;
203 }
204 size = OMAP1_MMC_SIZE;
205
206 omap_mmc_add("mmci-omap", i, base, size, irq,
207 rx_req, tx_req, mmc_data[i]);
208 }
209}
210
211#endif
212
213/*-------------------------------------------------------------------------*/
214
215/* Numbering for the SPI-capable controllers when used for SPI:
216 * spi = 1
217 * uwire = 2
218 * mmc1..2 = 3..4
219 * mcbsp1..3 = 5..7
220 */
221
222#if IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)
223
224#define OMAP_UWIRE_BASE 0xfffb3000
225
226static struct resource uwire_resources[] = {
227 {
228 .start = OMAP_UWIRE_BASE,
229 .end = OMAP_UWIRE_BASE + 0x20,
230 .flags = IORESOURCE_MEM,
231 },
232};
233
234static struct platform_device omap_uwire_device = {
235 .name = "omap_uwire",
236 .id = -1,
237 .num_resources = ARRAY_SIZE(uwire_resources),
238 .resource = uwire_resources,
239};
240
241static void omap_init_uwire(void)
242{
243 /* FIXME define and use a boot tag; not all boards will be hooking
244 * up devices to the microwire controller, and multi-board configs
245 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
246 */
247
248 /* board-specific code must configure chipselects (only a few
249 * are normally used) and SCLK/SDI/SDO (each has two choices).
250 */
251 (void) platform_device_register(&omap_uwire_device);
252}
253#else
254static inline void omap_init_uwire(void) {}
255#endif
256
257
258#define OMAP1_RNG_BASE 0xfffe5000
259
260static struct resource omap1_rng_resources[] = {
261 {
262 .start = OMAP1_RNG_BASE,
263 .end = OMAP1_RNG_BASE + 0x4f,
264 .flags = IORESOURCE_MEM,
265 },
266};
267
268static struct platform_device omap1_rng_device = {
269 .name = "omap_rng",
270 .id = -1,
271 .num_resources = ARRAY_SIZE(omap1_rng_resources),
272 .resource = omap1_rng_resources,
273};
274
275static void omap1_init_rng(void)
276{
277 if (!cpu_is_omap16xx())
278 return;
279
280 (void) platform_device_register(&omap1_rng_device);
281}
282
283/*-------------------------------------------------------------------------*/
284
285/*
286 * This gets called after board-specific INIT_MACHINE, and initializes most
287 * on-chip peripherals accessible on this board (except for few like USB):
288 *
289 * (a) Does any "standard config" pin muxing needed. Board-specific
290 * code will have muxed GPIO pins and done "nonstandard" setup;
291 * that code could live in the boot loader.
292 * (b) Populating board-specific platform_data with the data drivers
293 * rely on to handle wiring variations.
294 * (c) Creating platform devices as meaningful on this board and
295 * with this kernel configuration.
296 *
297 * Claiming GPIOs, and setting their direction and initial values, is the
298 * responsibility of the device drivers. So is responding to probe().
299 *
300 * Board-specific knowledge like creating devices or pin setup is to be
301 * kept out of drivers as much as possible. In particular, pin setup
302 * may be handled by the boot loader, and drivers should expect it will
303 * normally have been done by the time they're probed.
304 */
305static int __init omap1_init_devices(void)
306{
307 if (!cpu_class_is_omap1())
308 return -ENODEV;
309
310 omap1_sram_init();
311 omap1_clk_late_init();
312
313 /* please keep these calls, and their implementations above,
314 * in alphabetical order so they're easier to sort through.
315 */
316
317 omap_init_rtc();
318 omap_init_uwire();
319 omap1_init_rng();
320
321 return 0;
322}
323arch_initcall(omap1_init_devices);
324
325#if IS_ENABLED(CONFIG_OMAP_WATCHDOG)
326
327static struct resource wdt_resources[] = {
328 {
329 .start = 0xfffeb000,
330 .end = 0xfffeb07F,
331 .flags = IORESOURCE_MEM,
332 },
333};
334
335static struct platform_device omap_wdt_device = {
336 .name = "omap_wdt",
337 .id = -1,
338 .num_resources = ARRAY_SIZE(wdt_resources),
339 .resource = wdt_resources,
340};
341
342static int __init omap_init_wdt(void)
343{
344 struct omap_wd_timer_platform_data pdata;
345 int ret;
346
347 if (!cpu_is_omap16xx())
348 return -ENODEV;
349
350 pdata.read_reset_sources = omap1_get_reset_sources;
351
352 ret = platform_device_register(&omap_wdt_device);
353 if (!ret) {
354 ret = platform_device_add_data(&omap_wdt_device, &pdata,
355 sizeof(pdata));
356 if (ret)
357 platform_device_del(&omap_wdt_device);
358 }
359
360 return ret;
361}
362subsys_initcall(omap_init_wdt);
363#endif
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * linux/arch/arm/mach-omap1/devices.c
4 *
5 * OMAP1 platform device setup/initialization
6 */
7
8#include <linux/dma-mapping.h>
9#include <linux/gpio.h>
10#include <linux/module.h>
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/spi/spi.h>
15
16#include <linux/platform_data/omap-wd-timer.h>
17
18#include <asm/mach/map.h>
19
20#include <mach/tc.h>
21#include <mach/mux.h>
22
23#include <mach/omap7xx.h>
24#include "camera.h"
25#include <mach/hardware.h>
26
27#include "common.h"
28#include "clock.h"
29#include "mmc.h"
30#include "sram.h"
31
32#if IS_ENABLED(CONFIG_RTC_DRV_OMAP)
33
34#define OMAP_RTC_BASE 0xfffb4800
35
36static struct resource rtc_resources[] = {
37 {
38 .start = OMAP_RTC_BASE,
39 .end = OMAP_RTC_BASE + 0x5f,
40 .flags = IORESOURCE_MEM,
41 },
42 {
43 .start = INT_RTC_TIMER,
44 .flags = IORESOURCE_IRQ,
45 },
46 {
47 .start = INT_RTC_ALARM,
48 .flags = IORESOURCE_IRQ,
49 },
50};
51
52static struct platform_device omap_rtc_device = {
53 .name = "omap_rtc",
54 .id = -1,
55 .num_resources = ARRAY_SIZE(rtc_resources),
56 .resource = rtc_resources,
57};
58
59static void omap_init_rtc(void)
60{
61 (void) platform_device_register(&omap_rtc_device);
62}
63#else
64static inline void omap_init_rtc(void) {}
65#endif
66
67static inline void omap_init_mbox(void) { }
68
69/*-------------------------------------------------------------------------*/
70
71#if IS_ENABLED(CONFIG_MMC_OMAP)
72
73static inline void omap1_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
74 int controller_nr)
75{
76 if (controller_nr == 0) {
77 if (cpu_is_omap7xx()) {
78 omap_cfg_reg(MMC_7XX_CMD);
79 omap_cfg_reg(MMC_7XX_CLK);
80 omap_cfg_reg(MMC_7XX_DAT0);
81 } else {
82 omap_cfg_reg(MMC_CMD);
83 omap_cfg_reg(MMC_CLK);
84 omap_cfg_reg(MMC_DAT0);
85 }
86
87 if (cpu_is_omap1710()) {
88 omap_cfg_reg(M15_1710_MMC_CLKI);
89 omap_cfg_reg(P19_1710_MMC_CMDDIR);
90 omap_cfg_reg(P20_1710_MMC_DATDIR0);
91 }
92 if (mmc_controller->slots[0].wires == 4 && !cpu_is_omap7xx()) {
93 omap_cfg_reg(MMC_DAT1);
94 /* NOTE: DAT2 can be on W10 (here) or M15 */
95 if (!mmc_controller->slots[0].nomux)
96 omap_cfg_reg(MMC_DAT2);
97 omap_cfg_reg(MMC_DAT3);
98 }
99 }
100
101 /* Block 2 is on newer chips, and has many pinout options */
102 if (cpu_is_omap16xx() && controller_nr == 1) {
103 if (!mmc_controller->slots[1].nomux) {
104 omap_cfg_reg(Y8_1610_MMC2_CMD);
105 omap_cfg_reg(Y10_1610_MMC2_CLK);
106 omap_cfg_reg(R18_1610_MMC2_CLKIN);
107 omap_cfg_reg(W8_1610_MMC2_DAT0);
108 if (mmc_controller->slots[1].wires == 4) {
109 omap_cfg_reg(V8_1610_MMC2_DAT1);
110 omap_cfg_reg(W15_1610_MMC2_DAT2);
111 omap_cfg_reg(R10_1610_MMC2_DAT3);
112 }
113
114 /* These are needed for the level shifter */
115 omap_cfg_reg(V9_1610_MMC2_CMDDIR);
116 omap_cfg_reg(V5_1610_MMC2_DATDIR0);
117 omap_cfg_reg(W19_1610_MMC2_DATDIR1);
118 }
119
120 /* Feedback clock must be set on OMAP-1710 MMC2 */
121 if (cpu_is_omap1710())
122 omap_writel(omap_readl(MOD_CONF_CTRL_1) | (1 << 24),
123 MOD_CONF_CTRL_1);
124 }
125}
126
127#define OMAP_MMC_NR_RES 4
128
129/*
130 * Register MMC devices.
131 */
132static int __init omap_mmc_add(const char *name, int id, unsigned long base,
133 unsigned long size, unsigned int irq,
134 unsigned rx_req, unsigned tx_req,
135 struct omap_mmc_platform_data *data)
136{
137 struct platform_device *pdev;
138 struct resource res[OMAP_MMC_NR_RES];
139 int ret;
140
141 pdev = platform_device_alloc(name, id);
142 if (!pdev)
143 return -ENOMEM;
144
145 memset(res, 0, OMAP_MMC_NR_RES * sizeof(struct resource));
146 res[0].start = base;
147 res[0].end = base + size - 1;
148 res[0].flags = IORESOURCE_MEM;
149 res[1].start = res[1].end = irq;
150 res[1].flags = IORESOURCE_IRQ;
151 res[2].start = rx_req;
152 res[2].name = "rx";
153 res[2].flags = IORESOURCE_DMA;
154 res[3].start = tx_req;
155 res[3].name = "tx";
156 res[3].flags = IORESOURCE_DMA;
157
158 if (cpu_is_omap7xx())
159 data->slots[0].features = MMC_OMAP7XX;
160 if (cpu_is_omap15xx())
161 data->slots[0].features = MMC_OMAP15XX;
162 if (cpu_is_omap16xx())
163 data->slots[0].features = MMC_OMAP16XX;
164
165 ret = platform_device_add_resources(pdev, res, ARRAY_SIZE(res));
166 if (ret == 0)
167 ret = platform_device_add_data(pdev, data, sizeof(*data));
168 if (ret)
169 goto fail;
170
171 ret = platform_device_add(pdev);
172 if (ret)
173 goto fail;
174
175 /* return device handle to board setup code */
176 data->dev = &pdev->dev;
177 return 0;
178
179fail:
180 platform_device_put(pdev);
181 return ret;
182}
183
184void __init omap1_init_mmc(struct omap_mmc_platform_data **mmc_data,
185 int nr_controllers)
186{
187 int i;
188
189 for (i = 0; i < nr_controllers; i++) {
190 unsigned long base, size;
191 unsigned rx_req, tx_req;
192 unsigned int irq = 0;
193
194 if (!mmc_data[i])
195 continue;
196
197 omap1_mmc_mux(mmc_data[i], i);
198
199 switch (i) {
200 case 0:
201 base = OMAP1_MMC1_BASE;
202 irq = INT_MMC;
203 rx_req = 22;
204 tx_req = 21;
205 break;
206 case 1:
207 if (!cpu_is_omap16xx())
208 return;
209 base = OMAP1_MMC2_BASE;
210 irq = INT_1610_MMC2;
211 rx_req = 55;
212 tx_req = 54;
213 break;
214 default:
215 continue;
216 }
217 size = OMAP1_MMC_SIZE;
218
219 omap_mmc_add("mmci-omap", i, base, size, irq,
220 rx_req, tx_req, mmc_data[i]);
221 }
222}
223
224#endif
225
226/*-------------------------------------------------------------------------*/
227
228/* OMAP7xx SPI support */
229#if IS_ENABLED(CONFIG_SPI_OMAP_100K)
230
231struct platform_device omap_spi1 = {
232 .name = "omap1_spi100k",
233 .id = 1,
234};
235
236struct platform_device omap_spi2 = {
237 .name = "omap1_spi100k",
238 .id = 2,
239};
240
241static void omap_init_spi100k(void)
242{
243 if (!cpu_is_omap7xx())
244 return;
245
246 omap_spi1.dev.platform_data = ioremap(OMAP7XX_SPI1_BASE, 0x7ff);
247 if (omap_spi1.dev.platform_data)
248 platform_device_register(&omap_spi1);
249
250 omap_spi2.dev.platform_data = ioremap(OMAP7XX_SPI2_BASE, 0x7ff);
251 if (omap_spi2.dev.platform_data)
252 platform_device_register(&omap_spi2);
253}
254
255#else
256static inline void omap_init_spi100k(void)
257{
258}
259#endif
260
261
262#define OMAP1_CAMERA_BASE 0xfffb6800
263#define OMAP1_CAMERA_IOSIZE 0x1c
264
265static struct resource omap1_camera_resources[] = {
266 [0] = {
267 .start = OMAP1_CAMERA_BASE,
268 .end = OMAP1_CAMERA_BASE + OMAP1_CAMERA_IOSIZE - 1,
269 .flags = IORESOURCE_MEM,
270 },
271 [1] = {
272 .start = INT_CAMERA,
273 .flags = IORESOURCE_IRQ,
274 },
275};
276
277static u64 omap1_camera_dma_mask = DMA_BIT_MASK(32);
278
279static struct platform_device omap1_camera_device = {
280 .name = "omap1-camera",
281 .id = 0, /* This is used to put cameras on this interface */
282 .dev = {
283 .dma_mask = &omap1_camera_dma_mask,
284 .coherent_dma_mask = DMA_BIT_MASK(32),
285 },
286 .num_resources = ARRAY_SIZE(omap1_camera_resources),
287 .resource = omap1_camera_resources,
288};
289
290void __init omap1_camera_init(void *info)
291{
292 struct platform_device *dev = &omap1_camera_device;
293 int ret;
294
295 dev->dev.platform_data = info;
296
297 ret = platform_device_register(dev);
298 if (ret)
299 dev_err(&dev->dev, "unable to register device: %d\n", ret);
300}
301
302
303/*-------------------------------------------------------------------------*/
304
305static inline void omap_init_sti(void) {}
306
307/* Numbering for the SPI-capable controllers when used for SPI:
308 * spi = 1
309 * uwire = 2
310 * mmc1..2 = 3..4
311 * mcbsp1..3 = 5..7
312 */
313
314#if IS_ENABLED(CONFIG_SPI_OMAP_UWIRE)
315
316#define OMAP_UWIRE_BASE 0xfffb3000
317
318static struct resource uwire_resources[] = {
319 {
320 .start = OMAP_UWIRE_BASE,
321 .end = OMAP_UWIRE_BASE + 0x20,
322 .flags = IORESOURCE_MEM,
323 },
324};
325
326static struct platform_device omap_uwire_device = {
327 .name = "omap_uwire",
328 .id = -1,
329 .num_resources = ARRAY_SIZE(uwire_resources),
330 .resource = uwire_resources,
331};
332
333static void omap_init_uwire(void)
334{
335 /* FIXME define and use a boot tag; not all boards will be hooking
336 * up devices to the microwire controller, and multi-board configs
337 * mean that CONFIG_SPI_OMAP_UWIRE may be configured anyway...
338 */
339
340 /* board-specific code must configure chipselects (only a few
341 * are normally used) and SCLK/SDI/SDO (each has two choices).
342 */
343 (void) platform_device_register(&omap_uwire_device);
344}
345#else
346static inline void omap_init_uwire(void) {}
347#endif
348
349
350#define OMAP1_RNG_BASE 0xfffe5000
351
352static struct resource omap1_rng_resources[] = {
353 {
354 .start = OMAP1_RNG_BASE,
355 .end = OMAP1_RNG_BASE + 0x4f,
356 .flags = IORESOURCE_MEM,
357 },
358};
359
360static struct platform_device omap1_rng_device = {
361 .name = "omap_rng",
362 .id = -1,
363 .num_resources = ARRAY_SIZE(omap1_rng_resources),
364 .resource = omap1_rng_resources,
365};
366
367static void omap1_init_rng(void)
368{
369 if (!cpu_is_omap16xx())
370 return;
371
372 (void) platform_device_register(&omap1_rng_device);
373}
374
375/*-------------------------------------------------------------------------*/
376
377/*
378 * This gets called after board-specific INIT_MACHINE, and initializes most
379 * on-chip peripherals accessible on this board (except for few like USB):
380 *
381 * (a) Does any "standard config" pin muxing needed. Board-specific
382 * code will have muxed GPIO pins and done "nonstandard" setup;
383 * that code could live in the boot loader.
384 * (b) Populating board-specific platform_data with the data drivers
385 * rely on to handle wiring variations.
386 * (c) Creating platform devices as meaningful on this board and
387 * with this kernel configuration.
388 *
389 * Claiming GPIOs, and setting their direction and initial values, is the
390 * responsibility of the device drivers. So is responding to probe().
391 *
392 * Board-specific knowledge like creating devices or pin setup is to be
393 * kept out of drivers as much as possible. In particular, pin setup
394 * may be handled by the boot loader, and drivers should expect it will
395 * normally have been done by the time they're probed.
396 */
397static int __init omap1_init_devices(void)
398{
399 if (!cpu_class_is_omap1())
400 return -ENODEV;
401
402 omap_sram_init();
403 omap1_clk_late_init();
404
405 /* please keep these calls, and their implementations above,
406 * in alphabetical order so they're easier to sort through.
407 */
408
409 omap_init_mbox();
410 omap_init_rtc();
411 omap_init_spi100k();
412 omap_init_sti();
413 omap_init_uwire();
414 omap1_init_rng();
415
416 return 0;
417}
418arch_initcall(omap1_init_devices);
419
420#if IS_ENABLED(CONFIG_OMAP_WATCHDOG)
421
422static struct resource wdt_resources[] = {
423 {
424 .start = 0xfffeb000,
425 .end = 0xfffeb07F,
426 .flags = IORESOURCE_MEM,
427 },
428};
429
430static struct platform_device omap_wdt_device = {
431 .name = "omap_wdt",
432 .id = -1,
433 .num_resources = ARRAY_SIZE(wdt_resources),
434 .resource = wdt_resources,
435};
436
437static int __init omap_init_wdt(void)
438{
439 struct omap_wd_timer_platform_data pdata;
440 int ret;
441
442 if (!cpu_is_omap16xx())
443 return -ENODEV;
444
445 pdata.read_reset_sources = omap1_get_reset_sources;
446
447 ret = platform_device_register(&omap_wdt_device);
448 if (!ret) {
449 ret = platform_device_add_data(&omap_wdt_device, &pdata,
450 sizeof(pdata));
451 if (ret)
452 platform_device_del(&omap_wdt_device);
453 }
454
455 return ret;
456}
457subsys_initcall(omap_init_wdt);
458#endif