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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2011-2012 Calxeda, Inc.
4 */
5
6/ {
7 chosen {
8 bootargs = "console=ttyAMA0";
9 };
10
11 psci {
12 compatible = "arm,psci";
13 method = "smc";
14 cpu_suspend = <0x84000002>;
15 cpu_off = <0x84000004>;
16 cpu_on = <0x84000006>;
17 };
18
19 soc {
20 #address-cells = <1>;
21 #size-cells = <1>;
22 compatible = "simple-bus";
23 interrupt-parent = <&intc>;
24
25 sata@ffe08000 {
26 compatible = "calxeda,hb-ahci";
27 reg = <0xffe08000 0x10000>;
28 interrupts = <0 83 4>;
29 dma-coherent;
30 calxeda,port-phys = <&combophy5 0 &combophy0 0
31 &combophy0 1 &combophy0 2
32 &combophy0 3>;
33 calxeda,sgpio-gpio =<&gpioh 5 1 &gpioh 6 1 &gpioh 7 1>;
34 calxeda,led-order = <4 0 1 2 3>;
35 };
36
37 sdhci@ffe0e000 {
38 compatible = "calxeda,hb-sdhci";
39 reg = <0xffe0e000 0x1000>;
40 interrupts = <0 90 4>;
41 clocks = <&eclk>;
42 status = "disabled";
43 };
44
45 ipc@fff20000 {
46 compatible = "arm,pl320", "arm,primecell";
47 reg = <0xfff20000 0x1000>;
48 interrupts = <0 7 4>;
49 clocks = <&pclk>;
50 clock-names = "apb_pclk";
51 };
52
53 gpioe: gpio@fff30000 {
54 #gpio-cells = <2>;
55 compatible = "arm,pl061", "arm,primecell";
56 gpio-controller;
57 reg = <0xfff30000 0x1000>;
58 interrupts = <0 14 4>;
59 clocks = <&pclk>;
60 clock-names = "apb_pclk";
61 status = "disabled";
62 };
63
64 gpiof: gpio@fff31000 {
65 #gpio-cells = <2>;
66 compatible = "arm,pl061", "arm,primecell";
67 gpio-controller;
68 reg = <0xfff31000 0x1000>;
69 interrupts = <0 15 4>;
70 clocks = <&pclk>;
71 clock-names = "apb_pclk";
72 status = "disabled";
73 };
74
75 gpiog: gpio@fff32000 {
76 #gpio-cells = <2>;
77 compatible = "arm,pl061", "arm,primecell";
78 gpio-controller;
79 reg = <0xfff32000 0x1000>;
80 interrupts = <0 16 4>;
81 clocks = <&pclk>;
82 clock-names = "apb_pclk";
83 status = "disabled";
84 };
85
86 gpioh: gpio@fff33000 {
87 #gpio-cells = <2>;
88 compatible = "arm,pl061", "arm,primecell";
89 gpio-controller;
90 reg = <0xfff33000 0x1000>;
91 interrupts = <0 17 4>;
92 clocks = <&pclk>;
93 clock-names = "apb_pclk";
94 status = "disabled";
95 };
96
97 timer@fff34000 {
98 compatible = "arm,sp804", "arm,primecell";
99 reg = <0xfff34000 0x1000>;
100 interrupts = <0 18 4>;
101 clocks = <&pclk>;
102 clock-names = "apb_pclk";
103 };
104
105 rtc@fff35000 {
106 compatible = "arm,pl031", "arm,primecell";
107 reg = <0xfff35000 0x1000>;
108 interrupts = <0 19 4>;
109 clocks = <&pclk>;
110 clock-names = "apb_pclk";
111 };
112
113 serial@fff36000 {
114 compatible = "arm,pl011", "arm,primecell";
115 reg = <0xfff36000 0x1000>;
116 interrupts = <0 20 4>;
117 clocks = <&pclk>;
118 clock-names = "apb_pclk";
119 };
120
121 smic@fff3a000 {
122 compatible = "ipmi-smic";
123 device_type = "ipmi";
124 reg = <0xfff3a000 0x1000>;
125 interrupts = <0 24 4>;
126 reg-size = <4>;
127 reg-spacing = <4>;
128 };
129
130 sregs@fff3c000 {
131 compatible = "calxeda,hb-sregs";
132 reg = <0xfff3c000 0x1000>;
133
134 clocks {
135 #address-cells = <1>;
136 #size-cells = <0>;
137
138 osc: oscillator {
139 #clock-cells = <0>;
140 compatible = "fixed-clock";
141 clock-frequency = <33333000>;
142 };
143
144 ddrpll: ddrpll {
145 #clock-cells = <0>;
146 compatible = "calxeda,hb-pll-clock";
147 clocks = <&osc>;
148 reg = <0x108>;
149 };
150
151 a9pll: a9pll {
152 #clock-cells = <0>;
153 compatible = "calxeda,hb-pll-clock";
154 clocks = <&osc>;
155 reg = <0x100>;
156 };
157
158 a9periphclk: a9periphclk {
159 #clock-cells = <0>;
160 compatible = "calxeda,hb-a9periph-clock";
161 clocks = <&a9pll>;
162 reg = <0x104>;
163 };
164
165 a9bclk: a9bclk {
166 #clock-cells = <0>;
167 compatible = "calxeda,hb-a9bus-clock";
168 clocks = <&a9pll>;
169 reg = <0x104>;
170 };
171
172 emmcpll: emmcpll {
173 #clock-cells = <0>;
174 compatible = "calxeda,hb-pll-clock";
175 clocks = <&osc>;
176 reg = <0x10C>;
177 };
178
179 eclk: eclk {
180 #clock-cells = <0>;
181 compatible = "calxeda,hb-emmc-clock";
182 clocks = <&emmcpll>;
183 reg = <0x114>;
184 };
185
186 pclk: pclk {
187 #clock-cells = <0>;
188 compatible = "fixed-clock";
189 clock-frequency = <150000000>;
190 };
191 };
192 };
193
194 dma@fff3d000 {
195 compatible = "arm,pl330", "arm,primecell";
196 reg = <0xfff3d000 0x1000>;
197 interrupts = <0 92 4>;
198 clocks = <&pclk>;
199 clock-names = "apb_pclk";
200 };
201
202 ethernet@fff50000 {
203 compatible = "calxeda,hb-xgmac";
204 reg = <0xfff50000 0x1000>;
205 interrupts = <0 77 4 0 78 4 0 79 4>;
206 dma-coherent;
207 };
208
209 ethernet@fff51000 {
210 compatible = "calxeda,hb-xgmac";
211 reg = <0xfff51000 0x1000>;
212 interrupts = <0 80 4 0 81 4 0 82 4>;
213 dma-coherent;
214 };
215
216 combophy0: combo-phy@fff58000 {
217 compatible = "calxeda,hb-combophy";
218 #phy-cells = <1>;
219 reg = <0xfff58000 0x1000>;
220 phydev = <5>;
221 };
222
223 combophy5: combo-phy@fff5d000 {
224 compatible = "calxeda,hb-combophy";
225 #phy-cells = <1>;
226 reg = <0xfff5d000 0x1000>;
227 phydev = <31>;
228 };
229 };
230};