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v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-only
  2//
  3// Freescale MPC5200 PSC DMA
  4// ALSA SoC Platform driver
  5//
  6// Copyright (C) 2008 Secret Lab Technologies Ltd.
  7// Copyright (C) 2009 Jon Smirl, Digispeaker
  8
  9#include <linux/module.h>
 
 10#include <linux/dma-mapping.h>
 11#include <linux/slab.h>
 12#include <linux/of.h>
 13#include <linux/of_address.h>
 14#include <linux/of_irq.h>
 15#include <linux/platform_device.h>
 16
 17#include <sound/soc.h>
 18
 19#include <linux/fsl/bestcomm/bestcomm.h>
 20#include <linux/fsl/bestcomm/gen_bd.h>
 21#include <asm/mpc52xx_psc.h>
 22
 23#include "mpc5200_dma.h"
 24
 25#define DRV_NAME "mpc5200_dma"
 26
 27/*
 28 * Interrupt handlers
 29 */
 30static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
 31{
 32	struct psc_dma *psc_dma = _psc_dma;
 33	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
 34	u16 isr;
 35
 36	isr = in_be16(&regs->mpc52xx_psc_isr);
 37
 38	/* Playback underrun error */
 39	if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
 40		psc_dma->stats.underrun_count++;
 41
 42	/* Capture overrun error */
 43	if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
 44		psc_dma->stats.overrun_count++;
 45
 46	out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
 47
 48	return IRQ_HANDLED;
 49}
 50
 51/**
 52 * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
 53 * @s: pointer to stream private data structure
 54 *
 55 * Enqueues another audio period buffer into the bestcomm queue.
 56 *
 57 * Note: The routine must only be called when there is space available in
 58 * the queue.  Otherwise the enqueue will fail and the audio ring buffer
 59 * will get out of sync
 60 */
 61static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
 62{
 63	struct bcom_bd *bd;
 64
 65	/* Prepare and enqueue the next buffer descriptor */
 66	bd = bcom_prepare_next_buffer(s->bcom_task);
 67	bd->status = s->period_bytes;
 68	bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes);
 69	bcom_submit_next_buffer(s->bcom_task, NULL);
 70
 71	/* Update for next period */
 72	s->period_next = (s->period_next + 1) % s->runtime->periods;
 73}
 74
 75/* Bestcomm DMA irq handler */
 76static irqreturn_t psc_dma_bcom_irq(int irq, void *_psc_dma_stream)
 77{
 78	struct psc_dma_stream *s = _psc_dma_stream;
 79
 80	spin_lock(&s->psc_dma->lock);
 81	/* For each finished period, dequeue the completed period buffer
 82	 * and enqueue a new one in it's place. */
 83	while (bcom_buffer_done(s->bcom_task)) {
 84		bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
 85
 86		s->period_current = (s->period_current+1) % s->runtime->periods;
 87		s->period_count++;
 88
 89		psc_dma_bcom_enqueue_next_buffer(s);
 90	}
 91	spin_unlock(&s->psc_dma->lock);
 92
 93	/* If the stream is active, then also inform the PCM middle layer
 94	 * of the period finished event. */
 95	if (s->active)
 96		snd_pcm_period_elapsed(s->stream);
 97
 98	return IRQ_HANDLED;
 99}
100
 
 
 
 
 
 
 
101/**
102 * psc_dma_trigger: start and stop the DMA transfer.
103 * @component: triggered component
104 * @substream: triggered substream
105 * @cmd: triggered command
106 *
107 * This function is called by ALSA to start, stop, pause, and resume the DMA
108 * transfer of data.
109 */
110static int psc_dma_trigger(struct snd_soc_component *component,
111			   struct snd_pcm_substream *substream, int cmd)
112{
113	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
114	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
115	struct snd_pcm_runtime *runtime = substream->runtime;
116	struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
117	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
118	u16 imr;
119	unsigned long flags;
120	int i;
121
122	switch (cmd) {
123	case SNDRV_PCM_TRIGGER_START:
124		dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n",
125			substream->pstr->stream, runtime->frame_bits,
126			(int)runtime->period_size, runtime->periods);
127		s->period_bytes = frames_to_bytes(runtime,
128						  runtime->period_size);
129		s->period_next = 0;
130		s->period_current = 0;
131		s->active = 1;
132		s->period_count = 0;
133		s->runtime = runtime;
134
135		/* Fill up the bestcomm bd queue and enable DMA.
136		 * This will begin filling the PSC's fifo.
137		 */
138		spin_lock_irqsave(&psc_dma->lock, flags);
139
140		if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
141			bcom_gen_bd_rx_reset(s->bcom_task);
142		else
143			bcom_gen_bd_tx_reset(s->bcom_task);
144
145		for (i = 0; i < runtime->periods; i++)
146			if (!bcom_queue_full(s->bcom_task))
147				psc_dma_bcom_enqueue_next_buffer(s);
148
149		bcom_enable(s->bcom_task);
150		spin_unlock_irqrestore(&psc_dma->lock, flags);
151
152		out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
153
154		break;
155
156	case SNDRV_PCM_TRIGGER_STOP:
157		dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n",
158			substream->pstr->stream, s->period_count);
159		s->active = 0;
160
161		spin_lock_irqsave(&psc_dma->lock, flags);
162		bcom_disable(s->bcom_task);
163		if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
164			bcom_gen_bd_rx_reset(s->bcom_task);
165		else
166			bcom_gen_bd_tx_reset(s->bcom_task);
167		spin_unlock_irqrestore(&psc_dma->lock, flags);
168
169		break;
170
171	default:
172		dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n",
173			substream->pstr->stream, cmd);
174		return -EINVAL;
175	}
176
177	/* Update interrupt enable settings */
178	imr = 0;
179	if (psc_dma->playback.active)
180		imr |= MPC52xx_PSC_IMR_TXEMP;
181	if (psc_dma->capture.active)
182		imr |= MPC52xx_PSC_IMR_ORERR;
183	out_be16(&regs->isr_imr.imr, psc_dma->imr | imr);
184
185	return 0;
186}
187
188
189/* ---------------------------------------------------------------------
190 * The PSC DMA 'ASoC platform' driver
191 *
192 * Can be referenced by an 'ASoC machine' driver
193 * This driver only deals with the audio bus; it doesn't have any
194 * interaction with the attached codec
195 */
196
197static const struct snd_pcm_hardware psc_dma_hardware = {
198	.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
199		SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
200		SNDRV_PCM_INFO_BATCH,
201	.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
202		SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
203	.period_bytes_max	= 1024 * 1024,
204	.period_bytes_min	= 32,
205	.periods_min		= 2,
206	.periods_max		= 256,
207	.buffer_bytes_max	= 2 * 1024 * 1024,
208	.fifo_size		= 512,
209};
210
211static int psc_dma_open(struct snd_soc_component *component,
212			struct snd_pcm_substream *substream)
213{
214	struct snd_pcm_runtime *runtime = substream->runtime;
215	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
216	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
217	struct psc_dma_stream *s;
218	int rc;
219
220	dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
221
222	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
223		s = &psc_dma->capture;
224	else
225		s = &psc_dma->playback;
226
227	snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
228
229	rc = snd_pcm_hw_constraint_integer(runtime,
230		SNDRV_PCM_HW_PARAM_PERIODS);
231	if (rc < 0) {
232		dev_err(substream->pcm->card->dev, "invalid buffer size\n");
233		return rc;
234	}
235
236	s->stream = substream;
237	return 0;
238}
239
240static int psc_dma_close(struct snd_soc_component *component,
241			 struct snd_pcm_substream *substream)
242{
243	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
244	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
245	struct psc_dma_stream *s;
246
247	dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
248
249	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
250		s = &psc_dma->capture;
251	else
252		s = &psc_dma->playback;
253
254	if (!psc_dma->playback.active &&
255	    !psc_dma->capture.active) {
256
257		/* Disable all interrupts and reset the PSC */
258		out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
259		out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
260	}
261	s->stream = NULL;
262	return 0;
263}
264
265static snd_pcm_uframes_t
266psc_dma_pointer(struct snd_soc_component *component,
267		struct snd_pcm_substream *substream)
268{
269	struct snd_soc_pcm_runtime *rtd = snd_soc_substream_to_rtd(substream);
270	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(snd_soc_rtd_to_cpu(rtd, 0));
271	struct psc_dma_stream *s;
272	dma_addr_t count;
273
274	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
275		s = &psc_dma->capture;
276	else
277		s = &psc_dma->playback;
278
279	count = s->period_current * s->period_bytes;
280
281	return bytes_to_frames(substream->runtime, count);
282}
283
 
 
 
 
 
 
 
 
 
284static int psc_dma_new(struct snd_soc_component *component,
285		       struct snd_soc_pcm_runtime *rtd)
286{
287	struct snd_card *card = rtd->card->snd_card;
288	struct snd_soc_dai *dai = snd_soc_rtd_to_cpu(rtd, 0);
289	struct snd_pcm *pcm = rtd->pcm;
290	size_t size = psc_dma_hardware.buffer_bytes_max;
291	int rc;
292
293	dev_dbg(component->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
294		card, dai, pcm);
295
296	rc = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
297	if (rc)
298		return rc;
299
300	return snd_pcm_set_fixed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV, card->dev,
301					    size);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
302}
303
304static const struct snd_soc_component_driver mpc5200_audio_dma_component = {
305	.name		= DRV_NAME,
306	.open		= psc_dma_open,
307	.close		= psc_dma_close,
 
308	.pointer	= psc_dma_pointer,
309	.trigger	= psc_dma_trigger,
 
310	.pcm_construct	= psc_dma_new,
 
311};
312
313int mpc5200_audio_dma_create(struct platform_device *op)
314{
315	phys_addr_t fifo;
316	struct psc_dma *psc_dma;
317	struct resource res;
318	int size, irq, rc;
319	const __be32 *prop;
320	void __iomem *regs;
321	int ret;
322
323	/* Fetch the registers and IRQ of the PSC */
324	irq = irq_of_parse_and_map(op->dev.of_node, 0);
325	if (of_address_to_resource(op->dev.of_node, 0, &res)) {
326		dev_err(&op->dev, "Missing reg property\n");
327		return -ENODEV;
328	}
329	regs = ioremap(res.start, resource_size(&res));
330	if (!regs) {
331		dev_err(&op->dev, "Could not map registers\n");
332		return -ENODEV;
333	}
334
335	/* Allocate and initialize the driver private data */
336	psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
337	if (!psc_dma) {
338		ret = -ENOMEM;
339		goto out_unmap;
340	}
341
342	/* Get the PSC ID */
343	prop = of_get_property(op->dev.of_node, "cell-index", &size);
344	if (!prop || size < sizeof *prop) {
345		ret = -ENODEV;
346		goto out_free;
347	}
348
349	spin_lock_init(&psc_dma->lock);
350	mutex_init(&psc_dma->mutex);
351	psc_dma->id = be32_to_cpu(*prop);
352	psc_dma->irq = irq;
353	psc_dma->psc_regs = regs;
354	psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
355	psc_dma->dev = &op->dev;
356	psc_dma->playback.psc_dma = psc_dma;
357	psc_dma->capture.psc_dma = psc_dma;
358	snprintf(psc_dma->name, sizeof(psc_dma->name), "PSC%d", psc_dma->id);
359
360	/* Find the address of the fifo data registers and setup the
361	 * DMA tasks */
362	fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
363	psc_dma->capture.bcom_task =
364		bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
365	psc_dma->playback.bcom_task =
366		bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
367	if (!psc_dma->capture.bcom_task ||
368	    !psc_dma->playback.bcom_task) {
369		dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
370		ret = -ENODEV;
371		goto out_free;
372	}
373
374	/* Disable all interrupts and reset the PSC */
375	out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
376	 /* reset receiver */
377	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
378	 /* reset transmitter */
379	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
380	 /* reset error */
381	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
382	 /* reset mode */
383	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
384
385	/* Set up mode register;
386	 * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
387	 * Second write: register Normal mode for non loopback
388	 */
389	out_8(&psc_dma->psc_regs->mode, 0);
390	out_8(&psc_dma->psc_regs->mode, 0);
391
392	/* Set the TX and RX fifo alarm thresholds */
393	out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
394	out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
395	out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
396	out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
397
398	/* Lookup the IRQ numbers */
399	psc_dma->playback.irq =
400		bcom_get_task_irq(psc_dma->playback.bcom_task);
401	psc_dma->capture.irq =
402		bcom_get_task_irq(psc_dma->capture.bcom_task);
403
404	rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
405			 "psc-dma-status", psc_dma);
406	rc |= request_irq(psc_dma->capture.irq, &psc_dma_bcom_irq, IRQF_SHARED,
407			  "psc-dma-capture", &psc_dma->capture);
408	rc |= request_irq(psc_dma->playback.irq, &psc_dma_bcom_irq, IRQF_SHARED,
409			  "psc-dma-playback", &psc_dma->playback);
410	if (rc) {
411		ret = -ENODEV;
412		goto out_irq;
413	}
414
415	/* Save what we've done so it can be found again later */
416	dev_set_drvdata(&op->dev, psc_dma);
417
418	/* Tell the ASoC OF helpers about it */
419	return devm_snd_soc_register_component(&op->dev,
420					&mpc5200_audio_dma_component, NULL, 0);
421out_irq:
422	free_irq(psc_dma->irq, psc_dma);
423	free_irq(psc_dma->capture.irq, &psc_dma->capture);
424	free_irq(psc_dma->playback.irq, &psc_dma->playback);
425out_free:
426	kfree(psc_dma);
427out_unmap:
428	iounmap(regs);
429	return ret;
430}
431EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);
432
433int mpc5200_audio_dma_destroy(struct platform_device *op)
434{
435	struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
436
437	dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
438
439	bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
440	bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
441
442	/* Release irqs */
443	free_irq(psc_dma->irq, psc_dma);
444	free_irq(psc_dma->capture.irq, &psc_dma->capture);
445	free_irq(psc_dma->playback.irq, &psc_dma->playback);
446
447	iounmap(psc_dma->psc_regs);
448	kfree(psc_dma);
449	dev_set_drvdata(&op->dev, NULL);
450
451	return 0;
452}
453EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);
454
455MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
456MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
457MODULE_LICENSE("GPL");
v5.14.15
  1// SPDX-License-Identifier: GPL-2.0-only
  2//
  3// Freescale MPC5200 PSC DMA
  4// ALSA SoC Platform driver
  5//
  6// Copyright (C) 2008 Secret Lab Technologies Ltd.
  7// Copyright (C) 2009 Jon Smirl, Digispeaker
  8
  9#include <linux/module.h>
 10#include <linux/of_device.h>
 11#include <linux/dma-mapping.h>
 12#include <linux/slab.h>
 
 13#include <linux/of_address.h>
 14#include <linux/of_irq.h>
 15#include <linux/of_platform.h>
 16
 17#include <sound/soc.h>
 18
 19#include <linux/fsl/bestcomm/bestcomm.h>
 20#include <linux/fsl/bestcomm/gen_bd.h>
 21#include <asm/mpc52xx_psc.h>
 22
 23#include "mpc5200_dma.h"
 24
 25#define DRV_NAME "mpc5200_dma"
 26
 27/*
 28 * Interrupt handlers
 29 */
 30static irqreturn_t psc_dma_status_irq(int irq, void *_psc_dma)
 31{
 32	struct psc_dma *psc_dma = _psc_dma;
 33	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
 34	u16 isr;
 35
 36	isr = in_be16(&regs->mpc52xx_psc_isr);
 37
 38	/* Playback underrun error */
 39	if (psc_dma->playback.active && (isr & MPC52xx_PSC_IMR_TXEMP))
 40		psc_dma->stats.underrun_count++;
 41
 42	/* Capture overrun error */
 43	if (psc_dma->capture.active && (isr & MPC52xx_PSC_IMR_ORERR))
 44		psc_dma->stats.overrun_count++;
 45
 46	out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
 47
 48	return IRQ_HANDLED;
 49}
 50
 51/**
 52 * psc_dma_bcom_enqueue_next_buffer - Enqueue another audio buffer
 53 * @s: pointer to stream private data structure
 54 *
 55 * Enqueues another audio period buffer into the bestcomm queue.
 56 *
 57 * Note: The routine must only be called when there is space available in
 58 * the queue.  Otherwise the enqueue will fail and the audio ring buffer
 59 * will get out of sync
 60 */
 61static void psc_dma_bcom_enqueue_next_buffer(struct psc_dma_stream *s)
 62{
 63	struct bcom_bd *bd;
 64
 65	/* Prepare and enqueue the next buffer descriptor */
 66	bd = bcom_prepare_next_buffer(s->bcom_task);
 67	bd->status = s->period_bytes;
 68	bd->data[0] = s->runtime->dma_addr + (s->period_next * s->period_bytes);
 69	bcom_submit_next_buffer(s->bcom_task, NULL);
 70
 71	/* Update for next period */
 72	s->period_next = (s->period_next + 1) % s->runtime->periods;
 73}
 74
 75/* Bestcomm DMA irq handler */
 76static irqreturn_t psc_dma_bcom_irq(int irq, void *_psc_dma_stream)
 77{
 78	struct psc_dma_stream *s = _psc_dma_stream;
 79
 80	spin_lock(&s->psc_dma->lock);
 81	/* For each finished period, dequeue the completed period buffer
 82	 * and enqueue a new one in it's place. */
 83	while (bcom_buffer_done(s->bcom_task)) {
 84		bcom_retrieve_buffer(s->bcom_task, NULL, NULL);
 85
 86		s->period_current = (s->period_current+1) % s->runtime->periods;
 87		s->period_count++;
 88
 89		psc_dma_bcom_enqueue_next_buffer(s);
 90	}
 91	spin_unlock(&s->psc_dma->lock);
 92
 93	/* If the stream is active, then also inform the PCM middle layer
 94	 * of the period finished event. */
 95	if (s->active)
 96		snd_pcm_period_elapsed(s->stream);
 97
 98	return IRQ_HANDLED;
 99}
100
101static int psc_dma_hw_free(struct snd_soc_component *component,
102			   struct snd_pcm_substream *substream)
103{
104	snd_pcm_set_runtime_buffer(substream, NULL);
105	return 0;
106}
107
108/**
109 * psc_dma_trigger: start and stop the DMA transfer.
 
 
 
110 *
111 * This function is called by ALSA to start, stop, pause, and resume the DMA
112 * transfer of data.
113 */
114static int psc_dma_trigger(struct snd_soc_component *component,
115			   struct snd_pcm_substream *substream, int cmd)
116{
117	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
118	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0));
119	struct snd_pcm_runtime *runtime = substream->runtime;
120	struct psc_dma_stream *s = to_psc_dma_stream(substream, psc_dma);
121	struct mpc52xx_psc __iomem *regs = psc_dma->psc_regs;
122	u16 imr;
123	unsigned long flags;
124	int i;
125
126	switch (cmd) {
127	case SNDRV_PCM_TRIGGER_START:
128		dev_dbg(psc_dma->dev, "START: stream=%i fbits=%u ps=%u #p=%u\n",
129			substream->pstr->stream, runtime->frame_bits,
130			(int)runtime->period_size, runtime->periods);
131		s->period_bytes = frames_to_bytes(runtime,
132						  runtime->period_size);
133		s->period_next = 0;
134		s->period_current = 0;
135		s->active = 1;
136		s->period_count = 0;
137		s->runtime = runtime;
138
139		/* Fill up the bestcomm bd queue and enable DMA.
140		 * This will begin filling the PSC's fifo.
141		 */
142		spin_lock_irqsave(&psc_dma->lock, flags);
143
144		if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
145			bcom_gen_bd_rx_reset(s->bcom_task);
146		else
147			bcom_gen_bd_tx_reset(s->bcom_task);
148
149		for (i = 0; i < runtime->periods; i++)
150			if (!bcom_queue_full(s->bcom_task))
151				psc_dma_bcom_enqueue_next_buffer(s);
152
153		bcom_enable(s->bcom_task);
154		spin_unlock_irqrestore(&psc_dma->lock, flags);
155
156		out_8(&regs->command, MPC52xx_PSC_RST_ERR_STAT);
157
158		break;
159
160	case SNDRV_PCM_TRIGGER_STOP:
161		dev_dbg(psc_dma->dev, "STOP: stream=%i periods_count=%i\n",
162			substream->pstr->stream, s->period_count);
163		s->active = 0;
164
165		spin_lock_irqsave(&psc_dma->lock, flags);
166		bcom_disable(s->bcom_task);
167		if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
168			bcom_gen_bd_rx_reset(s->bcom_task);
169		else
170			bcom_gen_bd_tx_reset(s->bcom_task);
171		spin_unlock_irqrestore(&psc_dma->lock, flags);
172
173		break;
174
175	default:
176		dev_dbg(psc_dma->dev, "unhandled trigger: stream=%i cmd=%i\n",
177			substream->pstr->stream, cmd);
178		return -EINVAL;
179	}
180
181	/* Update interrupt enable settings */
182	imr = 0;
183	if (psc_dma->playback.active)
184		imr |= MPC52xx_PSC_IMR_TXEMP;
185	if (psc_dma->capture.active)
186		imr |= MPC52xx_PSC_IMR_ORERR;
187	out_be16(&regs->isr_imr.imr, psc_dma->imr | imr);
188
189	return 0;
190}
191
192
193/* ---------------------------------------------------------------------
194 * The PSC DMA 'ASoC platform' driver
195 *
196 * Can be referenced by an 'ASoC machine' driver
197 * This driver only deals with the audio bus; it doesn't have any
198 * interaction with the attached codec
199 */
200
201static const struct snd_pcm_hardware psc_dma_hardware = {
202	.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
203		SNDRV_PCM_INFO_INTERLEAVED | SNDRV_PCM_INFO_BLOCK_TRANSFER |
204		SNDRV_PCM_INFO_BATCH,
205	.formats = SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_S16_BE |
206		SNDRV_PCM_FMTBIT_S24_BE | SNDRV_PCM_FMTBIT_S32_BE,
207	.period_bytes_max	= 1024 * 1024,
208	.period_bytes_min	= 32,
209	.periods_min		= 2,
210	.periods_max		= 256,
211	.buffer_bytes_max	= 2 * 1024 * 1024,
212	.fifo_size		= 512,
213};
214
215static int psc_dma_open(struct snd_soc_component *component,
216			struct snd_pcm_substream *substream)
217{
218	struct snd_pcm_runtime *runtime = substream->runtime;
219	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
220	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0));
221	struct psc_dma_stream *s;
222	int rc;
223
224	dev_dbg(psc_dma->dev, "psc_dma_open(substream=%p)\n", substream);
225
226	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
227		s = &psc_dma->capture;
228	else
229		s = &psc_dma->playback;
230
231	snd_soc_set_runtime_hwparams(substream, &psc_dma_hardware);
232
233	rc = snd_pcm_hw_constraint_integer(runtime,
234		SNDRV_PCM_HW_PARAM_PERIODS);
235	if (rc < 0) {
236		dev_err(substream->pcm->card->dev, "invalid buffer size\n");
237		return rc;
238	}
239
240	s->stream = substream;
241	return 0;
242}
243
244static int psc_dma_close(struct snd_soc_component *component,
245			 struct snd_pcm_substream *substream)
246{
247	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
248	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0));
249	struct psc_dma_stream *s;
250
251	dev_dbg(psc_dma->dev, "psc_dma_close(substream=%p)\n", substream);
252
253	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
254		s = &psc_dma->capture;
255	else
256		s = &psc_dma->playback;
257
258	if (!psc_dma->playback.active &&
259	    !psc_dma->capture.active) {
260
261		/* Disable all interrupts and reset the PSC */
262		out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
263		out_8(&psc_dma->psc_regs->command, 4 << 4); /* reset error */
264	}
265	s->stream = NULL;
266	return 0;
267}
268
269static snd_pcm_uframes_t
270psc_dma_pointer(struct snd_soc_component *component,
271		struct snd_pcm_substream *substream)
272{
273	struct snd_soc_pcm_runtime *rtd = asoc_substream_to_rtd(substream);
274	struct psc_dma *psc_dma = snd_soc_dai_get_drvdata(asoc_rtd_to_cpu(rtd, 0));
275	struct psc_dma_stream *s;
276	dma_addr_t count;
277
278	if (substream->pstr->stream == SNDRV_PCM_STREAM_CAPTURE)
279		s = &psc_dma->capture;
280	else
281		s = &psc_dma->playback;
282
283	count = s->period_current * s->period_bytes;
284
285	return bytes_to_frames(substream->runtime, count);
286}
287
288static int psc_dma_hw_params(struct snd_soc_component *component,
289			     struct snd_pcm_substream *substream,
290			     struct snd_pcm_hw_params *params)
291{
292	snd_pcm_set_runtime_buffer(substream, &substream->dma_buffer);
293
294	return 0;
295}
296
297static int psc_dma_new(struct snd_soc_component *component,
298		       struct snd_soc_pcm_runtime *rtd)
299{
300	struct snd_card *card = rtd->card->snd_card;
301	struct snd_soc_dai *dai = asoc_rtd_to_cpu(rtd, 0);
302	struct snd_pcm *pcm = rtd->pcm;
303	size_t size = psc_dma_hardware.buffer_bytes_max;
304	int rc;
305
306	dev_dbg(component->dev, "psc_dma_new(card=%p, dai=%p, pcm=%p)\n",
307		card, dai, pcm);
308
309	rc = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
310	if (rc)
311		return rc;
312
313	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream) {
314		rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
315				size, &pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
316		if (rc)
317			goto playback_alloc_err;
318	}
319
320	if (pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream) {
321		rc = snd_dma_alloc_pages(SNDRV_DMA_TYPE_DEV, pcm->card->dev,
322				size, &pcm->streams[SNDRV_PCM_STREAM_CAPTURE].substream->dma_buffer);
323		if (rc)
324			goto capture_alloc_err;
325	}
326
327	return 0;
328
329 capture_alloc_err:
330	if (pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream)
331		snd_dma_free_pages(&pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream->dma_buffer);
332
333 playback_alloc_err:
334	dev_err(card->dev, "Cannot allocate buffer(s)\n");
335
336	return -ENOMEM;
337}
338
339static void psc_dma_free(struct snd_soc_component *component,
340			 struct snd_pcm *pcm)
341{
342	struct snd_pcm_substream *substream;
343	int stream;
344
345	dev_dbg(component->dev, "psc_dma_free(pcm=%p)\n", pcm);
346
347	for (stream = 0; stream < 2; stream++) {
348		substream = pcm->streams[stream].substream;
349		if (substream) {
350			snd_dma_free_pages(&substream->dma_buffer);
351			substream->dma_buffer.area = NULL;
352			substream->dma_buffer.addr = 0;
353		}
354	}
355}
356
357static const struct snd_soc_component_driver mpc5200_audio_dma_component = {
358	.name		= DRV_NAME,
359	.open		= psc_dma_open,
360	.close		= psc_dma_close,
361	.hw_free	= psc_dma_hw_free,
362	.pointer	= psc_dma_pointer,
363	.trigger	= psc_dma_trigger,
364	.hw_params	= psc_dma_hw_params,
365	.pcm_construct	= psc_dma_new,
366	.pcm_destruct	= psc_dma_free,
367};
368
369int mpc5200_audio_dma_create(struct platform_device *op)
370{
371	phys_addr_t fifo;
372	struct psc_dma *psc_dma;
373	struct resource res;
374	int size, irq, rc;
375	const __be32 *prop;
376	void __iomem *regs;
377	int ret;
378
379	/* Fetch the registers and IRQ of the PSC */
380	irq = irq_of_parse_and_map(op->dev.of_node, 0);
381	if (of_address_to_resource(op->dev.of_node, 0, &res)) {
382		dev_err(&op->dev, "Missing reg property\n");
383		return -ENODEV;
384	}
385	regs = ioremap(res.start, resource_size(&res));
386	if (!regs) {
387		dev_err(&op->dev, "Could not map registers\n");
388		return -ENODEV;
389	}
390
391	/* Allocate and initialize the driver private data */
392	psc_dma = kzalloc(sizeof *psc_dma, GFP_KERNEL);
393	if (!psc_dma) {
394		ret = -ENOMEM;
395		goto out_unmap;
396	}
397
398	/* Get the PSC ID */
399	prop = of_get_property(op->dev.of_node, "cell-index", &size);
400	if (!prop || size < sizeof *prop) {
401		ret = -ENODEV;
402		goto out_free;
403	}
404
405	spin_lock_init(&psc_dma->lock);
406	mutex_init(&psc_dma->mutex);
407	psc_dma->id = be32_to_cpu(*prop);
408	psc_dma->irq = irq;
409	psc_dma->psc_regs = regs;
410	psc_dma->fifo_regs = regs + sizeof *psc_dma->psc_regs;
411	psc_dma->dev = &op->dev;
412	psc_dma->playback.psc_dma = psc_dma;
413	psc_dma->capture.psc_dma = psc_dma;
414	snprintf(psc_dma->name, sizeof(psc_dma->name), "PSC%d", psc_dma->id);
415
416	/* Find the address of the fifo data registers and setup the
417	 * DMA tasks */
418	fifo = res.start + offsetof(struct mpc52xx_psc, buffer.buffer_32);
419	psc_dma->capture.bcom_task =
420		bcom_psc_gen_bd_rx_init(psc_dma->id, 10, fifo, 512);
421	psc_dma->playback.bcom_task =
422		bcom_psc_gen_bd_tx_init(psc_dma->id, 10, fifo);
423	if (!psc_dma->capture.bcom_task ||
424	    !psc_dma->playback.bcom_task) {
425		dev_err(&op->dev, "Could not allocate bestcomm tasks\n");
426		ret = -ENODEV;
427		goto out_free;
428	}
429
430	/* Disable all interrupts and reset the PSC */
431	out_be16(&psc_dma->psc_regs->isr_imr.imr, psc_dma->imr);
432	 /* reset receiver */
433	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_RX);
434	 /* reset transmitter */
435	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_TX);
436	 /* reset error */
437	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_RST_ERR_STAT);
438	 /* reset mode */
439	out_8(&psc_dma->psc_regs->command, MPC52xx_PSC_SEL_MODE_REG_1);
440
441	/* Set up mode register;
442	 * First write: RxRdy (FIFO Alarm) generates rx FIFO irq
443	 * Second write: register Normal mode for non loopback
444	 */
445	out_8(&psc_dma->psc_regs->mode, 0);
446	out_8(&psc_dma->psc_regs->mode, 0);
447
448	/* Set the TX and RX fifo alarm thresholds */
449	out_be16(&psc_dma->fifo_regs->rfalarm, 0x100);
450	out_8(&psc_dma->fifo_regs->rfcntl, 0x4);
451	out_be16(&psc_dma->fifo_regs->tfalarm, 0x100);
452	out_8(&psc_dma->fifo_regs->tfcntl, 0x7);
453
454	/* Lookup the IRQ numbers */
455	psc_dma->playback.irq =
456		bcom_get_task_irq(psc_dma->playback.bcom_task);
457	psc_dma->capture.irq =
458		bcom_get_task_irq(psc_dma->capture.bcom_task);
459
460	rc = request_irq(psc_dma->irq, &psc_dma_status_irq, IRQF_SHARED,
461			 "psc-dma-status", psc_dma);
462	rc |= request_irq(psc_dma->capture.irq, &psc_dma_bcom_irq, IRQF_SHARED,
463			  "psc-dma-capture", &psc_dma->capture);
464	rc |= request_irq(psc_dma->playback.irq, &psc_dma_bcom_irq, IRQF_SHARED,
465			  "psc-dma-playback", &psc_dma->playback);
466	if (rc) {
467		ret = -ENODEV;
468		goto out_irq;
469	}
470
471	/* Save what we've done so it can be found again later */
472	dev_set_drvdata(&op->dev, psc_dma);
473
474	/* Tell the ASoC OF helpers about it */
475	return devm_snd_soc_register_component(&op->dev,
476					&mpc5200_audio_dma_component, NULL, 0);
477out_irq:
478	free_irq(psc_dma->irq, psc_dma);
479	free_irq(psc_dma->capture.irq, &psc_dma->capture);
480	free_irq(psc_dma->playback.irq, &psc_dma->playback);
481out_free:
482	kfree(psc_dma);
483out_unmap:
484	iounmap(regs);
485	return ret;
486}
487EXPORT_SYMBOL_GPL(mpc5200_audio_dma_create);
488
489int mpc5200_audio_dma_destroy(struct platform_device *op)
490{
491	struct psc_dma *psc_dma = dev_get_drvdata(&op->dev);
492
493	dev_dbg(&op->dev, "mpc5200_audio_dma_destroy()\n");
494
495	bcom_gen_bd_rx_release(psc_dma->capture.bcom_task);
496	bcom_gen_bd_tx_release(psc_dma->playback.bcom_task);
497
498	/* Release irqs */
499	free_irq(psc_dma->irq, psc_dma);
500	free_irq(psc_dma->capture.irq, &psc_dma->capture);
501	free_irq(psc_dma->playback.irq, &psc_dma->playback);
502
503	iounmap(psc_dma->psc_regs);
504	kfree(psc_dma);
505	dev_set_drvdata(&op->dev, NULL);
506
507	return 0;
508}
509EXPORT_SYMBOL_GPL(mpc5200_audio_dma_destroy);
510
511MODULE_AUTHOR("Grant Likely <grant.likely@secretlab.ca>");
512MODULE_DESCRIPTION("Freescale MPC5200 PSC in DMA mode ASoC Driver");
513MODULE_LICENSE("GPL");