Loading...
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * DRM driver for Multi-Inno MI0283QT panels
4 *
5 * Copyright 2016 Noralf Trønnes
6 */
7
8#include <linux/backlight.h>
9#include <linux/delay.h>
10#include <linux/gpio/consumer.h>
11#include <linux/module.h>
12#include <linux/property.h>
13#include <linux/regulator/consumer.h>
14#include <linux/spi/spi.h>
15
16#include <drm/drm_atomic_helper.h>
17#include <drm/drm_client_setup.h>
18#include <drm/drm_drv.h>
19#include <drm/drm_fbdev_dma.h>
20#include <drm/drm_gem_atomic_helper.h>
21#include <drm/drm_gem_dma_helper.h>
22#include <drm/drm_managed.h>
23#include <drm/drm_mipi_dbi.h>
24#include <drm/drm_modeset_helper.h>
25#include <video/mipi_display.h>
26
27#define ILI9341_FRMCTR1 0xb1
28#define ILI9341_DISCTRL 0xb6
29#define ILI9341_ETMOD 0xb7
30
31#define ILI9341_PWCTRL1 0xc0
32#define ILI9341_PWCTRL2 0xc1
33#define ILI9341_VMCTRL1 0xc5
34#define ILI9341_VMCTRL2 0xc7
35#define ILI9341_PWCTRLA 0xcb
36#define ILI9341_PWCTRLB 0xcf
37
38#define ILI9341_PGAMCTRL 0xe0
39#define ILI9341_NGAMCTRL 0xe1
40#define ILI9341_DTCTRLA 0xe8
41#define ILI9341_DTCTRLB 0xea
42#define ILI9341_PWRSEQ 0xed
43
44#define ILI9341_EN3GAM 0xf2
45#define ILI9341_PUMPCTRL 0xf7
46
47#define ILI9341_MADCTL_BGR BIT(3)
48#define ILI9341_MADCTL_MV BIT(5)
49#define ILI9341_MADCTL_MX BIT(6)
50#define ILI9341_MADCTL_MY BIT(7)
51
52static void mi0283qt_enable(struct drm_simple_display_pipe *pipe,
53 struct drm_crtc_state *crtc_state,
54 struct drm_plane_state *plane_state)
55{
56 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
57 struct mipi_dbi *dbi = &dbidev->dbi;
58 u8 addr_mode;
59 int ret, idx;
60
61 if (!drm_dev_enter(pipe->crtc.dev, &idx))
62 return;
63
64 DRM_DEBUG_KMS("\n");
65
66 ret = mipi_dbi_poweron_conditional_reset(dbidev);
67 if (ret < 0)
68 goto out_exit;
69 if (ret == 1)
70 goto out_enable;
71
72 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
73
74 mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30);
75 mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);
76 mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79);
77 mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);
78 mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20);
79 mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00);
80
81 /* Power Control */
82 mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x26);
83 mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x11);
84 /* VCOM */
85 mipi_dbi_command(dbi, ILI9341_VMCTRL1, 0x35, 0x3e);
86 mipi_dbi_command(dbi, ILI9341_VMCTRL2, 0xbe);
87
88 /* Memory Access Control */
89 mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
90
91 /* Frame Rate */
92 mipi_dbi_command(dbi, ILI9341_FRMCTR1, 0x00, 0x1b);
93
94 /* Gamma */
95 mipi_dbi_command(dbi, ILI9341_EN3GAM, 0x08);
96 mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
97 mipi_dbi_command(dbi, ILI9341_PGAMCTRL,
98 0x1f, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
99 0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00);
100 mipi_dbi_command(dbi, ILI9341_NGAMCTRL,
101 0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
102 0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f);
103
104 /* DDRAM */
105 mipi_dbi_command(dbi, ILI9341_ETMOD, 0x07);
106
107 /* Display */
108 mipi_dbi_command(dbi, ILI9341_DISCTRL, 0x0a, 0x82, 0x27, 0x00);
109 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
110 msleep(100);
111
112 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
113 msleep(100);
114
115out_enable:
116 /* The PiTFT (ili9340) has a hardware reset circuit that
117 * resets only on power-on and not on each reboot through
118 * a gpio like the rpi-display does.
119 * As a result, we need to always apply the rotation value
120 * regardless of the display "on/off" state.
121 */
122 switch (dbidev->rotation) {
123 default:
124 addr_mode = ILI9341_MADCTL_MV | ILI9341_MADCTL_MY |
125 ILI9341_MADCTL_MX;
126 break;
127 case 90:
128 addr_mode = ILI9341_MADCTL_MY;
129 break;
130 case 180:
131 addr_mode = ILI9341_MADCTL_MV;
132 break;
133 case 270:
134 addr_mode = ILI9341_MADCTL_MX;
135 break;
136 }
137 addr_mode |= ILI9341_MADCTL_BGR;
138 mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
139 mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
140out_exit:
141 drm_dev_exit(idx);
142}
143
144static const struct drm_simple_display_pipe_funcs mi0283qt_pipe_funcs = {
145 DRM_MIPI_DBI_SIMPLE_DISPLAY_PIPE_FUNCS(mi0283qt_enable),
146};
147
148static const struct drm_display_mode mi0283qt_mode = {
149 DRM_SIMPLE_MODE(320, 240, 58, 43),
150};
151
152DEFINE_DRM_GEM_DMA_FOPS(mi0283qt_fops);
153
154static const struct drm_driver mi0283qt_driver = {
155 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
156 .fops = &mi0283qt_fops,
157 DRM_GEM_DMA_DRIVER_OPS_VMAP,
158 DRM_FBDEV_DMA_DRIVER_OPS,
159 .debugfs_init = mipi_dbi_debugfs_init,
160 .name = "mi0283qt",
161 .desc = "Multi-Inno MI0283QT",
162 .date = "20160614",
163 .major = 1,
164 .minor = 0,
165};
166
167static const struct of_device_id mi0283qt_of_match[] = {
168 { .compatible = "multi-inno,mi0283qt" },
169 {},
170};
171MODULE_DEVICE_TABLE(of, mi0283qt_of_match);
172
173static const struct spi_device_id mi0283qt_id[] = {
174 { "mi0283qt", 0 },
175 { },
176};
177MODULE_DEVICE_TABLE(spi, mi0283qt_id);
178
179static int mi0283qt_probe(struct spi_device *spi)
180{
181 struct device *dev = &spi->dev;
182 struct mipi_dbi_dev *dbidev;
183 struct drm_device *drm;
184 struct mipi_dbi *dbi;
185 struct gpio_desc *dc;
186 u32 rotation = 0;
187 int ret;
188
189 dbidev = devm_drm_dev_alloc(dev, &mi0283qt_driver,
190 struct mipi_dbi_dev, drm);
191 if (IS_ERR(dbidev))
192 return PTR_ERR(dbidev);
193
194 dbi = &dbidev->dbi;
195 drm = &dbidev->drm;
196
197 dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
198 if (IS_ERR(dbi->reset))
199 return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
200
201 dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
202 if (IS_ERR(dc))
203 return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
204
205 dbidev->regulator = devm_regulator_get(dev, "power");
206 if (IS_ERR(dbidev->regulator))
207 return PTR_ERR(dbidev->regulator);
208
209 dbidev->backlight = devm_of_find_backlight(dev);
210 if (IS_ERR(dbidev->backlight))
211 return PTR_ERR(dbidev->backlight);
212
213 device_property_read_u32(dev, "rotation", &rotation);
214
215 ret = mipi_dbi_spi_init(spi, dbi, dc);
216 if (ret)
217 return ret;
218
219 ret = mipi_dbi_dev_init(dbidev, &mi0283qt_pipe_funcs, &mi0283qt_mode, rotation);
220 if (ret)
221 return ret;
222
223 drm_mode_config_reset(drm);
224
225 ret = drm_dev_register(drm, 0);
226 if (ret)
227 return ret;
228
229 spi_set_drvdata(spi, drm);
230
231 drm_client_setup(drm, NULL);
232
233 return 0;
234}
235
236static void mi0283qt_remove(struct spi_device *spi)
237{
238 struct drm_device *drm = spi_get_drvdata(spi);
239
240 drm_dev_unplug(drm);
241 drm_atomic_helper_shutdown(drm);
242}
243
244static void mi0283qt_shutdown(struct spi_device *spi)
245{
246 drm_atomic_helper_shutdown(spi_get_drvdata(spi));
247}
248
249static int __maybe_unused mi0283qt_pm_suspend(struct device *dev)
250{
251 return drm_mode_config_helper_suspend(dev_get_drvdata(dev));
252}
253
254static int __maybe_unused mi0283qt_pm_resume(struct device *dev)
255{
256 drm_mode_config_helper_resume(dev_get_drvdata(dev));
257
258 return 0;
259}
260
261static const struct dev_pm_ops mi0283qt_pm_ops = {
262 SET_SYSTEM_SLEEP_PM_OPS(mi0283qt_pm_suspend, mi0283qt_pm_resume)
263};
264
265static struct spi_driver mi0283qt_spi_driver = {
266 .driver = {
267 .name = "mi0283qt",
268 .of_match_table = mi0283qt_of_match,
269 .pm = &mi0283qt_pm_ops,
270 },
271 .id_table = mi0283qt_id,
272 .probe = mi0283qt_probe,
273 .remove = mi0283qt_remove,
274 .shutdown = mi0283qt_shutdown,
275};
276module_spi_driver(mi0283qt_spi_driver);
277
278MODULE_DESCRIPTION("Multi-Inno MI0283QT DRM driver");
279MODULE_AUTHOR("Noralf Trønnes");
280MODULE_LICENSE("GPL");
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * DRM driver for Multi-Inno MI0283QT panels
4 *
5 * Copyright 2016 Noralf Trønnes
6 */
7
8#include <linux/backlight.h>
9#include <linux/delay.h>
10#include <linux/gpio/consumer.h>
11#include <linux/module.h>
12#include <linux/property.h>
13#include <linux/regulator/consumer.h>
14#include <linux/spi/spi.h>
15
16#include <drm/drm_atomic_helper.h>
17#include <drm/drm_drv.h>
18#include <drm/drm_fb_helper.h>
19#include <drm/drm_gem_atomic_helper.h>
20#include <drm/drm_gem_cma_helper.h>
21#include <drm/drm_managed.h>
22#include <drm/drm_mipi_dbi.h>
23#include <drm/drm_modeset_helper.h>
24#include <video/mipi_display.h>
25
26#define ILI9341_FRMCTR1 0xb1
27#define ILI9341_DISCTRL 0xb6
28#define ILI9341_ETMOD 0xb7
29
30#define ILI9341_PWCTRL1 0xc0
31#define ILI9341_PWCTRL2 0xc1
32#define ILI9341_VMCTRL1 0xc5
33#define ILI9341_VMCTRL2 0xc7
34#define ILI9341_PWCTRLA 0xcb
35#define ILI9341_PWCTRLB 0xcf
36
37#define ILI9341_PGAMCTRL 0xe0
38#define ILI9341_NGAMCTRL 0xe1
39#define ILI9341_DTCTRLA 0xe8
40#define ILI9341_DTCTRLB 0xea
41#define ILI9341_PWRSEQ 0xed
42
43#define ILI9341_EN3GAM 0xf2
44#define ILI9341_PUMPCTRL 0xf7
45
46#define ILI9341_MADCTL_BGR BIT(3)
47#define ILI9341_MADCTL_MV BIT(5)
48#define ILI9341_MADCTL_MX BIT(6)
49#define ILI9341_MADCTL_MY BIT(7)
50
51static void mi0283qt_enable(struct drm_simple_display_pipe *pipe,
52 struct drm_crtc_state *crtc_state,
53 struct drm_plane_state *plane_state)
54{
55 struct mipi_dbi_dev *dbidev = drm_to_mipi_dbi_dev(pipe->crtc.dev);
56 struct mipi_dbi *dbi = &dbidev->dbi;
57 u8 addr_mode;
58 int ret, idx;
59
60 if (!drm_dev_enter(pipe->crtc.dev, &idx))
61 return;
62
63 DRM_DEBUG_KMS("\n");
64
65 ret = mipi_dbi_poweron_conditional_reset(dbidev);
66 if (ret < 0)
67 goto out_exit;
68 if (ret == 1)
69 goto out_enable;
70
71 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_OFF);
72
73 mipi_dbi_command(dbi, ILI9341_PWCTRLB, 0x00, 0x83, 0x30);
74 mipi_dbi_command(dbi, ILI9341_PWRSEQ, 0x64, 0x03, 0x12, 0x81);
75 mipi_dbi_command(dbi, ILI9341_DTCTRLA, 0x85, 0x01, 0x79);
76 mipi_dbi_command(dbi, ILI9341_PWCTRLA, 0x39, 0x2c, 0x00, 0x34, 0x02);
77 mipi_dbi_command(dbi, ILI9341_PUMPCTRL, 0x20);
78 mipi_dbi_command(dbi, ILI9341_DTCTRLB, 0x00, 0x00);
79
80 /* Power Control */
81 mipi_dbi_command(dbi, ILI9341_PWCTRL1, 0x26);
82 mipi_dbi_command(dbi, ILI9341_PWCTRL2, 0x11);
83 /* VCOM */
84 mipi_dbi_command(dbi, ILI9341_VMCTRL1, 0x35, 0x3e);
85 mipi_dbi_command(dbi, ILI9341_VMCTRL2, 0xbe);
86
87 /* Memory Access Control */
88 mipi_dbi_command(dbi, MIPI_DCS_SET_PIXEL_FORMAT, MIPI_DCS_PIXEL_FMT_16BIT);
89
90 /* Frame Rate */
91 mipi_dbi_command(dbi, ILI9341_FRMCTR1, 0x00, 0x1b);
92
93 /* Gamma */
94 mipi_dbi_command(dbi, ILI9341_EN3GAM, 0x08);
95 mipi_dbi_command(dbi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
96 mipi_dbi_command(dbi, ILI9341_PGAMCTRL,
97 0x1f, 0x1a, 0x18, 0x0a, 0x0f, 0x06, 0x45, 0x87,
98 0x32, 0x0a, 0x07, 0x02, 0x07, 0x05, 0x00);
99 mipi_dbi_command(dbi, ILI9341_NGAMCTRL,
100 0x00, 0x25, 0x27, 0x05, 0x10, 0x09, 0x3a, 0x78,
101 0x4d, 0x05, 0x18, 0x0d, 0x38, 0x3a, 0x1f);
102
103 /* DDRAM */
104 mipi_dbi_command(dbi, ILI9341_ETMOD, 0x07);
105
106 /* Display */
107 mipi_dbi_command(dbi, ILI9341_DISCTRL, 0x0a, 0x82, 0x27, 0x00);
108 mipi_dbi_command(dbi, MIPI_DCS_EXIT_SLEEP_MODE);
109 msleep(100);
110
111 mipi_dbi_command(dbi, MIPI_DCS_SET_DISPLAY_ON);
112 msleep(100);
113
114out_enable:
115 /* The PiTFT (ili9340) has a hardware reset circuit that
116 * resets only on power-on and not on each reboot through
117 * a gpio like the rpi-display does.
118 * As a result, we need to always apply the rotation value
119 * regardless of the display "on/off" state.
120 */
121 switch (dbidev->rotation) {
122 default:
123 addr_mode = ILI9341_MADCTL_MV | ILI9341_MADCTL_MY |
124 ILI9341_MADCTL_MX;
125 break;
126 case 90:
127 addr_mode = ILI9341_MADCTL_MY;
128 break;
129 case 180:
130 addr_mode = ILI9341_MADCTL_MV;
131 break;
132 case 270:
133 addr_mode = ILI9341_MADCTL_MX;
134 break;
135 }
136 addr_mode |= ILI9341_MADCTL_BGR;
137 mipi_dbi_command(dbi, MIPI_DCS_SET_ADDRESS_MODE, addr_mode);
138 mipi_dbi_enable_flush(dbidev, crtc_state, plane_state);
139out_exit:
140 drm_dev_exit(idx);
141}
142
143static const struct drm_simple_display_pipe_funcs mi0283qt_pipe_funcs = {
144 .enable = mi0283qt_enable,
145 .disable = mipi_dbi_pipe_disable,
146 .update = mipi_dbi_pipe_update,
147 .prepare_fb = drm_gem_simple_display_pipe_prepare_fb,
148};
149
150static const struct drm_display_mode mi0283qt_mode = {
151 DRM_SIMPLE_MODE(320, 240, 58, 43),
152};
153
154DEFINE_DRM_GEM_CMA_FOPS(mi0283qt_fops);
155
156static const struct drm_driver mi0283qt_driver = {
157 .driver_features = DRIVER_GEM | DRIVER_MODESET | DRIVER_ATOMIC,
158 .fops = &mi0283qt_fops,
159 DRM_GEM_CMA_DRIVER_OPS_VMAP,
160 .debugfs_init = mipi_dbi_debugfs_init,
161 .name = "mi0283qt",
162 .desc = "Multi-Inno MI0283QT",
163 .date = "20160614",
164 .major = 1,
165 .minor = 0,
166};
167
168static const struct of_device_id mi0283qt_of_match[] = {
169 { .compatible = "multi-inno,mi0283qt" },
170 {},
171};
172MODULE_DEVICE_TABLE(of, mi0283qt_of_match);
173
174static const struct spi_device_id mi0283qt_id[] = {
175 { "mi0283qt", 0 },
176 { },
177};
178MODULE_DEVICE_TABLE(spi, mi0283qt_id);
179
180static int mi0283qt_probe(struct spi_device *spi)
181{
182 struct device *dev = &spi->dev;
183 struct mipi_dbi_dev *dbidev;
184 struct drm_device *drm;
185 struct mipi_dbi *dbi;
186 struct gpio_desc *dc;
187 u32 rotation = 0;
188 int ret;
189
190 dbidev = devm_drm_dev_alloc(dev, &mi0283qt_driver,
191 struct mipi_dbi_dev, drm);
192 if (IS_ERR(dbidev))
193 return PTR_ERR(dbidev);
194
195 dbi = &dbidev->dbi;
196 drm = &dbidev->drm;
197
198 dbi->reset = devm_gpiod_get_optional(dev, "reset", GPIOD_OUT_HIGH);
199 if (IS_ERR(dbi->reset))
200 return dev_err_probe(dev, PTR_ERR(dbi->reset), "Failed to get GPIO 'reset'\n");
201
202 dc = devm_gpiod_get_optional(dev, "dc", GPIOD_OUT_LOW);
203 if (IS_ERR(dc))
204 return dev_err_probe(dev, PTR_ERR(dc), "Failed to get GPIO 'dc'\n");
205
206 dbidev->regulator = devm_regulator_get(dev, "power");
207 if (IS_ERR(dbidev->regulator))
208 return PTR_ERR(dbidev->regulator);
209
210 dbidev->backlight = devm_of_find_backlight(dev);
211 if (IS_ERR(dbidev->backlight))
212 return PTR_ERR(dbidev->backlight);
213
214 device_property_read_u32(dev, "rotation", &rotation);
215
216 ret = mipi_dbi_spi_init(spi, dbi, dc);
217 if (ret)
218 return ret;
219
220 ret = mipi_dbi_dev_init(dbidev, &mi0283qt_pipe_funcs, &mi0283qt_mode, rotation);
221 if (ret)
222 return ret;
223
224 drm_mode_config_reset(drm);
225
226 ret = drm_dev_register(drm, 0);
227 if (ret)
228 return ret;
229
230 spi_set_drvdata(spi, drm);
231
232 drm_fbdev_generic_setup(drm, 0);
233
234 return 0;
235}
236
237static int mi0283qt_remove(struct spi_device *spi)
238{
239 struct drm_device *drm = spi_get_drvdata(spi);
240
241 drm_dev_unplug(drm);
242 drm_atomic_helper_shutdown(drm);
243
244 return 0;
245}
246
247static void mi0283qt_shutdown(struct spi_device *spi)
248{
249 drm_atomic_helper_shutdown(spi_get_drvdata(spi));
250}
251
252static int __maybe_unused mi0283qt_pm_suspend(struct device *dev)
253{
254 return drm_mode_config_helper_suspend(dev_get_drvdata(dev));
255}
256
257static int __maybe_unused mi0283qt_pm_resume(struct device *dev)
258{
259 drm_mode_config_helper_resume(dev_get_drvdata(dev));
260
261 return 0;
262}
263
264static const struct dev_pm_ops mi0283qt_pm_ops = {
265 SET_SYSTEM_SLEEP_PM_OPS(mi0283qt_pm_suspend, mi0283qt_pm_resume)
266};
267
268static struct spi_driver mi0283qt_spi_driver = {
269 .driver = {
270 .name = "mi0283qt",
271 .owner = THIS_MODULE,
272 .of_match_table = mi0283qt_of_match,
273 .pm = &mi0283qt_pm_ops,
274 },
275 .id_table = mi0283qt_id,
276 .probe = mi0283qt_probe,
277 .remove = mi0283qt_remove,
278 .shutdown = mi0283qt_shutdown,
279};
280module_spi_driver(mi0283qt_spi_driver);
281
282MODULE_DESCRIPTION("Multi-Inno MI0283QT DRM driver");
283MODULE_AUTHOR("Noralf Trønnes");
284MODULE_LICENSE("GPL");