1// SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
 2// Copyright 2021 Jonathan Neuschäfer
 3
 4#include <dt-bindings/interrupt-controller/irq.h>
 5
 6/ {
 7	compatible = "nuvoton,wpcm450";
 8	#address-cells = <1>;
 9	#size-cells = <1>;
10
11	cpus {
12		#address-cells = <1>;
13		#size-cells = <0>;
14
15		cpu@0 {
16			compatible = "arm,arm926ej-s";
17			device_type = "cpu";
18			reg = <0>;
19		};
20	};
21
22	clk24m: clock-24mhz {
23		/* 24 MHz dummy clock */
24		compatible = "fixed-clock";
25		clock-frequency = <24000000>;
26		#clock-cells = <0>;
27	};
28
29	soc {
30		compatible = "simple-bus";
31		#address-cells = <1>;
32		#size-cells = <1>;
33		interrupt-parent = <&aic>;
34		ranges;
35
36		serial0: serial@b8000000 {
37			compatible = "nuvoton,wpcm450-uart";
38			reg = <0xb8000000 0x20>;
39			reg-shift = <2>;
40			interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
41			clocks = <&clk24m>;
42			status = "disabled";
43		};
44
45		serial1: serial@b8000100 {
46			compatible = "nuvoton,wpcm450-uart";
47			reg = <0xb8000100 0x20>;
48			reg-shift = <2>;
49			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
50			clocks = <&clk24m>;
51			status = "disabled";
52		};
53
54		timer0: timer@b8001000 {
55			compatible = "nuvoton,wpcm450-timer";
56			interrupts = <12 IRQ_TYPE_LEVEL_HIGH>;
57			reg = <0xb8001000 0x1c>;
58			clocks = <&clk24m>;
59		};
60
61		watchdog0: watchdog@b800101c {
62			compatible = "nuvoton,wpcm450-wdt";
63			interrupts = <1 IRQ_TYPE_LEVEL_HIGH>;
64			reg = <0xb800101c 0x4>;
65			clocks = <&clk24m>;
66			status = "disabled";
67		};
68
69		aic: interrupt-controller@b8002000 {
70			compatible = "nuvoton,wpcm450-aic";
71			reg = <0xb8002000 0x1000>;
72			interrupt-controller;
73			#interrupt-cells = <2>;
74		};
75	};
76};