1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (C) 2014 Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
  4 * Copyright (C) Sylver Bruneau <sylver.bruneau@googlemail.com>
  5 */
  6
  7/dts-v1/;
  8
  9#include <dt-bindings/gpio/gpio.h>
 10#include <dt-bindings/input/input.h>
 11#include <dt-bindings/interrupt-controller/irq.h>
 12#include "orion5x-mv88f5182.dtsi"
 13
 14/ {
 15	model = "Maxtor Shared Storage II";
 16	compatible = "maxtor,shared-storage-2", "marvell,orion5x-88f5182", "marvell,orion5x";
 17
 18	memory {
 19		device_type = "memory";
 20		reg = <0x00000000 0x4000000>; /* 64 MB */
 21	};
 22
 23	chosen {
 24		bootargs = "console=ttyS0,115200n8 earlyprintk";
 25		stdout-path = &uart0;
 26	};
 27
 28	soc {
 29		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>,
 30			 <MBUS_ID(0x09, 0x00) 0 0xf2200000 0x800>,
 31			 <MBUS_ID(0x01, 0x0f) 0 0xff800000 0x40000>;
 32	};
 33
 34	gpio-keys {
 35		compatible = "gpio-keys";
 36		pinctrl-0 = <&pmx_buttons>;
 37		pinctrl-names = "default";
 38
 39		key-power {
 40			label = "Power";
 41			linux,code = <KEY_POWER>;
 42			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
 43		};
 44
 45		key-reset {
 46			label = "Reset";
 47			linux,code = <KEY_RESTART>;
 48			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
 49		};
 50	};
 51};
 52
 53&devbus_bootcs {
 54	status = "okay";
 55
 56	devbus,keep-config;
 57
 58	/*
 59	 * Currently the MTD code does not recognize the MX29LV400CBCT
 60	 * as a bottom-type device. This could cause risks of
 61	 * accidentally erasing critical flash sectors. We thus define
 62	 * a single, write-protected partition covering the whole
 63	 * flash.  TODO: once the flash part TOP/BOTTOM detection
 64	 * issue is sorted out in the MTD code, break this into at
 65	 * least three partitions: 'u-boot code', 'u-boot environment'
 66	 * and 'whatever is left'.
 67	 */
 68	flash@0 {
 69		compatible = "cfi-flash";
 70		reg = <0 0x40000>;
 71		bank-width = <1>;
 72                #address-cells = <1>;
 73		#size-cells = <1>;
 74	};
 75};
 76
 77&mdio {
 78	status = "okay";
 79
 80	ethphy: ethernet-phy {
 81		reg = <8>;
 82	};
 83};
 84
 85&ehci0 {
 86	status = "okay";
 87};
 88
 89&eth {
 90	status = "okay";
 91
 92	ethernet-port@0 {
 93		phy-handle = <&ethphy>;
 94	};
 95};
 96
 97&i2c {
 98	status = "okay";
 99	clock-frequency = <100000>;
100	#address-cells = <1>;
101
102	rtc@68 {
103		compatible = "st,m41t81";
104		reg = <0x68>;
105		pinctrl-0 = <&pmx_rtc>;
106		pinctrl-names = "default";
107		interrupt-parent = <&gpio0>;
108		interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
109	};
110};
111
112&pinctrl {
113	pinctrl-0 = <&pmx_leds &pmx_misc>;
114	pinctrl-names = "default";
115
116	pmx_buttons: pmx-buttons {
117		marvell,pins = "mpp11", "mpp12";
118		marvell,function = "gpio";
119	};
120
121	/*
122	 * MPP0: Power LED
123	 * MPP1: Error LED
124	 */
125	pmx_leds: pmx-leds {
126		marvell,pins = "mpp0", "mpp1";
127		marvell,function = "gpio";
128	};
129
130	/*
131	 * MPP4: HDD ind. (Single/Dual)
132	 * MPP5: HD0 5V control
133	 * MPP6: HD0 12V control
134	 * MPP7: HD1 5V control
135	 * MPP8: HD1 12V control
136	 */
137	pmx_misc: pmx-misc {
138		marvell,pins = "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp10";
139		marvell,function = "gpio";
140	};
141
142	pmx_rtc: pmx-rtc {
143		marvell,pins = "mpp3";
144		marvell,function = "gpio";
145	};
146
147	pmx_sata0_led_active: pmx-sata0-led-active {
148		marvell,pins = "mpp14";
149		marvell,function = "sata0";
150	};
151
152	pmx_sata1_led_active: pmx-sata1-led-active {
153		marvell,pins = "mpp15";
154		marvell,function = "sata1";
155	};
156
157	/*
158	 * Non MPP GPIOs:
159	 *  GPIO 22: USB port 1 fuse (0 = Fail, 1 = Ok)
160	 *  GPIO 23: Blue front LED off
161	 *  GPIO 24: Inhibit board power off (0 = Disabled, 1 = Enabled)
162	 */
163};
164
165&sata {
166	pinctrl-0 = <&pmx_sata0_led_active
167		     &pmx_sata1_led_active>;
168	pinctrl-names = "default";
169	status = "okay";
170	nr-ports = <2>;
171};
172
173&uart0 {
174	status = "okay";
175};