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1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * at91-sama5d2_xplained.dts - Device Tree file for SAMA5D2 Xplained board
4 *
5 * Copyright (C) 2015 Atmel,
6 * 2015 Nicolas Ferre <nicolas.ferre@atmel.com>
7 */
8/dts-v1/;
9#include "sama5d2.dtsi"
10#include "sama5d2-pinfunc.h"
11#include <dt-bindings/mfd/atmel-flexcom.h>
12#include <dt-bindings/gpio/gpio.h>
13#include <dt-bindings/input/input.h>
14#include <dt-bindings/regulator/active-semi,8945a-regulator.h>
15
16/ {
17 model = "Atmel SAMA5D2 Xplained";
18 compatible = "atmel,sama5d2-xplained", "atmel,sama5d2", "atmel,sama5";
19
20 aliases {
21 serial0 = &uart1; /* DBGU */
22 i2c0 = &i2c0;
23 i2c1 = &i2c1;
24 i2c2 = &i2c2; /* XPRO EXT2 */
25 };
26
27 chosen {
28 stdout-path = "serial0:115200n8";
29 };
30
31 clocks {
32 slow_xtal {
33 clock-frequency = <32768>;
34 };
35
36 main_xtal {
37 clock-frequency = <12000000>;
38 };
39 };
40
41 ahb {
42 usb0: gadget@300000 {
43 atmel,vbus-gpio = <&pioA PIN_PA31 GPIO_ACTIVE_HIGH>;
44 pinctrl-names = "default";
45 pinctrl-0 = <&pinctrl_usba_vbus>;
46 status = "okay";
47 };
48
49 usb1: ohci@400000 {
50 num-ports = <3>;
51 atmel,vbus-gpio = <0 /* &pioA PIN_PB9 GPIO_ACTIVE_HIGH */
52 &pioA PIN_PB10 GPIO_ACTIVE_HIGH
53 0
54 >;
55 pinctrl-names = "default";
56 pinctrl-0 = <&pinctrl_usb_default>;
57 status = "okay";
58 };
59
60 usb2: ehci@500000 {
61 status = "okay";
62 };
63
64 sdmmc0: sdio-host@a0000000 {
65 bus-width = <8>;
66 pinctrl-names = "default";
67 pinctrl-0 = <&pinctrl_sdmmc0_default>;
68 non-removable;
69 mmc-ddr-1_8v;
70 status = "okay";
71 };
72
73 sdmmc1: sdio-host@b0000000 {
74 bus-width = <4>;
75 pinctrl-names = "default";
76 pinctrl-0 = <&pinctrl_sdmmc1_default>;
77 status = "okay"; /* conflict with qspi0 */
78 vqmmc-supply = <&vdd_3v3_reg>;
79 vmmc-supply = <&vdd_3v3_reg>;
80 };
81
82 apb {
83 qspi0: spi@f0020000 {
84 pinctrl-names = "default";
85 pinctrl-0 = <&pinctrl_qspi0_default>;
86 status = "disabled"; /* conflict with sdmmc1 */
87
88 flash@0 {
89 #address-cells = <1>;
90 #size-cells = <1>;
91 compatible = "jedec,spi-nor";
92 reg = <0>;
93 spi-max-frequency = <80000000>;
94 spi-tx-bus-width = <4>;
95 spi-rx-bus-width = <4>;
96 m25p,fast-read;
97
98 at91bootstrap@00000000 {
99 label = "at91bootstrap";
100 reg = <0x00000000 0x00040000>;
101 };
102
103 bootloader@00040000 {
104 label = "bootloader";
105 reg = <0x00040000 0x000c0000>;
106 };
107
108 bootloaderenvred@00100000 {
109 label = "bootloader env redundant";
110 reg = <0x00100000 0x00040000>;
111 };
112
113 bootloaderenv@00140000 {
114 label = "bootloader env";
115 reg = <0x00140000 0x00040000>;
116 };
117
118 dtb@00180000 {
119 label = "device tree";
120 reg = <0x00180000 0x00080000>;
121 };
122
123 kernel@00200000 {
124 label = "kernel";
125 reg = <0x00200000 0x00600000>;
126 };
127
128 misc@00800000 {
129 label = "misc";
130 reg = <0x00800000 0x00000000>;
131 };
132 };
133 };
134
135 spi0: spi@f8000000 {
136 pinctrl-names = "default";
137 pinctrl-0 = <&pinctrl_spi0_default>;
138 status = "okay";
139
140 m25p80@0 {
141 compatible = "atmel,at25df321a";
142 reg = <0>;
143 spi-max-frequency = <50000000>;
144 };
145 };
146
147 macb0: ethernet@f8008000 {
148 pinctrl-names = "default";
149 pinctrl-0 = <&pinctrl_macb0_default &pinctrl_macb0_phy_irq>;
150 phy-mode = "rmii";
151 status = "okay";
152
153 ethernet-phy@1 {
154 reg = <0x1>;
155 interrupt-parent = <&pioA>;
156 interrupts = <PIN_PC9 IRQ_TYPE_LEVEL_LOW>;
157 };
158 };
159
160 tcb0: timer@f800c000 {
161 timer0: timer@0 {
162 compatible = "atmel,tcb-timer";
163 reg = <0>;
164 };
165
166 timer1: timer@1 {
167 compatible = "atmel,tcb-timer";
168 reg = <1>;
169 };
170 };
171
172 uart1: serial@f8020000 {
173 pinctrl-names = "default";
174 pinctrl-0 = <&pinctrl_uart1_default>;
175 atmel,use-dma-rx;
176 atmel,use-dma-tx;
177 status = "okay";
178 };
179
180 i2c0: i2c@f8028000 {
181 dmas = <0>, <0>;
182 pinctrl-names = "default", "gpio";
183 pinctrl-0 = <&pinctrl_i2c0_default>;
184 pinctrl-1 = <&pinctrl_i2c0_gpio>;
185 sda-gpios = <&pioA PIN_PD21 GPIO_ACTIVE_HIGH>;
186 scl-gpios = <&pioA PIN_PD22 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
187 i2c-sda-hold-time-ns = <350>;
188 status = "okay";
189
190 pmic@5b {
191 compatible = "active-semi,act8945a";
192 reg = <0x5b>;
193 active-semi,vsel-high;
194 status = "okay";
195
196 regulators {
197 vdd_1v35_reg: REG_DCDC1 {
198 regulator-name = "VDD_1V35";
199 regulator-min-microvolt = <1350000>;
200 regulator-max-microvolt = <1350000>;
201 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
202 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
203 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
204 regulator-always-on;
205
206 regulator-state-mem {
207 regulator-on-in-suspend;
208 regulator-suspend-min-microvolt=<1400000>;
209 regulator-suspend-max-microvolt=<1400000>;
210 regulator-changeable-in-suspend;
211 regulator-mode=<ACT8945A_REGULATOR_MODE_LOWPOWER>;
212 };
213 };
214
215 vdd_1v2_reg: REG_DCDC2 {
216 regulator-name = "VDD_1V2";
217 regulator-min-microvolt = <1100000>;
218 regulator-max-microvolt = <1300000>;
219 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
220 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
221 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
222 regulator-always-on;
223
224 regulator-state-mem {
225 regulator-off-in-suspend;
226 };
227 };
228
229 vdd_3v3_reg: REG_DCDC3 {
230 regulator-name = "VDD_3V3";
231 regulator-min-microvolt = <3300000>;
232 regulator-max-microvolt = <3300000>;
233 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_FIXED>,
234 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
235 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_FIXED>;
236 regulator-always-on;
237
238 regulator-state-mem {
239 regulator-off-in-suspend;
240 };
241 };
242
243 vdd_fuse_reg: REG_LDO1 {
244 regulator-name = "VDD_FUSE";
245 regulator-min-microvolt = <2500000>;
246 regulator-max-microvolt = <2500000>;
247 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
248 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
249 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
250 regulator-always-on;
251
252 regulator-state-mem {
253 regulator-off-in-suspend;
254 };
255 };
256
257 vdd_3v3_lp_reg: REG_LDO2 {
258 regulator-name = "VDD_3V3_LP";
259 regulator-min-microvolt = <3300000>;
260 regulator-max-microvolt = <3300000>;
261 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
262 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
263 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
264 regulator-always-on;
265
266 regulator-state-mem {
267 regulator-off-in-suspend;
268 };
269 };
270
271 vdd_led_reg: REG_LDO3 {
272 regulator-name = "VDD_LED";
273 regulator-min-microvolt = <3300000>;
274 regulator-max-microvolt = <3300000>;
275 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
276 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
277 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
278 regulator-always-on;
279
280 regulator-state-mem {
281 regulator-off-in-suspend;
282 };
283 };
284
285 vdd_sdhc_1v8_reg: REG_LDO4 {
286 regulator-name = "VDD_SDHC_1V8";
287 regulator-min-microvolt = <1800000>;
288 regulator-max-microvolt = <1800000>;
289 regulator-allowed-modes = <ACT8945A_REGULATOR_MODE_NORMAL>,
290 <ACT8945A_REGULATOR_MODE_LOWPOWER>;
291 regulator-initial-mode = <ACT8945A_REGULATOR_MODE_NORMAL>;
292 regulator-always-on;
293
294 regulator-state-mem {
295 regulator-off-in-suspend;
296 };
297 };
298 };
299
300 charger {
301 compatible = "active-semi,act8945a-charger";
302 pinctrl-names = "default";
303 pinctrl-0 = <&pinctrl_charger_chglev &pinctrl_charger_lbo &pinctrl_charger_irq>;
304 interrupt-parent = <&pioA>;
305 interrupts = <PIN_PB13 IRQ_TYPE_EDGE_RISING>;
306
307 active-semi,chglev-gpios = <&pioA PIN_PA12 GPIO_ACTIVE_HIGH>;
308 active-semi,lbo-gpios = <&pioA PIN_PC8 GPIO_ACTIVE_LOW>;
309 active-semi,input-voltage-threshold-microvolt = <6600>;
310 active-semi,precondition-timeout = <40>;
311 active-semi,total-timeout = <3>;
312 status = "okay";
313 };
314 };
315 };
316
317 pwm0: pwm@f802c000 {
318 pinctrl-names = "default";
319 pinctrl-0 = <&pinctrl_pwm0_pwm2_default>;
320 status = "disabled"; /* conflict with leds */
321 };
322
323 flx0: flexcom@f8034000 {
324 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_USART>;
325 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
326
327 uart5: serial@200 {
328 dmas = <0>, <0>;
329 pinctrl-names = "default";
330 pinctrl-0 = <&pinctrl_flx0_default>;
331 status = "okay";
332 };
333
334 i2c2: i2c@600 {
335 dmas = <0>, <0>;
336 pinctrl-names = "default", "gpio";
337 pinctrl-0 = <&pinctrl_flx0_default>;
338 pinctrl-1 = <&pinctrl_i2c2_gpio>;
339 sda-gpios = <&pioA PIN_PB28 GPIO_ACTIVE_HIGH>;
340 scl-gpios = <&pioA PIN_PB29 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
341 i2c-sda-hold-time-ns = <350>;
342 i2c-analog-filter;
343 i2c-digital-filter;
344 i2c-digital-filter-width-ns = <35>;
345 status = "disabled"; /* conflict with ISC_D2 & ISC_D3 data pins */
346 };
347 };
348
349 shdwc@f8048010 {
350 debounce-delay-us = <976>;
351 atmel,wakeup-rtc-timer;
352
353 input@0 {
354 reg = <0>;
355 };
356 };
357
358 watchdog@f8048040 {
359 status = "okay";
360 };
361
362 i2s0: i2s@f8050000 {
363 pinctrl-names = "default";
364 pinctrl-0 = <&pinctrl_i2s0_default>;
365 status = "disabled"; /* conflict with can0 */
366 };
367
368 can0: can@f8054000 {
369 pinctrl-names = "default";
370 pinctrl-0 = <&pinctrl_can0_default>;
371 status = "okay";
372 };
373
374 uart3: serial@fc008000 {
375 atmel,use-dma-rx;
376 atmel,use-dma-tx;
377 pinctrl-names = "default";
378 pinctrl-0 = <&pinctrl_uart3_default>;
379 status = "okay";
380 };
381
382 flx4: flexcom@fc018000 {
383 atmel,flexcom-mode = <ATMEL_FLEXCOM_MODE_TWI>;
384 status = "okay";
385
386 i2c6: i2c@600 {
387 dmas = <0>, <0>;
388 pinctrl-names = "default", "gpio";
389 pinctrl-0 = <&pinctrl_flx4_default>;
390 pinctrl-1 = <&pinctrl_flx4_gpio>;
391 sda-gpios = <&pioA PIN_PD12 GPIO_ACTIVE_HIGH>;
392 scl-gpios = <&pioA PIN_PD13 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
393 i2c-analog-filter;
394 i2c-digital-filter;
395 i2c-digital-filter-width-ns = <35>;
396 status = "okay";
397 };
398 };
399
400 i2c1: i2c@fc028000 {
401 dmas = <0>, <0>;
402 pinctrl-names = "default", "gpio";
403 pinctrl-0 = <&pinctrl_i2c1_default>;
404 i2c-analog-filter;
405 i2c-digital-filter;
406 i2c-digital-filter-width-ns = <35>;
407 pinctrl-1 = <&pinctrl_i2c1_gpio>;
408 sda-gpios = <&pioA PIN_PD4 GPIO_ACTIVE_HIGH>;
409 scl-gpios = <&pioA PIN_PD5 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>;
410 status = "okay";
411
412 at24@54 {
413 compatible = "atmel,24c02";
414 reg = <0x54>;
415 pagesize = <16>;
416 };
417 };
418
419 adc: adc@fc030000 {
420 vddana-supply = <&vdd_3v3_lp_reg>;
421 vref-supply = <&vdd_3v3_lp_reg>;
422 pinctrl-names = "default";
423 pinctrl-0 = <&pinctrl_adc_default &pinctrl_adtrg_default>;
424 status = "okay";
425 };
426
427 pinctrl@fc038000 {
428 /*
429 * There is no real pinmux for ADC, if the pin
430 * is not requested by another peripheral then
431 * the muxing is done when channel is enabled.
432 * Requesting pins for ADC is GPIO is
433 * encouraged to prevent conflicts and to
434 * disable bias in order to be in the same
435 * state when the pin is not muxed to the adc.
436 */
437 pinctrl_adc_default: adc_default {
438 pinmux = <PIN_PD23__GPIO>;
439 bias-disable;
440 };
441
442 pinctrl_can0_default: can0_default {
443 pinmux = <PIN_PC10__CANTX0>,
444 <PIN_PC11__CANRX0>;
445 bias-disable;
446 };
447
448 pinctrl_can1_default: can1_default {
449 pinmux = <PIN_PC26__CANTX1>,
450 <PIN_PC27__CANRX1>;
451 bias-disable;
452 };
453
454 /*
455 * The ADTRG pin can work on any edge type.
456 * In here it's being pulled up, so need to
457 * connect it to ground to get an edge e.g.
458 * Trigger can be configured on falling, rise
459 * or any edge, and the pull-up can be changed
460 * to pull-down or left floating according to
461 * needs.
462 */
463 pinctrl_adtrg_default: adtrg_default {
464 pinmux = <PIN_PD31__ADTRG>;
465 bias-pull-up;
466 };
467
468 pinctrl_charger_chglev: charger_chglev {
469 pinmux = <PIN_PA12__GPIO>;
470 bias-disable;
471 };
472
473 pinctrl_charger_irq: charger_irq {
474 pinmux = <PIN_PB13__GPIO>;
475 bias-disable;
476 };
477
478 pinctrl_charger_lbo: charger_lbo {
479 pinmux = <PIN_PC8__GPIO>;
480 bias-pull-up;
481 };
482
483 pinctrl_classd_default_pfets: classd_default_pfets {
484 pinmux = <PIN_PB1__CLASSD_R0>,
485 <PIN_PB3__CLASSD_R2>;
486 bias-pull-up;
487 };
488
489 pinctrl_classd_default_nfets: classd_default_nfets {
490 pinmux = <PIN_PB2__CLASSD_R1>,
491 <PIN_PB4__CLASSD_R3>;
492 bias-pull-down;
493 };
494
495 pinctrl_flx0_default: flx0_default {
496 pinmux = <PIN_PB28__FLEXCOM0_IO0>,
497 <PIN_PB29__FLEXCOM0_IO1>;
498 bias-disable;
499 };
500
501 pinctrl_flx4_default: flx4_default {
502 pinmux = <PIN_PD12__FLEXCOM4_IO0>,
503 <PIN_PD13__FLEXCOM4_IO1>;
504 bias-disable;
505 };
506
507 pinctrl_flx4_gpio: flx4_gpio {
508 pinmux = <PIN_PD12__GPIO>,
509 <PIN_PD13__GPIO>;
510 bias-disable;
511 };
512
513 pinctrl_i2c0_default: i2c0_default {
514 pinmux = <PIN_PD21__TWD0>,
515 <PIN_PD22__TWCK0>;
516 bias-disable;
517 };
518
519 pinctrl_i2c0_gpio: i2c0_gpio {
520 pinmux = <PIN_PD21__GPIO>,
521 <PIN_PD22__GPIO>;
522 bias-disable;
523 };
524
525 pinctrl_i2c1_default: i2c1_default {
526 pinmux = <PIN_PD4__TWD1>,
527 <PIN_PD5__TWCK1>;
528 bias-disable;
529 };
530
531 pinctrl_i2c1_gpio: i2c1_gpio {
532 pinmux = <PIN_PD4__GPIO>,
533 <PIN_PD5__GPIO>;
534 bias-disable;
535 };
536
537 pinctrl_i2c2_gpio: i2c2_gpio {
538 pinmux = <PIN_PB28__GPIO>,
539 <PIN_PB29__GPIO>;
540 bias-disable;
541 };
542
543 pinctrl_i2s0_default: i2s0_default {
544 pinmux = <PIN_PC1__I2SC0_CK>,
545 <PIN_PC2__I2SC0_MCK>,
546 <PIN_PC3__I2SC0_WS>,
547 <PIN_PC4__I2SC0_DI0>,
548 <PIN_PC5__I2SC0_DO0>;
549 bias-disable;
550 };
551
552 pinctrl_i2s1_default: i2s1_default {
553 pinmux = <PIN_PA15__I2SC1_CK>,
554 <PIN_PA14__I2SC1_MCK>,
555 <PIN_PA16__I2SC1_WS>,
556 <PIN_PA17__I2SC1_DI0>,
557 <PIN_PA18__I2SC1_DO0>;
558 bias-disable;
559 };
560
561 pinctrl_key_gpio_default: key_gpio_default {
562 pinmux = <PIN_PB9__GPIO>;
563 bias-pull-up;
564 };
565
566 pinctrl_led_gpio_default: led_gpio_default {
567 pinmux = <PIN_PB0__GPIO>,
568 <PIN_PB5__GPIO>,
569 <PIN_PB6__GPIO>;
570 bias-pull-up;
571 };
572
573 pinctrl_macb0_default: macb0_default {
574 pinmux = <PIN_PB14__GTXCK>,
575 <PIN_PB15__GTXEN>,
576 <PIN_PB16__GRXDV>,
577 <PIN_PB17__GRXER>,
578 <PIN_PB18__GRX0>,
579 <PIN_PB19__GRX1>,
580 <PIN_PB20__GTX0>,
581 <PIN_PB21__GTX1>,
582 <PIN_PB22__GMDC>,
583 <PIN_PB23__GMDIO>;
584 bias-disable;
585 };
586
587 pinctrl_macb0_phy_irq: macb0_phy_irq {
588 pinmux = <PIN_PC9__GPIO>;
589 bias-disable;
590 };
591
592 pinctrl_qspi0_default: qspi0_default {
593 sck_cs {
594 pinmux = <PIN_PA22__QSPI0_SCK>,
595 <PIN_PA23__QSPI0_CS>;
596 bias-disable;
597 };
598
599 data {
600 pinmux = <PIN_PA24__QSPI0_IO0>,
601 <PIN_PA25__QSPI0_IO1>,
602 <PIN_PA26__QSPI0_IO2>,
603 <PIN_PA27__QSPI0_IO3>;
604 bias-pull-up;
605 };
606 };
607
608 pinctrl_sdmmc0_default: sdmmc0_default {
609 cmd_data {
610 pinmux = <PIN_PA1__SDMMC0_CMD>,
611 <PIN_PA2__SDMMC0_DAT0>,
612 <PIN_PA3__SDMMC0_DAT1>,
613 <PIN_PA4__SDMMC0_DAT2>,
614 <PIN_PA5__SDMMC0_DAT3>,
615 <PIN_PA6__SDMMC0_DAT4>,
616 <PIN_PA7__SDMMC0_DAT5>,
617 <PIN_PA8__SDMMC0_DAT6>,
618 <PIN_PA9__SDMMC0_DAT7>;
619 bias-disable;
620 };
621
622 ck_cd_rstn_vddsel {
623 pinmux = <PIN_PA0__SDMMC0_CK>,
624 <PIN_PA10__SDMMC0_RSTN>,
625 <PIN_PA11__SDMMC0_VDDSEL>,
626 <PIN_PA13__SDMMC0_CD>;
627 bias-disable;
628 };
629 };
630
631 pinctrl_sdmmc1_default: sdmmc1_default {
632 cmd_data {
633 pinmux = <PIN_PA28__SDMMC1_CMD>,
634 <PIN_PA18__SDMMC1_DAT0>,
635 <PIN_PA19__SDMMC1_DAT1>,
636 <PIN_PA20__SDMMC1_DAT2>,
637 <PIN_PA21__SDMMC1_DAT3>;
638 bias-disable;
639 };
640
641 conf-ck_cd {
642 pinmux = <PIN_PA22__SDMMC1_CK>,
643 <PIN_PA30__SDMMC1_CD>;
644 bias-disable;
645 };
646 };
647
648 pinctrl_spi0_default: spi0_default {
649 pinmux = <PIN_PA14__SPI0_SPCK>,
650 <PIN_PA15__SPI0_MOSI>,
651 <PIN_PA16__SPI0_MISO>,
652 <PIN_PA17__SPI0_NPCS0>;
653 bias-disable;
654 };
655
656 pinctrl_uart1_default: uart1_default {
657 pinmux = <PIN_PD2__URXD1>,
658 <PIN_PD3__UTXD1>;
659 bias-disable;
660 };
661
662 pinctrl_uart3_default: uart3_default {
663 pinmux = <PIN_PB11__URXD3>,
664 <PIN_PB12__UTXD3>;
665 bias-disable;
666 };
667
668 pinctrl_usb_default: usb_default {
669 pinmux = <PIN_PB10__GPIO>;
670 bias-disable;
671 };
672
673 pinctrl_usba_vbus: usba_vbus {
674 pinmux = <PIN_PA31__GPIO>;
675 bias-disable;
676 };
677
678 pinctrl_pwm0_pwm2_default: pwm0_pwm2_default {
679 pinmux = <PIN_PB5__PWMH2>,
680 <PIN_PB6__PWML2>;
681 bias-pull-up;
682 };
683 };
684
685 classd: classd@fc048000 {
686 pinctrl-names = "default";
687 pinctrl-0 = <&pinctrl_classd_default_pfets &pinctrl_classd_default_nfets>;
688 atmel,pwm-type = "diff";
689 atmel,non-overlap-time = <10>;
690 status = "okay";
691 };
692
693 i2s1: i2s@fc04c000 {
694 pinctrl-names = "default";
695 pinctrl-0 = <&pinctrl_i2s1_default>;
696 status = "disabled"; /* conflict with spi0, sdmmc1 */
697 };
698
699 can1: can@fc050000 {
700 pinctrl-names = "default";
701 pinctrl-0 = <&pinctrl_can1_default>;
702 status = "okay";
703 };
704 };
705 };
706
707 gpio_keys {
708 compatible = "gpio-keys";
709
710 pinctrl-names = "default";
711 pinctrl-0 = <&pinctrl_key_gpio_default>;
712
713 bp1 {
714 label = "PB_USER";
715 gpios = <&pioA PIN_PB9 GPIO_ACTIVE_LOW>;
716 linux,code = <KEY_PROG1>;
717 wakeup-source;
718 };
719 };
720
721 leds {
722 compatible = "gpio-leds";
723 pinctrl-names = "default";
724 pinctrl-0 = <&pinctrl_led_gpio_default>;
725 status = "okay"; /* conflict with pwm0 */
726
727 red {
728 label = "red";
729 gpios = <&pioA PIN_PB6 GPIO_ACTIVE_LOW>;
730 };
731
732
733 green {
734 label = "green";
735 gpios = <&pioA PIN_PB5 GPIO_ACTIVE_LOW>;
736 };
737
738 blue {
739 label = "blue";
740 gpios = <&pioA PIN_PB0 GPIO_ACTIVE_LOW>;
741 linux,default-trigger = "heartbeat";
742 };
743 };
744};