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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2014-2017 Phytec Messtechnik GmbH
4 * Author: Wadim Egorov <w.egorov@phytec.de>
5 * Teresa Remmet <t.remmet@phytec.de>
6 */
7
8#include <dt-bindings/input/input.h>
9
10/ {
11 model = "Phytec AM335x PCM-953";
12 compatible = "phytec,am335x-pcm-953", "phytec,am335x-phycore-som", "ti,am33xx";
13
14 /* Power */
15 regulators {
16 vcc3v3: fixedregulator@1 {
17 compatible = "regulator-fixed";
18 regulator-name = "vcc3v3";
19 regulator-min-microvolt = <3300000>;
20 regulator-max-microvolt = <3300000>;
21 regulator-boot-on;
22 };
23
24 vcc1v8: fixedregulator@2 {
25 compatible = "regulator-fixed";
26 regulator-name = "vcc1v8";
27 regulator-min-microvolt = <1800000>;
28 regulator-max-microvolt = <1800000>;
29 regulator-boot-on;
30 };
31 };
32
33 /* User IO */
34 user_leds: user_leds {
35 compatible = "gpio-leds";
36 pinctrl-names = "default";
37 pinctrl-0 = <&user_leds_pins>;
38
39 user-led0 {
40 gpios = <&gpio1 30 GPIO_ACTIVE_HIGH>;
41 linux,default-trigger = "gpio";
42 default-state = "on";
43 };
44
45 user-led1 {
46 gpios = <&gpio1 31 GPIO_ACTIVE_LOW>;
47 linux,default-trigger = "gpio";
48 default-state = "on";
49 };
50 };
51
52 user_buttons: user_buttons {
53 compatible = "gpio-keys";
54 pinctrl-names = "default";
55 pinctrl-0 = <&user_buttons_pins>;
56
57 button@0 {
58 label = "home";
59 linux,code = <KEY_HOME>;
60 gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
61 wakeup-source;
62 };
63
64 button@1 {
65 label = "menu";
66 linux,code = <KEY_MENU>;
67 gpios = <&gpio3 8 GPIO_ACTIVE_HIGH>;
68 wakeup-source;
69 };
70
71 };
72};
73
74&am33xx_pinmux {
75 user_buttons_pins: pinmux_user_buttons {
76 pinctrl-single,pins = <
77 AM33XX_PADCONF(AM335X_PIN_EMU0, PIN_INPUT_PULLDOWN, MUX_MODE7) /* emu0.gpio3_7 */
78 AM33XX_PADCONF(AM335X_PIN_EMU1, PIN_INPUT_PULLDOWN, MUX_MODE7) /* emu1.gpio3_8 */
79 >;
80 };
81
82 user_leds_pins: pinmux_user_leds {
83 pinctrl-single,pins = <
84 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn1.gpio1_30 */
85 AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* gpmc_csn2.gpio1_31 */
86 >;
87 };
88};
89
90/* CAN */
91&am33xx_pinmux {
92 dcan1_pins: pinmux_dcan1 {
93 pinctrl-single,pins = <
94 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_OUTPUT_PULLUP, MUX_MODE2) /* uart1_rxd.dcan1_tx_mux2 */
95 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_INPUT_PULLUP, MUX_MODE2) /* uart1_txd.dcan1_rx_mux2 */
96 >;
97 };
98};
99
100&dcan1 {
101 pinctrl-names = "default";
102 pinctrl-0 = <&dcan1_pins>;
103 status = "okay";
104};
105
106/* Ethernet */
107&am33xx_pinmux {
108 ethernet1_pins: pinmux_ethernet1 {
109 pinctrl-single,pins = <
110 AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a0.rgmii2_tctl */
111 AM33XX_PADCONF(AM335X_PIN_GPMC_A1, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a1.rgmii2_rctl */
112 AM33XX_PADCONF(AM335X_PIN_GPMC_A2, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a2.rgmii2_td3 */
113 AM33XX_PADCONF(AM335X_PIN_GPMC_A3, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a3.rgmii2_td2 */
114 AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a4.rgmii2_td1 */
115 AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a5.rgmii2_td0 */
116 AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT_PULLDOWN, MUX_MODE2) /* gpmc_a6.rgmii2_tclk */
117 AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a7.rgmii2_rclk */
118 AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a8.rgmii2_rd3 */
119 AM33XX_PADCONF(AM335X_PIN_GPMC_A9, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a9.rgmii2_rd2 */
120 AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a10.rgmii2_rd1 */
121 AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE2) /* gpmc_a11.rgmii2_rd0 */
122 >;
123 };
124};
125
126&cpsw_emac1 {
127 phy-handle = <&phy1>;
128 phy-mode = "rgmii-id";
129 dual_emac_res_vlan = <2>;
130 status = "okay";
131};
132
133&davinci_mdio {
134 phy1: ethernet-phy@2 {
135 reg = <2>;
136 };
137};
138
139&mac {
140 slaves = <2>;
141 pinctrl-names = "default";
142 pinctrl-0 = <ðernet0_pins ðernet1_pins>;
143 dual_emac;
144};
145
146/* Misc */
147&am33xx_pinmux {
148 pinctrl-names = "default";
149 pinctrl-0 = <&cb_gpio_pins>;
150
151 cb_gpio_pins: pinmux_cb_gpio {
152 pinctrl-single,pins = <
153 AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* uart0_ctsn.gpio1_8 */
154 AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE7) /* uart0_rtsn.gpio1_9 */
155 >;
156 };
157};
158
159/* MMC */
160&am33xx_pinmux {
161 mmc1_pins: pinmux_mmc1_pins {
162 pinctrl-single,pins = <
163 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
164 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
165 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
166 AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
167 AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
168 AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
169 AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT_PULLUP, MUX_MODE7) /* spi0_cs1.mmc0_sdcd */
170 >;
171 };
172};
173
174&mmc1 {
175 vmmc-supply = <&vcc3v3>;
176 bus-width = <4>;
177 pinctrl-names = "default";
178 pinctrl-0 = <&mmc1_pins>;
179 cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
180 status = "okay";
181};
182
183/* UARTs */
184&am33xx_pinmux {
185 uart0_pins: pinmux_uart0 {
186 pinctrl-single,pins = <
187 AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
188 AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
189 >;
190 };
191
192 uart1_pins: pinmux_uart1 {
193 pinctrl-single,pins = <
194 AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
195 AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
196 AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
197 AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
198 >;
199 };
200
201 uart2_pins: pinmux_uart2 {
202 pinctrl-single,pins = <
203 AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_tx_clk.uart2_rxd */
204 AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rx_clk.uart2_txd */
205 >;
206 };
207
208 uart3_pins: pinmux_uart3 {
209 pinctrl-single,pins = <
210 AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1) /* mii1_rxd3.uart3_rxd */
211 AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1) /* mii1_rxd2.uart3_txd */
212 >;
213 };
214};
215
216&uart0 {
217 pinctrl-names = "default";
218 pinctrl-0 = <&uart0_pins>;
219 status = "okay";
220};
221
222&uart1 {
223 pinctrl-names = "default";
224 pinctrl-0 = <&uart1_pins>;
225};
226
227&uart2 {
228 pinctrl-names = "default";
229 pinctrl-0 = <&uart2_pins>;
230 status = "okay";
231};
232
233&uart3 {
234 pinctrl-names = "default";
235 pinctrl-0 = <&uart3_pins>;
236 status = "okay";
237};
238
239/* USB */
240&usb1 {
241 dr_mode = "host";
242};