1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Intel Low Power Subsystem PWM controller driver
 4 *
 5 * Copyright (C) 2014, Intel Corporation
 6 *
 7 * Derived from the original pwm-lpss.c
 8 */
 9
10#ifndef __PWM_LPSS_H
11#define __PWM_LPSS_H
12
 
13#include <linux/pwm.h>
14#include <linux/types.h>
15
16#include <linux/platform_data/x86/pwm-lpss.h>
17
18#define LPSS_MAX_PWMS			4
19
20struct pwm_lpss_chip {
 
21	void __iomem *regs;
22	const struct pwm_lpss_boardinfo *info;
23};
24
25extern const struct pwm_lpss_boardinfo pwm_lpss_byt_info;
26extern const struct pwm_lpss_boardinfo pwm_lpss_bsw_info;
27extern const struct pwm_lpss_boardinfo pwm_lpss_bxt_info;
28extern const struct pwm_lpss_boardinfo pwm_lpss_tng_info;
 
 
 
 
 
 
 
 
 
 
29
30#endif	/* __PWM_LPSS_H */

 1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Intel Low Power Subsystem PWM controller driver
 4 *
 5 * Copyright (C) 2014, Intel Corporation
 6 *
 7 * Derived from the original pwm-lpss.c
 8 */
 9
10#ifndef __PWM_LPSS_H
11#define __PWM_LPSS_H
12
13#include <linux/device.h>
14#include <linux/pwm.h>
 
15
16#define MAX_PWMS			4
 
 
17
18struct pwm_lpss_chip {
19	struct pwm_chip chip;
20	void __iomem *regs;
21	const struct pwm_lpss_boardinfo *info;
22};
23
24struct pwm_lpss_boardinfo {
25	unsigned long clk_rate;
26	unsigned int npwm;
27	unsigned long base_unit_bits;
28	bool bypass;
29	/*
30	 * On some devices the _PS0/_PS3 AML code of the GPU (GFX0) device
31	 * messes with the PWM0 controllers state,
32	 */
33	bool other_devices_aml_touches_pwm_regs;
34};
35
36struct pwm_lpss_chip *pwm_lpss_probe(struct device *dev, struct resource *r,
37				     const struct pwm_lpss_boardinfo *info);
38
39#endif	/* __PWM_LPSS_H */