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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8#include <linux/atomic.h>
9#include <linux/bug.h>
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/export.h>
13#include <linux/kernel.h>
14#include <linux/list.h>
15#include <linux/of.h>
16#include <linux/pm_runtime.h>
17#include <linux/slab.h>
18#include <linux/spinlock.h>
19#include <linux/workqueue.h>
20
21#include "internals.h"
22
23static DEFINE_IDR(i3c_bus_idr);
24static DEFINE_MUTEX(i3c_core_lock);
25static int __i3c_first_dynamic_bus_num;
26static BLOCKING_NOTIFIER_HEAD(i3c_bus_notifier);
27
28/**
29 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
30 * @bus: I3C bus to take the lock on
31 *
32 * This function takes the bus lock so that no other operations can occur on
33 * the bus. This is needed for all kind of bus maintenance operation, like
34 * - enabling/disabling slave events
35 * - re-triggering DAA
36 * - changing the dynamic address of a device
37 * - relinquishing mastership
38 * - ...
39 *
40 * The reason for this kind of locking is that we don't want drivers and core
41 * logic to rely on I3C device information that could be changed behind their
42 * back.
43 */
44static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
45{
46 down_write(&bus->lock);
47}
48
49/**
50 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
51 * operation
52 * @bus: I3C bus to release the lock on
53 *
54 * Should be called when the bus maintenance operation is done. See
55 * i3c_bus_maintenance_lock() for more details on what these maintenance
56 * operations are.
57 */
58static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
59{
60 up_write(&bus->lock);
61}
62
63/**
64 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
65 * @bus: I3C bus to take the lock on
66 *
67 * This function takes the bus lock for any operation that is not a maintenance
68 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
69 * maintenance operations). Basically all communications with I3C devices are
70 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
71 * state or I3C dynamic address).
72 *
73 * Note that this lock is not guaranteeing serialization of normal operations.
74 * In other words, transfer requests passed to the I3C master can be submitted
75 * in parallel and I3C master drivers have to use their own locking to make
76 * sure two different communications are not inter-mixed, or access to the
77 * output/input queue is not done while the engine is busy.
78 */
79void i3c_bus_normaluse_lock(struct i3c_bus *bus)
80{
81 down_read(&bus->lock);
82}
83
84/**
85 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
86 * @bus: I3C bus to release the lock on
87 *
88 * Should be called when a normal operation is done. See
89 * i3c_bus_normaluse_lock() for more details on what these normal operations
90 * are.
91 */
92void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
93{
94 up_read(&bus->lock);
95}
96
97static struct i3c_master_controller *
98i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
99{
100 return container_of(i3cbus, struct i3c_master_controller, bus);
101}
102
103static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
104{
105 return container_of(dev, struct i3c_master_controller, dev);
106}
107
108static const struct device_type i3c_device_type;
109
110static struct i3c_bus *dev_to_i3cbus(struct device *dev)
111{
112 struct i3c_master_controller *master;
113
114 if (dev->type == &i3c_device_type)
115 return dev_to_i3cdev(dev)->bus;
116
117 master = dev_to_i3cmaster(dev);
118
119 return &master->bus;
120}
121
122static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
123{
124 struct i3c_master_controller *master;
125
126 if (dev->type == &i3c_device_type)
127 return dev_to_i3cdev(dev)->desc;
128
129 master = dev_to_i3cmaster(dev);
130
131 return master->this;
132}
133
134static ssize_t bcr_show(struct device *dev,
135 struct device_attribute *da,
136 char *buf)
137{
138 struct i3c_bus *bus = dev_to_i3cbus(dev);
139 struct i3c_dev_desc *desc;
140 ssize_t ret;
141
142 i3c_bus_normaluse_lock(bus);
143 desc = dev_to_i3cdesc(dev);
144 ret = sprintf(buf, "%x\n", desc->info.bcr);
145 i3c_bus_normaluse_unlock(bus);
146
147 return ret;
148}
149static DEVICE_ATTR_RO(bcr);
150
151static ssize_t dcr_show(struct device *dev,
152 struct device_attribute *da,
153 char *buf)
154{
155 struct i3c_bus *bus = dev_to_i3cbus(dev);
156 struct i3c_dev_desc *desc;
157 ssize_t ret;
158
159 i3c_bus_normaluse_lock(bus);
160 desc = dev_to_i3cdesc(dev);
161 ret = sprintf(buf, "%x\n", desc->info.dcr);
162 i3c_bus_normaluse_unlock(bus);
163
164 return ret;
165}
166static DEVICE_ATTR_RO(dcr);
167
168static ssize_t pid_show(struct device *dev,
169 struct device_attribute *da,
170 char *buf)
171{
172 struct i3c_bus *bus = dev_to_i3cbus(dev);
173 struct i3c_dev_desc *desc;
174 ssize_t ret;
175
176 i3c_bus_normaluse_lock(bus);
177 desc = dev_to_i3cdesc(dev);
178 ret = sprintf(buf, "%llx\n", desc->info.pid);
179 i3c_bus_normaluse_unlock(bus);
180
181 return ret;
182}
183static DEVICE_ATTR_RO(pid);
184
185static ssize_t dynamic_address_show(struct device *dev,
186 struct device_attribute *da,
187 char *buf)
188{
189 struct i3c_bus *bus = dev_to_i3cbus(dev);
190 struct i3c_dev_desc *desc;
191 ssize_t ret;
192
193 i3c_bus_normaluse_lock(bus);
194 desc = dev_to_i3cdesc(dev);
195 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
196 i3c_bus_normaluse_unlock(bus);
197
198 return ret;
199}
200static DEVICE_ATTR_RO(dynamic_address);
201
202static const char * const hdrcap_strings[] = {
203 "hdr-ddr", "hdr-tsp", "hdr-tsl",
204};
205
206static ssize_t hdrcap_show(struct device *dev,
207 struct device_attribute *da,
208 char *buf)
209{
210 struct i3c_bus *bus = dev_to_i3cbus(dev);
211 struct i3c_dev_desc *desc;
212 ssize_t offset = 0, ret;
213 unsigned long caps;
214 int mode;
215
216 i3c_bus_normaluse_lock(bus);
217 desc = dev_to_i3cdesc(dev);
218 caps = desc->info.hdr_cap;
219 for_each_set_bit(mode, &caps, 8) {
220 if (mode >= ARRAY_SIZE(hdrcap_strings))
221 break;
222
223 if (!hdrcap_strings[mode])
224 continue;
225
226 ret = sprintf(buf + offset, offset ? " %s" : "%s",
227 hdrcap_strings[mode]);
228 if (ret < 0)
229 goto out;
230
231 offset += ret;
232 }
233
234 ret = sprintf(buf + offset, "\n");
235 if (ret < 0)
236 goto out;
237
238 ret = offset + ret;
239
240out:
241 i3c_bus_normaluse_unlock(bus);
242
243 return ret;
244}
245static DEVICE_ATTR_RO(hdrcap);
246
247static ssize_t modalias_show(struct device *dev,
248 struct device_attribute *da, char *buf)
249{
250 struct i3c_device *i3c = dev_to_i3cdev(dev);
251 struct i3c_device_info devinfo;
252 u16 manuf, part, ext;
253
254 i3c_device_get_info(i3c, &devinfo);
255 manuf = I3C_PID_MANUF_ID(devinfo.pid);
256 part = I3C_PID_PART_ID(devinfo.pid);
257 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
258
259 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
261 manuf);
262
263 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
264 devinfo.dcr, manuf, part, ext);
265}
266static DEVICE_ATTR_RO(modalias);
267
268static struct attribute *i3c_device_attrs[] = {
269 &dev_attr_bcr.attr,
270 &dev_attr_dcr.attr,
271 &dev_attr_pid.attr,
272 &dev_attr_dynamic_address.attr,
273 &dev_attr_hdrcap.attr,
274 &dev_attr_modalias.attr,
275 NULL,
276};
277ATTRIBUTE_GROUPS(i3c_device);
278
279static int i3c_device_uevent(const struct device *dev, struct kobj_uevent_env *env)
280{
281 const struct i3c_device *i3cdev = dev_to_i3cdev(dev);
282 struct i3c_device_info devinfo;
283 u16 manuf, part, ext;
284
285 if (i3cdev->desc)
286 devinfo = i3cdev->desc->info;
287 manuf = I3C_PID_MANUF_ID(devinfo.pid);
288 part = I3C_PID_PART_ID(devinfo.pid);
289 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
290
291 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
292 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
293 devinfo.dcr, manuf);
294
295 return add_uevent_var(env,
296 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
297 devinfo.dcr, manuf, part, ext);
298}
299
300static const struct device_type i3c_device_type = {
301 .groups = i3c_device_groups,
302 .uevent = i3c_device_uevent,
303};
304
305static int i3c_device_match(struct device *dev, const struct device_driver *drv)
306{
307 struct i3c_device *i3cdev;
308 const struct i3c_driver *i3cdrv;
309
310 if (dev->type != &i3c_device_type)
311 return 0;
312
313 i3cdev = dev_to_i3cdev(dev);
314 i3cdrv = drv_to_i3cdrv(drv);
315 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
316 return 1;
317
318 return 0;
319}
320
321static int i3c_device_probe(struct device *dev)
322{
323 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
324 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
325
326 return driver->probe(i3cdev);
327}
328
329static void i3c_device_remove(struct device *dev)
330{
331 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
332 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
333
334 if (driver->remove)
335 driver->remove(i3cdev);
336
337 i3c_device_free_ibi(i3cdev);
338}
339
340const struct bus_type i3c_bus_type = {
341 .name = "i3c",
342 .match = i3c_device_match,
343 .probe = i3c_device_probe,
344 .remove = i3c_device_remove,
345};
346EXPORT_SYMBOL_GPL(i3c_bus_type);
347
348static enum i3c_addr_slot_status
349i3c_bus_get_addr_slot_status_mask(struct i3c_bus *bus, u16 addr, u32 mask)
350{
351 unsigned long status;
352 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
353
354 if (addr > I2C_MAX_ADDR)
355 return I3C_ADDR_SLOT_RSVD;
356
357 status = bus->addrslots[bitpos / BITS_PER_LONG];
358 status >>= bitpos % BITS_PER_LONG;
359
360 return status & mask;
361}
362
363static enum i3c_addr_slot_status
364i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
365{
366 return i3c_bus_get_addr_slot_status_mask(bus, addr, I3C_ADDR_SLOT_STATUS_MASK);
367}
368
369static void i3c_bus_set_addr_slot_status_mask(struct i3c_bus *bus, u16 addr,
370 enum i3c_addr_slot_status status, u32 mask)
371{
372 int bitpos = addr * I3C_ADDR_SLOT_STATUS_BITS;
373 unsigned long *ptr;
374
375 if (addr > I2C_MAX_ADDR)
376 return;
377
378 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
379 *ptr &= ~((unsigned long)mask << (bitpos % BITS_PER_LONG));
380 *ptr |= ((unsigned long)status & mask) << (bitpos % BITS_PER_LONG);
381}
382
383static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
384 enum i3c_addr_slot_status status)
385{
386 i3c_bus_set_addr_slot_status_mask(bus, addr, status, I3C_ADDR_SLOT_STATUS_MASK);
387}
388
389static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
390{
391 enum i3c_addr_slot_status status;
392
393 status = i3c_bus_get_addr_slot_status(bus, addr);
394
395 return status == I3C_ADDR_SLOT_FREE;
396}
397
398/*
399 * ┌────┬─────────────┬───┬─────────┬───┐
400 * │S/Sr│ 7'h7E RnW=0 │ACK│ ENTDAA │ T ├────┐
401 * └────┴─────────────┴───┴─────────┴───┘ │
402 * ┌─────────────────────────────────────────┘
403 * │ ┌──┬─────────────┬───┬─────────────────┬────────────────┬───┬─────────┐
404 * └─►│Sr│7'h7E RnW=1 │ACK│48bit UID BCR DCR│Assign 7bit Addr│PAR│ ACK/NACK│
405 * └──┴─────────────┴───┴─────────────────┴────────────────┴───┴─────────┘
406 * Some master controllers (such as HCI) need to prepare the entire above transaction before
407 * sending it out to the I3C bus. This means that a 7-bit dynamic address needs to be allocated
408 * before knowing the target device's UID information.
409 *
410 * However, some I3C targets may request specific addresses (called as "init_dyn_addr"), which is
411 * typically specified by the DT-'s assigned-address property. Lower addresses having higher IBI
412 * priority. If it is available, i3c_bus_get_free_addr() preferably return a free address that is
413 * not in the list of desired addresses (called as "init_dyn_addr"). This allows the device with
414 * the "init_dyn_addr" to switch to its "init_dyn_addr" when it hot-joins the I3C bus. Otherwise,
415 * if the "init_dyn_addr" is already in use by another I3C device, the target device will not be
416 * able to switch to its desired address.
417 *
418 * If the previous step fails, fallback returning one of the remaining unassigned address,
419 * regardless of its state in the desired list.
420 */
421static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
422{
423 enum i3c_addr_slot_status status;
424 u8 addr;
425
426 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
427 status = i3c_bus_get_addr_slot_status_mask(bus, addr,
428 I3C_ADDR_SLOT_EXT_STATUS_MASK);
429 if (status == I3C_ADDR_SLOT_FREE)
430 return addr;
431 }
432
433 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
434 status = i3c_bus_get_addr_slot_status_mask(bus, addr,
435 I3C_ADDR_SLOT_STATUS_MASK);
436 if (status == I3C_ADDR_SLOT_FREE)
437 return addr;
438 }
439
440 return -ENOMEM;
441}
442
443static void i3c_bus_init_addrslots(struct i3c_bus *bus)
444{
445 int i;
446
447 /* Addresses 0 to 7 are reserved. */
448 for (i = 0; i < 8; i++)
449 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
450
451 /*
452 * Reserve broadcast address and all addresses that might collide
453 * with the broadcast address when facing a single bit error.
454 */
455 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
456 I3C_ADDR_SLOT_RSVD);
457 for (i = 0; i < 7; i++)
458 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
459 I3C_ADDR_SLOT_RSVD);
460}
461
462static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
463{
464 mutex_lock(&i3c_core_lock);
465 idr_remove(&i3c_bus_idr, i3cbus->id);
466 mutex_unlock(&i3c_core_lock);
467}
468
469static int i3c_bus_init(struct i3c_bus *i3cbus, struct device_node *np)
470{
471 int ret, start, end, id = -1;
472
473 init_rwsem(&i3cbus->lock);
474 INIT_LIST_HEAD(&i3cbus->devs.i2c);
475 INIT_LIST_HEAD(&i3cbus->devs.i3c);
476 i3c_bus_init_addrslots(i3cbus);
477 i3cbus->mode = I3C_BUS_MODE_PURE;
478
479 if (np)
480 id = of_alias_get_id(np, "i3c");
481
482 mutex_lock(&i3c_core_lock);
483 if (id >= 0) {
484 start = id;
485 end = start + 1;
486 } else {
487 start = __i3c_first_dynamic_bus_num;
488 end = 0;
489 }
490
491 ret = idr_alloc(&i3c_bus_idr, i3cbus, start, end, GFP_KERNEL);
492 mutex_unlock(&i3c_core_lock);
493
494 if (ret < 0)
495 return ret;
496
497 i3cbus->id = ret;
498
499 return 0;
500}
501
502void i3c_for_each_bus_locked(int (*fn)(struct i3c_bus *bus, void *data),
503 void *data)
504{
505 struct i3c_bus *bus;
506 int id;
507
508 mutex_lock(&i3c_core_lock);
509 idr_for_each_entry(&i3c_bus_idr, bus, id)
510 fn(bus, data);
511 mutex_unlock(&i3c_core_lock);
512}
513EXPORT_SYMBOL_GPL(i3c_for_each_bus_locked);
514
515int i3c_register_notifier(struct notifier_block *nb)
516{
517 return blocking_notifier_chain_register(&i3c_bus_notifier, nb);
518}
519EXPORT_SYMBOL_GPL(i3c_register_notifier);
520
521int i3c_unregister_notifier(struct notifier_block *nb)
522{
523 return blocking_notifier_chain_unregister(&i3c_bus_notifier, nb);
524}
525EXPORT_SYMBOL_GPL(i3c_unregister_notifier);
526
527static void i3c_bus_notify(struct i3c_bus *bus, unsigned int action)
528{
529 blocking_notifier_call_chain(&i3c_bus_notifier, action, bus);
530}
531
532static const char * const i3c_bus_mode_strings[] = {
533 [I3C_BUS_MODE_PURE] = "pure",
534 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
535 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
536 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
537};
538
539static ssize_t mode_show(struct device *dev,
540 struct device_attribute *da,
541 char *buf)
542{
543 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
544 ssize_t ret;
545
546 i3c_bus_normaluse_lock(i3cbus);
547 if (i3cbus->mode < 0 ||
548 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
549 !i3c_bus_mode_strings[i3cbus->mode])
550 ret = sprintf(buf, "unknown\n");
551 else
552 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
553 i3c_bus_normaluse_unlock(i3cbus);
554
555 return ret;
556}
557static DEVICE_ATTR_RO(mode);
558
559static ssize_t current_master_show(struct device *dev,
560 struct device_attribute *da,
561 char *buf)
562{
563 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
564 ssize_t ret;
565
566 i3c_bus_normaluse_lock(i3cbus);
567 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
568 i3cbus->cur_master->info.pid);
569 i3c_bus_normaluse_unlock(i3cbus);
570
571 return ret;
572}
573static DEVICE_ATTR_RO(current_master);
574
575static ssize_t i3c_scl_frequency_show(struct device *dev,
576 struct device_attribute *da,
577 char *buf)
578{
579 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
580 ssize_t ret;
581
582 i3c_bus_normaluse_lock(i3cbus);
583 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
584 i3c_bus_normaluse_unlock(i3cbus);
585
586 return ret;
587}
588static DEVICE_ATTR_RO(i3c_scl_frequency);
589
590static ssize_t i2c_scl_frequency_show(struct device *dev,
591 struct device_attribute *da,
592 char *buf)
593{
594 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
595 ssize_t ret;
596
597 i3c_bus_normaluse_lock(i3cbus);
598 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
599 i3c_bus_normaluse_unlock(i3cbus);
600
601 return ret;
602}
603static DEVICE_ATTR_RO(i2c_scl_frequency);
604
605static int i3c_set_hotjoin(struct i3c_master_controller *master, bool enable)
606{
607 int ret;
608
609 if (!master || !master->ops)
610 return -EINVAL;
611
612 if (!master->ops->enable_hotjoin || !master->ops->disable_hotjoin)
613 return -EINVAL;
614
615 i3c_bus_normaluse_lock(&master->bus);
616
617 if (enable)
618 ret = master->ops->enable_hotjoin(master);
619 else
620 ret = master->ops->disable_hotjoin(master);
621
622 master->hotjoin = enable;
623
624 i3c_bus_normaluse_unlock(&master->bus);
625
626 return ret;
627}
628
629static ssize_t hotjoin_store(struct device *dev, struct device_attribute *attr,
630 const char *buf, size_t count)
631{
632 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
633 int ret;
634 bool res;
635
636 if (!i3cbus->cur_master)
637 return -EINVAL;
638
639 if (kstrtobool(buf, &res))
640 return -EINVAL;
641
642 ret = i3c_set_hotjoin(i3cbus->cur_master->common.master, res);
643 if (ret)
644 return ret;
645
646 return count;
647}
648
649/*
650 * i3c_master_enable_hotjoin - Enable hotjoin
651 * @master: I3C master object
652 *
653 * Return: a 0 in case of success, an negative error code otherwise.
654 */
655int i3c_master_enable_hotjoin(struct i3c_master_controller *master)
656{
657 return i3c_set_hotjoin(master, true);
658}
659EXPORT_SYMBOL_GPL(i3c_master_enable_hotjoin);
660
661/*
662 * i3c_master_disable_hotjoin - Disable hotjoin
663 * @master: I3C master object
664 *
665 * Return: a 0 in case of success, an negative error code otherwise.
666 */
667int i3c_master_disable_hotjoin(struct i3c_master_controller *master)
668{
669 return i3c_set_hotjoin(master, false);
670}
671EXPORT_SYMBOL_GPL(i3c_master_disable_hotjoin);
672
673static ssize_t hotjoin_show(struct device *dev, struct device_attribute *da, char *buf)
674{
675 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
676 ssize_t ret;
677
678 i3c_bus_normaluse_lock(i3cbus);
679 ret = sysfs_emit(buf, "%d\n", i3cbus->cur_master->common.master->hotjoin);
680 i3c_bus_normaluse_unlock(i3cbus);
681
682 return ret;
683}
684
685static DEVICE_ATTR_RW(hotjoin);
686
687static struct attribute *i3c_masterdev_attrs[] = {
688 &dev_attr_mode.attr,
689 &dev_attr_current_master.attr,
690 &dev_attr_i3c_scl_frequency.attr,
691 &dev_attr_i2c_scl_frequency.attr,
692 &dev_attr_bcr.attr,
693 &dev_attr_dcr.attr,
694 &dev_attr_pid.attr,
695 &dev_attr_dynamic_address.attr,
696 &dev_attr_hdrcap.attr,
697 &dev_attr_hotjoin.attr,
698 NULL,
699};
700ATTRIBUTE_GROUPS(i3c_masterdev);
701
702static void i3c_masterdev_release(struct device *dev)
703{
704 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
705 struct i3c_bus *bus = dev_to_i3cbus(dev);
706
707 if (master->wq)
708 destroy_workqueue(master->wq);
709
710 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
711 i3c_bus_cleanup(bus);
712
713 of_node_put(dev->of_node);
714}
715
716static const struct device_type i3c_masterdev_type = {
717 .groups = i3c_masterdev_groups,
718};
719
720static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
721 unsigned long max_i2c_scl_rate)
722{
723 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
724
725 i3cbus->mode = mode;
726
727 switch (i3cbus->mode) {
728 case I3C_BUS_MODE_PURE:
729 if (!i3cbus->scl_rate.i3c)
730 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
731 break;
732 case I3C_BUS_MODE_MIXED_FAST:
733 case I3C_BUS_MODE_MIXED_LIMITED:
734 if (!i3cbus->scl_rate.i3c)
735 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
736 if (!i3cbus->scl_rate.i2c)
737 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
738 break;
739 case I3C_BUS_MODE_MIXED_SLOW:
740 if (!i3cbus->scl_rate.i2c)
741 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
742 if (!i3cbus->scl_rate.i3c ||
743 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
744 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
745 break;
746 default:
747 return -EINVAL;
748 }
749
750 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
751 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
752
753 /*
754 * I3C/I2C frequency may have been overridden, check that user-provided
755 * values are not exceeding max possible frequency.
756 */
757 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
758 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
759 return -EINVAL;
760
761 return 0;
762}
763
764static struct i3c_master_controller *
765i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
766{
767 return container_of(adap, struct i3c_master_controller, i2c);
768}
769
770static struct i2c_adapter *
771i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
772{
773 return &master->i2c;
774}
775
776static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
777{
778 kfree(dev);
779}
780
781static struct i2c_dev_desc *
782i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
783 u16 addr, u8 lvr)
784{
785 struct i2c_dev_desc *dev;
786
787 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
788 if (!dev)
789 return ERR_PTR(-ENOMEM);
790
791 dev->common.master = master;
792 dev->addr = addr;
793 dev->lvr = lvr;
794
795 return dev;
796}
797
798static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
799 u16 payloadlen)
800{
801 dest->addr = addr;
802 dest->payload.len = payloadlen;
803 if (payloadlen)
804 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
805 else
806 dest->payload.data = NULL;
807
808 return dest->payload.data;
809}
810
811static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
812{
813 kfree(dest->payload.data);
814}
815
816static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
817 struct i3c_ccc_cmd_dest *dests,
818 unsigned int ndests)
819{
820 cmd->rnw = rnw ? 1 : 0;
821 cmd->id = id;
822 cmd->dests = dests;
823 cmd->ndests = ndests;
824 cmd->err = I3C_ERROR_UNKNOWN;
825}
826
827static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
828 struct i3c_ccc_cmd *cmd)
829{
830 int ret;
831
832 if (!cmd || !master)
833 return -EINVAL;
834
835 if (WARN_ON(master->init_done &&
836 !rwsem_is_locked(&master->bus.lock)))
837 return -EINVAL;
838
839 if (!master->ops->send_ccc_cmd)
840 return -ENOTSUPP;
841
842 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
843 return -EINVAL;
844
845 if (master->ops->supports_ccc_cmd &&
846 !master->ops->supports_ccc_cmd(master, cmd))
847 return -ENOTSUPP;
848
849 ret = master->ops->send_ccc_cmd(master, cmd);
850 if (ret) {
851 if (cmd->err != I3C_ERROR_UNKNOWN)
852 return cmd->err;
853
854 return ret;
855 }
856
857 return 0;
858}
859
860static struct i2c_dev_desc *
861i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
862 u16 addr)
863{
864 struct i2c_dev_desc *dev;
865
866 i3c_bus_for_each_i2cdev(&master->bus, dev) {
867 if (dev->addr == addr)
868 return dev;
869 }
870
871 return NULL;
872}
873
874/**
875 * i3c_master_get_free_addr() - get a free address on the bus
876 * @master: I3C master object
877 * @start_addr: where to start searching
878 *
879 * This function must be called with the bus lock held in write mode.
880 *
881 * Return: the first free address starting at @start_addr (included) or -ENOMEM
882 * if there's no more address available.
883 */
884int i3c_master_get_free_addr(struct i3c_master_controller *master,
885 u8 start_addr)
886{
887 return i3c_bus_get_free_addr(&master->bus, start_addr);
888}
889EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
890
891static void i3c_device_release(struct device *dev)
892{
893 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
894
895 WARN_ON(i3cdev->desc);
896
897 of_node_put(i3cdev->dev.of_node);
898 kfree(i3cdev);
899}
900
901static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
902{
903 kfree(dev);
904}
905
906static struct i3c_dev_desc *
907i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
908 const struct i3c_device_info *info)
909{
910 struct i3c_dev_desc *dev;
911
912 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
913 if (!dev)
914 return ERR_PTR(-ENOMEM);
915
916 dev->common.master = master;
917 dev->info = *info;
918 mutex_init(&dev->ibi_lock);
919
920 return dev;
921}
922
923static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
924 u8 addr)
925{
926 enum i3c_addr_slot_status addrstat;
927 struct i3c_ccc_cmd_dest dest;
928 struct i3c_ccc_cmd cmd;
929 int ret;
930
931 if (!master)
932 return -EINVAL;
933
934 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
935 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
936 return -EINVAL;
937
938 i3c_ccc_cmd_dest_init(&dest, addr, 0);
939 i3c_ccc_cmd_init(&cmd, false,
940 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
941 &dest, 1);
942 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
943 i3c_ccc_cmd_dest_cleanup(&dest);
944
945 return ret;
946}
947
948/**
949 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
950 * procedure
951 * @master: master used to send frames on the bus
952 *
953 * Send a ENTDAA CCC command to start a DAA procedure.
954 *
955 * Note that this function only sends the ENTDAA CCC command, all the logic
956 * behind dynamic address assignment has to be handled in the I3C master
957 * driver.
958 *
959 * This function must be called with the bus lock held in write mode.
960 *
961 * Return: 0 in case of success, a positive I3C error code if the error is
962 * one of the official Mx error codes, and a negative error code otherwise.
963 */
964int i3c_master_entdaa_locked(struct i3c_master_controller *master)
965{
966 struct i3c_ccc_cmd_dest dest;
967 struct i3c_ccc_cmd cmd;
968 int ret;
969
970 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
971 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
972 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
973 i3c_ccc_cmd_dest_cleanup(&dest);
974
975 return ret;
976}
977EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
978
979static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
980 u8 addr, bool enable, u8 evts)
981{
982 struct i3c_ccc_events *events;
983 struct i3c_ccc_cmd_dest dest;
984 struct i3c_ccc_cmd cmd;
985 int ret;
986
987 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
988 if (!events)
989 return -ENOMEM;
990
991 events->events = evts;
992 i3c_ccc_cmd_init(&cmd, false,
993 enable ?
994 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
995 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
996 &dest, 1);
997 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
998 i3c_ccc_cmd_dest_cleanup(&dest);
999
1000 return ret;
1001}
1002
1003/**
1004 * i3c_master_disec_locked() - send a DISEC CCC command
1005 * @master: master used to send frames on the bus
1006 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1007 * @evts: events to disable
1008 *
1009 * Send a DISEC CCC command to disable some or all events coming from a
1010 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1011 *
1012 * This function must be called with the bus lock held in write mode.
1013 *
1014 * Return: 0 in case of success, a positive I3C error code if the error is
1015 * one of the official Mx error codes, and a negative error code otherwise.
1016 */
1017int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
1018 u8 evts)
1019{
1020 return i3c_master_enec_disec_locked(master, addr, false, evts);
1021}
1022EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
1023
1024/**
1025 * i3c_master_enec_locked() - send an ENEC CCC command
1026 * @master: master used to send frames on the bus
1027 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
1028 * @evts: events to disable
1029 *
1030 * Sends an ENEC CCC command to enable some or all events coming from a
1031 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
1032 *
1033 * This function must be called with the bus lock held in write mode.
1034 *
1035 * Return: 0 in case of success, a positive I3C error code if the error is
1036 * one of the official Mx error codes, and a negative error code otherwise.
1037 */
1038int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
1039 u8 evts)
1040{
1041 return i3c_master_enec_disec_locked(master, addr, true, evts);
1042}
1043EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
1044
1045/**
1046 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
1047 * @master: master used to send frames on the bus
1048 *
1049 * Send a DEFSLVS CCC command containing all the devices known to the @master.
1050 * This is useful when you have secondary masters on the bus to propagate
1051 * device information.
1052 *
1053 * This should be called after all I3C devices have been discovered (in other
1054 * words, after the DAA procedure has finished) and instantiated in
1055 * &i3c_master_controller_ops->bus_init().
1056 * It should also be called if a master ACKed an Hot-Join request and assigned
1057 * a dynamic address to the device joining the bus.
1058 *
1059 * This function must be called with the bus lock held in write mode.
1060 *
1061 * Return: 0 in case of success, a positive I3C error code if the error is
1062 * one of the official Mx error codes, and a negative error code otherwise.
1063 */
1064int i3c_master_defslvs_locked(struct i3c_master_controller *master)
1065{
1066 struct i3c_ccc_defslvs *defslvs;
1067 struct i3c_ccc_dev_desc *desc;
1068 struct i3c_ccc_cmd_dest dest;
1069 struct i3c_dev_desc *i3cdev;
1070 struct i2c_dev_desc *i2cdev;
1071 struct i3c_ccc_cmd cmd;
1072 struct i3c_bus *bus;
1073 bool send = false;
1074 int ndevs = 0, ret;
1075
1076 if (!master)
1077 return -EINVAL;
1078
1079 bus = i3c_master_get_bus(master);
1080 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1081 ndevs++;
1082
1083 if (i3cdev == master->this)
1084 continue;
1085
1086 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
1087 I3C_BCR_I3C_MASTER)
1088 send = true;
1089 }
1090
1091 /* No other master on the bus, skip DEFSLVS. */
1092 if (!send)
1093 return 0;
1094
1095 i3c_bus_for_each_i2cdev(bus, i2cdev)
1096 ndevs++;
1097
1098 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
1099 struct_size(defslvs, slaves,
1100 ndevs - 1));
1101 if (!defslvs)
1102 return -ENOMEM;
1103
1104 defslvs->count = ndevs;
1105 defslvs->master.bcr = master->this->info.bcr;
1106 defslvs->master.dcr = master->this->info.dcr;
1107 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
1108 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
1109
1110 desc = defslvs->slaves;
1111 i3c_bus_for_each_i2cdev(bus, i2cdev) {
1112 desc->lvr = i2cdev->lvr;
1113 desc->static_addr = i2cdev->addr << 1;
1114 desc++;
1115 }
1116
1117 i3c_bus_for_each_i3cdev(bus, i3cdev) {
1118 /* Skip the I3C dev representing this master. */
1119 if (i3cdev == master->this)
1120 continue;
1121
1122 desc->bcr = i3cdev->info.bcr;
1123 desc->dcr = i3cdev->info.dcr;
1124 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
1125 desc->static_addr = i3cdev->info.static_addr << 1;
1126 desc++;
1127 }
1128
1129 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
1130 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1131 i3c_ccc_cmd_dest_cleanup(&dest);
1132
1133 return ret;
1134}
1135EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
1136
1137static int i3c_master_setda_locked(struct i3c_master_controller *master,
1138 u8 oldaddr, u8 newaddr, bool setdasa)
1139{
1140 struct i3c_ccc_cmd_dest dest;
1141 struct i3c_ccc_setda *setda;
1142 struct i3c_ccc_cmd cmd;
1143 int ret;
1144
1145 if (!oldaddr || !newaddr)
1146 return -EINVAL;
1147
1148 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
1149 if (!setda)
1150 return -ENOMEM;
1151
1152 setda->addr = newaddr << 1;
1153 i3c_ccc_cmd_init(&cmd, false,
1154 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
1155 &dest, 1);
1156 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1157 i3c_ccc_cmd_dest_cleanup(&dest);
1158
1159 return ret;
1160}
1161
1162static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
1163 u8 static_addr, u8 dyn_addr)
1164{
1165 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
1166}
1167
1168static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1169 u8 oldaddr, u8 newaddr)
1170{
1171 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1172}
1173
1174static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1175 struct i3c_device_info *info)
1176{
1177 struct i3c_ccc_cmd_dest dest;
1178 struct i3c_ccc_mrl *mrl;
1179 struct i3c_ccc_cmd cmd;
1180 int ret;
1181
1182 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1183 if (!mrl)
1184 return -ENOMEM;
1185
1186 /*
1187 * When the device does not have IBI payload GETMRL only returns 2
1188 * bytes of data.
1189 */
1190 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1191 dest.payload.len -= 1;
1192
1193 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1194 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1195 if (ret)
1196 goto out;
1197
1198 switch (dest.payload.len) {
1199 case 3:
1200 info->max_ibi_len = mrl->ibi_len;
1201 fallthrough;
1202 case 2:
1203 info->max_read_len = be16_to_cpu(mrl->read_len);
1204 break;
1205 default:
1206 ret = -EIO;
1207 goto out;
1208 }
1209
1210out:
1211 i3c_ccc_cmd_dest_cleanup(&dest);
1212
1213 return ret;
1214}
1215
1216static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1217 struct i3c_device_info *info)
1218{
1219 struct i3c_ccc_cmd_dest dest;
1220 struct i3c_ccc_mwl *mwl;
1221 struct i3c_ccc_cmd cmd;
1222 int ret;
1223
1224 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1225 if (!mwl)
1226 return -ENOMEM;
1227
1228 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1229 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1230 if (ret)
1231 goto out;
1232
1233 if (dest.payload.len != sizeof(*mwl)) {
1234 ret = -EIO;
1235 goto out;
1236 }
1237
1238 info->max_write_len = be16_to_cpu(mwl->len);
1239
1240out:
1241 i3c_ccc_cmd_dest_cleanup(&dest);
1242
1243 return ret;
1244}
1245
1246static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1247 struct i3c_device_info *info)
1248{
1249 struct i3c_ccc_getmxds *getmaxds;
1250 struct i3c_ccc_cmd_dest dest;
1251 struct i3c_ccc_cmd cmd;
1252 int ret;
1253
1254 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1255 sizeof(*getmaxds));
1256 if (!getmaxds)
1257 return -ENOMEM;
1258
1259 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1260 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1261 if (ret) {
1262 /*
1263 * Retry when the device does not support max read turnaround
1264 * while expecting shorter length from this CCC command.
1265 */
1266 dest.payload.len -= 3;
1267 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1268 if (ret)
1269 goto out;
1270 }
1271
1272 if (dest.payload.len != 2 && dest.payload.len != 5) {
1273 ret = -EIO;
1274 goto out;
1275 }
1276
1277 info->max_read_ds = getmaxds->maxrd;
1278 info->max_write_ds = getmaxds->maxwr;
1279 if (dest.payload.len == 5)
1280 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1281 ((u32)getmaxds->maxrdturn[1] << 8) |
1282 ((u32)getmaxds->maxrdturn[2] << 16);
1283
1284out:
1285 i3c_ccc_cmd_dest_cleanup(&dest);
1286
1287 return ret;
1288}
1289
1290static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1291 struct i3c_device_info *info)
1292{
1293 struct i3c_ccc_gethdrcap *gethdrcap;
1294 struct i3c_ccc_cmd_dest dest;
1295 struct i3c_ccc_cmd cmd;
1296 int ret;
1297
1298 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1299 sizeof(*gethdrcap));
1300 if (!gethdrcap)
1301 return -ENOMEM;
1302
1303 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1304 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1305 if (ret)
1306 goto out;
1307
1308 if (dest.payload.len != 1) {
1309 ret = -EIO;
1310 goto out;
1311 }
1312
1313 info->hdr_cap = gethdrcap->modes;
1314
1315out:
1316 i3c_ccc_cmd_dest_cleanup(&dest);
1317
1318 return ret;
1319}
1320
1321static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1322 struct i3c_device_info *info)
1323{
1324 struct i3c_ccc_getpid *getpid;
1325 struct i3c_ccc_cmd_dest dest;
1326 struct i3c_ccc_cmd cmd;
1327 int ret, i;
1328
1329 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1330 if (!getpid)
1331 return -ENOMEM;
1332
1333 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1334 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1335 if (ret)
1336 goto out;
1337
1338 info->pid = 0;
1339 for (i = 0; i < sizeof(getpid->pid); i++) {
1340 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1341
1342 info->pid |= (u64)getpid->pid[i] << sft;
1343 }
1344
1345out:
1346 i3c_ccc_cmd_dest_cleanup(&dest);
1347
1348 return ret;
1349}
1350
1351static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1352 struct i3c_device_info *info)
1353{
1354 struct i3c_ccc_getbcr *getbcr;
1355 struct i3c_ccc_cmd_dest dest;
1356 struct i3c_ccc_cmd cmd;
1357 int ret;
1358
1359 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1360 if (!getbcr)
1361 return -ENOMEM;
1362
1363 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1364 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1365 if (ret)
1366 goto out;
1367
1368 info->bcr = getbcr->bcr;
1369
1370out:
1371 i3c_ccc_cmd_dest_cleanup(&dest);
1372
1373 return ret;
1374}
1375
1376static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1377 struct i3c_device_info *info)
1378{
1379 struct i3c_ccc_getdcr *getdcr;
1380 struct i3c_ccc_cmd_dest dest;
1381 struct i3c_ccc_cmd cmd;
1382 int ret;
1383
1384 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1385 if (!getdcr)
1386 return -ENOMEM;
1387
1388 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1389 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1390 if (ret)
1391 goto out;
1392
1393 info->dcr = getdcr->dcr;
1394
1395out:
1396 i3c_ccc_cmd_dest_cleanup(&dest);
1397
1398 return ret;
1399}
1400
1401static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1402{
1403 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1404 enum i3c_addr_slot_status slot_status;
1405 int ret;
1406
1407 if (!dev->info.dyn_addr)
1408 return -EINVAL;
1409
1410 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1411 dev->info.dyn_addr);
1412 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1413 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1414 return -EINVAL;
1415
1416 ret = i3c_master_getpid_locked(master, &dev->info);
1417 if (ret)
1418 return ret;
1419
1420 ret = i3c_master_getbcr_locked(master, &dev->info);
1421 if (ret)
1422 return ret;
1423
1424 ret = i3c_master_getdcr_locked(master, &dev->info);
1425 if (ret)
1426 return ret;
1427
1428 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1429 ret = i3c_master_getmxds_locked(master, &dev->info);
1430 if (ret)
1431 return ret;
1432 }
1433
1434 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1435 dev->info.max_ibi_len = 1;
1436
1437 i3c_master_getmrl_locked(master, &dev->info);
1438 i3c_master_getmwl_locked(master, &dev->info);
1439
1440 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1441 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1442 if (ret)
1443 return ret;
1444 }
1445
1446 return 0;
1447}
1448
1449static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1450{
1451 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1452
1453 if (dev->info.static_addr)
1454 i3c_bus_set_addr_slot_status(&master->bus,
1455 dev->info.static_addr,
1456 I3C_ADDR_SLOT_FREE);
1457
1458 if (dev->info.dyn_addr)
1459 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1460 I3C_ADDR_SLOT_FREE);
1461
1462 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1463 i3c_bus_set_addr_slot_status(&master->bus, dev->boardinfo->init_dyn_addr,
1464 I3C_ADDR_SLOT_FREE);
1465}
1466
1467static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1468{
1469 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1470 enum i3c_addr_slot_status status;
1471
1472 if (!dev->info.static_addr && !dev->info.dyn_addr)
1473 return 0;
1474
1475 if (dev->info.static_addr) {
1476 status = i3c_bus_get_addr_slot_status(&master->bus,
1477 dev->info.static_addr);
1478 /* Since static address and assigned dynamic address can be
1479 * equal, allow this case to pass.
1480 */
1481 if (status != I3C_ADDR_SLOT_FREE &&
1482 dev->info.static_addr != dev->boardinfo->init_dyn_addr)
1483 return -EBUSY;
1484
1485 i3c_bus_set_addr_slot_status(&master->bus,
1486 dev->info.static_addr,
1487 I3C_ADDR_SLOT_I3C_DEV);
1488 }
1489
1490 /*
1491 * ->init_dyn_addr should have been reserved before that, so, if we're
1492 * trying to apply a pre-reserved dynamic address, we should not try
1493 * to reserve the address slot a second time.
1494 */
1495 if (dev->info.dyn_addr &&
1496 (!dev->boardinfo ||
1497 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1498 status = i3c_bus_get_addr_slot_status(&master->bus,
1499 dev->info.dyn_addr);
1500 if (status != I3C_ADDR_SLOT_FREE)
1501 goto err_release_static_addr;
1502
1503 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1504 I3C_ADDR_SLOT_I3C_DEV);
1505 }
1506
1507 return 0;
1508
1509err_release_static_addr:
1510 if (dev->info.static_addr)
1511 i3c_bus_set_addr_slot_status(&master->bus,
1512 dev->info.static_addr,
1513 I3C_ADDR_SLOT_FREE);
1514
1515 return -EBUSY;
1516}
1517
1518static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1519 struct i3c_dev_desc *dev)
1520{
1521 int ret;
1522
1523 /*
1524 * We don't attach devices to the controller until they are
1525 * addressable on the bus.
1526 */
1527 if (!dev->info.static_addr && !dev->info.dyn_addr)
1528 return 0;
1529
1530 ret = i3c_master_get_i3c_addrs(dev);
1531 if (ret)
1532 return ret;
1533
1534 /* Do not attach the master device itself. */
1535 if (master->this != dev && master->ops->attach_i3c_dev) {
1536 ret = master->ops->attach_i3c_dev(dev);
1537 if (ret) {
1538 i3c_master_put_i3c_addrs(dev);
1539 return ret;
1540 }
1541 }
1542
1543 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1544
1545 return 0;
1546}
1547
1548static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1549 u8 old_dyn_addr)
1550{
1551 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1552 int ret;
1553
1554 if (dev->info.dyn_addr != old_dyn_addr) {
1555 i3c_bus_set_addr_slot_status(&master->bus,
1556 dev->info.dyn_addr,
1557 I3C_ADDR_SLOT_I3C_DEV);
1558 if (old_dyn_addr)
1559 i3c_bus_set_addr_slot_status(&master->bus, old_dyn_addr,
1560 I3C_ADDR_SLOT_FREE);
1561 }
1562
1563 if (master->ops->reattach_i3c_dev) {
1564 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1565 if (ret) {
1566 i3c_master_put_i3c_addrs(dev);
1567 return ret;
1568 }
1569 }
1570
1571 return 0;
1572}
1573
1574static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1575{
1576 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1577
1578 /* Do not detach the master device itself. */
1579 if (master->this != dev && master->ops->detach_i3c_dev)
1580 master->ops->detach_i3c_dev(dev);
1581
1582 i3c_master_put_i3c_addrs(dev);
1583 list_del(&dev->common.node);
1584}
1585
1586static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1587 struct i2c_dev_desc *dev)
1588{
1589 int ret;
1590
1591 if (master->ops->attach_i2c_dev) {
1592 ret = master->ops->attach_i2c_dev(dev);
1593 if (ret)
1594 return ret;
1595 }
1596
1597 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1598
1599 return 0;
1600}
1601
1602static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1603{
1604 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1605
1606 list_del(&dev->common.node);
1607
1608 if (master->ops->detach_i2c_dev)
1609 master->ops->detach_i2c_dev(dev);
1610}
1611
1612static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1613 struct i3c_dev_boardinfo *boardinfo)
1614{
1615 struct i3c_device_info info = {
1616 .static_addr = boardinfo->static_addr,
1617 .pid = boardinfo->pid,
1618 };
1619 struct i3c_dev_desc *i3cdev;
1620 int ret;
1621
1622 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1623 if (IS_ERR(i3cdev))
1624 return -ENOMEM;
1625
1626 i3cdev->boardinfo = boardinfo;
1627
1628 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1629 if (ret)
1630 goto err_free_dev;
1631
1632 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1633 i3cdev->boardinfo->init_dyn_addr);
1634 if (ret)
1635 goto err_detach_dev;
1636
1637 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1638 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1639 if (ret)
1640 goto err_rstdaa;
1641
1642 ret = i3c_master_retrieve_dev_info(i3cdev);
1643 if (ret)
1644 goto err_rstdaa;
1645
1646 return 0;
1647
1648err_rstdaa:
1649 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1650err_detach_dev:
1651 i3c_master_detach_i3c_dev(i3cdev);
1652err_free_dev:
1653 i3c_master_free_i3c_dev(i3cdev);
1654
1655 return ret;
1656}
1657
1658static void
1659i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1660{
1661 struct i3c_dev_desc *desc;
1662 int ret;
1663
1664 if (!master->init_done)
1665 return;
1666
1667 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1668 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1669 continue;
1670
1671 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1672 if (!desc->dev)
1673 continue;
1674
1675 desc->dev->bus = &master->bus;
1676 desc->dev->desc = desc;
1677 desc->dev->dev.parent = &master->dev;
1678 desc->dev->dev.type = &i3c_device_type;
1679 desc->dev->dev.bus = &i3c_bus_type;
1680 desc->dev->dev.release = i3c_device_release;
1681 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1682 desc->info.pid);
1683
1684 if (desc->boardinfo)
1685 desc->dev->dev.of_node = desc->boardinfo->of_node;
1686
1687 ret = device_register(&desc->dev->dev);
1688 if (ret) {
1689 dev_err(&master->dev,
1690 "Failed to add I3C device (err = %d)\n", ret);
1691 put_device(&desc->dev->dev);
1692 }
1693 }
1694}
1695
1696/**
1697 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1698 * @master: master doing the DAA
1699 *
1700 * This function is instantiating an I3C device object and adding it to the
1701 * I3C device list. All device information are automatically retrieved using
1702 * standard CCC commands.
1703 *
1704 * The I3C device object is returned in case the master wants to attach
1705 * private data to it using i3c_dev_set_master_data().
1706 *
1707 * This function must be called with the bus lock held in write mode.
1708 *
1709 * Return: a 0 in case of success, an negative error code otherwise.
1710 */
1711int i3c_master_do_daa(struct i3c_master_controller *master)
1712{
1713 int ret;
1714
1715 i3c_bus_maintenance_lock(&master->bus);
1716 ret = master->ops->do_daa(master);
1717 i3c_bus_maintenance_unlock(&master->bus);
1718
1719 if (ret)
1720 return ret;
1721
1722 i3c_bus_normaluse_lock(&master->bus);
1723 i3c_master_register_new_i3c_devs(master);
1724 i3c_bus_normaluse_unlock(&master->bus);
1725
1726 return 0;
1727}
1728EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1729
1730/**
1731 * i3c_master_set_info() - set master device information
1732 * @master: master used to send frames on the bus
1733 * @info: I3C device information
1734 *
1735 * Set master device info. This should be called from
1736 * &i3c_master_controller_ops->bus_init().
1737 *
1738 * Not all &i3c_device_info fields are meaningful for a master device.
1739 * Here is a list of fields that should be properly filled:
1740 *
1741 * - &i3c_device_info->dyn_addr
1742 * - &i3c_device_info->bcr
1743 * - &i3c_device_info->dcr
1744 * - &i3c_device_info->pid
1745 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1746 * &i3c_device_info->bcr
1747 *
1748 * This function must be called with the bus lock held in maintenance mode.
1749 *
1750 * Return: 0 if @info contains valid information (not every piece of
1751 * information can be checked, but we can at least make sure @info->dyn_addr
1752 * and @info->bcr are correct), -EINVAL otherwise.
1753 */
1754int i3c_master_set_info(struct i3c_master_controller *master,
1755 const struct i3c_device_info *info)
1756{
1757 struct i3c_dev_desc *i3cdev;
1758 int ret;
1759
1760 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1761 return -EINVAL;
1762
1763 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1764 master->secondary)
1765 return -EINVAL;
1766
1767 if (master->this)
1768 return -EINVAL;
1769
1770 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1771 if (IS_ERR(i3cdev))
1772 return PTR_ERR(i3cdev);
1773
1774 master->this = i3cdev;
1775 master->bus.cur_master = master->this;
1776
1777 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1778 if (ret)
1779 goto err_free_dev;
1780
1781 return 0;
1782
1783err_free_dev:
1784 i3c_master_free_i3c_dev(i3cdev);
1785
1786 return ret;
1787}
1788EXPORT_SYMBOL_GPL(i3c_master_set_info);
1789
1790static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1791{
1792 struct i3c_dev_desc *i3cdev, *i3ctmp;
1793 struct i2c_dev_desc *i2cdev, *i2ctmp;
1794
1795 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1796 common.node) {
1797 i3c_master_detach_i3c_dev(i3cdev);
1798
1799 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1800 i3c_bus_set_addr_slot_status(&master->bus,
1801 i3cdev->boardinfo->init_dyn_addr,
1802 I3C_ADDR_SLOT_FREE);
1803
1804 i3c_master_free_i3c_dev(i3cdev);
1805 }
1806
1807 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1808 common.node) {
1809 i3c_master_detach_i2c_dev(i2cdev);
1810 i3c_bus_set_addr_slot_status(&master->bus,
1811 i2cdev->addr,
1812 I3C_ADDR_SLOT_FREE);
1813 i3c_master_free_i2c_dev(i2cdev);
1814 }
1815}
1816
1817/**
1818 * i3c_master_bus_init() - initialize an I3C bus
1819 * @master: main master initializing the bus
1820 *
1821 * This function is following all initialisation steps described in the I3C
1822 * specification:
1823 *
1824 * 1. Attach I2C devs to the master so that the master can fill its internal
1825 * device table appropriately
1826 *
1827 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1828 * the master controller. That's usually where the bus mode is selected
1829 * (pure bus or mixed fast/slow bus)
1830 *
1831 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1832 * particularly important when the bus was previously configured by someone
1833 * else (for example the bootloader)
1834 *
1835 * 4. Disable all slave events.
1836 *
1837 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1838 * also have static_addr, try to pre-assign dynamic addresses requested by
1839 * the FW with SETDASA and attach corresponding statically defined I3C
1840 * devices to the master.
1841 *
1842 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1843 * remaining I3C devices
1844 *
1845 * Once this is done, all I3C and I2C devices should be usable.
1846 *
1847 * Return: a 0 in case of success, an negative error code otherwise.
1848 */
1849static int i3c_master_bus_init(struct i3c_master_controller *master)
1850{
1851 enum i3c_addr_slot_status status;
1852 struct i2c_dev_boardinfo *i2cboardinfo;
1853 struct i3c_dev_boardinfo *i3cboardinfo;
1854 struct i2c_dev_desc *i2cdev;
1855 int ret;
1856
1857 /*
1858 * First attach all devices with static definitions provided by the
1859 * FW.
1860 */
1861 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1862 status = i3c_bus_get_addr_slot_status(&master->bus,
1863 i2cboardinfo->base.addr);
1864 if (status != I3C_ADDR_SLOT_FREE) {
1865 ret = -EBUSY;
1866 goto err_detach_devs;
1867 }
1868
1869 i3c_bus_set_addr_slot_status(&master->bus,
1870 i2cboardinfo->base.addr,
1871 I3C_ADDR_SLOT_I2C_DEV);
1872
1873 i2cdev = i3c_master_alloc_i2c_dev(master,
1874 i2cboardinfo->base.addr,
1875 i2cboardinfo->lvr);
1876 if (IS_ERR(i2cdev)) {
1877 ret = PTR_ERR(i2cdev);
1878 goto err_detach_devs;
1879 }
1880
1881 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1882 if (ret) {
1883 i3c_master_free_i2c_dev(i2cdev);
1884 goto err_detach_devs;
1885 }
1886 }
1887
1888 /*
1889 * Now execute the controller specific ->bus_init() routine, which
1890 * might configure its internal logic to match the bus limitations.
1891 */
1892 ret = master->ops->bus_init(master);
1893 if (ret)
1894 goto err_detach_devs;
1895
1896 /*
1897 * The master device should have been instantiated in ->bus_init(),
1898 * complain if this was not the case.
1899 */
1900 if (!master->this) {
1901 dev_err(&master->dev,
1902 "master_set_info() was not called in ->bus_init()\n");
1903 ret = -EINVAL;
1904 goto err_bus_cleanup;
1905 }
1906
1907 if (master->ops->set_speed) {
1908 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_SLOW_SPEED);
1909 if (ret)
1910 goto err_bus_cleanup;
1911 }
1912
1913 /*
1914 * Reset all dynamic address that may have been assigned before
1915 * (assigned by the bootloader for example).
1916 */
1917 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1918 if (ret && ret != I3C_ERROR_M2)
1919 goto err_bus_cleanup;
1920
1921 if (master->ops->set_speed) {
1922 ret = master->ops->set_speed(master, I3C_OPEN_DRAIN_NORMAL_SPEED);
1923 if (ret)
1924 goto err_bus_cleanup;
1925 }
1926
1927 /* Disable all slave events before starting DAA. */
1928 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1929 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1930 I3C_CCC_EVENT_HJ);
1931 if (ret && ret != I3C_ERROR_M2)
1932 goto err_bus_cleanup;
1933
1934 /*
1935 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1936 * address and retrieve device information if needed.
1937 * In case pre-assign dynamic address fails, setting dynamic address to
1938 * the requested init_dyn_addr is retried after DAA is done in
1939 * i3c_master_add_i3c_dev_locked().
1940 */
1941 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1942
1943 /*
1944 * We don't reserve a dynamic address for devices that
1945 * don't explicitly request one.
1946 */
1947 if (!i3cboardinfo->init_dyn_addr)
1948 continue;
1949
1950 ret = i3c_bus_get_addr_slot_status(&master->bus,
1951 i3cboardinfo->init_dyn_addr);
1952 if (ret != I3C_ADDR_SLOT_FREE) {
1953 ret = -EBUSY;
1954 goto err_rstdaa;
1955 }
1956
1957 /* Do not mark as occupied until real device exist in bus */
1958 i3c_bus_set_addr_slot_status_mask(&master->bus,
1959 i3cboardinfo->init_dyn_addr,
1960 I3C_ADDR_SLOT_EXT_DESIRED,
1961 I3C_ADDR_SLOT_EXT_STATUS_MASK);
1962
1963 /*
1964 * Only try to create/attach devices that have a static
1965 * address. Other devices will be created/attached when
1966 * DAA happens, and the requested dynamic address will
1967 * be set using SETNEWDA once those devices become
1968 * addressable.
1969 */
1970
1971 if (i3cboardinfo->static_addr)
1972 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1973 }
1974
1975 ret = i3c_master_do_daa(master);
1976 if (ret)
1977 goto err_rstdaa;
1978
1979 return 0;
1980
1981err_rstdaa:
1982 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1983
1984err_bus_cleanup:
1985 if (master->ops->bus_cleanup)
1986 master->ops->bus_cleanup(master);
1987
1988err_detach_devs:
1989 i3c_master_detach_free_devs(master);
1990
1991 return ret;
1992}
1993
1994static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1995{
1996 if (master->ops->bus_cleanup)
1997 master->ops->bus_cleanup(master);
1998
1999 i3c_master_detach_free_devs(master);
2000}
2001
2002static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
2003{
2004 struct i3c_master_controller *master = i3cdev->common.master;
2005 struct i3c_dev_boardinfo *i3cboardinfo;
2006
2007 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
2008 if (i3cdev->info.pid != i3cboardinfo->pid)
2009 continue;
2010
2011 i3cdev->boardinfo = i3cboardinfo;
2012 i3cdev->info.static_addr = i3cboardinfo->static_addr;
2013 return;
2014 }
2015}
2016
2017static struct i3c_dev_desc *
2018i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
2019{
2020 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
2021 struct i3c_dev_desc *i3cdev;
2022
2023 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2024 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
2025 return i3cdev;
2026 }
2027
2028 return NULL;
2029}
2030
2031/**
2032 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
2033 * @master: master used to send frames on the bus
2034 * @addr: I3C slave dynamic address assigned to the device
2035 *
2036 * This function is instantiating an I3C device object and adding it to the
2037 * I3C device list. All device information are automatically retrieved using
2038 * standard CCC commands.
2039 *
2040 * The I3C device object is returned in case the master wants to attach
2041 * private data to it using i3c_dev_set_master_data().
2042 *
2043 * This function must be called with the bus lock held in write mode.
2044 *
2045 * Return: a 0 in case of success, an negative error code otherwise.
2046 */
2047int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
2048 u8 addr)
2049{
2050 struct i3c_device_info info = { .dyn_addr = addr };
2051 struct i3c_dev_desc *newdev, *olddev;
2052 u8 old_dyn_addr = addr, expected_dyn_addr;
2053 struct i3c_ibi_setup ibireq = { };
2054 bool enable_ibi = false;
2055 int ret;
2056
2057 if (!master)
2058 return -EINVAL;
2059
2060 newdev = i3c_master_alloc_i3c_dev(master, &info);
2061 if (IS_ERR(newdev))
2062 return PTR_ERR(newdev);
2063
2064 ret = i3c_master_attach_i3c_dev(master, newdev);
2065 if (ret)
2066 goto err_free_dev;
2067
2068 ret = i3c_master_retrieve_dev_info(newdev);
2069 if (ret)
2070 goto err_detach_dev;
2071
2072 i3c_master_attach_boardinfo(newdev);
2073
2074 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
2075 if (olddev) {
2076 newdev->dev = olddev->dev;
2077 if (newdev->dev)
2078 newdev->dev->desc = newdev;
2079
2080 /*
2081 * We need to restore the IBI state too, so let's save the
2082 * IBI information and try to restore them after olddev has
2083 * been detached+released and its IBI has been stopped and
2084 * the associated resources have been freed.
2085 */
2086 mutex_lock(&olddev->ibi_lock);
2087 if (olddev->ibi) {
2088 ibireq.handler = olddev->ibi->handler;
2089 ibireq.max_payload_len = olddev->ibi->max_payload_len;
2090 ibireq.num_slots = olddev->ibi->num_slots;
2091
2092 if (olddev->ibi->enabled)
2093 enable_ibi = true;
2094 /*
2095 * The olddev should not receive any commands on the
2096 * i3c bus as it does not exist and has been assigned
2097 * a new address. This will result in NACK or timeout.
2098 * So, update the olddev->ibi->enabled flag to false
2099 * to avoid DISEC with OldAddr.
2100 */
2101 olddev->ibi->enabled = false;
2102 i3c_dev_free_ibi_locked(olddev);
2103 }
2104 mutex_unlock(&olddev->ibi_lock);
2105
2106 old_dyn_addr = olddev->info.dyn_addr;
2107
2108 i3c_master_detach_i3c_dev(olddev);
2109 i3c_master_free_i3c_dev(olddev);
2110 }
2111
2112 /*
2113 * Depending on our previous state, the expected dynamic address might
2114 * differ:
2115 * - if the device already had a dynamic address assigned, let's try to
2116 * re-apply this one
2117 * - if the device did not have a dynamic address and the firmware
2118 * requested a specific address, pick this one
2119 * - in any other case, keep the address automatically assigned by the
2120 * master
2121 */
2122 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
2123 expected_dyn_addr = old_dyn_addr;
2124 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
2125 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
2126 else
2127 expected_dyn_addr = newdev->info.dyn_addr;
2128
2129 if (newdev->info.dyn_addr != expected_dyn_addr &&
2130 i3c_bus_get_addr_slot_status(&master->bus, expected_dyn_addr) == I3C_ADDR_SLOT_FREE) {
2131 /*
2132 * Try to apply the expected dynamic address. If it fails, keep
2133 * the address assigned by the master.
2134 */
2135 ret = i3c_master_setnewda_locked(master,
2136 newdev->info.dyn_addr,
2137 expected_dyn_addr);
2138 if (!ret) {
2139 old_dyn_addr = newdev->info.dyn_addr;
2140 newdev->info.dyn_addr = expected_dyn_addr;
2141 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
2142 } else {
2143 dev_err(&master->dev,
2144 "Failed to assign reserved/old address to device %d%llx",
2145 master->bus.id, newdev->info.pid);
2146 }
2147 }
2148
2149 /*
2150 * Now is time to try to restore the IBI setup. If we're lucky,
2151 * everything works as before, otherwise, all we can do is complain.
2152 * FIXME: maybe we should add callback to inform the driver that it
2153 * should request the IBI again instead of trying to hide that from
2154 * him.
2155 */
2156 if (ibireq.handler) {
2157 mutex_lock(&newdev->ibi_lock);
2158 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
2159 if (ret) {
2160 dev_err(&master->dev,
2161 "Failed to request IBI on device %d-%llx",
2162 master->bus.id, newdev->info.pid);
2163 } else if (enable_ibi) {
2164 ret = i3c_dev_enable_ibi_locked(newdev);
2165 if (ret)
2166 dev_err(&master->dev,
2167 "Failed to re-enable IBI on device %d-%llx",
2168 master->bus.id, newdev->info.pid);
2169 }
2170 mutex_unlock(&newdev->ibi_lock);
2171 }
2172
2173 return 0;
2174
2175err_detach_dev:
2176 if (newdev->dev && newdev->dev->desc)
2177 newdev->dev->desc = NULL;
2178
2179 i3c_master_detach_i3c_dev(newdev);
2180
2181err_free_dev:
2182 i3c_master_free_i3c_dev(newdev);
2183
2184 return ret;
2185}
2186EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
2187
2188#define OF_I3C_REG1_IS_I2C_DEV BIT(31)
2189
2190static int
2191of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
2192 struct device_node *node, u32 *reg)
2193{
2194 struct i2c_dev_boardinfo *boardinfo;
2195 struct device *dev = &master->dev;
2196 int ret;
2197
2198 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2199 if (!boardinfo)
2200 return -ENOMEM;
2201
2202 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2203 if (ret)
2204 return ret;
2205
2206 /*
2207 * The I3C Specification does not clearly say I2C devices with 10-bit
2208 * address are supported. These devices can't be passed properly through
2209 * DEFSLVS command.
2210 */
2211 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2212 dev_err(dev, "I2C device with 10 bit address not supported.");
2213 return -ENOTSUPP;
2214 }
2215
2216 /* LVR is encoded in reg[2]. */
2217 boardinfo->lvr = reg[2];
2218
2219 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2220 of_node_get(node);
2221
2222 return 0;
2223}
2224
2225static int
2226of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2227 struct device_node *node, u32 *reg)
2228{
2229 struct i3c_dev_boardinfo *boardinfo;
2230 struct device *dev = &master->dev;
2231 enum i3c_addr_slot_status addrstatus;
2232 u32 init_dyn_addr = 0;
2233
2234 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2235 if (!boardinfo)
2236 return -ENOMEM;
2237
2238 if (reg[0]) {
2239 if (reg[0] > I3C_MAX_ADDR)
2240 return -EINVAL;
2241
2242 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2243 reg[0]);
2244 if (addrstatus != I3C_ADDR_SLOT_FREE)
2245 return -EINVAL;
2246 }
2247
2248 boardinfo->static_addr = reg[0];
2249
2250 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2251 if (init_dyn_addr > I3C_MAX_ADDR)
2252 return -EINVAL;
2253
2254 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2255 init_dyn_addr);
2256 if (addrstatus != I3C_ADDR_SLOT_FREE)
2257 return -EINVAL;
2258 }
2259
2260 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2261
2262 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2263 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2264 return -EINVAL;
2265
2266 boardinfo->init_dyn_addr = init_dyn_addr;
2267 boardinfo->of_node = of_node_get(node);
2268 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2269
2270 return 0;
2271}
2272
2273static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2274 struct device_node *node)
2275{
2276 u32 reg[3];
2277 int ret;
2278
2279 if (!master || !node)
2280 return -EINVAL;
2281
2282 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2283 if (ret)
2284 return ret;
2285
2286 /*
2287 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2288 * dealing with an I2C device.
2289 */
2290 if (!reg[1])
2291 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2292 else
2293 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2294
2295 return ret;
2296}
2297
2298static int of_populate_i3c_bus(struct i3c_master_controller *master)
2299{
2300 struct device *dev = &master->dev;
2301 struct device_node *i3cbus_np = dev->of_node;
2302 struct device_node *node;
2303 int ret;
2304 u32 val;
2305
2306 if (!i3cbus_np)
2307 return 0;
2308
2309 for_each_available_child_of_node(i3cbus_np, node) {
2310 ret = of_i3c_master_add_dev(master, node);
2311 if (ret) {
2312 of_node_put(node);
2313 return ret;
2314 }
2315 }
2316
2317 /*
2318 * The user might want to limit I2C and I3C speed in case some devices
2319 * on the bus are not supporting typical rates, or if the bus topology
2320 * prevents it from using max possible rate.
2321 */
2322 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2323 master->bus.scl_rate.i2c = val;
2324
2325 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2326 master->bus.scl_rate.i3c = val;
2327
2328 return 0;
2329}
2330
2331static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2332 struct i2c_msg *xfers, int nxfers)
2333{
2334 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2335 struct i2c_dev_desc *dev;
2336 int i, ret;
2337 u16 addr;
2338
2339 if (!xfers || !master || nxfers <= 0)
2340 return -EINVAL;
2341
2342 if (!master->ops->i2c_xfers)
2343 return -ENOTSUPP;
2344
2345 /* Doing transfers to different devices is not supported. */
2346 addr = xfers[0].addr;
2347 for (i = 1; i < nxfers; i++) {
2348 if (addr != xfers[i].addr)
2349 return -ENOTSUPP;
2350 }
2351
2352 i3c_bus_normaluse_lock(&master->bus);
2353 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2354 if (!dev)
2355 ret = -ENOENT;
2356 else
2357 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2358 i3c_bus_normaluse_unlock(&master->bus);
2359
2360 return ret ? ret : nxfers;
2361}
2362
2363static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2364{
2365 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2366}
2367
2368static u8 i3c_master_i2c_get_lvr(struct i2c_client *client)
2369{
2370 /* Fall back to no spike filters and FM bus mode. */
2371 u8 lvr = I3C_LVR_I2C_INDEX(2) | I3C_LVR_I2C_FM_MODE;
2372
2373 if (client->dev.of_node) {
2374 u32 reg[3];
2375
2376 if (!of_property_read_u32_array(client->dev.of_node, "reg",
2377 reg, ARRAY_SIZE(reg)))
2378 lvr = reg[2];
2379 }
2380
2381 return lvr;
2382}
2383
2384static int i3c_master_i2c_attach(struct i2c_adapter *adap, struct i2c_client *client)
2385{
2386 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2387 enum i3c_addr_slot_status status;
2388 struct i2c_dev_desc *i2cdev;
2389 int ret;
2390
2391 /* Already added by board info? */
2392 if (i3c_master_find_i2c_dev_by_addr(master, client->addr))
2393 return 0;
2394
2395 status = i3c_bus_get_addr_slot_status(&master->bus, client->addr);
2396 if (status != I3C_ADDR_SLOT_FREE)
2397 return -EBUSY;
2398
2399 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2400 I3C_ADDR_SLOT_I2C_DEV);
2401
2402 i2cdev = i3c_master_alloc_i2c_dev(master, client->addr,
2403 i3c_master_i2c_get_lvr(client));
2404 if (IS_ERR(i2cdev)) {
2405 ret = PTR_ERR(i2cdev);
2406 goto out_clear_status;
2407 }
2408
2409 ret = i3c_master_attach_i2c_dev(master, i2cdev);
2410 if (ret)
2411 goto out_free_dev;
2412
2413 return 0;
2414
2415out_free_dev:
2416 i3c_master_free_i2c_dev(i2cdev);
2417out_clear_status:
2418 i3c_bus_set_addr_slot_status(&master->bus, client->addr,
2419 I3C_ADDR_SLOT_FREE);
2420
2421 return ret;
2422}
2423
2424static int i3c_master_i2c_detach(struct i2c_adapter *adap, struct i2c_client *client)
2425{
2426 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2427 struct i2c_dev_desc *dev;
2428
2429 dev = i3c_master_find_i2c_dev_by_addr(master, client->addr);
2430 if (!dev)
2431 return -ENODEV;
2432
2433 i3c_master_detach_i2c_dev(dev);
2434 i3c_bus_set_addr_slot_status(&master->bus, dev->addr,
2435 I3C_ADDR_SLOT_FREE);
2436 i3c_master_free_i2c_dev(dev);
2437
2438 return 0;
2439}
2440
2441static const struct i2c_algorithm i3c_master_i2c_algo = {
2442 .master_xfer = i3c_master_i2c_adapter_xfer,
2443 .functionality = i3c_master_i2c_funcs,
2444};
2445
2446static int i3c_i2c_notifier_call(struct notifier_block *nb, unsigned long action,
2447 void *data)
2448{
2449 struct i2c_adapter *adap;
2450 struct i2c_client *client;
2451 struct device *dev = data;
2452 struct i3c_master_controller *master;
2453 int ret;
2454
2455 if (dev->type != &i2c_client_type)
2456 return 0;
2457
2458 client = to_i2c_client(dev);
2459 adap = client->adapter;
2460
2461 if (adap->algo != &i3c_master_i2c_algo)
2462 return 0;
2463
2464 master = i2c_adapter_to_i3c_master(adap);
2465
2466 i3c_bus_maintenance_lock(&master->bus);
2467 switch (action) {
2468 case BUS_NOTIFY_ADD_DEVICE:
2469 ret = i3c_master_i2c_attach(adap, client);
2470 break;
2471 case BUS_NOTIFY_DEL_DEVICE:
2472 ret = i3c_master_i2c_detach(adap, client);
2473 break;
2474 }
2475 i3c_bus_maintenance_unlock(&master->bus);
2476
2477 return ret;
2478}
2479
2480static struct notifier_block i2cdev_notifier = {
2481 .notifier_call = i3c_i2c_notifier_call,
2482};
2483
2484static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2485{
2486 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2487 struct i2c_dev_desc *i2cdev;
2488 struct i2c_dev_boardinfo *i2cboardinfo;
2489 int ret;
2490
2491 adap->dev.parent = master->dev.parent;
2492 adap->owner = master->dev.parent->driver->owner;
2493 adap->algo = &i3c_master_i2c_algo;
2494 strscpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2495
2496 /* FIXME: Should we allow i3c masters to override these values? */
2497 adap->timeout = 1000;
2498 adap->retries = 3;
2499
2500 ret = i2c_add_adapter(adap);
2501 if (ret)
2502 return ret;
2503
2504 /*
2505 * We silently ignore failures here. The bus should keep working
2506 * correctly even if one or more i2c devices are not registered.
2507 */
2508 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
2509 i2cdev = i3c_master_find_i2c_dev_by_addr(master,
2510 i2cboardinfo->base.addr);
2511 if (WARN_ON(!i2cdev))
2512 continue;
2513 i2cdev->dev = i2c_new_client_device(adap, &i2cboardinfo->base);
2514 }
2515
2516 return 0;
2517}
2518
2519static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2520{
2521 struct i2c_dev_desc *i2cdev;
2522
2523 i2c_del_adapter(&master->i2c);
2524
2525 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2526 i2cdev->dev = NULL;
2527}
2528
2529static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2530{
2531 struct i3c_dev_desc *i3cdev;
2532
2533 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2534 if (!i3cdev->dev)
2535 continue;
2536
2537 i3cdev->dev->desc = NULL;
2538 if (device_is_registered(&i3cdev->dev->dev))
2539 device_unregister(&i3cdev->dev->dev);
2540 else
2541 put_device(&i3cdev->dev->dev);
2542 i3cdev->dev = NULL;
2543 }
2544}
2545
2546/**
2547 * i3c_master_queue_ibi() - Queue an IBI
2548 * @dev: the device this IBI is coming from
2549 * @slot: the IBI slot used to store the payload
2550 *
2551 * Queue an IBI to the controller workqueue. The IBI handler attached to
2552 * the dev will be called from a workqueue context.
2553 */
2554void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2555{
2556 atomic_inc(&dev->ibi->pending_ibis);
2557 queue_work(dev->ibi->wq, &slot->work);
2558}
2559EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2560
2561static void i3c_master_handle_ibi(struct work_struct *work)
2562{
2563 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2564 work);
2565 struct i3c_dev_desc *dev = slot->dev;
2566 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2567 struct i3c_ibi_payload payload;
2568
2569 payload.data = slot->data;
2570 payload.len = slot->len;
2571
2572 if (dev->dev)
2573 dev->ibi->handler(dev->dev, &payload);
2574
2575 master->ops->recycle_ibi_slot(dev, slot);
2576 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2577 complete(&dev->ibi->all_ibis_handled);
2578}
2579
2580static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2581 struct i3c_ibi_slot *slot)
2582{
2583 slot->dev = dev;
2584 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2585}
2586
2587struct i3c_generic_ibi_slot {
2588 struct list_head node;
2589 struct i3c_ibi_slot base;
2590};
2591
2592struct i3c_generic_ibi_pool {
2593 spinlock_t lock;
2594 unsigned int num_slots;
2595 struct i3c_generic_ibi_slot *slots;
2596 void *payload_buf;
2597 struct list_head free_slots;
2598 struct list_head pending;
2599};
2600
2601/**
2602 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2603 * @pool: the IBI pool to free
2604 *
2605 * Free all IBI slots allated by a generic IBI pool.
2606 */
2607void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2608{
2609 struct i3c_generic_ibi_slot *slot;
2610 unsigned int nslots = 0;
2611
2612 while (!list_empty(&pool->free_slots)) {
2613 slot = list_first_entry(&pool->free_slots,
2614 struct i3c_generic_ibi_slot, node);
2615 list_del(&slot->node);
2616 nslots++;
2617 }
2618
2619 /*
2620 * If the number of freed slots is not equal to the number of allocated
2621 * slots we have a leak somewhere.
2622 */
2623 WARN_ON(nslots != pool->num_slots);
2624
2625 kfree(pool->payload_buf);
2626 kfree(pool->slots);
2627 kfree(pool);
2628}
2629EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2630
2631/**
2632 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2633 * @dev: the device this pool will be used for
2634 * @req: IBI setup request describing what the device driver expects
2635 *
2636 * Create a generic IBI pool based on the information provided in @req.
2637 *
2638 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2639 */
2640struct i3c_generic_ibi_pool *
2641i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2642 const struct i3c_ibi_setup *req)
2643{
2644 struct i3c_generic_ibi_pool *pool;
2645 struct i3c_generic_ibi_slot *slot;
2646 unsigned int i;
2647 int ret;
2648
2649 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2650 if (!pool)
2651 return ERR_PTR(-ENOMEM);
2652
2653 spin_lock_init(&pool->lock);
2654 INIT_LIST_HEAD(&pool->free_slots);
2655 INIT_LIST_HEAD(&pool->pending);
2656
2657 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2658 if (!pool->slots) {
2659 ret = -ENOMEM;
2660 goto err_free_pool;
2661 }
2662
2663 if (req->max_payload_len) {
2664 pool->payload_buf = kcalloc(req->num_slots,
2665 req->max_payload_len, GFP_KERNEL);
2666 if (!pool->payload_buf) {
2667 ret = -ENOMEM;
2668 goto err_free_pool;
2669 }
2670 }
2671
2672 for (i = 0; i < req->num_slots; i++) {
2673 slot = &pool->slots[i];
2674 i3c_master_init_ibi_slot(dev, &slot->base);
2675
2676 if (req->max_payload_len)
2677 slot->base.data = pool->payload_buf +
2678 (i * req->max_payload_len);
2679
2680 list_add_tail(&slot->node, &pool->free_slots);
2681 pool->num_slots++;
2682 }
2683
2684 return pool;
2685
2686err_free_pool:
2687 i3c_generic_ibi_free_pool(pool);
2688 return ERR_PTR(ret);
2689}
2690EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2691
2692/**
2693 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2694 * @pool: the pool to query an IBI slot on
2695 *
2696 * Search for a free slot in a generic IBI pool.
2697 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2698 * when it's no longer needed.
2699 *
2700 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2701 */
2702struct i3c_ibi_slot *
2703i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2704{
2705 struct i3c_generic_ibi_slot *slot;
2706 unsigned long flags;
2707
2708 spin_lock_irqsave(&pool->lock, flags);
2709 slot = list_first_entry_or_null(&pool->free_slots,
2710 struct i3c_generic_ibi_slot, node);
2711 if (slot)
2712 list_del(&slot->node);
2713 spin_unlock_irqrestore(&pool->lock, flags);
2714
2715 return slot ? &slot->base : NULL;
2716}
2717EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2718
2719/**
2720 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2721 * @pool: the pool to return the IBI slot to
2722 * @s: IBI slot to recycle
2723 *
2724 * Add an IBI slot back to its generic IBI pool. Should be called from the
2725 * master driver struct_master_controller_ops->recycle_ibi() method.
2726 */
2727void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2728 struct i3c_ibi_slot *s)
2729{
2730 struct i3c_generic_ibi_slot *slot;
2731 unsigned long flags;
2732
2733 if (!s)
2734 return;
2735
2736 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2737 spin_lock_irqsave(&pool->lock, flags);
2738 list_add_tail(&slot->node, &pool->free_slots);
2739 spin_unlock_irqrestore(&pool->lock, flags);
2740}
2741EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2742
2743static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2744{
2745 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2746 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2747 return -EINVAL;
2748
2749 if (ops->request_ibi &&
2750 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2751 !ops->recycle_ibi_slot))
2752 return -EINVAL;
2753
2754 return 0;
2755}
2756
2757/**
2758 * i3c_master_register() - register an I3C master
2759 * @master: master used to send frames on the bus
2760 * @parent: the parent device (the one that provides this I3C master
2761 * controller)
2762 * @ops: the master controller operations
2763 * @secondary: true if you are registering a secondary master. Will return
2764 * -ENOTSUPP if set to true since secondary masters are not yet
2765 * supported
2766 *
2767 * This function takes care of everything for you:
2768 *
2769 * - creates and initializes the I3C bus
2770 * - populates the bus with static I2C devs if @parent->of_node is not
2771 * NULL
2772 * - registers all I3C devices added by the controller during bus
2773 * initialization
2774 * - registers the I2C adapter and all I2C devices
2775 *
2776 * Return: 0 in case of success, a negative error code otherwise.
2777 */
2778int i3c_master_register(struct i3c_master_controller *master,
2779 struct device *parent,
2780 const struct i3c_master_controller_ops *ops,
2781 bool secondary)
2782{
2783 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2784 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2785 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2786 struct i2c_dev_boardinfo *i2cbi;
2787 int ret;
2788
2789 /* We do not support secondary masters yet. */
2790 if (secondary)
2791 return -ENOTSUPP;
2792
2793 ret = i3c_master_check_ops(ops);
2794 if (ret)
2795 return ret;
2796
2797 master->dev.parent = parent;
2798 master->dev.of_node = of_node_get(parent->of_node);
2799 master->dev.bus = &i3c_bus_type;
2800 master->dev.type = &i3c_masterdev_type;
2801 master->dev.release = i3c_masterdev_release;
2802 master->ops = ops;
2803 master->secondary = secondary;
2804 INIT_LIST_HEAD(&master->boardinfo.i2c);
2805 INIT_LIST_HEAD(&master->boardinfo.i3c);
2806
2807 ret = i3c_bus_init(i3cbus, master->dev.of_node);
2808 if (ret)
2809 return ret;
2810
2811 device_initialize(&master->dev);
2812 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2813
2814 master->dev.dma_mask = parent->dma_mask;
2815 master->dev.coherent_dma_mask = parent->coherent_dma_mask;
2816 master->dev.dma_parms = parent->dma_parms;
2817
2818 ret = of_populate_i3c_bus(master);
2819 if (ret)
2820 goto err_put_dev;
2821
2822 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2823 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2824 case I3C_LVR_I2C_INDEX(0):
2825 if (mode < I3C_BUS_MODE_MIXED_FAST)
2826 mode = I3C_BUS_MODE_MIXED_FAST;
2827 break;
2828 case I3C_LVR_I2C_INDEX(1):
2829 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2830 mode = I3C_BUS_MODE_MIXED_LIMITED;
2831 break;
2832 case I3C_LVR_I2C_INDEX(2):
2833 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2834 mode = I3C_BUS_MODE_MIXED_SLOW;
2835 break;
2836 default:
2837 ret = -EINVAL;
2838 goto err_put_dev;
2839 }
2840
2841 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2842 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2843 }
2844
2845 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2846 if (ret)
2847 goto err_put_dev;
2848
2849 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2850 if (!master->wq) {
2851 ret = -ENOMEM;
2852 goto err_put_dev;
2853 }
2854
2855 ret = i3c_master_bus_init(master);
2856 if (ret)
2857 goto err_put_dev;
2858
2859 ret = device_add(&master->dev);
2860 if (ret)
2861 goto err_cleanup_bus;
2862
2863 /*
2864 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2865 * through the I2C subsystem.
2866 */
2867 ret = i3c_master_i2c_adapter_init(master);
2868 if (ret)
2869 goto err_del_dev;
2870
2871 i3c_bus_notify(i3cbus, I3C_NOTIFY_BUS_ADD);
2872
2873 pm_runtime_no_callbacks(&master->dev);
2874 pm_suspend_ignore_children(&master->dev, true);
2875 pm_runtime_enable(&master->dev);
2876
2877 /*
2878 * We're done initializing the bus and the controller, we can now
2879 * register I3C devices discovered during the initial DAA.
2880 */
2881 master->init_done = true;
2882 i3c_bus_normaluse_lock(&master->bus);
2883 i3c_master_register_new_i3c_devs(master);
2884 i3c_bus_normaluse_unlock(&master->bus);
2885
2886 return 0;
2887
2888err_del_dev:
2889 device_del(&master->dev);
2890
2891err_cleanup_bus:
2892 i3c_master_bus_cleanup(master);
2893
2894err_put_dev:
2895 put_device(&master->dev);
2896
2897 return ret;
2898}
2899EXPORT_SYMBOL_GPL(i3c_master_register);
2900
2901/**
2902 * i3c_master_unregister() - unregister an I3C master
2903 * @master: master used to send frames on the bus
2904 *
2905 * Basically undo everything done in i3c_master_register().
2906 */
2907void i3c_master_unregister(struct i3c_master_controller *master)
2908{
2909 i3c_bus_notify(&master->bus, I3C_NOTIFY_BUS_REMOVE);
2910
2911 i3c_master_i2c_adapter_cleanup(master);
2912 i3c_master_unregister_i3c_devs(master);
2913 i3c_master_bus_cleanup(master);
2914 pm_runtime_disable(&master->dev);
2915 device_unregister(&master->dev);
2916}
2917EXPORT_SYMBOL_GPL(i3c_master_unregister);
2918
2919int i3c_dev_setdasa_locked(struct i3c_dev_desc *dev)
2920{
2921 struct i3c_master_controller *master;
2922
2923 if (!dev)
2924 return -ENOENT;
2925
2926 master = i3c_dev_get_master(dev);
2927 if (!master)
2928 return -EINVAL;
2929
2930 if (!dev->boardinfo || !dev->boardinfo->init_dyn_addr ||
2931 !dev->boardinfo->static_addr)
2932 return -EINVAL;
2933
2934 return i3c_master_setdasa_locked(master, dev->info.static_addr,
2935 dev->boardinfo->init_dyn_addr);
2936}
2937
2938int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2939 struct i3c_priv_xfer *xfers,
2940 int nxfers)
2941{
2942 struct i3c_master_controller *master;
2943
2944 if (!dev)
2945 return -ENOENT;
2946
2947 master = i3c_dev_get_master(dev);
2948 if (!master || !xfers)
2949 return -EINVAL;
2950
2951 if (!master->ops->priv_xfers)
2952 return -ENOTSUPP;
2953
2954 return master->ops->priv_xfers(dev, xfers, nxfers);
2955}
2956
2957int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2958{
2959 struct i3c_master_controller *master;
2960 int ret;
2961
2962 if (!dev->ibi)
2963 return -EINVAL;
2964
2965 master = i3c_dev_get_master(dev);
2966 ret = master->ops->disable_ibi(dev);
2967 if (ret)
2968 return ret;
2969
2970 reinit_completion(&dev->ibi->all_ibis_handled);
2971 if (atomic_read(&dev->ibi->pending_ibis))
2972 wait_for_completion(&dev->ibi->all_ibis_handled);
2973
2974 dev->ibi->enabled = false;
2975
2976 return 0;
2977}
2978
2979int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2980{
2981 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2982 int ret;
2983
2984 if (!dev->ibi)
2985 return -EINVAL;
2986
2987 ret = master->ops->enable_ibi(dev);
2988 if (!ret)
2989 dev->ibi->enabled = true;
2990
2991 return ret;
2992}
2993
2994int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2995 const struct i3c_ibi_setup *req)
2996{
2997 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2998 struct i3c_device_ibi_info *ibi;
2999 int ret;
3000
3001 if (!master->ops->request_ibi)
3002 return -ENOTSUPP;
3003
3004 if (dev->ibi)
3005 return -EBUSY;
3006
3007 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
3008 if (!ibi)
3009 return -ENOMEM;
3010
3011 ibi->wq = alloc_ordered_workqueue(dev_name(i3cdev_to_dev(dev->dev)), WQ_MEM_RECLAIM);
3012 if (!ibi->wq) {
3013 kfree(ibi);
3014 return -ENOMEM;
3015 }
3016
3017 atomic_set(&ibi->pending_ibis, 0);
3018 init_completion(&ibi->all_ibis_handled);
3019 ibi->handler = req->handler;
3020 ibi->max_payload_len = req->max_payload_len;
3021 ibi->num_slots = req->num_slots;
3022
3023 dev->ibi = ibi;
3024 ret = master->ops->request_ibi(dev, req);
3025 if (ret) {
3026 kfree(ibi);
3027 dev->ibi = NULL;
3028 }
3029
3030 return ret;
3031}
3032
3033void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
3034{
3035 struct i3c_master_controller *master = i3c_dev_get_master(dev);
3036
3037 if (!dev->ibi)
3038 return;
3039
3040 if (WARN_ON(dev->ibi->enabled))
3041 WARN_ON(i3c_dev_disable_ibi_locked(dev));
3042
3043 master->ops->free_ibi(dev);
3044
3045 if (dev->ibi->wq) {
3046 destroy_workqueue(dev->ibi->wq);
3047 dev->ibi->wq = NULL;
3048 }
3049
3050 kfree(dev->ibi);
3051 dev->ibi = NULL;
3052}
3053
3054static int __init i3c_init(void)
3055{
3056 int res;
3057
3058 res = of_alias_get_highest_id("i3c");
3059 if (res >= 0) {
3060 mutex_lock(&i3c_core_lock);
3061 __i3c_first_dynamic_bus_num = res + 1;
3062 mutex_unlock(&i3c_core_lock);
3063 }
3064
3065 res = bus_register_notifier(&i2c_bus_type, &i2cdev_notifier);
3066 if (res)
3067 return res;
3068
3069 res = bus_register(&i3c_bus_type);
3070 if (res)
3071 goto out_unreg_notifier;
3072
3073 return 0;
3074
3075out_unreg_notifier:
3076 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3077
3078 return res;
3079}
3080subsys_initcall(i3c_init);
3081
3082static void __exit i3c_exit(void)
3083{
3084 bus_unregister_notifier(&i2c_bus_type, &i2cdev_notifier);
3085 idr_destroy(&i3c_bus_idr);
3086 bus_unregister(&i3c_bus_type);
3087}
3088module_exit(i3c_exit);
3089
3090MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
3091MODULE_DESCRIPTION("I3C core");
3092MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Copyright (C) 2018 Cadence Design Systems Inc.
4 *
5 * Author: Boris Brezillon <boris.brezillon@bootlin.com>
6 */
7
8#include <linux/atomic.h>
9#include <linux/bug.h>
10#include <linux/device.h>
11#include <linux/err.h>
12#include <linux/export.h>
13#include <linux/kernel.h>
14#include <linux/list.h>
15#include <linux/of.h>
16#include <linux/slab.h>
17#include <linux/spinlock.h>
18#include <linux/workqueue.h>
19
20#include "internals.h"
21
22static DEFINE_IDR(i3c_bus_idr);
23static DEFINE_MUTEX(i3c_core_lock);
24
25/**
26 * i3c_bus_maintenance_lock - Lock the bus for a maintenance operation
27 * @bus: I3C bus to take the lock on
28 *
29 * This function takes the bus lock so that no other operations can occur on
30 * the bus. This is needed for all kind of bus maintenance operation, like
31 * - enabling/disabling slave events
32 * - re-triggering DAA
33 * - changing the dynamic address of a device
34 * - relinquishing mastership
35 * - ...
36 *
37 * The reason for this kind of locking is that we don't want drivers and core
38 * logic to rely on I3C device information that could be changed behind their
39 * back.
40 */
41static void i3c_bus_maintenance_lock(struct i3c_bus *bus)
42{
43 down_write(&bus->lock);
44}
45
46/**
47 * i3c_bus_maintenance_unlock - Release the bus lock after a maintenance
48 * operation
49 * @bus: I3C bus to release the lock on
50 *
51 * Should be called when the bus maintenance operation is done. See
52 * i3c_bus_maintenance_lock() for more details on what these maintenance
53 * operations are.
54 */
55static void i3c_bus_maintenance_unlock(struct i3c_bus *bus)
56{
57 up_write(&bus->lock);
58}
59
60/**
61 * i3c_bus_normaluse_lock - Lock the bus for a normal operation
62 * @bus: I3C bus to take the lock on
63 *
64 * This function takes the bus lock for any operation that is not a maintenance
65 * operation (see i3c_bus_maintenance_lock() for a non-exhaustive list of
66 * maintenance operations). Basically all communications with I3C devices are
67 * normal operations (HDR, SDR transfers or CCC commands that do not change bus
68 * state or I3C dynamic address).
69 *
70 * Note that this lock is not guaranteeing serialization of normal operations.
71 * In other words, transfer requests passed to the I3C master can be submitted
72 * in parallel and I3C master drivers have to use their own locking to make
73 * sure two different communications are not inter-mixed, or access to the
74 * output/input queue is not done while the engine is busy.
75 */
76void i3c_bus_normaluse_lock(struct i3c_bus *bus)
77{
78 down_read(&bus->lock);
79}
80
81/**
82 * i3c_bus_normaluse_unlock - Release the bus lock after a normal operation
83 * @bus: I3C bus to release the lock on
84 *
85 * Should be called when a normal operation is done. See
86 * i3c_bus_normaluse_lock() for more details on what these normal operations
87 * are.
88 */
89void i3c_bus_normaluse_unlock(struct i3c_bus *bus)
90{
91 up_read(&bus->lock);
92}
93
94static struct i3c_master_controller *
95i3c_bus_to_i3c_master(struct i3c_bus *i3cbus)
96{
97 return container_of(i3cbus, struct i3c_master_controller, bus);
98}
99
100static struct i3c_master_controller *dev_to_i3cmaster(struct device *dev)
101{
102 return container_of(dev, struct i3c_master_controller, dev);
103}
104
105static const struct device_type i3c_device_type;
106
107static struct i3c_bus *dev_to_i3cbus(struct device *dev)
108{
109 struct i3c_master_controller *master;
110
111 if (dev->type == &i3c_device_type)
112 return dev_to_i3cdev(dev)->bus;
113
114 master = dev_to_i3cmaster(dev);
115
116 return &master->bus;
117}
118
119static struct i3c_dev_desc *dev_to_i3cdesc(struct device *dev)
120{
121 struct i3c_master_controller *master;
122
123 if (dev->type == &i3c_device_type)
124 return dev_to_i3cdev(dev)->desc;
125
126 master = dev_to_i3cmaster(dev);
127
128 return master->this;
129}
130
131static ssize_t bcr_show(struct device *dev,
132 struct device_attribute *da,
133 char *buf)
134{
135 struct i3c_bus *bus = dev_to_i3cbus(dev);
136 struct i3c_dev_desc *desc;
137 ssize_t ret;
138
139 i3c_bus_normaluse_lock(bus);
140 desc = dev_to_i3cdesc(dev);
141 ret = sprintf(buf, "%x\n", desc->info.bcr);
142 i3c_bus_normaluse_unlock(bus);
143
144 return ret;
145}
146static DEVICE_ATTR_RO(bcr);
147
148static ssize_t dcr_show(struct device *dev,
149 struct device_attribute *da,
150 char *buf)
151{
152 struct i3c_bus *bus = dev_to_i3cbus(dev);
153 struct i3c_dev_desc *desc;
154 ssize_t ret;
155
156 i3c_bus_normaluse_lock(bus);
157 desc = dev_to_i3cdesc(dev);
158 ret = sprintf(buf, "%x\n", desc->info.dcr);
159 i3c_bus_normaluse_unlock(bus);
160
161 return ret;
162}
163static DEVICE_ATTR_RO(dcr);
164
165static ssize_t pid_show(struct device *dev,
166 struct device_attribute *da,
167 char *buf)
168{
169 struct i3c_bus *bus = dev_to_i3cbus(dev);
170 struct i3c_dev_desc *desc;
171 ssize_t ret;
172
173 i3c_bus_normaluse_lock(bus);
174 desc = dev_to_i3cdesc(dev);
175 ret = sprintf(buf, "%llx\n", desc->info.pid);
176 i3c_bus_normaluse_unlock(bus);
177
178 return ret;
179}
180static DEVICE_ATTR_RO(pid);
181
182static ssize_t dynamic_address_show(struct device *dev,
183 struct device_attribute *da,
184 char *buf)
185{
186 struct i3c_bus *bus = dev_to_i3cbus(dev);
187 struct i3c_dev_desc *desc;
188 ssize_t ret;
189
190 i3c_bus_normaluse_lock(bus);
191 desc = dev_to_i3cdesc(dev);
192 ret = sprintf(buf, "%02x\n", desc->info.dyn_addr);
193 i3c_bus_normaluse_unlock(bus);
194
195 return ret;
196}
197static DEVICE_ATTR_RO(dynamic_address);
198
199static const char * const hdrcap_strings[] = {
200 "hdr-ddr", "hdr-tsp", "hdr-tsl",
201};
202
203static ssize_t hdrcap_show(struct device *dev,
204 struct device_attribute *da,
205 char *buf)
206{
207 struct i3c_bus *bus = dev_to_i3cbus(dev);
208 struct i3c_dev_desc *desc;
209 ssize_t offset = 0, ret;
210 unsigned long caps;
211 int mode;
212
213 i3c_bus_normaluse_lock(bus);
214 desc = dev_to_i3cdesc(dev);
215 caps = desc->info.hdr_cap;
216 for_each_set_bit(mode, &caps, 8) {
217 if (mode >= ARRAY_SIZE(hdrcap_strings))
218 break;
219
220 if (!hdrcap_strings[mode])
221 continue;
222
223 ret = sprintf(buf + offset, offset ? " %s" : "%s",
224 hdrcap_strings[mode]);
225 if (ret < 0)
226 goto out;
227
228 offset += ret;
229 }
230
231 ret = sprintf(buf + offset, "\n");
232 if (ret < 0)
233 goto out;
234
235 ret = offset + ret;
236
237out:
238 i3c_bus_normaluse_unlock(bus);
239
240 return ret;
241}
242static DEVICE_ATTR_RO(hdrcap);
243
244static ssize_t modalias_show(struct device *dev,
245 struct device_attribute *da, char *buf)
246{
247 struct i3c_device *i3c = dev_to_i3cdev(dev);
248 struct i3c_device_info devinfo;
249 u16 manuf, part, ext;
250
251 i3c_device_get_info(i3c, &devinfo);
252 manuf = I3C_PID_MANUF_ID(devinfo.pid);
253 part = I3C_PID_PART_ID(devinfo.pid);
254 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
255
256 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
257 return sprintf(buf, "i3c:dcr%02Xmanuf%04X", devinfo.dcr,
258 manuf);
259
260 return sprintf(buf, "i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
261 devinfo.dcr, manuf, part, ext);
262}
263static DEVICE_ATTR_RO(modalias);
264
265static struct attribute *i3c_device_attrs[] = {
266 &dev_attr_bcr.attr,
267 &dev_attr_dcr.attr,
268 &dev_attr_pid.attr,
269 &dev_attr_dynamic_address.attr,
270 &dev_attr_hdrcap.attr,
271 &dev_attr_modalias.attr,
272 NULL,
273};
274ATTRIBUTE_GROUPS(i3c_device);
275
276static int i3c_device_uevent(struct device *dev, struct kobj_uevent_env *env)
277{
278 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
279 struct i3c_device_info devinfo;
280 u16 manuf, part, ext;
281
282 i3c_device_get_info(i3cdev, &devinfo);
283 manuf = I3C_PID_MANUF_ID(devinfo.pid);
284 part = I3C_PID_PART_ID(devinfo.pid);
285 ext = I3C_PID_EXTRA_INFO(devinfo.pid);
286
287 if (I3C_PID_RND_LOWER_32BITS(devinfo.pid))
288 return add_uevent_var(env, "MODALIAS=i3c:dcr%02Xmanuf%04X",
289 devinfo.dcr, manuf);
290
291 return add_uevent_var(env,
292 "MODALIAS=i3c:dcr%02Xmanuf%04Xpart%04Xext%04X",
293 devinfo.dcr, manuf, part, ext);
294}
295
296static const struct device_type i3c_device_type = {
297 .groups = i3c_device_groups,
298 .uevent = i3c_device_uevent,
299};
300
301static int i3c_device_match(struct device *dev, struct device_driver *drv)
302{
303 struct i3c_device *i3cdev;
304 struct i3c_driver *i3cdrv;
305
306 if (dev->type != &i3c_device_type)
307 return 0;
308
309 i3cdev = dev_to_i3cdev(dev);
310 i3cdrv = drv_to_i3cdrv(drv);
311 if (i3c_device_match_id(i3cdev, i3cdrv->id_table))
312 return 1;
313
314 return 0;
315}
316
317static int i3c_device_probe(struct device *dev)
318{
319 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
320 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
321
322 return driver->probe(i3cdev);
323}
324
325static int i3c_device_remove(struct device *dev)
326{
327 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
328 struct i3c_driver *driver = drv_to_i3cdrv(dev->driver);
329
330 if (driver->remove)
331 driver->remove(i3cdev);
332
333 i3c_device_free_ibi(i3cdev);
334
335 return 0;
336}
337
338struct bus_type i3c_bus_type = {
339 .name = "i3c",
340 .match = i3c_device_match,
341 .probe = i3c_device_probe,
342 .remove = i3c_device_remove,
343};
344
345static enum i3c_addr_slot_status
346i3c_bus_get_addr_slot_status(struct i3c_bus *bus, u16 addr)
347{
348 int status, bitpos = addr * 2;
349
350 if (addr > I2C_MAX_ADDR)
351 return I3C_ADDR_SLOT_RSVD;
352
353 status = bus->addrslots[bitpos / BITS_PER_LONG];
354 status >>= bitpos % BITS_PER_LONG;
355
356 return status & I3C_ADDR_SLOT_STATUS_MASK;
357}
358
359static void i3c_bus_set_addr_slot_status(struct i3c_bus *bus, u16 addr,
360 enum i3c_addr_slot_status status)
361{
362 int bitpos = addr * 2;
363 unsigned long *ptr;
364
365 if (addr > I2C_MAX_ADDR)
366 return;
367
368 ptr = bus->addrslots + (bitpos / BITS_PER_LONG);
369 *ptr &= ~((unsigned long)I3C_ADDR_SLOT_STATUS_MASK <<
370 (bitpos % BITS_PER_LONG));
371 *ptr |= (unsigned long)status << (bitpos % BITS_PER_LONG);
372}
373
374static bool i3c_bus_dev_addr_is_avail(struct i3c_bus *bus, u8 addr)
375{
376 enum i3c_addr_slot_status status;
377
378 status = i3c_bus_get_addr_slot_status(bus, addr);
379
380 return status == I3C_ADDR_SLOT_FREE;
381}
382
383static int i3c_bus_get_free_addr(struct i3c_bus *bus, u8 start_addr)
384{
385 enum i3c_addr_slot_status status;
386 u8 addr;
387
388 for (addr = start_addr; addr < I3C_MAX_ADDR; addr++) {
389 status = i3c_bus_get_addr_slot_status(bus, addr);
390 if (status == I3C_ADDR_SLOT_FREE)
391 return addr;
392 }
393
394 return -ENOMEM;
395}
396
397static void i3c_bus_init_addrslots(struct i3c_bus *bus)
398{
399 int i;
400
401 /* Addresses 0 to 7 are reserved. */
402 for (i = 0; i < 8; i++)
403 i3c_bus_set_addr_slot_status(bus, i, I3C_ADDR_SLOT_RSVD);
404
405 /*
406 * Reserve broadcast address and all addresses that might collide
407 * with the broadcast address when facing a single bit error.
408 */
409 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR,
410 I3C_ADDR_SLOT_RSVD);
411 for (i = 0; i < 7; i++)
412 i3c_bus_set_addr_slot_status(bus, I3C_BROADCAST_ADDR ^ BIT(i),
413 I3C_ADDR_SLOT_RSVD);
414}
415
416static void i3c_bus_cleanup(struct i3c_bus *i3cbus)
417{
418 mutex_lock(&i3c_core_lock);
419 idr_remove(&i3c_bus_idr, i3cbus->id);
420 mutex_unlock(&i3c_core_lock);
421}
422
423static int i3c_bus_init(struct i3c_bus *i3cbus)
424{
425 int ret;
426
427 init_rwsem(&i3cbus->lock);
428 INIT_LIST_HEAD(&i3cbus->devs.i2c);
429 INIT_LIST_HEAD(&i3cbus->devs.i3c);
430 i3c_bus_init_addrslots(i3cbus);
431 i3cbus->mode = I3C_BUS_MODE_PURE;
432
433 mutex_lock(&i3c_core_lock);
434 ret = idr_alloc(&i3c_bus_idr, i3cbus, 0, 0, GFP_KERNEL);
435 mutex_unlock(&i3c_core_lock);
436
437 if (ret < 0)
438 return ret;
439
440 i3cbus->id = ret;
441
442 return 0;
443}
444
445static const char * const i3c_bus_mode_strings[] = {
446 [I3C_BUS_MODE_PURE] = "pure",
447 [I3C_BUS_MODE_MIXED_FAST] = "mixed-fast",
448 [I3C_BUS_MODE_MIXED_LIMITED] = "mixed-limited",
449 [I3C_BUS_MODE_MIXED_SLOW] = "mixed-slow",
450};
451
452static ssize_t mode_show(struct device *dev,
453 struct device_attribute *da,
454 char *buf)
455{
456 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
457 ssize_t ret;
458
459 i3c_bus_normaluse_lock(i3cbus);
460 if (i3cbus->mode < 0 ||
461 i3cbus->mode >= ARRAY_SIZE(i3c_bus_mode_strings) ||
462 !i3c_bus_mode_strings[i3cbus->mode])
463 ret = sprintf(buf, "unknown\n");
464 else
465 ret = sprintf(buf, "%s\n", i3c_bus_mode_strings[i3cbus->mode]);
466 i3c_bus_normaluse_unlock(i3cbus);
467
468 return ret;
469}
470static DEVICE_ATTR_RO(mode);
471
472static ssize_t current_master_show(struct device *dev,
473 struct device_attribute *da,
474 char *buf)
475{
476 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
477 ssize_t ret;
478
479 i3c_bus_normaluse_lock(i3cbus);
480 ret = sprintf(buf, "%d-%llx\n", i3cbus->id,
481 i3cbus->cur_master->info.pid);
482 i3c_bus_normaluse_unlock(i3cbus);
483
484 return ret;
485}
486static DEVICE_ATTR_RO(current_master);
487
488static ssize_t i3c_scl_frequency_show(struct device *dev,
489 struct device_attribute *da,
490 char *buf)
491{
492 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
493 ssize_t ret;
494
495 i3c_bus_normaluse_lock(i3cbus);
496 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i3c);
497 i3c_bus_normaluse_unlock(i3cbus);
498
499 return ret;
500}
501static DEVICE_ATTR_RO(i3c_scl_frequency);
502
503static ssize_t i2c_scl_frequency_show(struct device *dev,
504 struct device_attribute *da,
505 char *buf)
506{
507 struct i3c_bus *i3cbus = dev_to_i3cbus(dev);
508 ssize_t ret;
509
510 i3c_bus_normaluse_lock(i3cbus);
511 ret = sprintf(buf, "%ld\n", i3cbus->scl_rate.i2c);
512 i3c_bus_normaluse_unlock(i3cbus);
513
514 return ret;
515}
516static DEVICE_ATTR_RO(i2c_scl_frequency);
517
518static struct attribute *i3c_masterdev_attrs[] = {
519 &dev_attr_mode.attr,
520 &dev_attr_current_master.attr,
521 &dev_attr_i3c_scl_frequency.attr,
522 &dev_attr_i2c_scl_frequency.attr,
523 &dev_attr_bcr.attr,
524 &dev_attr_dcr.attr,
525 &dev_attr_pid.attr,
526 &dev_attr_dynamic_address.attr,
527 &dev_attr_hdrcap.attr,
528 NULL,
529};
530ATTRIBUTE_GROUPS(i3c_masterdev);
531
532static void i3c_masterdev_release(struct device *dev)
533{
534 struct i3c_master_controller *master = dev_to_i3cmaster(dev);
535 struct i3c_bus *bus = dev_to_i3cbus(dev);
536
537 if (master->wq)
538 destroy_workqueue(master->wq);
539
540 WARN_ON(!list_empty(&bus->devs.i2c) || !list_empty(&bus->devs.i3c));
541 i3c_bus_cleanup(bus);
542
543 of_node_put(dev->of_node);
544}
545
546static const struct device_type i3c_masterdev_type = {
547 .groups = i3c_masterdev_groups,
548};
549
550static int i3c_bus_set_mode(struct i3c_bus *i3cbus, enum i3c_bus_mode mode,
551 unsigned long max_i2c_scl_rate)
552{
553 struct i3c_master_controller *master = i3c_bus_to_i3c_master(i3cbus);
554
555 i3cbus->mode = mode;
556
557 switch (i3cbus->mode) {
558 case I3C_BUS_MODE_PURE:
559 if (!i3cbus->scl_rate.i3c)
560 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
561 break;
562 case I3C_BUS_MODE_MIXED_FAST:
563 case I3C_BUS_MODE_MIXED_LIMITED:
564 if (!i3cbus->scl_rate.i3c)
565 i3cbus->scl_rate.i3c = I3C_BUS_TYP_I3C_SCL_RATE;
566 if (!i3cbus->scl_rate.i2c)
567 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
568 break;
569 case I3C_BUS_MODE_MIXED_SLOW:
570 if (!i3cbus->scl_rate.i2c)
571 i3cbus->scl_rate.i2c = max_i2c_scl_rate;
572 if (!i3cbus->scl_rate.i3c ||
573 i3cbus->scl_rate.i3c > i3cbus->scl_rate.i2c)
574 i3cbus->scl_rate.i3c = i3cbus->scl_rate.i2c;
575 break;
576 default:
577 return -EINVAL;
578 }
579
580 dev_dbg(&master->dev, "i2c-scl = %ld Hz i3c-scl = %ld Hz\n",
581 i3cbus->scl_rate.i2c, i3cbus->scl_rate.i3c);
582
583 /*
584 * I3C/I2C frequency may have been overridden, check that user-provided
585 * values are not exceeding max possible frequency.
586 */
587 if (i3cbus->scl_rate.i3c > I3C_BUS_MAX_I3C_SCL_RATE ||
588 i3cbus->scl_rate.i2c > I3C_BUS_I2C_FM_PLUS_SCL_RATE)
589 return -EINVAL;
590
591 return 0;
592}
593
594static struct i3c_master_controller *
595i2c_adapter_to_i3c_master(struct i2c_adapter *adap)
596{
597 return container_of(adap, struct i3c_master_controller, i2c);
598}
599
600static struct i2c_adapter *
601i3c_master_to_i2c_adapter(struct i3c_master_controller *master)
602{
603 return &master->i2c;
604}
605
606static void i3c_master_free_i2c_dev(struct i2c_dev_desc *dev)
607{
608 kfree(dev);
609}
610
611static struct i2c_dev_desc *
612i3c_master_alloc_i2c_dev(struct i3c_master_controller *master,
613 const struct i2c_dev_boardinfo *boardinfo)
614{
615 struct i2c_dev_desc *dev;
616
617 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
618 if (!dev)
619 return ERR_PTR(-ENOMEM);
620
621 dev->common.master = master;
622 dev->boardinfo = boardinfo;
623 dev->addr = boardinfo->base.addr;
624 dev->lvr = boardinfo->lvr;
625
626 return dev;
627}
628
629static void *i3c_ccc_cmd_dest_init(struct i3c_ccc_cmd_dest *dest, u8 addr,
630 u16 payloadlen)
631{
632 dest->addr = addr;
633 dest->payload.len = payloadlen;
634 if (payloadlen)
635 dest->payload.data = kzalloc(payloadlen, GFP_KERNEL);
636 else
637 dest->payload.data = NULL;
638
639 return dest->payload.data;
640}
641
642static void i3c_ccc_cmd_dest_cleanup(struct i3c_ccc_cmd_dest *dest)
643{
644 kfree(dest->payload.data);
645}
646
647static void i3c_ccc_cmd_init(struct i3c_ccc_cmd *cmd, bool rnw, u8 id,
648 struct i3c_ccc_cmd_dest *dests,
649 unsigned int ndests)
650{
651 cmd->rnw = rnw ? 1 : 0;
652 cmd->id = id;
653 cmd->dests = dests;
654 cmd->ndests = ndests;
655 cmd->err = I3C_ERROR_UNKNOWN;
656}
657
658static int i3c_master_send_ccc_cmd_locked(struct i3c_master_controller *master,
659 struct i3c_ccc_cmd *cmd)
660{
661 int ret;
662
663 if (!cmd || !master)
664 return -EINVAL;
665
666 if (WARN_ON(master->init_done &&
667 !rwsem_is_locked(&master->bus.lock)))
668 return -EINVAL;
669
670 if (!master->ops->send_ccc_cmd)
671 return -ENOTSUPP;
672
673 if ((cmd->id & I3C_CCC_DIRECT) && (!cmd->dests || !cmd->ndests))
674 return -EINVAL;
675
676 if (master->ops->supports_ccc_cmd &&
677 !master->ops->supports_ccc_cmd(master, cmd))
678 return -ENOTSUPP;
679
680 ret = master->ops->send_ccc_cmd(master, cmd);
681 if (ret) {
682 if (cmd->err != I3C_ERROR_UNKNOWN)
683 return cmd->err;
684
685 return ret;
686 }
687
688 return 0;
689}
690
691static struct i2c_dev_desc *
692i3c_master_find_i2c_dev_by_addr(const struct i3c_master_controller *master,
693 u16 addr)
694{
695 struct i2c_dev_desc *dev;
696
697 i3c_bus_for_each_i2cdev(&master->bus, dev) {
698 if (dev->boardinfo->base.addr == addr)
699 return dev;
700 }
701
702 return NULL;
703}
704
705/**
706 * i3c_master_get_free_addr() - get a free address on the bus
707 * @master: I3C master object
708 * @start_addr: where to start searching
709 *
710 * This function must be called with the bus lock held in write mode.
711 *
712 * Return: the first free address starting at @start_addr (included) or -ENOMEM
713 * if there's no more address available.
714 */
715int i3c_master_get_free_addr(struct i3c_master_controller *master,
716 u8 start_addr)
717{
718 return i3c_bus_get_free_addr(&master->bus, start_addr);
719}
720EXPORT_SYMBOL_GPL(i3c_master_get_free_addr);
721
722static void i3c_device_release(struct device *dev)
723{
724 struct i3c_device *i3cdev = dev_to_i3cdev(dev);
725
726 WARN_ON(i3cdev->desc);
727
728 of_node_put(i3cdev->dev.of_node);
729 kfree(i3cdev);
730}
731
732static void i3c_master_free_i3c_dev(struct i3c_dev_desc *dev)
733{
734 kfree(dev);
735}
736
737static struct i3c_dev_desc *
738i3c_master_alloc_i3c_dev(struct i3c_master_controller *master,
739 const struct i3c_device_info *info)
740{
741 struct i3c_dev_desc *dev;
742
743 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
744 if (!dev)
745 return ERR_PTR(-ENOMEM);
746
747 dev->common.master = master;
748 dev->info = *info;
749 mutex_init(&dev->ibi_lock);
750
751 return dev;
752}
753
754static int i3c_master_rstdaa_locked(struct i3c_master_controller *master,
755 u8 addr)
756{
757 enum i3c_addr_slot_status addrstat;
758 struct i3c_ccc_cmd_dest dest;
759 struct i3c_ccc_cmd cmd;
760 int ret;
761
762 if (!master)
763 return -EINVAL;
764
765 addrstat = i3c_bus_get_addr_slot_status(&master->bus, addr);
766 if (addr != I3C_BROADCAST_ADDR && addrstat != I3C_ADDR_SLOT_I3C_DEV)
767 return -EINVAL;
768
769 i3c_ccc_cmd_dest_init(&dest, addr, 0);
770 i3c_ccc_cmd_init(&cmd, false,
771 I3C_CCC_RSTDAA(addr == I3C_BROADCAST_ADDR),
772 &dest, 1);
773 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
774 i3c_ccc_cmd_dest_cleanup(&dest);
775
776 return ret;
777}
778
779/**
780 * i3c_master_entdaa_locked() - start a DAA (Dynamic Address Assignment)
781 * procedure
782 * @master: master used to send frames on the bus
783 *
784 * Send a ENTDAA CCC command to start a DAA procedure.
785 *
786 * Note that this function only sends the ENTDAA CCC command, all the logic
787 * behind dynamic address assignment has to be handled in the I3C master
788 * driver.
789 *
790 * This function must be called with the bus lock held in write mode.
791 *
792 * Return: 0 in case of success, a positive I3C error code if the error is
793 * one of the official Mx error codes, and a negative error code otherwise.
794 */
795int i3c_master_entdaa_locked(struct i3c_master_controller *master)
796{
797 struct i3c_ccc_cmd_dest dest;
798 struct i3c_ccc_cmd cmd;
799 int ret;
800
801 i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR, 0);
802 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_ENTDAA, &dest, 1);
803 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
804 i3c_ccc_cmd_dest_cleanup(&dest);
805
806 return ret;
807}
808EXPORT_SYMBOL_GPL(i3c_master_entdaa_locked);
809
810static int i3c_master_enec_disec_locked(struct i3c_master_controller *master,
811 u8 addr, bool enable, u8 evts)
812{
813 struct i3c_ccc_events *events;
814 struct i3c_ccc_cmd_dest dest;
815 struct i3c_ccc_cmd cmd;
816 int ret;
817
818 events = i3c_ccc_cmd_dest_init(&dest, addr, sizeof(*events));
819 if (!events)
820 return -ENOMEM;
821
822 events->events = evts;
823 i3c_ccc_cmd_init(&cmd, false,
824 enable ?
825 I3C_CCC_ENEC(addr == I3C_BROADCAST_ADDR) :
826 I3C_CCC_DISEC(addr == I3C_BROADCAST_ADDR),
827 &dest, 1);
828 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
829 i3c_ccc_cmd_dest_cleanup(&dest);
830
831 return ret;
832}
833
834/**
835 * i3c_master_disec_locked() - send a DISEC CCC command
836 * @master: master used to send frames on the bus
837 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
838 * @evts: events to disable
839 *
840 * Send a DISEC CCC command to disable some or all events coming from a
841 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
842 *
843 * This function must be called with the bus lock held in write mode.
844 *
845 * Return: 0 in case of success, a positive I3C error code if the error is
846 * one of the official Mx error codes, and a negative error code otherwise.
847 */
848int i3c_master_disec_locked(struct i3c_master_controller *master, u8 addr,
849 u8 evts)
850{
851 return i3c_master_enec_disec_locked(master, addr, false, evts);
852}
853EXPORT_SYMBOL_GPL(i3c_master_disec_locked);
854
855/**
856 * i3c_master_enec_locked() - send an ENEC CCC command
857 * @master: master used to send frames on the bus
858 * @addr: a valid I3C slave address or %I3C_BROADCAST_ADDR
859 * @evts: events to disable
860 *
861 * Sends an ENEC CCC command to enable some or all events coming from a
862 * specific slave, or all devices if @addr is %I3C_BROADCAST_ADDR.
863 *
864 * This function must be called with the bus lock held in write mode.
865 *
866 * Return: 0 in case of success, a positive I3C error code if the error is
867 * one of the official Mx error codes, and a negative error code otherwise.
868 */
869int i3c_master_enec_locked(struct i3c_master_controller *master, u8 addr,
870 u8 evts)
871{
872 return i3c_master_enec_disec_locked(master, addr, true, evts);
873}
874EXPORT_SYMBOL_GPL(i3c_master_enec_locked);
875
876/**
877 * i3c_master_defslvs_locked() - send a DEFSLVS CCC command
878 * @master: master used to send frames on the bus
879 *
880 * Send a DEFSLVS CCC command containing all the devices known to the @master.
881 * This is useful when you have secondary masters on the bus to propagate
882 * device information.
883 *
884 * This should be called after all I3C devices have been discovered (in other
885 * words, after the DAA procedure has finished) and instantiated in
886 * &i3c_master_controller_ops->bus_init().
887 * It should also be called if a master ACKed an Hot-Join request and assigned
888 * a dynamic address to the device joining the bus.
889 *
890 * This function must be called with the bus lock held in write mode.
891 *
892 * Return: 0 in case of success, a positive I3C error code if the error is
893 * one of the official Mx error codes, and a negative error code otherwise.
894 */
895int i3c_master_defslvs_locked(struct i3c_master_controller *master)
896{
897 struct i3c_ccc_defslvs *defslvs;
898 struct i3c_ccc_dev_desc *desc;
899 struct i3c_ccc_cmd_dest dest;
900 struct i3c_dev_desc *i3cdev;
901 struct i2c_dev_desc *i2cdev;
902 struct i3c_ccc_cmd cmd;
903 struct i3c_bus *bus;
904 bool send = false;
905 int ndevs = 0, ret;
906
907 if (!master)
908 return -EINVAL;
909
910 bus = i3c_master_get_bus(master);
911 i3c_bus_for_each_i3cdev(bus, i3cdev) {
912 ndevs++;
913
914 if (i3cdev == master->this)
915 continue;
916
917 if (I3C_BCR_DEVICE_ROLE(i3cdev->info.bcr) ==
918 I3C_BCR_I3C_MASTER)
919 send = true;
920 }
921
922 /* No other master on the bus, skip DEFSLVS. */
923 if (!send)
924 return 0;
925
926 i3c_bus_for_each_i2cdev(bus, i2cdev)
927 ndevs++;
928
929 defslvs = i3c_ccc_cmd_dest_init(&dest, I3C_BROADCAST_ADDR,
930 struct_size(defslvs, slaves,
931 ndevs - 1));
932 if (!defslvs)
933 return -ENOMEM;
934
935 defslvs->count = ndevs;
936 defslvs->master.bcr = master->this->info.bcr;
937 defslvs->master.dcr = master->this->info.dcr;
938 defslvs->master.dyn_addr = master->this->info.dyn_addr << 1;
939 defslvs->master.static_addr = I3C_BROADCAST_ADDR << 1;
940
941 desc = defslvs->slaves;
942 i3c_bus_for_each_i2cdev(bus, i2cdev) {
943 desc->lvr = i2cdev->lvr;
944 desc->static_addr = i2cdev->addr << 1;
945 desc++;
946 }
947
948 i3c_bus_for_each_i3cdev(bus, i3cdev) {
949 /* Skip the I3C dev representing this master. */
950 if (i3cdev == master->this)
951 continue;
952
953 desc->bcr = i3cdev->info.bcr;
954 desc->dcr = i3cdev->info.dcr;
955 desc->dyn_addr = i3cdev->info.dyn_addr << 1;
956 desc->static_addr = i3cdev->info.static_addr << 1;
957 desc++;
958 }
959
960 i3c_ccc_cmd_init(&cmd, false, I3C_CCC_DEFSLVS, &dest, 1);
961 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
962 i3c_ccc_cmd_dest_cleanup(&dest);
963
964 return ret;
965}
966EXPORT_SYMBOL_GPL(i3c_master_defslvs_locked);
967
968static int i3c_master_setda_locked(struct i3c_master_controller *master,
969 u8 oldaddr, u8 newaddr, bool setdasa)
970{
971 struct i3c_ccc_cmd_dest dest;
972 struct i3c_ccc_setda *setda;
973 struct i3c_ccc_cmd cmd;
974 int ret;
975
976 if (!oldaddr || !newaddr)
977 return -EINVAL;
978
979 setda = i3c_ccc_cmd_dest_init(&dest, oldaddr, sizeof(*setda));
980 if (!setda)
981 return -ENOMEM;
982
983 setda->addr = newaddr << 1;
984 i3c_ccc_cmd_init(&cmd, false,
985 setdasa ? I3C_CCC_SETDASA : I3C_CCC_SETNEWDA,
986 &dest, 1);
987 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
988 i3c_ccc_cmd_dest_cleanup(&dest);
989
990 return ret;
991}
992
993static int i3c_master_setdasa_locked(struct i3c_master_controller *master,
994 u8 static_addr, u8 dyn_addr)
995{
996 return i3c_master_setda_locked(master, static_addr, dyn_addr, true);
997}
998
999static int i3c_master_setnewda_locked(struct i3c_master_controller *master,
1000 u8 oldaddr, u8 newaddr)
1001{
1002 return i3c_master_setda_locked(master, oldaddr, newaddr, false);
1003}
1004
1005static int i3c_master_getmrl_locked(struct i3c_master_controller *master,
1006 struct i3c_device_info *info)
1007{
1008 struct i3c_ccc_cmd_dest dest;
1009 struct i3c_ccc_mrl *mrl;
1010 struct i3c_ccc_cmd cmd;
1011 int ret;
1012
1013 mrl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mrl));
1014 if (!mrl)
1015 return -ENOMEM;
1016
1017 /*
1018 * When the device does not have IBI payload GETMRL only returns 2
1019 * bytes of data.
1020 */
1021 if (!(info->bcr & I3C_BCR_IBI_PAYLOAD))
1022 dest.payload.len -= 1;
1023
1024 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMRL, &dest, 1);
1025 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1026 if (ret)
1027 goto out;
1028
1029 switch (dest.payload.len) {
1030 case 3:
1031 info->max_ibi_len = mrl->ibi_len;
1032 fallthrough;
1033 case 2:
1034 info->max_read_len = be16_to_cpu(mrl->read_len);
1035 break;
1036 default:
1037 ret = -EIO;
1038 goto out;
1039 }
1040
1041out:
1042 i3c_ccc_cmd_dest_cleanup(&dest);
1043
1044 return ret;
1045}
1046
1047static int i3c_master_getmwl_locked(struct i3c_master_controller *master,
1048 struct i3c_device_info *info)
1049{
1050 struct i3c_ccc_cmd_dest dest;
1051 struct i3c_ccc_mwl *mwl;
1052 struct i3c_ccc_cmd cmd;
1053 int ret;
1054
1055 mwl = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*mwl));
1056 if (!mwl)
1057 return -ENOMEM;
1058
1059 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMWL, &dest, 1);
1060 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1061 if (ret)
1062 goto out;
1063
1064 if (dest.payload.len != sizeof(*mwl)) {
1065 ret = -EIO;
1066 goto out;
1067 }
1068
1069 info->max_write_len = be16_to_cpu(mwl->len);
1070
1071out:
1072 i3c_ccc_cmd_dest_cleanup(&dest);
1073
1074 return ret;
1075}
1076
1077static int i3c_master_getmxds_locked(struct i3c_master_controller *master,
1078 struct i3c_device_info *info)
1079{
1080 struct i3c_ccc_getmxds *getmaxds;
1081 struct i3c_ccc_cmd_dest dest;
1082 struct i3c_ccc_cmd cmd;
1083 int ret;
1084
1085 getmaxds = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1086 sizeof(*getmaxds));
1087 if (!getmaxds)
1088 return -ENOMEM;
1089
1090 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETMXDS, &dest, 1);
1091 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1092 if (ret)
1093 goto out;
1094
1095 if (dest.payload.len != 2 && dest.payload.len != 5) {
1096 ret = -EIO;
1097 goto out;
1098 }
1099
1100 info->max_read_ds = getmaxds->maxrd;
1101 info->max_write_ds = getmaxds->maxwr;
1102 if (dest.payload.len == 5)
1103 info->max_read_turnaround = getmaxds->maxrdturn[0] |
1104 ((u32)getmaxds->maxrdturn[1] << 8) |
1105 ((u32)getmaxds->maxrdturn[2] << 16);
1106
1107out:
1108 i3c_ccc_cmd_dest_cleanup(&dest);
1109
1110 return ret;
1111}
1112
1113static int i3c_master_gethdrcap_locked(struct i3c_master_controller *master,
1114 struct i3c_device_info *info)
1115{
1116 struct i3c_ccc_gethdrcap *gethdrcap;
1117 struct i3c_ccc_cmd_dest dest;
1118 struct i3c_ccc_cmd cmd;
1119 int ret;
1120
1121 gethdrcap = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr,
1122 sizeof(*gethdrcap));
1123 if (!gethdrcap)
1124 return -ENOMEM;
1125
1126 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETHDRCAP, &dest, 1);
1127 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1128 if (ret)
1129 goto out;
1130
1131 if (dest.payload.len != 1) {
1132 ret = -EIO;
1133 goto out;
1134 }
1135
1136 info->hdr_cap = gethdrcap->modes;
1137
1138out:
1139 i3c_ccc_cmd_dest_cleanup(&dest);
1140
1141 return ret;
1142}
1143
1144static int i3c_master_getpid_locked(struct i3c_master_controller *master,
1145 struct i3c_device_info *info)
1146{
1147 struct i3c_ccc_getpid *getpid;
1148 struct i3c_ccc_cmd_dest dest;
1149 struct i3c_ccc_cmd cmd;
1150 int ret, i;
1151
1152 getpid = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getpid));
1153 if (!getpid)
1154 return -ENOMEM;
1155
1156 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETPID, &dest, 1);
1157 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1158 if (ret)
1159 goto out;
1160
1161 info->pid = 0;
1162 for (i = 0; i < sizeof(getpid->pid); i++) {
1163 int sft = (sizeof(getpid->pid) - i - 1) * 8;
1164
1165 info->pid |= (u64)getpid->pid[i] << sft;
1166 }
1167
1168out:
1169 i3c_ccc_cmd_dest_cleanup(&dest);
1170
1171 return ret;
1172}
1173
1174static int i3c_master_getbcr_locked(struct i3c_master_controller *master,
1175 struct i3c_device_info *info)
1176{
1177 struct i3c_ccc_getbcr *getbcr;
1178 struct i3c_ccc_cmd_dest dest;
1179 struct i3c_ccc_cmd cmd;
1180 int ret;
1181
1182 getbcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getbcr));
1183 if (!getbcr)
1184 return -ENOMEM;
1185
1186 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETBCR, &dest, 1);
1187 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1188 if (ret)
1189 goto out;
1190
1191 info->bcr = getbcr->bcr;
1192
1193out:
1194 i3c_ccc_cmd_dest_cleanup(&dest);
1195
1196 return ret;
1197}
1198
1199static int i3c_master_getdcr_locked(struct i3c_master_controller *master,
1200 struct i3c_device_info *info)
1201{
1202 struct i3c_ccc_getdcr *getdcr;
1203 struct i3c_ccc_cmd_dest dest;
1204 struct i3c_ccc_cmd cmd;
1205 int ret;
1206
1207 getdcr = i3c_ccc_cmd_dest_init(&dest, info->dyn_addr, sizeof(*getdcr));
1208 if (!getdcr)
1209 return -ENOMEM;
1210
1211 i3c_ccc_cmd_init(&cmd, true, I3C_CCC_GETDCR, &dest, 1);
1212 ret = i3c_master_send_ccc_cmd_locked(master, &cmd);
1213 if (ret)
1214 goto out;
1215
1216 info->dcr = getdcr->dcr;
1217
1218out:
1219 i3c_ccc_cmd_dest_cleanup(&dest);
1220
1221 return ret;
1222}
1223
1224static int i3c_master_retrieve_dev_info(struct i3c_dev_desc *dev)
1225{
1226 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1227 enum i3c_addr_slot_status slot_status;
1228 int ret;
1229
1230 if (!dev->info.dyn_addr)
1231 return -EINVAL;
1232
1233 slot_status = i3c_bus_get_addr_slot_status(&master->bus,
1234 dev->info.dyn_addr);
1235 if (slot_status == I3C_ADDR_SLOT_RSVD ||
1236 slot_status == I3C_ADDR_SLOT_I2C_DEV)
1237 return -EINVAL;
1238
1239 ret = i3c_master_getpid_locked(master, &dev->info);
1240 if (ret)
1241 return ret;
1242
1243 ret = i3c_master_getbcr_locked(master, &dev->info);
1244 if (ret)
1245 return ret;
1246
1247 ret = i3c_master_getdcr_locked(master, &dev->info);
1248 if (ret)
1249 return ret;
1250
1251 if (dev->info.bcr & I3C_BCR_MAX_DATA_SPEED_LIM) {
1252 ret = i3c_master_getmxds_locked(master, &dev->info);
1253 if (ret)
1254 return ret;
1255 }
1256
1257 if (dev->info.bcr & I3C_BCR_IBI_PAYLOAD)
1258 dev->info.max_ibi_len = 1;
1259
1260 i3c_master_getmrl_locked(master, &dev->info);
1261 i3c_master_getmwl_locked(master, &dev->info);
1262
1263 if (dev->info.bcr & I3C_BCR_HDR_CAP) {
1264 ret = i3c_master_gethdrcap_locked(master, &dev->info);
1265 if (ret)
1266 return ret;
1267 }
1268
1269 return 0;
1270}
1271
1272static void i3c_master_put_i3c_addrs(struct i3c_dev_desc *dev)
1273{
1274 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1275
1276 if (dev->info.static_addr)
1277 i3c_bus_set_addr_slot_status(&master->bus,
1278 dev->info.static_addr,
1279 I3C_ADDR_SLOT_FREE);
1280
1281 if (dev->info.dyn_addr)
1282 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1283 I3C_ADDR_SLOT_FREE);
1284
1285 if (dev->boardinfo && dev->boardinfo->init_dyn_addr)
1286 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1287 I3C_ADDR_SLOT_FREE);
1288}
1289
1290static int i3c_master_get_i3c_addrs(struct i3c_dev_desc *dev)
1291{
1292 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1293 enum i3c_addr_slot_status status;
1294
1295 if (!dev->info.static_addr && !dev->info.dyn_addr)
1296 return 0;
1297
1298 if (dev->info.static_addr) {
1299 status = i3c_bus_get_addr_slot_status(&master->bus,
1300 dev->info.static_addr);
1301 if (status != I3C_ADDR_SLOT_FREE)
1302 return -EBUSY;
1303
1304 i3c_bus_set_addr_slot_status(&master->bus,
1305 dev->info.static_addr,
1306 I3C_ADDR_SLOT_I3C_DEV);
1307 }
1308
1309 /*
1310 * ->init_dyn_addr should have been reserved before that, so, if we're
1311 * trying to apply a pre-reserved dynamic address, we should not try
1312 * to reserve the address slot a second time.
1313 */
1314 if (dev->info.dyn_addr &&
1315 (!dev->boardinfo ||
1316 dev->boardinfo->init_dyn_addr != dev->info.dyn_addr)) {
1317 status = i3c_bus_get_addr_slot_status(&master->bus,
1318 dev->info.dyn_addr);
1319 if (status != I3C_ADDR_SLOT_FREE)
1320 goto err_release_static_addr;
1321
1322 i3c_bus_set_addr_slot_status(&master->bus, dev->info.dyn_addr,
1323 I3C_ADDR_SLOT_I3C_DEV);
1324 }
1325
1326 return 0;
1327
1328err_release_static_addr:
1329 if (dev->info.static_addr)
1330 i3c_bus_set_addr_slot_status(&master->bus,
1331 dev->info.static_addr,
1332 I3C_ADDR_SLOT_FREE);
1333
1334 return -EBUSY;
1335}
1336
1337static int i3c_master_attach_i3c_dev(struct i3c_master_controller *master,
1338 struct i3c_dev_desc *dev)
1339{
1340 int ret;
1341
1342 /*
1343 * We don't attach devices to the controller until they are
1344 * addressable on the bus.
1345 */
1346 if (!dev->info.static_addr && !dev->info.dyn_addr)
1347 return 0;
1348
1349 ret = i3c_master_get_i3c_addrs(dev);
1350 if (ret)
1351 return ret;
1352
1353 /* Do not attach the master device itself. */
1354 if (master->this != dev && master->ops->attach_i3c_dev) {
1355 ret = master->ops->attach_i3c_dev(dev);
1356 if (ret) {
1357 i3c_master_put_i3c_addrs(dev);
1358 return ret;
1359 }
1360 }
1361
1362 list_add_tail(&dev->common.node, &master->bus.devs.i3c);
1363
1364 return 0;
1365}
1366
1367static int i3c_master_reattach_i3c_dev(struct i3c_dev_desc *dev,
1368 u8 old_dyn_addr)
1369{
1370 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1371 enum i3c_addr_slot_status status;
1372 int ret;
1373
1374 if (dev->info.dyn_addr != old_dyn_addr &&
1375 (!dev->boardinfo ||
1376 dev->info.dyn_addr != dev->boardinfo->init_dyn_addr)) {
1377 status = i3c_bus_get_addr_slot_status(&master->bus,
1378 dev->info.dyn_addr);
1379 if (status != I3C_ADDR_SLOT_FREE)
1380 return -EBUSY;
1381 i3c_bus_set_addr_slot_status(&master->bus,
1382 dev->info.dyn_addr,
1383 I3C_ADDR_SLOT_I3C_DEV);
1384 }
1385
1386 if (master->ops->reattach_i3c_dev) {
1387 ret = master->ops->reattach_i3c_dev(dev, old_dyn_addr);
1388 if (ret) {
1389 i3c_master_put_i3c_addrs(dev);
1390 return ret;
1391 }
1392 }
1393
1394 return 0;
1395}
1396
1397static void i3c_master_detach_i3c_dev(struct i3c_dev_desc *dev)
1398{
1399 struct i3c_master_controller *master = i3c_dev_get_master(dev);
1400
1401 /* Do not detach the master device itself. */
1402 if (master->this != dev && master->ops->detach_i3c_dev)
1403 master->ops->detach_i3c_dev(dev);
1404
1405 i3c_master_put_i3c_addrs(dev);
1406 list_del(&dev->common.node);
1407}
1408
1409static int i3c_master_attach_i2c_dev(struct i3c_master_controller *master,
1410 struct i2c_dev_desc *dev)
1411{
1412 int ret;
1413
1414 if (master->ops->attach_i2c_dev) {
1415 ret = master->ops->attach_i2c_dev(dev);
1416 if (ret)
1417 return ret;
1418 }
1419
1420 list_add_tail(&dev->common.node, &master->bus.devs.i2c);
1421
1422 return 0;
1423}
1424
1425static void i3c_master_detach_i2c_dev(struct i2c_dev_desc *dev)
1426{
1427 struct i3c_master_controller *master = i2c_dev_get_master(dev);
1428
1429 list_del(&dev->common.node);
1430
1431 if (master->ops->detach_i2c_dev)
1432 master->ops->detach_i2c_dev(dev);
1433}
1434
1435static int i3c_master_early_i3c_dev_add(struct i3c_master_controller *master,
1436 struct i3c_dev_boardinfo *boardinfo)
1437{
1438 struct i3c_device_info info = {
1439 .static_addr = boardinfo->static_addr,
1440 };
1441 struct i3c_dev_desc *i3cdev;
1442 int ret;
1443
1444 i3cdev = i3c_master_alloc_i3c_dev(master, &info);
1445 if (IS_ERR(i3cdev))
1446 return -ENOMEM;
1447
1448 i3cdev->boardinfo = boardinfo;
1449
1450 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1451 if (ret)
1452 goto err_free_dev;
1453
1454 ret = i3c_master_setdasa_locked(master, i3cdev->info.static_addr,
1455 i3cdev->boardinfo->init_dyn_addr);
1456 if (ret)
1457 goto err_detach_dev;
1458
1459 i3cdev->info.dyn_addr = i3cdev->boardinfo->init_dyn_addr;
1460 ret = i3c_master_reattach_i3c_dev(i3cdev, 0);
1461 if (ret)
1462 goto err_rstdaa;
1463
1464 ret = i3c_master_retrieve_dev_info(i3cdev);
1465 if (ret)
1466 goto err_rstdaa;
1467
1468 return 0;
1469
1470err_rstdaa:
1471 i3c_master_rstdaa_locked(master, i3cdev->boardinfo->init_dyn_addr);
1472err_detach_dev:
1473 i3c_master_detach_i3c_dev(i3cdev);
1474err_free_dev:
1475 i3c_master_free_i3c_dev(i3cdev);
1476
1477 return ret;
1478}
1479
1480static void
1481i3c_master_register_new_i3c_devs(struct i3c_master_controller *master)
1482{
1483 struct i3c_dev_desc *desc;
1484 int ret;
1485
1486 if (!master->init_done)
1487 return;
1488
1489 i3c_bus_for_each_i3cdev(&master->bus, desc) {
1490 if (desc->dev || !desc->info.dyn_addr || desc == master->this)
1491 continue;
1492
1493 desc->dev = kzalloc(sizeof(*desc->dev), GFP_KERNEL);
1494 if (!desc->dev)
1495 continue;
1496
1497 desc->dev->bus = &master->bus;
1498 desc->dev->desc = desc;
1499 desc->dev->dev.parent = &master->dev;
1500 desc->dev->dev.type = &i3c_device_type;
1501 desc->dev->dev.bus = &i3c_bus_type;
1502 desc->dev->dev.release = i3c_device_release;
1503 dev_set_name(&desc->dev->dev, "%d-%llx", master->bus.id,
1504 desc->info.pid);
1505
1506 if (desc->boardinfo)
1507 desc->dev->dev.of_node = desc->boardinfo->of_node;
1508
1509 ret = device_register(&desc->dev->dev);
1510 if (ret)
1511 dev_err(&master->dev,
1512 "Failed to add I3C device (err = %d)\n", ret);
1513 }
1514}
1515
1516/**
1517 * i3c_master_do_daa() - do a DAA (Dynamic Address Assignment)
1518 * @master: master doing the DAA
1519 *
1520 * This function is instantiating an I3C device object and adding it to the
1521 * I3C device list. All device information are automatically retrieved using
1522 * standard CCC commands.
1523 *
1524 * The I3C device object is returned in case the master wants to attach
1525 * private data to it using i3c_dev_set_master_data().
1526 *
1527 * This function must be called with the bus lock held in write mode.
1528 *
1529 * Return: a 0 in case of success, an negative error code otherwise.
1530 */
1531int i3c_master_do_daa(struct i3c_master_controller *master)
1532{
1533 int ret;
1534
1535 i3c_bus_maintenance_lock(&master->bus);
1536 ret = master->ops->do_daa(master);
1537 i3c_bus_maintenance_unlock(&master->bus);
1538
1539 if (ret)
1540 return ret;
1541
1542 i3c_bus_normaluse_lock(&master->bus);
1543 i3c_master_register_new_i3c_devs(master);
1544 i3c_bus_normaluse_unlock(&master->bus);
1545
1546 return 0;
1547}
1548EXPORT_SYMBOL_GPL(i3c_master_do_daa);
1549
1550/**
1551 * i3c_master_set_info() - set master device information
1552 * @master: master used to send frames on the bus
1553 * @info: I3C device information
1554 *
1555 * Set master device info. This should be called from
1556 * &i3c_master_controller_ops->bus_init().
1557 *
1558 * Not all &i3c_device_info fields are meaningful for a master device.
1559 * Here is a list of fields that should be properly filled:
1560 *
1561 * - &i3c_device_info->dyn_addr
1562 * - &i3c_device_info->bcr
1563 * - &i3c_device_info->dcr
1564 * - &i3c_device_info->pid
1565 * - &i3c_device_info->hdr_cap if %I3C_BCR_HDR_CAP bit is set in
1566 * &i3c_device_info->bcr
1567 *
1568 * This function must be called with the bus lock held in maintenance mode.
1569 *
1570 * Return: 0 if @info contains valid information (not every piece of
1571 * information can be checked, but we can at least make sure @info->dyn_addr
1572 * and @info->bcr are correct), -EINVAL otherwise.
1573 */
1574int i3c_master_set_info(struct i3c_master_controller *master,
1575 const struct i3c_device_info *info)
1576{
1577 struct i3c_dev_desc *i3cdev;
1578 int ret;
1579
1580 if (!i3c_bus_dev_addr_is_avail(&master->bus, info->dyn_addr))
1581 return -EINVAL;
1582
1583 if (I3C_BCR_DEVICE_ROLE(info->bcr) == I3C_BCR_I3C_MASTER &&
1584 master->secondary)
1585 return -EINVAL;
1586
1587 if (master->this)
1588 return -EINVAL;
1589
1590 i3cdev = i3c_master_alloc_i3c_dev(master, info);
1591 if (IS_ERR(i3cdev))
1592 return PTR_ERR(i3cdev);
1593
1594 master->this = i3cdev;
1595 master->bus.cur_master = master->this;
1596
1597 ret = i3c_master_attach_i3c_dev(master, i3cdev);
1598 if (ret)
1599 goto err_free_dev;
1600
1601 return 0;
1602
1603err_free_dev:
1604 i3c_master_free_i3c_dev(i3cdev);
1605
1606 return ret;
1607}
1608EXPORT_SYMBOL_GPL(i3c_master_set_info);
1609
1610static void i3c_master_detach_free_devs(struct i3c_master_controller *master)
1611{
1612 struct i3c_dev_desc *i3cdev, *i3ctmp;
1613 struct i2c_dev_desc *i2cdev, *i2ctmp;
1614
1615 list_for_each_entry_safe(i3cdev, i3ctmp, &master->bus.devs.i3c,
1616 common.node) {
1617 i3c_master_detach_i3c_dev(i3cdev);
1618
1619 if (i3cdev->boardinfo && i3cdev->boardinfo->init_dyn_addr)
1620 i3c_bus_set_addr_slot_status(&master->bus,
1621 i3cdev->boardinfo->init_dyn_addr,
1622 I3C_ADDR_SLOT_FREE);
1623
1624 i3c_master_free_i3c_dev(i3cdev);
1625 }
1626
1627 list_for_each_entry_safe(i2cdev, i2ctmp, &master->bus.devs.i2c,
1628 common.node) {
1629 i3c_master_detach_i2c_dev(i2cdev);
1630 i3c_bus_set_addr_slot_status(&master->bus,
1631 i2cdev->addr,
1632 I3C_ADDR_SLOT_FREE);
1633 i3c_master_free_i2c_dev(i2cdev);
1634 }
1635}
1636
1637/**
1638 * i3c_master_bus_init() - initialize an I3C bus
1639 * @master: main master initializing the bus
1640 *
1641 * This function is following all initialisation steps described in the I3C
1642 * specification:
1643 *
1644 * 1. Attach I2C devs to the master so that the master can fill its internal
1645 * device table appropriately
1646 *
1647 * 2. Call &i3c_master_controller_ops->bus_init() method to initialize
1648 * the master controller. That's usually where the bus mode is selected
1649 * (pure bus or mixed fast/slow bus)
1650 *
1651 * 3. Instruct all devices on the bus to drop their dynamic address. This is
1652 * particularly important when the bus was previously configured by someone
1653 * else (for example the bootloader)
1654 *
1655 * 4. Disable all slave events.
1656 *
1657 * 5. Reserve address slots for I3C devices with init_dyn_addr. And if devices
1658 * also have static_addr, try to pre-assign dynamic addresses requested by
1659 * the FW with SETDASA and attach corresponding statically defined I3C
1660 * devices to the master.
1661 *
1662 * 6. Do a DAA (Dynamic Address Assignment) to assign dynamic addresses to all
1663 * remaining I3C devices
1664 *
1665 * Once this is done, all I3C and I2C devices should be usable.
1666 *
1667 * Return: a 0 in case of success, an negative error code otherwise.
1668 */
1669static int i3c_master_bus_init(struct i3c_master_controller *master)
1670{
1671 enum i3c_addr_slot_status status;
1672 struct i2c_dev_boardinfo *i2cboardinfo;
1673 struct i3c_dev_boardinfo *i3cboardinfo;
1674 struct i2c_dev_desc *i2cdev;
1675 int ret;
1676
1677 /*
1678 * First attach all devices with static definitions provided by the
1679 * FW.
1680 */
1681 list_for_each_entry(i2cboardinfo, &master->boardinfo.i2c, node) {
1682 status = i3c_bus_get_addr_slot_status(&master->bus,
1683 i2cboardinfo->base.addr);
1684 if (status != I3C_ADDR_SLOT_FREE) {
1685 ret = -EBUSY;
1686 goto err_detach_devs;
1687 }
1688
1689 i3c_bus_set_addr_slot_status(&master->bus,
1690 i2cboardinfo->base.addr,
1691 I3C_ADDR_SLOT_I2C_DEV);
1692
1693 i2cdev = i3c_master_alloc_i2c_dev(master, i2cboardinfo);
1694 if (IS_ERR(i2cdev)) {
1695 ret = PTR_ERR(i2cdev);
1696 goto err_detach_devs;
1697 }
1698
1699 ret = i3c_master_attach_i2c_dev(master, i2cdev);
1700 if (ret) {
1701 i3c_master_free_i2c_dev(i2cdev);
1702 goto err_detach_devs;
1703 }
1704 }
1705
1706 /*
1707 * Now execute the controller specific ->bus_init() routine, which
1708 * might configure its internal logic to match the bus limitations.
1709 */
1710 ret = master->ops->bus_init(master);
1711 if (ret)
1712 goto err_detach_devs;
1713
1714 /*
1715 * The master device should have been instantiated in ->bus_init(),
1716 * complain if this was not the case.
1717 */
1718 if (!master->this) {
1719 dev_err(&master->dev,
1720 "master_set_info() was not called in ->bus_init()\n");
1721 ret = -EINVAL;
1722 goto err_bus_cleanup;
1723 }
1724
1725 /*
1726 * Reset all dynamic address that may have been assigned before
1727 * (assigned by the bootloader for example).
1728 */
1729 ret = i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1730 if (ret && ret != I3C_ERROR_M2)
1731 goto err_bus_cleanup;
1732
1733 /* Disable all slave events before starting DAA. */
1734 ret = i3c_master_disec_locked(master, I3C_BROADCAST_ADDR,
1735 I3C_CCC_EVENT_SIR | I3C_CCC_EVENT_MR |
1736 I3C_CCC_EVENT_HJ);
1737 if (ret && ret != I3C_ERROR_M2)
1738 goto err_bus_cleanup;
1739
1740 /*
1741 * Reserve init_dyn_addr first, and then try to pre-assign dynamic
1742 * address and retrieve device information if needed.
1743 * In case pre-assign dynamic address fails, setting dynamic address to
1744 * the requested init_dyn_addr is retried after DAA is done in
1745 * i3c_master_add_i3c_dev_locked().
1746 */
1747 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1748
1749 /*
1750 * We don't reserve a dynamic address for devices that
1751 * don't explicitly request one.
1752 */
1753 if (!i3cboardinfo->init_dyn_addr)
1754 continue;
1755
1756 ret = i3c_bus_get_addr_slot_status(&master->bus,
1757 i3cboardinfo->init_dyn_addr);
1758 if (ret != I3C_ADDR_SLOT_FREE) {
1759 ret = -EBUSY;
1760 goto err_rstdaa;
1761 }
1762
1763 i3c_bus_set_addr_slot_status(&master->bus,
1764 i3cboardinfo->init_dyn_addr,
1765 I3C_ADDR_SLOT_I3C_DEV);
1766
1767 /*
1768 * Only try to create/attach devices that have a static
1769 * address. Other devices will be created/attached when
1770 * DAA happens, and the requested dynamic address will
1771 * be set using SETNEWDA once those devices become
1772 * addressable.
1773 */
1774
1775 if (i3cboardinfo->static_addr)
1776 i3c_master_early_i3c_dev_add(master, i3cboardinfo);
1777 }
1778
1779 ret = i3c_master_do_daa(master);
1780 if (ret)
1781 goto err_rstdaa;
1782
1783 return 0;
1784
1785err_rstdaa:
1786 i3c_master_rstdaa_locked(master, I3C_BROADCAST_ADDR);
1787
1788err_bus_cleanup:
1789 if (master->ops->bus_cleanup)
1790 master->ops->bus_cleanup(master);
1791
1792err_detach_devs:
1793 i3c_master_detach_free_devs(master);
1794
1795 return ret;
1796}
1797
1798static void i3c_master_bus_cleanup(struct i3c_master_controller *master)
1799{
1800 if (master->ops->bus_cleanup)
1801 master->ops->bus_cleanup(master);
1802
1803 i3c_master_detach_free_devs(master);
1804}
1805
1806static void i3c_master_attach_boardinfo(struct i3c_dev_desc *i3cdev)
1807{
1808 struct i3c_master_controller *master = i3cdev->common.master;
1809 struct i3c_dev_boardinfo *i3cboardinfo;
1810
1811 list_for_each_entry(i3cboardinfo, &master->boardinfo.i3c, node) {
1812 if (i3cdev->info.pid != i3cboardinfo->pid)
1813 continue;
1814
1815 i3cdev->boardinfo = i3cboardinfo;
1816 i3cdev->info.static_addr = i3cboardinfo->static_addr;
1817 return;
1818 }
1819}
1820
1821static struct i3c_dev_desc *
1822i3c_master_search_i3c_dev_duplicate(struct i3c_dev_desc *refdev)
1823{
1824 struct i3c_master_controller *master = i3c_dev_get_master(refdev);
1825 struct i3c_dev_desc *i3cdev;
1826
1827 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
1828 if (i3cdev != refdev && i3cdev->info.pid == refdev->info.pid)
1829 return i3cdev;
1830 }
1831
1832 return NULL;
1833}
1834
1835/**
1836 * i3c_master_add_i3c_dev_locked() - add an I3C slave to the bus
1837 * @master: master used to send frames on the bus
1838 * @addr: I3C slave dynamic address assigned to the device
1839 *
1840 * This function is instantiating an I3C device object and adding it to the
1841 * I3C device list. All device information are automatically retrieved using
1842 * standard CCC commands.
1843 *
1844 * The I3C device object is returned in case the master wants to attach
1845 * private data to it using i3c_dev_set_master_data().
1846 *
1847 * This function must be called with the bus lock held in write mode.
1848 *
1849 * Return: a 0 in case of success, an negative error code otherwise.
1850 */
1851int i3c_master_add_i3c_dev_locked(struct i3c_master_controller *master,
1852 u8 addr)
1853{
1854 struct i3c_device_info info = { .dyn_addr = addr };
1855 struct i3c_dev_desc *newdev, *olddev;
1856 u8 old_dyn_addr = addr, expected_dyn_addr;
1857 struct i3c_ibi_setup ibireq = { };
1858 bool enable_ibi = false;
1859 int ret;
1860
1861 if (!master)
1862 return -EINVAL;
1863
1864 newdev = i3c_master_alloc_i3c_dev(master, &info);
1865 if (IS_ERR(newdev))
1866 return PTR_ERR(newdev);
1867
1868 ret = i3c_master_attach_i3c_dev(master, newdev);
1869 if (ret)
1870 goto err_free_dev;
1871
1872 ret = i3c_master_retrieve_dev_info(newdev);
1873 if (ret)
1874 goto err_detach_dev;
1875
1876 i3c_master_attach_boardinfo(newdev);
1877
1878 olddev = i3c_master_search_i3c_dev_duplicate(newdev);
1879 if (olddev) {
1880 newdev->dev = olddev->dev;
1881 if (newdev->dev)
1882 newdev->dev->desc = newdev;
1883
1884 /*
1885 * We need to restore the IBI state too, so let's save the
1886 * IBI information and try to restore them after olddev has
1887 * been detached+released and its IBI has been stopped and
1888 * the associated resources have been freed.
1889 */
1890 mutex_lock(&olddev->ibi_lock);
1891 if (olddev->ibi) {
1892 ibireq.handler = olddev->ibi->handler;
1893 ibireq.max_payload_len = olddev->ibi->max_payload_len;
1894 ibireq.num_slots = olddev->ibi->num_slots;
1895
1896 if (olddev->ibi->enabled) {
1897 enable_ibi = true;
1898 i3c_dev_disable_ibi_locked(olddev);
1899 }
1900
1901 i3c_dev_free_ibi_locked(olddev);
1902 }
1903 mutex_unlock(&olddev->ibi_lock);
1904
1905 old_dyn_addr = olddev->info.dyn_addr;
1906
1907 i3c_master_detach_i3c_dev(olddev);
1908 i3c_master_free_i3c_dev(olddev);
1909 }
1910
1911 ret = i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1912 if (ret)
1913 goto err_detach_dev;
1914
1915 /*
1916 * Depending on our previous state, the expected dynamic address might
1917 * differ:
1918 * - if the device already had a dynamic address assigned, let's try to
1919 * re-apply this one
1920 * - if the device did not have a dynamic address and the firmware
1921 * requested a specific address, pick this one
1922 * - in any other case, keep the address automatically assigned by the
1923 * master
1924 */
1925 if (old_dyn_addr && old_dyn_addr != newdev->info.dyn_addr)
1926 expected_dyn_addr = old_dyn_addr;
1927 else if (newdev->boardinfo && newdev->boardinfo->init_dyn_addr)
1928 expected_dyn_addr = newdev->boardinfo->init_dyn_addr;
1929 else
1930 expected_dyn_addr = newdev->info.dyn_addr;
1931
1932 if (newdev->info.dyn_addr != expected_dyn_addr) {
1933 /*
1934 * Try to apply the expected dynamic address. If it fails, keep
1935 * the address assigned by the master.
1936 */
1937 ret = i3c_master_setnewda_locked(master,
1938 newdev->info.dyn_addr,
1939 expected_dyn_addr);
1940 if (!ret) {
1941 old_dyn_addr = newdev->info.dyn_addr;
1942 newdev->info.dyn_addr = expected_dyn_addr;
1943 i3c_master_reattach_i3c_dev(newdev, old_dyn_addr);
1944 } else {
1945 dev_err(&master->dev,
1946 "Failed to assign reserved/old address to device %d%llx",
1947 master->bus.id, newdev->info.pid);
1948 }
1949 }
1950
1951 /*
1952 * Now is time to try to restore the IBI setup. If we're lucky,
1953 * everything works as before, otherwise, all we can do is complain.
1954 * FIXME: maybe we should add callback to inform the driver that it
1955 * should request the IBI again instead of trying to hide that from
1956 * him.
1957 */
1958 if (ibireq.handler) {
1959 mutex_lock(&newdev->ibi_lock);
1960 ret = i3c_dev_request_ibi_locked(newdev, &ibireq);
1961 if (ret) {
1962 dev_err(&master->dev,
1963 "Failed to request IBI on device %d-%llx",
1964 master->bus.id, newdev->info.pid);
1965 } else if (enable_ibi) {
1966 ret = i3c_dev_enable_ibi_locked(newdev);
1967 if (ret)
1968 dev_err(&master->dev,
1969 "Failed to re-enable IBI on device %d-%llx",
1970 master->bus.id, newdev->info.pid);
1971 }
1972 mutex_unlock(&newdev->ibi_lock);
1973 }
1974
1975 return 0;
1976
1977err_detach_dev:
1978 if (newdev->dev && newdev->dev->desc)
1979 newdev->dev->desc = NULL;
1980
1981 i3c_master_detach_i3c_dev(newdev);
1982
1983err_free_dev:
1984 i3c_master_free_i3c_dev(newdev);
1985
1986 return ret;
1987}
1988EXPORT_SYMBOL_GPL(i3c_master_add_i3c_dev_locked);
1989
1990#define OF_I3C_REG1_IS_I2C_DEV BIT(31)
1991
1992static int
1993of_i3c_master_add_i2c_boardinfo(struct i3c_master_controller *master,
1994 struct device_node *node, u32 *reg)
1995{
1996 struct i2c_dev_boardinfo *boardinfo;
1997 struct device *dev = &master->dev;
1998 int ret;
1999
2000 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2001 if (!boardinfo)
2002 return -ENOMEM;
2003
2004 ret = of_i2c_get_board_info(dev, node, &boardinfo->base);
2005 if (ret)
2006 return ret;
2007
2008 /*
2009 * The I3C Specification does not clearly say I2C devices with 10-bit
2010 * address are supported. These devices can't be passed properly through
2011 * DEFSLVS command.
2012 */
2013 if (boardinfo->base.flags & I2C_CLIENT_TEN) {
2014 dev_err(dev, "I2C device with 10 bit address not supported.");
2015 return -ENOTSUPP;
2016 }
2017
2018 /* LVR is encoded in reg[2]. */
2019 boardinfo->lvr = reg[2];
2020
2021 list_add_tail(&boardinfo->node, &master->boardinfo.i2c);
2022 of_node_get(node);
2023
2024 return 0;
2025}
2026
2027static int
2028of_i3c_master_add_i3c_boardinfo(struct i3c_master_controller *master,
2029 struct device_node *node, u32 *reg)
2030{
2031 struct i3c_dev_boardinfo *boardinfo;
2032 struct device *dev = &master->dev;
2033 enum i3c_addr_slot_status addrstatus;
2034 u32 init_dyn_addr = 0;
2035
2036 boardinfo = devm_kzalloc(dev, sizeof(*boardinfo), GFP_KERNEL);
2037 if (!boardinfo)
2038 return -ENOMEM;
2039
2040 if (reg[0]) {
2041 if (reg[0] > I3C_MAX_ADDR)
2042 return -EINVAL;
2043
2044 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2045 reg[0]);
2046 if (addrstatus != I3C_ADDR_SLOT_FREE)
2047 return -EINVAL;
2048 }
2049
2050 boardinfo->static_addr = reg[0];
2051
2052 if (!of_property_read_u32(node, "assigned-address", &init_dyn_addr)) {
2053 if (init_dyn_addr > I3C_MAX_ADDR)
2054 return -EINVAL;
2055
2056 addrstatus = i3c_bus_get_addr_slot_status(&master->bus,
2057 init_dyn_addr);
2058 if (addrstatus != I3C_ADDR_SLOT_FREE)
2059 return -EINVAL;
2060 }
2061
2062 boardinfo->pid = ((u64)reg[1] << 32) | reg[2];
2063
2064 if ((boardinfo->pid & GENMASK_ULL(63, 48)) ||
2065 I3C_PID_RND_LOWER_32BITS(boardinfo->pid))
2066 return -EINVAL;
2067
2068 boardinfo->init_dyn_addr = init_dyn_addr;
2069 boardinfo->of_node = of_node_get(node);
2070 list_add_tail(&boardinfo->node, &master->boardinfo.i3c);
2071
2072 return 0;
2073}
2074
2075static int of_i3c_master_add_dev(struct i3c_master_controller *master,
2076 struct device_node *node)
2077{
2078 u32 reg[3];
2079 int ret;
2080
2081 if (!master || !node)
2082 return -EINVAL;
2083
2084 ret = of_property_read_u32_array(node, "reg", reg, ARRAY_SIZE(reg));
2085 if (ret)
2086 return ret;
2087
2088 /*
2089 * The manufacturer ID can't be 0. If reg[1] == 0 that means we're
2090 * dealing with an I2C device.
2091 */
2092 if (!reg[1])
2093 ret = of_i3c_master_add_i2c_boardinfo(master, node, reg);
2094 else
2095 ret = of_i3c_master_add_i3c_boardinfo(master, node, reg);
2096
2097 return ret;
2098}
2099
2100static int of_populate_i3c_bus(struct i3c_master_controller *master)
2101{
2102 struct device *dev = &master->dev;
2103 struct device_node *i3cbus_np = dev->of_node;
2104 struct device_node *node;
2105 int ret;
2106 u32 val;
2107
2108 if (!i3cbus_np)
2109 return 0;
2110
2111 for_each_available_child_of_node(i3cbus_np, node) {
2112 ret = of_i3c_master_add_dev(master, node);
2113 if (ret) {
2114 of_node_put(node);
2115 return ret;
2116 }
2117 }
2118
2119 /*
2120 * The user might want to limit I2C and I3C speed in case some devices
2121 * on the bus are not supporting typical rates, or if the bus topology
2122 * prevents it from using max possible rate.
2123 */
2124 if (!of_property_read_u32(i3cbus_np, "i2c-scl-hz", &val))
2125 master->bus.scl_rate.i2c = val;
2126
2127 if (!of_property_read_u32(i3cbus_np, "i3c-scl-hz", &val))
2128 master->bus.scl_rate.i3c = val;
2129
2130 return 0;
2131}
2132
2133static int i3c_master_i2c_adapter_xfer(struct i2c_adapter *adap,
2134 struct i2c_msg *xfers, int nxfers)
2135{
2136 struct i3c_master_controller *master = i2c_adapter_to_i3c_master(adap);
2137 struct i2c_dev_desc *dev;
2138 int i, ret;
2139 u16 addr;
2140
2141 if (!xfers || !master || nxfers <= 0)
2142 return -EINVAL;
2143
2144 if (!master->ops->i2c_xfers)
2145 return -ENOTSUPP;
2146
2147 /* Doing transfers to different devices is not supported. */
2148 addr = xfers[0].addr;
2149 for (i = 1; i < nxfers; i++) {
2150 if (addr != xfers[i].addr)
2151 return -ENOTSUPP;
2152 }
2153
2154 i3c_bus_normaluse_lock(&master->bus);
2155 dev = i3c_master_find_i2c_dev_by_addr(master, addr);
2156 if (!dev)
2157 ret = -ENOENT;
2158 else
2159 ret = master->ops->i2c_xfers(dev, xfers, nxfers);
2160 i3c_bus_normaluse_unlock(&master->bus);
2161
2162 return ret ? ret : nxfers;
2163}
2164
2165static u32 i3c_master_i2c_funcs(struct i2c_adapter *adapter)
2166{
2167 return I2C_FUNC_SMBUS_EMUL | I2C_FUNC_I2C;
2168}
2169
2170static const struct i2c_algorithm i3c_master_i2c_algo = {
2171 .master_xfer = i3c_master_i2c_adapter_xfer,
2172 .functionality = i3c_master_i2c_funcs,
2173};
2174
2175static int i3c_master_i2c_adapter_init(struct i3c_master_controller *master)
2176{
2177 struct i2c_adapter *adap = i3c_master_to_i2c_adapter(master);
2178 struct i2c_dev_desc *i2cdev;
2179 int ret;
2180
2181 adap->dev.parent = master->dev.parent;
2182 adap->owner = master->dev.parent->driver->owner;
2183 adap->algo = &i3c_master_i2c_algo;
2184 strncpy(adap->name, dev_name(master->dev.parent), sizeof(adap->name));
2185
2186 /* FIXME: Should we allow i3c masters to override these values? */
2187 adap->timeout = 1000;
2188 adap->retries = 3;
2189
2190 ret = i2c_add_adapter(adap);
2191 if (ret)
2192 return ret;
2193
2194 /*
2195 * We silently ignore failures here. The bus should keep working
2196 * correctly even if one or more i2c devices are not registered.
2197 */
2198 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2199 i2cdev->dev = i2c_new_client_device(adap, &i2cdev->boardinfo->base);
2200
2201 return 0;
2202}
2203
2204static void i3c_master_i2c_adapter_cleanup(struct i3c_master_controller *master)
2205{
2206 struct i2c_dev_desc *i2cdev;
2207
2208 i2c_del_adapter(&master->i2c);
2209
2210 i3c_bus_for_each_i2cdev(&master->bus, i2cdev)
2211 i2cdev->dev = NULL;
2212}
2213
2214static void i3c_master_unregister_i3c_devs(struct i3c_master_controller *master)
2215{
2216 struct i3c_dev_desc *i3cdev;
2217
2218 i3c_bus_for_each_i3cdev(&master->bus, i3cdev) {
2219 if (!i3cdev->dev)
2220 continue;
2221
2222 i3cdev->dev->desc = NULL;
2223 if (device_is_registered(&i3cdev->dev->dev))
2224 device_unregister(&i3cdev->dev->dev);
2225 else
2226 put_device(&i3cdev->dev->dev);
2227 i3cdev->dev = NULL;
2228 }
2229}
2230
2231/**
2232 * i3c_master_queue_ibi() - Queue an IBI
2233 * @dev: the device this IBI is coming from
2234 * @slot: the IBI slot used to store the payload
2235 *
2236 * Queue an IBI to the controller workqueue. The IBI handler attached to
2237 * the dev will be called from a workqueue context.
2238 */
2239void i3c_master_queue_ibi(struct i3c_dev_desc *dev, struct i3c_ibi_slot *slot)
2240{
2241 atomic_inc(&dev->ibi->pending_ibis);
2242 queue_work(dev->common.master->wq, &slot->work);
2243}
2244EXPORT_SYMBOL_GPL(i3c_master_queue_ibi);
2245
2246static void i3c_master_handle_ibi(struct work_struct *work)
2247{
2248 struct i3c_ibi_slot *slot = container_of(work, struct i3c_ibi_slot,
2249 work);
2250 struct i3c_dev_desc *dev = slot->dev;
2251 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2252 struct i3c_ibi_payload payload;
2253
2254 payload.data = slot->data;
2255 payload.len = slot->len;
2256
2257 if (dev->dev)
2258 dev->ibi->handler(dev->dev, &payload);
2259
2260 master->ops->recycle_ibi_slot(dev, slot);
2261 if (atomic_dec_and_test(&dev->ibi->pending_ibis))
2262 complete(&dev->ibi->all_ibis_handled);
2263}
2264
2265static void i3c_master_init_ibi_slot(struct i3c_dev_desc *dev,
2266 struct i3c_ibi_slot *slot)
2267{
2268 slot->dev = dev;
2269 INIT_WORK(&slot->work, i3c_master_handle_ibi);
2270}
2271
2272struct i3c_generic_ibi_slot {
2273 struct list_head node;
2274 struct i3c_ibi_slot base;
2275};
2276
2277struct i3c_generic_ibi_pool {
2278 spinlock_t lock;
2279 unsigned int num_slots;
2280 struct i3c_generic_ibi_slot *slots;
2281 void *payload_buf;
2282 struct list_head free_slots;
2283 struct list_head pending;
2284};
2285
2286/**
2287 * i3c_generic_ibi_free_pool() - Free a generic IBI pool
2288 * @pool: the IBI pool to free
2289 *
2290 * Free all IBI slots allated by a generic IBI pool.
2291 */
2292void i3c_generic_ibi_free_pool(struct i3c_generic_ibi_pool *pool)
2293{
2294 struct i3c_generic_ibi_slot *slot;
2295 unsigned int nslots = 0;
2296
2297 while (!list_empty(&pool->free_slots)) {
2298 slot = list_first_entry(&pool->free_slots,
2299 struct i3c_generic_ibi_slot, node);
2300 list_del(&slot->node);
2301 nslots++;
2302 }
2303
2304 /*
2305 * If the number of freed slots is not equal to the number of allocated
2306 * slots we have a leak somewhere.
2307 */
2308 WARN_ON(nslots != pool->num_slots);
2309
2310 kfree(pool->payload_buf);
2311 kfree(pool->slots);
2312 kfree(pool);
2313}
2314EXPORT_SYMBOL_GPL(i3c_generic_ibi_free_pool);
2315
2316/**
2317 * i3c_generic_ibi_alloc_pool() - Create a generic IBI pool
2318 * @dev: the device this pool will be used for
2319 * @req: IBI setup request describing what the device driver expects
2320 *
2321 * Create a generic IBI pool based on the information provided in @req.
2322 *
2323 * Return: a valid IBI pool in case of success, an ERR_PTR() otherwise.
2324 */
2325struct i3c_generic_ibi_pool *
2326i3c_generic_ibi_alloc_pool(struct i3c_dev_desc *dev,
2327 const struct i3c_ibi_setup *req)
2328{
2329 struct i3c_generic_ibi_pool *pool;
2330 struct i3c_generic_ibi_slot *slot;
2331 unsigned int i;
2332 int ret;
2333
2334 pool = kzalloc(sizeof(*pool), GFP_KERNEL);
2335 if (!pool)
2336 return ERR_PTR(-ENOMEM);
2337
2338 spin_lock_init(&pool->lock);
2339 INIT_LIST_HEAD(&pool->free_slots);
2340 INIT_LIST_HEAD(&pool->pending);
2341
2342 pool->slots = kcalloc(req->num_slots, sizeof(*slot), GFP_KERNEL);
2343 if (!pool->slots) {
2344 ret = -ENOMEM;
2345 goto err_free_pool;
2346 }
2347
2348 if (req->max_payload_len) {
2349 pool->payload_buf = kcalloc(req->num_slots,
2350 req->max_payload_len, GFP_KERNEL);
2351 if (!pool->payload_buf) {
2352 ret = -ENOMEM;
2353 goto err_free_pool;
2354 }
2355 }
2356
2357 for (i = 0; i < req->num_slots; i++) {
2358 slot = &pool->slots[i];
2359 i3c_master_init_ibi_slot(dev, &slot->base);
2360
2361 if (req->max_payload_len)
2362 slot->base.data = pool->payload_buf +
2363 (i * req->max_payload_len);
2364
2365 list_add_tail(&slot->node, &pool->free_slots);
2366 pool->num_slots++;
2367 }
2368
2369 return pool;
2370
2371err_free_pool:
2372 i3c_generic_ibi_free_pool(pool);
2373 return ERR_PTR(ret);
2374}
2375EXPORT_SYMBOL_GPL(i3c_generic_ibi_alloc_pool);
2376
2377/**
2378 * i3c_generic_ibi_get_free_slot() - Get a free slot from a generic IBI pool
2379 * @pool: the pool to query an IBI slot on
2380 *
2381 * Search for a free slot in a generic IBI pool.
2382 * The slot should be returned to the pool using i3c_generic_ibi_recycle_slot()
2383 * when it's no longer needed.
2384 *
2385 * Return: a pointer to a free slot, or NULL if there's no free slot available.
2386 */
2387struct i3c_ibi_slot *
2388i3c_generic_ibi_get_free_slot(struct i3c_generic_ibi_pool *pool)
2389{
2390 struct i3c_generic_ibi_slot *slot;
2391 unsigned long flags;
2392
2393 spin_lock_irqsave(&pool->lock, flags);
2394 slot = list_first_entry_or_null(&pool->free_slots,
2395 struct i3c_generic_ibi_slot, node);
2396 if (slot)
2397 list_del(&slot->node);
2398 spin_unlock_irqrestore(&pool->lock, flags);
2399
2400 return slot ? &slot->base : NULL;
2401}
2402EXPORT_SYMBOL_GPL(i3c_generic_ibi_get_free_slot);
2403
2404/**
2405 * i3c_generic_ibi_recycle_slot() - Return a slot to a generic IBI pool
2406 * @pool: the pool to return the IBI slot to
2407 * @s: IBI slot to recycle
2408 *
2409 * Add an IBI slot back to its generic IBI pool. Should be called from the
2410 * master driver struct_master_controller_ops->recycle_ibi() method.
2411 */
2412void i3c_generic_ibi_recycle_slot(struct i3c_generic_ibi_pool *pool,
2413 struct i3c_ibi_slot *s)
2414{
2415 struct i3c_generic_ibi_slot *slot;
2416 unsigned long flags;
2417
2418 if (!s)
2419 return;
2420
2421 slot = container_of(s, struct i3c_generic_ibi_slot, base);
2422 spin_lock_irqsave(&pool->lock, flags);
2423 list_add_tail(&slot->node, &pool->free_slots);
2424 spin_unlock_irqrestore(&pool->lock, flags);
2425}
2426EXPORT_SYMBOL_GPL(i3c_generic_ibi_recycle_slot);
2427
2428static int i3c_master_check_ops(const struct i3c_master_controller_ops *ops)
2429{
2430 if (!ops || !ops->bus_init || !ops->priv_xfers ||
2431 !ops->send_ccc_cmd || !ops->do_daa || !ops->i2c_xfers)
2432 return -EINVAL;
2433
2434 if (ops->request_ibi &&
2435 (!ops->enable_ibi || !ops->disable_ibi || !ops->free_ibi ||
2436 !ops->recycle_ibi_slot))
2437 return -EINVAL;
2438
2439 return 0;
2440}
2441
2442/**
2443 * i3c_master_register() - register an I3C master
2444 * @master: master used to send frames on the bus
2445 * @parent: the parent device (the one that provides this I3C master
2446 * controller)
2447 * @ops: the master controller operations
2448 * @secondary: true if you are registering a secondary master. Will return
2449 * -ENOTSUPP if set to true since secondary masters are not yet
2450 * supported
2451 *
2452 * This function takes care of everything for you:
2453 *
2454 * - creates and initializes the I3C bus
2455 * - populates the bus with static I2C devs if @parent->of_node is not
2456 * NULL
2457 * - registers all I3C devices added by the controller during bus
2458 * initialization
2459 * - registers the I2C adapter and all I2C devices
2460 *
2461 * Return: 0 in case of success, a negative error code otherwise.
2462 */
2463int i3c_master_register(struct i3c_master_controller *master,
2464 struct device *parent,
2465 const struct i3c_master_controller_ops *ops,
2466 bool secondary)
2467{
2468 unsigned long i2c_scl_rate = I3C_BUS_I2C_FM_PLUS_SCL_RATE;
2469 struct i3c_bus *i3cbus = i3c_master_get_bus(master);
2470 enum i3c_bus_mode mode = I3C_BUS_MODE_PURE;
2471 struct i2c_dev_boardinfo *i2cbi;
2472 int ret;
2473
2474 /* We do not support secondary masters yet. */
2475 if (secondary)
2476 return -ENOTSUPP;
2477
2478 ret = i3c_master_check_ops(ops);
2479 if (ret)
2480 return ret;
2481
2482 master->dev.parent = parent;
2483 master->dev.of_node = of_node_get(parent->of_node);
2484 master->dev.bus = &i3c_bus_type;
2485 master->dev.type = &i3c_masterdev_type;
2486 master->dev.release = i3c_masterdev_release;
2487 master->ops = ops;
2488 master->secondary = secondary;
2489 INIT_LIST_HEAD(&master->boardinfo.i2c);
2490 INIT_LIST_HEAD(&master->boardinfo.i3c);
2491
2492 ret = i3c_bus_init(i3cbus);
2493 if (ret)
2494 return ret;
2495
2496 device_initialize(&master->dev);
2497 dev_set_name(&master->dev, "i3c-%d", i3cbus->id);
2498
2499 ret = of_populate_i3c_bus(master);
2500 if (ret)
2501 goto err_put_dev;
2502
2503 list_for_each_entry(i2cbi, &master->boardinfo.i2c, node) {
2504 switch (i2cbi->lvr & I3C_LVR_I2C_INDEX_MASK) {
2505 case I3C_LVR_I2C_INDEX(0):
2506 if (mode < I3C_BUS_MODE_MIXED_FAST)
2507 mode = I3C_BUS_MODE_MIXED_FAST;
2508 break;
2509 case I3C_LVR_I2C_INDEX(1):
2510 if (mode < I3C_BUS_MODE_MIXED_LIMITED)
2511 mode = I3C_BUS_MODE_MIXED_LIMITED;
2512 break;
2513 case I3C_LVR_I2C_INDEX(2):
2514 if (mode < I3C_BUS_MODE_MIXED_SLOW)
2515 mode = I3C_BUS_MODE_MIXED_SLOW;
2516 break;
2517 default:
2518 ret = -EINVAL;
2519 goto err_put_dev;
2520 }
2521
2522 if (i2cbi->lvr & I3C_LVR_I2C_FM_MODE)
2523 i2c_scl_rate = I3C_BUS_I2C_FM_SCL_RATE;
2524 }
2525
2526 ret = i3c_bus_set_mode(i3cbus, mode, i2c_scl_rate);
2527 if (ret)
2528 goto err_put_dev;
2529
2530 master->wq = alloc_workqueue("%s", 0, 0, dev_name(parent));
2531 if (!master->wq) {
2532 ret = -ENOMEM;
2533 goto err_put_dev;
2534 }
2535
2536 ret = i3c_master_bus_init(master);
2537 if (ret)
2538 goto err_put_dev;
2539
2540 ret = device_add(&master->dev);
2541 if (ret)
2542 goto err_cleanup_bus;
2543
2544 /*
2545 * Expose our I3C bus as an I2C adapter so that I2C devices are exposed
2546 * through the I2C subsystem.
2547 */
2548 ret = i3c_master_i2c_adapter_init(master);
2549 if (ret)
2550 goto err_del_dev;
2551
2552 /*
2553 * We're done initializing the bus and the controller, we can now
2554 * register I3C devices discovered during the initial DAA.
2555 */
2556 master->init_done = true;
2557 i3c_bus_normaluse_lock(&master->bus);
2558 i3c_master_register_new_i3c_devs(master);
2559 i3c_bus_normaluse_unlock(&master->bus);
2560
2561 return 0;
2562
2563err_del_dev:
2564 device_del(&master->dev);
2565
2566err_cleanup_bus:
2567 i3c_master_bus_cleanup(master);
2568
2569err_put_dev:
2570 put_device(&master->dev);
2571
2572 return ret;
2573}
2574EXPORT_SYMBOL_GPL(i3c_master_register);
2575
2576/**
2577 * i3c_master_unregister() - unregister an I3C master
2578 * @master: master used to send frames on the bus
2579 *
2580 * Basically undo everything done in i3c_master_register().
2581 *
2582 * Return: 0 in case of success, a negative error code otherwise.
2583 */
2584int i3c_master_unregister(struct i3c_master_controller *master)
2585{
2586 i3c_master_i2c_adapter_cleanup(master);
2587 i3c_master_unregister_i3c_devs(master);
2588 i3c_master_bus_cleanup(master);
2589 device_unregister(&master->dev);
2590
2591 return 0;
2592}
2593EXPORT_SYMBOL_GPL(i3c_master_unregister);
2594
2595int i3c_dev_do_priv_xfers_locked(struct i3c_dev_desc *dev,
2596 struct i3c_priv_xfer *xfers,
2597 int nxfers)
2598{
2599 struct i3c_master_controller *master;
2600
2601 if (!dev)
2602 return -ENOENT;
2603
2604 master = i3c_dev_get_master(dev);
2605 if (!master || !xfers)
2606 return -EINVAL;
2607
2608 if (!master->ops->priv_xfers)
2609 return -ENOTSUPP;
2610
2611 return master->ops->priv_xfers(dev, xfers, nxfers);
2612}
2613
2614int i3c_dev_disable_ibi_locked(struct i3c_dev_desc *dev)
2615{
2616 struct i3c_master_controller *master;
2617 int ret;
2618
2619 if (!dev->ibi)
2620 return -EINVAL;
2621
2622 master = i3c_dev_get_master(dev);
2623 ret = master->ops->disable_ibi(dev);
2624 if (ret)
2625 return ret;
2626
2627 reinit_completion(&dev->ibi->all_ibis_handled);
2628 if (atomic_read(&dev->ibi->pending_ibis))
2629 wait_for_completion(&dev->ibi->all_ibis_handled);
2630
2631 dev->ibi->enabled = false;
2632
2633 return 0;
2634}
2635
2636int i3c_dev_enable_ibi_locked(struct i3c_dev_desc *dev)
2637{
2638 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2639 int ret;
2640
2641 if (!dev->ibi)
2642 return -EINVAL;
2643
2644 ret = master->ops->enable_ibi(dev);
2645 if (!ret)
2646 dev->ibi->enabled = true;
2647
2648 return ret;
2649}
2650
2651int i3c_dev_request_ibi_locked(struct i3c_dev_desc *dev,
2652 const struct i3c_ibi_setup *req)
2653{
2654 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2655 struct i3c_device_ibi_info *ibi;
2656 int ret;
2657
2658 if (!master->ops->request_ibi)
2659 return -ENOTSUPP;
2660
2661 if (dev->ibi)
2662 return -EBUSY;
2663
2664 ibi = kzalloc(sizeof(*ibi), GFP_KERNEL);
2665 if (!ibi)
2666 return -ENOMEM;
2667
2668 atomic_set(&ibi->pending_ibis, 0);
2669 init_completion(&ibi->all_ibis_handled);
2670 ibi->handler = req->handler;
2671 ibi->max_payload_len = req->max_payload_len;
2672 ibi->num_slots = req->num_slots;
2673
2674 dev->ibi = ibi;
2675 ret = master->ops->request_ibi(dev, req);
2676 if (ret) {
2677 kfree(ibi);
2678 dev->ibi = NULL;
2679 }
2680
2681 return ret;
2682}
2683
2684void i3c_dev_free_ibi_locked(struct i3c_dev_desc *dev)
2685{
2686 struct i3c_master_controller *master = i3c_dev_get_master(dev);
2687
2688 if (!dev->ibi)
2689 return;
2690
2691 if (WARN_ON(dev->ibi->enabled))
2692 WARN_ON(i3c_dev_disable_ibi_locked(dev));
2693
2694 master->ops->free_ibi(dev);
2695 kfree(dev->ibi);
2696 dev->ibi = NULL;
2697}
2698
2699static int __init i3c_init(void)
2700{
2701 return bus_register(&i3c_bus_type);
2702}
2703subsys_initcall(i3c_init);
2704
2705static void __exit i3c_exit(void)
2706{
2707 idr_destroy(&i3c_bus_idr);
2708 bus_unregister(&i3c_bus_type);
2709}
2710module_exit(i3c_exit);
2711
2712MODULE_AUTHOR("Boris Brezillon <boris.brezillon@bootlin.com>");
2713MODULE_DESCRIPTION("I3C core");
2714MODULE_LICENSE("GPL v2");