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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * ZynqMP DisplayPort Subsystem Driver
4 *
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
6 *
7 * Authors:
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 */
11
12#include <linux/clk.h>
13#include <linux/dma-mapping.h>
14#include <linux/module.h>
15#include <linux/of_graph.h>
16#include <linux/of_reserved_mem.h>
17#include <linux/platform_device.h>
18#include <linux/pm_runtime.h>
19#include <linux/slab.h>
20
21#include <drm/drm_atomic_helper.h>
22#include <drm/drm_bridge.h>
23#include <drm/drm_modeset_helper.h>
24#include <drm/drm_module.h>
25
26#include "zynqmp_disp.h"
27#include "zynqmp_dp.h"
28#include "zynqmp_dpsub.h"
29#include "zynqmp_kms.h"
30
31/* -----------------------------------------------------------------------------
32 * Power Management
33 */
34
35static int __maybe_unused zynqmp_dpsub_suspend(struct device *dev)
36{
37 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
38
39 if (!dpsub->drm)
40 return 0;
41
42 return drm_mode_config_helper_suspend(&dpsub->drm->dev);
43}
44
45static int __maybe_unused zynqmp_dpsub_resume(struct device *dev)
46{
47 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
48
49 if (!dpsub->drm)
50 return 0;
51
52 return drm_mode_config_helper_resume(&dpsub->drm->dev);
53}
54
55static const struct dev_pm_ops zynqmp_dpsub_pm_ops = {
56 SET_SYSTEM_SLEEP_PM_OPS(zynqmp_dpsub_suspend, zynqmp_dpsub_resume)
57};
58
59/* -----------------------------------------------------------------------------
60 * DPSUB Configuration
61 */
62
63/**
64 * zynqmp_dpsub_audio_enabled - If the audio is enabled
65 * @dpsub: DisplayPort subsystem
66 *
67 * Return if the audio is enabled depending on the audio clock.
68 *
69 * Return: true if audio is enabled, or false.
70 */
71bool zynqmp_dpsub_audio_enabled(struct zynqmp_dpsub *dpsub)
72{
73 return !!dpsub->aud_clk;
74}
75
76/**
77 * zynqmp_dpsub_get_audio_clk_rate - Get the current audio clock rate
78 * @dpsub: DisplayPort subsystem
79 *
80 * Return: the current audio clock rate.
81 */
82unsigned int zynqmp_dpsub_get_audio_clk_rate(struct zynqmp_dpsub *dpsub)
83{
84 if (zynqmp_dpsub_audio_enabled(dpsub))
85 return 0;
86 return clk_get_rate(dpsub->aud_clk);
87}
88
89/* -----------------------------------------------------------------------------
90 * Probe & Remove
91 */
92
93static int zynqmp_dpsub_init_clocks(struct zynqmp_dpsub *dpsub)
94{
95 int ret;
96
97 dpsub->apb_clk = devm_clk_get(dpsub->dev, "dp_apb_clk");
98 if (IS_ERR(dpsub->apb_clk))
99 return PTR_ERR(dpsub->apb_clk);
100
101 ret = clk_prepare_enable(dpsub->apb_clk);
102 if (ret) {
103 dev_err(dpsub->dev, "failed to enable the APB clock\n");
104 return ret;
105 }
106
107 /*
108 * Try the live PL video clock, and fall back to the PS clock if the
109 * live PL video clock isn't valid.
110 */
111 dpsub->vid_clk = devm_clk_get(dpsub->dev, "dp_live_video_in_clk");
112 if (!IS_ERR(dpsub->vid_clk))
113 dpsub->vid_clk_from_ps = false;
114 else if (PTR_ERR(dpsub->vid_clk) == -EPROBE_DEFER)
115 return PTR_ERR(dpsub->vid_clk);
116
117 if (IS_ERR_OR_NULL(dpsub->vid_clk)) {
118 dpsub->vid_clk = devm_clk_get(dpsub->dev, "dp_vtc_pixel_clk_in");
119 if (IS_ERR(dpsub->vid_clk)) {
120 dev_err(dpsub->dev, "failed to init any video clock\n");
121 return PTR_ERR(dpsub->vid_clk);
122 }
123 dpsub->vid_clk_from_ps = true;
124 }
125
126 /*
127 * Try the live PL audio clock, and fall back to the PS clock if the
128 * live PL audio clock isn't valid. Missing audio clock disables audio
129 * but isn't an error.
130 */
131 dpsub->aud_clk = devm_clk_get(dpsub->dev, "dp_live_audio_aclk");
132 if (!IS_ERR(dpsub->aud_clk)) {
133 dpsub->aud_clk_from_ps = false;
134 return 0;
135 }
136
137 dpsub->aud_clk = devm_clk_get(dpsub->dev, "dp_aud_clk");
138 if (!IS_ERR(dpsub->aud_clk)) {
139 dpsub->aud_clk_from_ps = true;
140 return 0;
141 }
142
143 dev_info(dpsub->dev, "audio disabled due to missing clock\n");
144 return 0;
145}
146
147static int zynqmp_dpsub_parse_dt(struct zynqmp_dpsub *dpsub)
148{
149 struct device_node *np;
150 unsigned int i;
151
152 /*
153 * For backward compatibility with old device trees that don't contain
154 * ports, consider that only the DP output port is connected if no
155 * ports child no exists.
156 */
157 np = of_get_child_by_name(dpsub->dev->of_node, "ports");
158 of_node_put(np);
159 if (!np) {
160 dev_warn(dpsub->dev, "missing ports, update DT bindings\n");
161 dpsub->connected_ports = BIT(ZYNQMP_DPSUB_PORT_OUT_DP);
162 dpsub->dma_enabled = true;
163 return 0;
164 }
165
166 /* Check which ports are connected. */
167 for (i = 0; i < ZYNQMP_DPSUB_NUM_PORTS; ++i) {
168 struct device_node *np;
169
170 np = of_graph_get_remote_node(dpsub->dev->of_node, i, -1);
171 if (np) {
172 dpsub->connected_ports |= BIT(i);
173 of_node_put(np);
174 }
175 }
176
177 /* Sanity checks. */
178 if ((dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO)) &&
179 (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_GFX))) {
180 dev_err(dpsub->dev, "only one live video input is supported\n");
181 return -EINVAL;
182 }
183
184 if ((dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_VIDEO)) ||
185 (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_GFX))) {
186 if (dpsub->vid_clk_from_ps) {
187 dev_err(dpsub->dev,
188 "live video input requires PL clock\n");
189 return -EINVAL;
190 }
191 } else {
192 dpsub->dma_enabled = true;
193 }
194
195 if (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_LIVE_AUDIO))
196 dev_warn(dpsub->dev, "live audio unsupported, ignoring\n");
197
198 if ((dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_OUT_VIDEO)) ||
199 (dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_OUT_AUDIO)))
200 dev_warn(dpsub->dev, "output to PL unsupported, ignoring\n");
201
202 if (!(dpsub->connected_ports & BIT(ZYNQMP_DPSUB_PORT_OUT_DP))) {
203 dev_err(dpsub->dev, "DP output port not connected\n");
204 return -EINVAL;
205 }
206
207 return 0;
208}
209
210void zynqmp_dpsub_release(struct zynqmp_dpsub *dpsub)
211{
212 kfree(dpsub->disp);
213 kfree(dpsub->dp);
214 kfree(dpsub);
215}
216
217static int zynqmp_dpsub_probe(struct platform_device *pdev)
218{
219 struct zynqmp_dpsub *dpsub;
220 int ret;
221
222 /* Allocate private data. */
223 dpsub = kzalloc(sizeof(*dpsub), GFP_KERNEL);
224 if (!dpsub)
225 return -ENOMEM;
226
227 dpsub->dev = &pdev->dev;
228 platform_set_drvdata(pdev, dpsub);
229
230 ret = dma_set_mask(dpsub->dev, DMA_BIT_MASK(ZYNQMP_DISP_MAX_DMA_BIT));
231 if (ret)
232 return ret;
233
234 /* Try the reserved memory. Proceed if there's none. */
235 of_reserved_mem_device_init(&pdev->dev);
236
237 ret = zynqmp_dpsub_init_clocks(dpsub);
238 if (ret < 0)
239 goto err_mem;
240
241 ret = zynqmp_dpsub_parse_dt(dpsub);
242 if (ret < 0)
243 goto err_mem;
244
245 pm_runtime_enable(&pdev->dev);
246
247 /*
248 * DP should be probed first so that the zynqmp_disp can set the output
249 * format accordingly.
250 */
251 ret = zynqmp_dp_probe(dpsub);
252 if (ret)
253 goto err_pm;
254
255 ret = zynqmp_disp_probe(dpsub);
256 if (ret)
257 goto err_dp;
258
259 drm_bridge_add(dpsub->bridge);
260
261 if (dpsub->dma_enabled) {
262 ret = zynqmp_dpsub_drm_init(dpsub);
263 if (ret)
264 goto err_disp;
265 }
266
267 dev_info(&pdev->dev, "ZynqMP DisplayPort Subsystem driver probed");
268
269 return 0;
270
271err_disp:
272 drm_bridge_remove(dpsub->bridge);
273 zynqmp_disp_remove(dpsub);
274err_dp:
275 zynqmp_dp_remove(dpsub);
276err_pm:
277 pm_runtime_disable(&pdev->dev);
278 clk_disable_unprepare(dpsub->apb_clk);
279err_mem:
280 of_reserved_mem_device_release(&pdev->dev);
281 if (!dpsub->drm)
282 zynqmp_dpsub_release(dpsub);
283 return ret;
284}
285
286static void zynqmp_dpsub_remove(struct platform_device *pdev)
287{
288 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
289
290 if (dpsub->drm)
291 zynqmp_dpsub_drm_cleanup(dpsub);
292
293 drm_bridge_remove(dpsub->bridge);
294 zynqmp_disp_remove(dpsub);
295 zynqmp_dp_remove(dpsub);
296
297 pm_runtime_disable(&pdev->dev);
298 clk_disable_unprepare(dpsub->apb_clk);
299 of_reserved_mem_device_release(&pdev->dev);
300
301 if (!dpsub->drm)
302 zynqmp_dpsub_release(dpsub);
303}
304
305static void zynqmp_dpsub_shutdown(struct platform_device *pdev)
306{
307 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
308
309 if (!dpsub->drm)
310 return;
311
312 drm_atomic_helper_shutdown(&dpsub->drm->dev);
313}
314
315static const struct of_device_id zynqmp_dpsub_of_match[] = {
316 { .compatible = "xlnx,zynqmp-dpsub-1.7", },
317 { /* end of table */ },
318};
319MODULE_DEVICE_TABLE(of, zynqmp_dpsub_of_match);
320
321static struct platform_driver zynqmp_dpsub_driver = {
322 .probe = zynqmp_dpsub_probe,
323 .remove = zynqmp_dpsub_remove,
324 .shutdown = zynqmp_dpsub_shutdown,
325 .driver = {
326 .name = "zynqmp-dpsub",
327 .pm = &zynqmp_dpsub_pm_ops,
328 .of_match_table = zynqmp_dpsub_of_match,
329 },
330};
331
332drm_module_platform_driver(zynqmp_dpsub_driver);
333
334MODULE_AUTHOR("Xilinx, Inc.");
335MODULE_DESCRIPTION("ZynqMP DP Subsystem Driver");
336MODULE_LICENSE("GPL v2");
1// SPDX-License-Identifier: GPL-2.0
2/*
3 * ZynqMP DisplayPort Subsystem Driver
4 *
5 * Copyright (C) 2017 - 2020 Xilinx, Inc.
6 *
7 * Authors:
8 * - Hyun Woo Kwon <hyun.kwon@xilinx.com>
9 * - Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10 */
11
12#include <linux/clk.h>
13#include <linux/dma-mapping.h>
14#include <linux/module.h>
15#include <linux/of_reserved_mem.h>
16#include <linux/platform_device.h>
17#include <linux/pm_runtime.h>
18
19#include <drm/drm_atomic_helper.h>
20#include <drm/drm_device.h>
21#include <drm/drm_drv.h>
22#include <drm/drm_fb_helper.h>
23#include <drm/drm_fourcc.h>
24#include <drm/drm_gem_cma_helper.h>
25#include <drm/drm_gem_framebuffer_helper.h>
26#include <drm/drm_managed.h>
27#include <drm/drm_mode_config.h>
28#include <drm/drm_probe_helper.h>
29#include <drm/drm_vblank.h>
30
31#include "zynqmp_disp.h"
32#include "zynqmp_dp.h"
33#include "zynqmp_dpsub.h"
34
35/* -----------------------------------------------------------------------------
36 * Dumb Buffer & Framebuffer Allocation
37 */
38
39static int zynqmp_dpsub_dumb_create(struct drm_file *file_priv,
40 struct drm_device *drm,
41 struct drm_mode_create_dumb *args)
42{
43 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
44 unsigned int pitch = DIV_ROUND_UP(args->width * args->bpp, 8);
45
46 /* Enforce the alignment constraints of the DMA engine. */
47 args->pitch = ALIGN(pitch, dpsub->dma_align);
48
49 return drm_gem_cma_dumb_create_internal(file_priv, drm, args);
50}
51
52static struct drm_framebuffer *
53zynqmp_dpsub_fb_create(struct drm_device *drm, struct drm_file *file_priv,
54 const struct drm_mode_fb_cmd2 *mode_cmd)
55{
56 struct zynqmp_dpsub *dpsub = to_zynqmp_dpsub(drm);
57 struct drm_mode_fb_cmd2 cmd = *mode_cmd;
58 unsigned int i;
59
60 /* Enforce the alignment constraints of the DMA engine. */
61 for (i = 0; i < ARRAY_SIZE(cmd.pitches); ++i)
62 cmd.pitches[i] = ALIGN(cmd.pitches[i], dpsub->dma_align);
63
64 return drm_gem_fb_create(drm, file_priv, &cmd);
65}
66
67static const struct drm_mode_config_funcs zynqmp_dpsub_mode_config_funcs = {
68 .fb_create = zynqmp_dpsub_fb_create,
69 .atomic_check = drm_atomic_helper_check,
70 .atomic_commit = drm_atomic_helper_commit,
71};
72
73/* -----------------------------------------------------------------------------
74 * DRM/KMS Driver
75 */
76
77DEFINE_DRM_GEM_CMA_FOPS(zynqmp_dpsub_drm_fops);
78
79static const struct drm_driver zynqmp_dpsub_drm_driver = {
80 .driver_features = DRIVER_MODESET | DRIVER_GEM |
81 DRIVER_ATOMIC,
82
83 DRM_GEM_CMA_DRIVER_OPS_WITH_DUMB_CREATE(zynqmp_dpsub_dumb_create),
84
85 .fops = &zynqmp_dpsub_drm_fops,
86
87 .name = "zynqmp-dpsub",
88 .desc = "Xilinx DisplayPort Subsystem Driver",
89 .date = "20130509",
90 .major = 1,
91 .minor = 0,
92};
93
94static int zynqmp_dpsub_drm_init(struct zynqmp_dpsub *dpsub)
95{
96 struct drm_device *drm = &dpsub->drm;
97 int ret;
98
99 /* Initialize mode config, vblank and the KMS poll helper. */
100 ret = drmm_mode_config_init(drm);
101 if (ret < 0)
102 return ret;
103
104 drm->mode_config.funcs = &zynqmp_dpsub_mode_config_funcs;
105 drm->mode_config.min_width = 0;
106 drm->mode_config.min_height = 0;
107 drm->mode_config.max_width = ZYNQMP_DISP_MAX_WIDTH;
108 drm->mode_config.max_height = ZYNQMP_DISP_MAX_HEIGHT;
109
110 ret = drm_vblank_init(drm, 1);
111 if (ret)
112 return ret;
113
114 drm->irq_enabled = 1;
115
116 drm_kms_helper_poll_init(drm);
117
118 /*
119 * Initialize the DISP and DP components. This will creates planes,
120 * CRTC, encoder and connector. The DISP should be initialized first as
121 * the DP encoder needs the CRTC.
122 */
123 ret = zynqmp_disp_drm_init(dpsub);
124 if (ret)
125 goto err_poll_fini;
126
127 ret = zynqmp_dp_drm_init(dpsub);
128 if (ret)
129 goto err_poll_fini;
130
131 /* Reset all components and register the DRM device. */
132 drm_mode_config_reset(drm);
133
134 ret = drm_dev_register(drm, 0);
135 if (ret < 0)
136 goto err_poll_fini;
137
138 /* Initialize fbdev generic emulation. */
139 drm_fbdev_generic_setup(drm, 24);
140
141 return 0;
142
143err_poll_fini:
144 drm_kms_helper_poll_fini(drm);
145 return ret;
146}
147
148/* -----------------------------------------------------------------------------
149 * Power Management
150 */
151
152static int __maybe_unused zynqmp_dpsub_suspend(struct device *dev)
153{
154 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
155
156 return drm_mode_config_helper_suspend(&dpsub->drm);
157}
158
159static int __maybe_unused zynqmp_dpsub_resume(struct device *dev)
160{
161 struct zynqmp_dpsub *dpsub = dev_get_drvdata(dev);
162
163 return drm_mode_config_helper_resume(&dpsub->drm);
164}
165
166static const struct dev_pm_ops zynqmp_dpsub_pm_ops = {
167 SET_SYSTEM_SLEEP_PM_OPS(zynqmp_dpsub_suspend, zynqmp_dpsub_resume)
168};
169
170/* -----------------------------------------------------------------------------
171 * Probe & Remove
172 */
173
174static int zynqmp_dpsub_init_clocks(struct zynqmp_dpsub *dpsub)
175{
176 int ret;
177
178 dpsub->apb_clk = devm_clk_get(dpsub->dev, "dp_apb_clk");
179 if (IS_ERR(dpsub->apb_clk))
180 return PTR_ERR(dpsub->apb_clk);
181
182 ret = clk_prepare_enable(dpsub->apb_clk);
183 if (ret) {
184 dev_err(dpsub->dev, "failed to enable the APB clock\n");
185 return ret;
186 }
187
188 return 0;
189}
190
191static int zynqmp_dpsub_probe(struct platform_device *pdev)
192{
193 struct zynqmp_dpsub *dpsub;
194 int ret;
195
196 /* Allocate private data. */
197 dpsub = devm_drm_dev_alloc(&pdev->dev, &zynqmp_dpsub_drm_driver,
198 struct zynqmp_dpsub, drm);
199 if (IS_ERR(dpsub))
200 return PTR_ERR(dpsub);
201
202 dpsub->dev = &pdev->dev;
203 platform_set_drvdata(pdev, dpsub);
204
205 dma_set_mask(dpsub->dev, DMA_BIT_MASK(ZYNQMP_DISP_MAX_DMA_BIT));
206
207 /* Try the reserved memory. Proceed if there's none. */
208 of_reserved_mem_device_init(&pdev->dev);
209
210 ret = zynqmp_dpsub_init_clocks(dpsub);
211 if (ret < 0)
212 goto err_mem;
213
214 pm_runtime_enable(&pdev->dev);
215
216 /*
217 * DP should be probed first so that the zynqmp_disp can set the output
218 * format accordingly.
219 */
220 ret = zynqmp_dp_probe(dpsub, &dpsub->drm);
221 if (ret)
222 goto err_pm;
223
224 ret = zynqmp_disp_probe(dpsub, &dpsub->drm);
225 if (ret)
226 goto err_dp;
227
228 ret = zynqmp_dpsub_drm_init(dpsub);
229 if (ret)
230 goto err_disp;
231
232 dev_info(&pdev->dev, "ZynqMP DisplayPort Subsystem driver probed");
233
234 return 0;
235
236err_disp:
237 zynqmp_disp_remove(dpsub);
238err_dp:
239 zynqmp_dp_remove(dpsub);
240err_pm:
241 pm_runtime_disable(&pdev->dev);
242 clk_disable_unprepare(dpsub->apb_clk);
243err_mem:
244 of_reserved_mem_device_release(&pdev->dev);
245 return ret;
246}
247
248static int zynqmp_dpsub_remove(struct platform_device *pdev)
249{
250 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
251 struct drm_device *drm = &dpsub->drm;
252
253 drm_dev_unregister(drm);
254 drm_atomic_helper_shutdown(drm);
255 drm_kms_helper_poll_fini(drm);
256
257 zynqmp_disp_remove(dpsub);
258 zynqmp_dp_remove(dpsub);
259
260 pm_runtime_disable(&pdev->dev);
261 clk_disable_unprepare(dpsub->apb_clk);
262 of_reserved_mem_device_release(&pdev->dev);
263
264 return 0;
265}
266
267static void zynqmp_dpsub_shutdown(struct platform_device *pdev)
268{
269 struct zynqmp_dpsub *dpsub = platform_get_drvdata(pdev);
270
271 drm_atomic_helper_shutdown(&dpsub->drm);
272}
273
274static const struct of_device_id zynqmp_dpsub_of_match[] = {
275 { .compatible = "xlnx,zynqmp-dpsub-1.7", },
276 { /* end of table */ },
277};
278MODULE_DEVICE_TABLE(of, zynqmp_dpsub_of_match);
279
280static struct platform_driver zynqmp_dpsub_driver = {
281 .probe = zynqmp_dpsub_probe,
282 .remove = zynqmp_dpsub_remove,
283 .shutdown = zynqmp_dpsub_shutdown,
284 .driver = {
285 .name = "zynqmp-dpsub",
286 .pm = &zynqmp_dpsub_pm_ops,
287 .of_match_table = zynqmp_dpsub_of_match,
288 },
289};
290
291module_platform_driver(zynqmp_dpsub_driver);
292
293MODULE_AUTHOR("Xilinx, Inc.");
294MODULE_DESCRIPTION("ZynqMP DP Subsystem Driver");
295MODULE_LICENSE("GPL v2");