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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for Regulator part of Palmas PMIC Chips
4 *
5 * Copyright 2011-2013 Texas Instruments Inc.
6 *
7 * Author: Graeme Gregory <gg@slimlogic.co.uk>
8 * Author: Ian Lartey <ian@slimlogic.co.uk>
9 */
10
11#include <linux/kernel.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/err.h>
15#include <linux/platform_device.h>
16#include <linux/regulator/driver.h>
17#include <linux/regulator/machine.h>
18#include <linux/slab.h>
19#include <linux/regmap.h>
20#include <linux/mfd/palmas.h>
21#include <linux/of.h>
22#include <linux/regulator/of_regulator.h>
23
24static const struct linear_range smps_low_ranges[] = {
25 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
26 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
27 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
28 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
29};
30
31static const struct linear_range smps_high_ranges[] = {
32 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
33 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
34 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
35 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
36};
37
38static struct palmas_regs_info palmas_generic_regs_info[] = {
39 {
40 .name = "SMPS12",
41 .sname = "smps1-in",
42 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
43 .ctrl_addr = PALMAS_SMPS12_CTRL,
44 .tstep_addr = PALMAS_SMPS12_TSTEP,
45 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
46 },
47 {
48 .name = "SMPS123",
49 .sname = "smps1-in",
50 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
51 .ctrl_addr = PALMAS_SMPS12_CTRL,
52 .tstep_addr = PALMAS_SMPS12_TSTEP,
53 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
54 },
55 {
56 .name = "SMPS3",
57 .sname = "smps3-in",
58 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
59 .ctrl_addr = PALMAS_SMPS3_CTRL,
60 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
61 },
62 {
63 .name = "SMPS45",
64 .sname = "smps4-in",
65 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
66 .ctrl_addr = PALMAS_SMPS45_CTRL,
67 .tstep_addr = PALMAS_SMPS45_TSTEP,
68 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
69 },
70 {
71 .name = "SMPS457",
72 .sname = "smps4-in",
73 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
74 .ctrl_addr = PALMAS_SMPS45_CTRL,
75 .tstep_addr = PALMAS_SMPS45_TSTEP,
76 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
77 },
78 {
79 .name = "SMPS6",
80 .sname = "smps6-in",
81 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
82 .ctrl_addr = PALMAS_SMPS6_CTRL,
83 .tstep_addr = PALMAS_SMPS6_TSTEP,
84 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
85 },
86 {
87 .name = "SMPS7",
88 .sname = "smps7-in",
89 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
90 .ctrl_addr = PALMAS_SMPS7_CTRL,
91 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
92 },
93 {
94 .name = "SMPS8",
95 .sname = "smps8-in",
96 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
97 .ctrl_addr = PALMAS_SMPS8_CTRL,
98 .tstep_addr = PALMAS_SMPS8_TSTEP,
99 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
100 },
101 {
102 .name = "SMPS9",
103 .sname = "smps9-in",
104 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
105 .ctrl_addr = PALMAS_SMPS9_CTRL,
106 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
107 },
108 {
109 .name = "SMPS10_OUT2",
110 .sname = "smps10-in",
111 .ctrl_addr = PALMAS_SMPS10_CTRL,
112 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
113 },
114 {
115 .name = "SMPS10_OUT1",
116 .sname = "smps10-out2",
117 .ctrl_addr = PALMAS_SMPS10_CTRL,
118 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
119 },
120 {
121 .name = "LDO1",
122 .sname = "ldo1-in",
123 .vsel_addr = PALMAS_LDO1_VOLTAGE,
124 .ctrl_addr = PALMAS_LDO1_CTRL,
125 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
126 },
127 {
128 .name = "LDO2",
129 .sname = "ldo2-in",
130 .vsel_addr = PALMAS_LDO2_VOLTAGE,
131 .ctrl_addr = PALMAS_LDO2_CTRL,
132 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
133 },
134 {
135 .name = "LDO3",
136 .sname = "ldo3-in",
137 .vsel_addr = PALMAS_LDO3_VOLTAGE,
138 .ctrl_addr = PALMAS_LDO3_CTRL,
139 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
140 },
141 {
142 .name = "LDO4",
143 .sname = "ldo4-in",
144 .vsel_addr = PALMAS_LDO4_VOLTAGE,
145 .ctrl_addr = PALMAS_LDO4_CTRL,
146 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
147 },
148 {
149 .name = "LDO5",
150 .sname = "ldo5-in",
151 .vsel_addr = PALMAS_LDO5_VOLTAGE,
152 .ctrl_addr = PALMAS_LDO5_CTRL,
153 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
154 },
155 {
156 .name = "LDO6",
157 .sname = "ldo6-in",
158 .vsel_addr = PALMAS_LDO6_VOLTAGE,
159 .ctrl_addr = PALMAS_LDO6_CTRL,
160 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
161 },
162 {
163 .name = "LDO7",
164 .sname = "ldo7-in",
165 .vsel_addr = PALMAS_LDO7_VOLTAGE,
166 .ctrl_addr = PALMAS_LDO7_CTRL,
167 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
168 },
169 {
170 .name = "LDO8",
171 .sname = "ldo8-in",
172 .vsel_addr = PALMAS_LDO8_VOLTAGE,
173 .ctrl_addr = PALMAS_LDO8_CTRL,
174 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
175 },
176 {
177 .name = "LDO9",
178 .sname = "ldo9-in",
179 .vsel_addr = PALMAS_LDO9_VOLTAGE,
180 .ctrl_addr = PALMAS_LDO9_CTRL,
181 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
182 },
183 {
184 .name = "LDOLN",
185 .sname = "ldoln-in",
186 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
187 .ctrl_addr = PALMAS_LDOLN_CTRL,
188 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
189 },
190 {
191 .name = "LDOUSB",
192 .sname = "ldousb-in",
193 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
194 .ctrl_addr = PALMAS_LDOUSB_CTRL,
195 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
196 },
197 {
198 .name = "REGEN1",
199 .ctrl_addr = PALMAS_REGEN1_CTRL,
200 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
201 },
202 {
203 .name = "REGEN2",
204 .ctrl_addr = PALMAS_REGEN2_CTRL,
205 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
206 },
207 {
208 .name = "REGEN3",
209 .ctrl_addr = PALMAS_REGEN3_CTRL,
210 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
211 },
212 {
213 .name = "SYSEN1",
214 .ctrl_addr = PALMAS_SYSEN1_CTRL,
215 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
216 },
217 {
218 .name = "SYSEN2",
219 .ctrl_addr = PALMAS_SYSEN2_CTRL,
220 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
221 },
222};
223
224static struct palmas_regs_info tps65917_regs_info[] = {
225 {
226 .name = "SMPS1",
227 .sname = "smps1-in",
228 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
229 .ctrl_addr = TPS65917_SMPS1_CTRL,
230 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
231 },
232 {
233 .name = "SMPS2",
234 .sname = "smps2-in",
235 .vsel_addr = TPS65917_SMPS2_VOLTAGE,
236 .ctrl_addr = TPS65917_SMPS2_CTRL,
237 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
238 },
239 {
240 .name = "SMPS3",
241 .sname = "smps3-in",
242 .vsel_addr = TPS65917_SMPS3_VOLTAGE,
243 .ctrl_addr = TPS65917_SMPS3_CTRL,
244 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
245 },
246 {
247 .name = "SMPS4",
248 .sname = "smps4-in",
249 .vsel_addr = TPS65917_SMPS4_VOLTAGE,
250 .ctrl_addr = TPS65917_SMPS4_CTRL,
251 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
252 },
253 {
254 .name = "SMPS5",
255 .sname = "smps5-in",
256 .vsel_addr = TPS65917_SMPS5_VOLTAGE,
257 .ctrl_addr = TPS65917_SMPS5_CTRL,
258 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
259 },
260 {
261 .name = "SMPS12",
262 .sname = "smps1-in",
263 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
264 .ctrl_addr = TPS65917_SMPS1_CTRL,
265 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS12,
266 },
267 {
268 .name = "LDO1",
269 .sname = "ldo1-in",
270 .vsel_addr = TPS65917_LDO1_VOLTAGE,
271 .ctrl_addr = TPS65917_LDO1_CTRL,
272 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
273 },
274 {
275 .name = "LDO2",
276 .sname = "ldo2-in",
277 .vsel_addr = TPS65917_LDO2_VOLTAGE,
278 .ctrl_addr = TPS65917_LDO2_CTRL,
279 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
280 },
281 {
282 .name = "LDO3",
283 .sname = "ldo3-in",
284 .vsel_addr = TPS65917_LDO3_VOLTAGE,
285 .ctrl_addr = TPS65917_LDO3_CTRL,
286 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
287 },
288 {
289 .name = "LDO4",
290 .sname = "ldo4-in",
291 .vsel_addr = TPS65917_LDO4_VOLTAGE,
292 .ctrl_addr = TPS65917_LDO4_CTRL,
293 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
294 },
295 {
296 .name = "LDO5",
297 .sname = "ldo5-in",
298 .vsel_addr = TPS65917_LDO5_VOLTAGE,
299 .ctrl_addr = TPS65917_LDO5_CTRL,
300 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
301 },
302 {
303 .name = "REGEN1",
304 .ctrl_addr = TPS65917_REGEN1_CTRL,
305 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
306 },
307 {
308 .name = "REGEN2",
309 .ctrl_addr = TPS65917_REGEN2_CTRL,
310 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
311 },
312 {
313 .name = "REGEN3",
314 .ctrl_addr = TPS65917_REGEN3_CTRL,
315 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
316 },
317};
318
319#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
320 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
321 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
322 .reg_offset = _offset, \
323 .bit_pos = _pos, \
324 }
325
326static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
327 EXTERNAL_REQUESTOR(REGEN1, 0, 0),
328 EXTERNAL_REQUESTOR(REGEN2, 0, 1),
329 EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
330 EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
331 EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
332 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
333 EXTERNAL_REQUESTOR(REGEN3, 0, 6),
334 EXTERNAL_REQUESTOR(SMPS12, 1, 0),
335 EXTERNAL_REQUESTOR(SMPS3, 1, 1),
336 EXTERNAL_REQUESTOR(SMPS45, 1, 2),
337 EXTERNAL_REQUESTOR(SMPS6, 1, 3),
338 EXTERNAL_REQUESTOR(SMPS7, 1, 4),
339 EXTERNAL_REQUESTOR(SMPS8, 1, 5),
340 EXTERNAL_REQUESTOR(SMPS9, 1, 6),
341 EXTERNAL_REQUESTOR(SMPS10, 1, 7),
342 EXTERNAL_REQUESTOR(LDO1, 2, 0),
343 EXTERNAL_REQUESTOR(LDO2, 2, 1),
344 EXTERNAL_REQUESTOR(LDO3, 2, 2),
345 EXTERNAL_REQUESTOR(LDO4, 2, 3),
346 EXTERNAL_REQUESTOR(LDO5, 2, 4),
347 EXTERNAL_REQUESTOR(LDO6, 2, 5),
348 EXTERNAL_REQUESTOR(LDO7, 2, 6),
349 EXTERNAL_REQUESTOR(LDO8, 2, 7),
350 EXTERNAL_REQUESTOR(LDO9, 3, 0),
351 EXTERNAL_REQUESTOR(LDOLN, 3, 1),
352 EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
353};
354
355#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
356 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
357 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
358 .reg_offset = _offset, \
359 .bit_pos = _pos, \
360 }
361
362static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
363 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
364 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
365 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
366 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
367 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
368 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
369 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
370 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
371 EXTERNAL_REQUESTOR_TPS65917(SMPS12, 1, 5),
372 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
373 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
374 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
375 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
376 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
377};
378
379static const unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
380
381#define SMPS_CTRL_MODE_OFF 0x00
382#define SMPS_CTRL_MODE_ON 0x01
383#define SMPS_CTRL_MODE_ECO 0x02
384#define SMPS_CTRL_MODE_PWM 0x03
385
386#define PALMAS_SMPS_NUM_VOLTAGES 122
387#define PALMAS_SMPS10_NUM_VOLTAGES 2
388#define PALMAS_LDO_NUM_VOLTAGES 50
389
390#define SMPS10_VSEL (1<<3)
391#define SMPS10_BOOST_EN (1<<2)
392#define SMPS10_BYPASS_EN (1<<1)
393#define SMPS10_SWITCH_EN (1<<0)
394
395#define REGULATOR_SLAVE 0
396
397static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
398 unsigned int *dest)
399{
400 unsigned int addr;
401
402 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
403
404 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
405}
406
407static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
408 unsigned int value)
409{
410 unsigned int addr;
411
412 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
413
414 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
415}
416
417static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
418 unsigned int *dest)
419{
420 unsigned int addr;
421
422 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
423
424 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
425}
426
427static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
428 unsigned int value)
429{
430 unsigned int addr;
431
432 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
433
434 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
435}
436
437static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
438{
439 int id = rdev_get_id(dev);
440 int ret;
441 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
442 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
443 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
444 unsigned int reg;
445 bool rail_enable = true;
446
447 ret = palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, ®);
448 if (ret)
449 return ret;
450
451 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
452
453 if (reg == SMPS_CTRL_MODE_OFF)
454 rail_enable = false;
455
456 switch (mode) {
457 case REGULATOR_MODE_NORMAL:
458 reg |= SMPS_CTRL_MODE_ON;
459 break;
460 case REGULATOR_MODE_IDLE:
461 reg |= SMPS_CTRL_MODE_ECO;
462 break;
463 case REGULATOR_MODE_FAST:
464 reg |= SMPS_CTRL_MODE_PWM;
465 break;
466 default:
467 return -EINVAL;
468 }
469
470 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
471 if (rail_enable)
472 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
473
474 /* Switch the enable value to ensure this is used for enable */
475 pmic->desc[id].enable_val = pmic->current_reg_mode[id];
476
477 return 0;
478}
479
480static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
481{
482 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
483 int id = rdev_get_id(dev);
484 unsigned int reg;
485
486 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
487
488 switch (reg) {
489 case SMPS_CTRL_MODE_ON:
490 return REGULATOR_MODE_NORMAL;
491 case SMPS_CTRL_MODE_ECO:
492 return REGULATOR_MODE_IDLE;
493 case SMPS_CTRL_MODE_PWM:
494 return REGULATOR_MODE_FAST;
495 }
496
497 return 0;
498}
499
500static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
501 int ramp_delay)
502{
503 int id = rdev_get_id(rdev);
504 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
505 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
506 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
507 unsigned int reg = 0;
508 int ret;
509
510 /* SMPS3 and SMPS7 do not have tstep_addr setting */
511 switch (id) {
512 case PALMAS_REG_SMPS3:
513 case PALMAS_REG_SMPS7:
514 return 0;
515 }
516
517 if (ramp_delay <= 0)
518 reg = 0;
519 else if (ramp_delay <= 2500)
520 reg = 3;
521 else if (ramp_delay <= 5000)
522 reg = 2;
523 else
524 reg = 1;
525
526 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
527 if (ret < 0) {
528 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
529 return ret;
530 }
531
532 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
533 return ret;
534}
535
536static const struct regulator_ops palmas_ops_smps = {
537 .is_enabled = regulator_is_enabled_regmap,
538 .enable = regulator_enable_regmap,
539 .disable = regulator_disable_regmap,
540 .set_mode = palmas_set_mode_smps,
541 .get_mode = palmas_get_mode_smps,
542 .get_voltage_sel = regulator_get_voltage_sel_regmap,
543 .set_voltage_sel = regulator_set_voltage_sel_regmap,
544 .list_voltage = regulator_list_voltage_linear_range,
545 .map_voltage = regulator_map_voltage_linear_range,
546 .set_voltage_time_sel = regulator_set_voltage_time_sel,
547 .set_ramp_delay = palmas_smps_set_ramp_delay,
548};
549
550static const struct regulator_ops palmas_ops_ext_control_smps = {
551 .set_mode = palmas_set_mode_smps,
552 .get_mode = palmas_get_mode_smps,
553 .get_voltage_sel = regulator_get_voltage_sel_regmap,
554 .set_voltage_sel = regulator_set_voltage_sel_regmap,
555 .list_voltage = regulator_list_voltage_linear_range,
556 .map_voltage = regulator_map_voltage_linear_range,
557 .set_voltage_time_sel = regulator_set_voltage_time_sel,
558 .set_ramp_delay = palmas_smps_set_ramp_delay,
559};
560
561static const struct regulator_ops palmas_ops_smps10 = {
562 .is_enabled = regulator_is_enabled_regmap,
563 .enable = regulator_enable_regmap,
564 .disable = regulator_disable_regmap,
565 .get_voltage_sel = regulator_get_voltage_sel_regmap,
566 .set_voltage_sel = regulator_set_voltage_sel_regmap,
567 .list_voltage = regulator_list_voltage_linear,
568 .map_voltage = regulator_map_voltage_linear,
569 .set_bypass = regulator_set_bypass_regmap,
570 .get_bypass = regulator_get_bypass_regmap,
571};
572
573static const struct regulator_ops tps65917_ops_smps = {
574 .is_enabled = regulator_is_enabled_regmap,
575 .enable = regulator_enable_regmap,
576 .disable = regulator_disable_regmap,
577 .set_mode = palmas_set_mode_smps,
578 .get_mode = palmas_get_mode_smps,
579 .get_voltage_sel = regulator_get_voltage_sel_regmap,
580 .set_voltage_sel = regulator_set_voltage_sel_regmap,
581 .list_voltage = regulator_list_voltage_linear_range,
582 .map_voltage = regulator_map_voltage_linear_range,
583 .set_voltage_time_sel = regulator_set_voltage_time_sel,
584};
585
586static const struct regulator_ops tps65917_ops_ext_control_smps = {
587 .set_mode = palmas_set_mode_smps,
588 .get_mode = palmas_get_mode_smps,
589 .get_voltage_sel = regulator_get_voltage_sel_regmap,
590 .set_voltage_sel = regulator_set_voltage_sel_regmap,
591 .list_voltage = regulator_list_voltage_linear_range,
592 .map_voltage = regulator_map_voltage_linear_range,
593};
594
595static int palmas_is_enabled_ldo(struct regulator_dev *dev)
596{
597 int id = rdev_get_id(dev);
598 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
599 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
600 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
601 unsigned int reg;
602
603 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, ®);
604
605 reg &= PALMAS_LDO1_CTRL_STATUS;
606
607 return !!(reg);
608}
609
610static const struct regulator_ops palmas_ops_ldo = {
611 .is_enabled = palmas_is_enabled_ldo,
612 .enable = regulator_enable_regmap,
613 .disable = regulator_disable_regmap,
614 .get_voltage_sel = regulator_get_voltage_sel_regmap,
615 .set_voltage_sel = regulator_set_voltage_sel_regmap,
616 .list_voltage = regulator_list_voltage_linear,
617 .map_voltage = regulator_map_voltage_linear,
618};
619
620static const struct regulator_ops palmas_ops_ldo9 = {
621 .is_enabled = palmas_is_enabled_ldo,
622 .enable = regulator_enable_regmap,
623 .disable = regulator_disable_regmap,
624 .get_voltage_sel = regulator_get_voltage_sel_regmap,
625 .set_voltage_sel = regulator_set_voltage_sel_regmap,
626 .list_voltage = regulator_list_voltage_linear,
627 .map_voltage = regulator_map_voltage_linear,
628 .set_bypass = regulator_set_bypass_regmap,
629 .get_bypass = regulator_get_bypass_regmap,
630};
631
632static const struct regulator_ops palmas_ops_ext_control_ldo = {
633 .get_voltage_sel = regulator_get_voltage_sel_regmap,
634 .set_voltage_sel = regulator_set_voltage_sel_regmap,
635 .list_voltage = regulator_list_voltage_linear,
636 .map_voltage = regulator_map_voltage_linear,
637};
638
639static const struct regulator_ops palmas_ops_extreg = {
640 .is_enabled = regulator_is_enabled_regmap,
641 .enable = regulator_enable_regmap,
642 .disable = regulator_disable_regmap,
643};
644
645static const struct regulator_ops palmas_ops_ext_control_extreg = {
646};
647
648static const struct regulator_ops tps65917_ops_ldo = {
649 .is_enabled = palmas_is_enabled_ldo,
650 .enable = regulator_enable_regmap,
651 .disable = regulator_disable_regmap,
652 .get_voltage_sel = regulator_get_voltage_sel_regmap,
653 .set_voltage_sel = regulator_set_voltage_sel_regmap,
654 .list_voltage = regulator_list_voltage_linear,
655 .map_voltage = regulator_map_voltage_linear,
656 .set_voltage_time_sel = regulator_set_voltage_time_sel,
657};
658
659static const struct regulator_ops tps65917_ops_ldo_1_2 = {
660 .is_enabled = palmas_is_enabled_ldo,
661 .enable = regulator_enable_regmap,
662 .disable = regulator_disable_regmap,
663 .get_voltage_sel = regulator_get_voltage_sel_regmap,
664 .set_voltage_sel = regulator_set_voltage_sel_regmap,
665 .list_voltage = regulator_list_voltage_linear,
666 .map_voltage = regulator_map_voltage_linear,
667 .set_voltage_time_sel = regulator_set_voltage_time_sel,
668 .set_bypass = regulator_set_bypass_regmap,
669 .get_bypass = regulator_get_bypass_regmap,
670};
671
672static int palmas_regulator_config_external(struct palmas *palmas, int id,
673 struct palmas_reg_init *reg_init)
674{
675 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
676 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
677 int ret;
678
679 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
680 reg_init->roof_floor, true);
681 if (ret < 0)
682 dev_err(palmas->dev,
683 "Ext control config for regulator %d failed %d\n",
684 id, ret);
685 return ret;
686}
687
688/*
689 * setup the hardware based sleep configuration of the SMPS/LDO regulators
690 * from the platform data. This is different to the software based control
691 * supported by the regulator framework as it is controlled by toggling
692 * pins on the PMIC such as PREQ, SYSEN, ...
693 */
694static int palmas_smps_init(struct palmas *palmas, int id,
695 struct palmas_reg_init *reg_init)
696{
697 unsigned int reg;
698 int ret;
699 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
700 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
701 unsigned int addr = rinfo->ctrl_addr;
702
703 ret = palmas_smps_read(palmas, addr, ®);
704 if (ret)
705 return ret;
706
707 switch (id) {
708 case PALMAS_REG_SMPS10_OUT1:
709 case PALMAS_REG_SMPS10_OUT2:
710 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
711 if (reg_init->mode_sleep)
712 reg |= reg_init->mode_sleep <<
713 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
714 break;
715 default:
716 if (reg_init->warm_reset)
717 reg |= PALMAS_SMPS12_CTRL_WR_S;
718 else
719 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
720
721 if (reg_init->roof_floor)
722 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
723 else
724 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
725
726 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
727 if (reg_init->mode_sleep)
728 reg |= reg_init->mode_sleep <<
729 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
730 }
731
732 ret = palmas_smps_write(palmas, addr, reg);
733 if (ret)
734 return ret;
735
736 if (rinfo->vsel_addr && reg_init->vsel) {
737
738 reg = reg_init->vsel;
739
740 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
741 if (ret)
742 return ret;
743 }
744
745 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
746 (id != PALMAS_REG_SMPS10_OUT2)) {
747 /* Enable externally controlled regulator */
748 ret = palmas_smps_read(palmas, addr, ®);
749 if (ret < 0)
750 return ret;
751
752 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
753 reg |= SMPS_CTRL_MODE_ON;
754 ret = palmas_smps_write(palmas, addr, reg);
755 if (ret < 0)
756 return ret;
757 }
758 return palmas_regulator_config_external(palmas, id, reg_init);
759 }
760 return 0;
761}
762
763static int palmas_ldo_init(struct palmas *palmas, int id,
764 struct palmas_reg_init *reg_init)
765{
766 unsigned int reg;
767 unsigned int addr;
768 int ret;
769 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
770 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
771
772 addr = rinfo->ctrl_addr;
773
774 ret = palmas_ldo_read(palmas, addr, ®);
775 if (ret)
776 return ret;
777
778 if (reg_init->warm_reset)
779 reg |= PALMAS_LDO1_CTRL_WR_S;
780 else
781 reg &= ~PALMAS_LDO1_CTRL_WR_S;
782
783 if (reg_init->mode_sleep)
784 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
785 else
786 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
787
788 ret = palmas_ldo_write(palmas, addr, reg);
789 if (ret)
790 return ret;
791
792 if (reg_init->roof_floor) {
793 /* Enable externally controlled regulator */
794 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
795 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
796 PALMAS_LDO1_CTRL_MODE_ACTIVE);
797 if (ret < 0) {
798 dev_err(palmas->dev,
799 "LDO Register 0x%02x update failed %d\n",
800 addr, ret);
801 return ret;
802 }
803 return palmas_regulator_config_external(palmas, id, reg_init);
804 }
805 return 0;
806}
807
808static int palmas_extreg_init(struct palmas *palmas, int id,
809 struct palmas_reg_init *reg_init)
810{
811 unsigned int addr;
812 int ret;
813 unsigned int val = 0;
814 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
815 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
816
817 addr = rinfo->ctrl_addr;
818
819 if (reg_init->mode_sleep)
820 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
821
822 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
823 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
824 if (ret < 0) {
825 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
826 addr, ret);
827 return ret;
828 }
829
830 if (reg_init->roof_floor) {
831 /* Enable externally controlled regulator */
832 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
833 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
834 PALMAS_REGEN1_CTRL_MODE_ACTIVE);
835 if (ret < 0) {
836 dev_err(palmas->dev,
837 "Resource Register 0x%02x update failed %d\n",
838 addr, ret);
839 return ret;
840 }
841 return palmas_regulator_config_external(palmas, id, reg_init);
842 }
843 return 0;
844}
845
846static void palmas_enable_ldo8_track(struct palmas *palmas)
847{
848 unsigned int reg;
849 unsigned int addr;
850 int ret;
851 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
852 struct palmas_regs_info *rinfo;
853
854 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
855 addr = rinfo->ctrl_addr;
856
857 ret = palmas_ldo_read(palmas, addr, ®);
858 if (ret) {
859 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
860 return;
861 }
862
863 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
864 ret = palmas_ldo_write(palmas, addr, reg);
865 if (ret < 0) {
866 dev_err(palmas->dev, "Error in enabling tracking mode\n");
867 return;
868 }
869 /*
870 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
871 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
872 * and can be set from 0.45 to 1.65 V.
873 */
874 addr = rinfo->vsel_addr;
875 ret = palmas_ldo_read(palmas, addr, ®);
876 if (ret) {
877 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
878 return;
879 }
880
881 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
882 ret = palmas_ldo_write(palmas, addr, reg);
883 if (ret < 0)
884 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
885
886 return;
887}
888
889static int palmas_ldo_registration(struct palmas_pmic *pmic,
890 struct palmas_pmic_driver_data *ddata,
891 struct palmas_pmic_platform_data *pdata,
892 const char *pdev_name,
893 struct regulator_config config)
894{
895 int id, ret;
896 struct regulator_dev *rdev;
897 struct palmas_reg_init *reg_init;
898 struct palmas_regs_info *rinfo;
899 struct regulator_desc *desc;
900
901 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
902 if (pdata && pdata->reg_init[id])
903 reg_init = pdata->reg_init[id];
904 else
905 reg_init = NULL;
906
907 rinfo = &ddata->palmas_regs_info[id];
908 /* Miss out regulators which are not available due
909 * to alternate functions.
910 */
911
912 /* Register the regulators */
913 desc = &pmic->desc[id];
914 desc->name = rinfo->name;
915 desc->id = id;
916 desc->type = REGULATOR_VOLTAGE;
917 desc->owner = THIS_MODULE;
918
919 if (id < PALMAS_REG_REGEN1) {
920 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
921 if (reg_init && reg_init->roof_floor)
922 desc->ops = &palmas_ops_ext_control_ldo;
923 else
924 desc->ops = &palmas_ops_ldo;
925 desc->min_uV = 900000;
926 desc->uV_step = 50000;
927 desc->linear_min_sel = 1;
928 desc->enable_time = 500;
929 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
930 rinfo->vsel_addr);
931 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
932 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
933 rinfo->ctrl_addr);
934 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
935
936 /* Check if LDO8 is in tracking mode or not */
937 if (pdata && (id == PALMAS_REG_LDO8) &&
938 pdata->enable_ldo8_tracking) {
939 palmas_enable_ldo8_track(pmic->palmas);
940 desc->min_uV = 450000;
941 desc->uV_step = 25000;
942 }
943
944 /* LOD6 in vibrator mode will have enable time 2000us */
945 if (pdata && pdata->ldo6_vibrator &&
946 (id == PALMAS_REG_LDO6))
947 desc->enable_time = 2000;
948
949 if (id == PALMAS_REG_LDO9) {
950 desc->ops = &palmas_ops_ldo9;
951 desc->bypass_reg = desc->enable_reg;
952 desc->bypass_val_on =
953 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
954 desc->bypass_mask =
955 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
956 }
957 } else {
958 if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
959 continue;
960
961 desc->n_voltages = 1;
962 if (reg_init && reg_init->roof_floor)
963 desc->ops = &palmas_ops_ext_control_extreg;
964 else
965 desc->ops = &palmas_ops_extreg;
966 desc->enable_reg =
967 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
968 rinfo->ctrl_addr);
969 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
970 }
971
972 if (pdata)
973 config.init_data = pdata->reg_data[id];
974 else
975 config.init_data = NULL;
976
977 desc->supply_name = rinfo->sname;
978 config.of_node = ddata->palmas_matches[id].of_node;
979
980 rdev = devm_regulator_register(pmic->dev, desc, &config);
981 if (IS_ERR(rdev)) {
982 dev_err(pmic->dev,
983 "failed to register %s regulator\n",
984 pdev_name);
985 return PTR_ERR(rdev);
986 }
987
988 /* Initialise sleep/init values from platform data */
989 if (pdata) {
990 reg_init = pdata->reg_init[id];
991 if (reg_init) {
992 if (id <= ddata->ldo_end)
993 ret = palmas_ldo_init(pmic->palmas, id,
994 reg_init);
995 else
996 ret = palmas_extreg_init(pmic->palmas,
997 id, reg_init);
998 if (ret)
999 return ret;
1000 }
1001 }
1002 }
1003
1004 return 0;
1005}
1006
1007static int tps65917_ldo_registration(struct palmas_pmic *pmic,
1008 struct palmas_pmic_driver_data *ddata,
1009 struct palmas_pmic_platform_data *pdata,
1010 const char *pdev_name,
1011 struct regulator_config config)
1012{
1013 int id, ret;
1014 struct regulator_dev *rdev;
1015 struct palmas_reg_init *reg_init;
1016 struct palmas_regs_info *rinfo;
1017 struct regulator_desc *desc;
1018
1019 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
1020 if (pdata && pdata->reg_init[id])
1021 reg_init = pdata->reg_init[id];
1022 else
1023 reg_init = NULL;
1024
1025 /* Miss out regulators which are not available due
1026 * to alternate functions.
1027 */
1028 rinfo = &ddata->palmas_regs_info[id];
1029
1030 /* Register the regulators */
1031 desc = &pmic->desc[id];
1032 desc->name = rinfo->name;
1033 desc->id = id;
1034 desc->type = REGULATOR_VOLTAGE;
1035 desc->owner = THIS_MODULE;
1036
1037 if (id < TPS65917_REG_REGEN1) {
1038 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
1039 if (reg_init && reg_init->roof_floor)
1040 desc->ops = &palmas_ops_ext_control_ldo;
1041 else
1042 desc->ops = &tps65917_ops_ldo;
1043 desc->min_uV = 900000;
1044 desc->uV_step = 50000;
1045 desc->linear_min_sel = 1;
1046 desc->enable_time = 500;
1047 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1048 rinfo->vsel_addr);
1049 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1050 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1051 rinfo->ctrl_addr);
1052 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
1053 /*
1054 * To be confirmed. Discussion on going with PMIC Team.
1055 * It is of the order of ~60mV/uS.
1056 */
1057 desc->ramp_delay = 2500;
1058 if (id == TPS65917_REG_LDO1 ||
1059 id == TPS65917_REG_LDO2) {
1060 desc->ops = &tps65917_ops_ldo_1_2;
1061 desc->bypass_reg = desc->enable_reg;
1062 desc->bypass_val_on =
1063 TPS65917_LDO1_CTRL_BYPASS_EN;
1064 desc->bypass_mask =
1065 TPS65917_LDO1_CTRL_BYPASS_EN;
1066 }
1067 } else {
1068 desc->n_voltages = 1;
1069 if (reg_init && reg_init->roof_floor)
1070 desc->ops = &palmas_ops_ext_control_extreg;
1071 else
1072 desc->ops = &palmas_ops_extreg;
1073 desc->enable_reg =
1074 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
1075 rinfo->ctrl_addr);
1076 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1077 }
1078
1079 if (pdata)
1080 config.init_data = pdata->reg_data[id];
1081 else
1082 config.init_data = NULL;
1083
1084 desc->supply_name = rinfo->sname;
1085 config.of_node = ddata->palmas_matches[id].of_node;
1086
1087 rdev = devm_regulator_register(pmic->dev, desc, &config);
1088 if (IS_ERR(rdev)) {
1089 dev_err(pmic->dev,
1090 "failed to register %s regulator\n",
1091 pdev_name);
1092 return PTR_ERR(rdev);
1093 }
1094
1095 /* Initialise sleep/init values from platform data */
1096 if (pdata) {
1097 reg_init = pdata->reg_init[id];
1098 if (reg_init) {
1099 if (id < TPS65917_REG_REGEN1)
1100 ret = palmas_ldo_init(pmic->palmas,
1101 id, reg_init);
1102 else
1103 ret = palmas_extreg_init(pmic->palmas,
1104 id, reg_init);
1105 if (ret)
1106 return ret;
1107 }
1108 }
1109 }
1110
1111 return 0;
1112}
1113
1114static int palmas_smps_registration(struct palmas_pmic *pmic,
1115 struct palmas_pmic_driver_data *ddata,
1116 struct palmas_pmic_platform_data *pdata,
1117 const char *pdev_name,
1118 struct regulator_config config)
1119{
1120 int id, ret;
1121 unsigned int addr, reg;
1122 struct regulator_dev *rdev;
1123 struct palmas_reg_init *reg_init;
1124 struct palmas_regs_info *rinfo;
1125 struct regulator_desc *desc;
1126
1127 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1128 bool ramp_delay_support = false;
1129
1130 /*
1131 * Miss out regulators which are not available due
1132 * to slaving configurations.
1133 */
1134 switch (id) {
1135 case PALMAS_REG_SMPS12:
1136 case PALMAS_REG_SMPS3:
1137 if (pmic->smps123)
1138 continue;
1139 if (id == PALMAS_REG_SMPS12)
1140 ramp_delay_support = true;
1141 break;
1142 case PALMAS_REG_SMPS123:
1143 if (!pmic->smps123)
1144 continue;
1145 ramp_delay_support = true;
1146 break;
1147 case PALMAS_REG_SMPS45:
1148 case PALMAS_REG_SMPS7:
1149 if (pmic->smps457)
1150 continue;
1151 if (id == PALMAS_REG_SMPS45)
1152 ramp_delay_support = true;
1153 break;
1154 case PALMAS_REG_SMPS457:
1155 if (!pmic->smps457)
1156 continue;
1157 ramp_delay_support = true;
1158 break;
1159 case PALMAS_REG_SMPS10_OUT1:
1160 case PALMAS_REG_SMPS10_OUT2:
1161 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
1162 continue;
1163 }
1164 rinfo = &ddata->palmas_regs_info[id];
1165 desc = &pmic->desc[id];
1166
1167 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
1168 ramp_delay_support = true;
1169
1170 if (ramp_delay_support) {
1171 addr = rinfo->tstep_addr;
1172 ret = palmas_smps_read(pmic->palmas, addr, ®);
1173 if (ret < 0) {
1174 dev_err(pmic->dev,
1175 "reading TSTEP reg failed: %d\n", ret);
1176 return ret;
1177 }
1178 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
1179 pmic->ramp_delay[id] = desc->ramp_delay;
1180 }
1181
1182 /* Initialise sleep/init values from platform data */
1183 if (pdata && pdata->reg_init[id]) {
1184 reg_init = pdata->reg_init[id];
1185 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1186 if (ret)
1187 return ret;
1188 } else {
1189 reg_init = NULL;
1190 }
1191
1192 /* Register the regulators */
1193 desc->name = rinfo->name;
1194 desc->id = id;
1195
1196 switch (id) {
1197 case PALMAS_REG_SMPS10_OUT1:
1198 case PALMAS_REG_SMPS10_OUT2:
1199 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
1200 desc->ops = &palmas_ops_smps10;
1201 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1202 PALMAS_SMPS10_CTRL);
1203 desc->vsel_mask = SMPS10_VSEL;
1204 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1205 PALMAS_SMPS10_CTRL);
1206 if (id == PALMAS_REG_SMPS10_OUT1)
1207 desc->enable_mask = SMPS10_SWITCH_EN;
1208 else
1209 desc->enable_mask = SMPS10_BOOST_EN;
1210 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1211 PALMAS_SMPS10_CTRL);
1212 desc->bypass_val_on = SMPS10_BYPASS_EN;
1213 desc->bypass_mask = SMPS10_BYPASS_EN;
1214 desc->min_uV = 3750000;
1215 desc->uV_step = 1250000;
1216 break;
1217 default:
1218 /*
1219 * Read and store the RANGE bit for later use
1220 * This must be done before regulator is probed,
1221 * otherwise we error in probe with unsupportable
1222 * ranges. Read the current smps mode for later use.
1223 */
1224 addr = rinfo->vsel_addr;
1225 desc->n_linear_ranges = 3;
1226
1227 ret = palmas_smps_read(pmic->palmas, addr, ®);
1228 if (ret)
1229 return ret;
1230 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
1231 pmic->range[id] = 1;
1232 if (pmic->range[id])
1233 desc->linear_ranges = smps_high_ranges;
1234 else
1235 desc->linear_ranges = smps_low_ranges;
1236
1237 if (reg_init && reg_init->roof_floor)
1238 desc->ops = &palmas_ops_ext_control_smps;
1239 else
1240 desc->ops = &palmas_ops_smps;
1241 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1242 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1243 rinfo->vsel_addr);
1244 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1245
1246 /* Read the smps mode for later use. */
1247 addr = rinfo->ctrl_addr;
1248 ret = palmas_smps_read(pmic->palmas, addr, ®);
1249 if (ret)
1250 return ret;
1251 pmic->current_reg_mode[id] = reg &
1252 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1253
1254 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1255 rinfo->ctrl_addr);
1256 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1257 /* set_mode overrides this value */
1258 desc->enable_val = SMPS_CTRL_MODE_ON;
1259 }
1260
1261 desc->type = REGULATOR_VOLTAGE;
1262 desc->owner = THIS_MODULE;
1263
1264 if (pdata)
1265 config.init_data = pdata->reg_data[id];
1266 else
1267 config.init_data = NULL;
1268
1269 desc->supply_name = rinfo->sname;
1270 config.of_node = ddata->palmas_matches[id].of_node;
1271
1272 rdev = devm_regulator_register(pmic->dev, desc, &config);
1273 if (IS_ERR(rdev)) {
1274 dev_err(pmic->dev,
1275 "failed to register %s regulator\n",
1276 pdev_name);
1277 return PTR_ERR(rdev);
1278 }
1279 }
1280
1281 return 0;
1282}
1283
1284static int tps65917_smps_registration(struct palmas_pmic *pmic,
1285 struct palmas_pmic_driver_data *ddata,
1286 struct palmas_pmic_platform_data *pdata,
1287 const char *pdev_name,
1288 struct regulator_config config)
1289{
1290 int id, ret;
1291 unsigned int addr, reg;
1292 struct regulator_dev *rdev;
1293 struct palmas_reg_init *reg_init;
1294 struct palmas_regs_info *rinfo;
1295 struct regulator_desc *desc;
1296
1297 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1298 /*
1299 * Miss out regulators which are not available due
1300 * to slaving configurations.
1301 */
1302 desc = &pmic->desc[id];
1303 desc->n_linear_ranges = 3;
1304 if ((id == TPS65917_REG_SMPS2 || id == TPS65917_REG_SMPS1) &&
1305 pmic->smps12)
1306 continue;
1307
1308 /* Initialise sleep/init values from platform data */
1309 if (pdata && pdata->reg_init[id]) {
1310 reg_init = pdata->reg_init[id];
1311 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1312 if (ret)
1313 return ret;
1314 } else {
1315 reg_init = NULL;
1316 }
1317 rinfo = &ddata->palmas_regs_info[id];
1318
1319 /* Register the regulators */
1320 desc->name = rinfo->name;
1321 desc->id = id;
1322
1323 /*
1324 * Read and store the RANGE bit for later use
1325 * This must be done before regulator is probed,
1326 * otherwise we error in probe with unsupportable
1327 * ranges. Read the current smps mode for later use.
1328 */
1329 addr = rinfo->vsel_addr;
1330
1331 ret = palmas_smps_read(pmic->palmas, addr, ®);
1332 if (ret)
1333 return ret;
1334 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
1335 pmic->range[id] = 1;
1336
1337 if (pmic->range[id])
1338 desc->linear_ranges = smps_high_ranges;
1339 else
1340 desc->linear_ranges = smps_low_ranges;
1341
1342 if (reg_init && reg_init->roof_floor)
1343 desc->ops = &tps65917_ops_ext_control_smps;
1344 else
1345 desc->ops = &tps65917_ops_smps;
1346 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1347 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1348 rinfo->vsel_addr);
1349 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1350 desc->ramp_delay = 2500;
1351
1352 /* Read the smps mode for later use. */
1353 addr = rinfo->ctrl_addr;
1354 ret = palmas_smps_read(pmic->palmas, addr, ®);
1355 if (ret)
1356 return ret;
1357 pmic->current_reg_mode[id] = reg &
1358 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1359 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1360 rinfo->ctrl_addr);
1361 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1362 /* set_mode overrides this value */
1363 desc->enable_val = SMPS_CTRL_MODE_ON;
1364
1365 desc->type = REGULATOR_VOLTAGE;
1366 desc->owner = THIS_MODULE;
1367
1368 if (pdata)
1369 config.init_data = pdata->reg_data[id];
1370 else
1371 config.init_data = NULL;
1372
1373 desc->supply_name = rinfo->sname;
1374 config.of_node = ddata->palmas_matches[id].of_node;
1375
1376 rdev = devm_regulator_register(pmic->dev, desc, &config);
1377 if (IS_ERR(rdev)) {
1378 dev_err(pmic->dev,
1379 "failed to register %s regulator\n",
1380 pdev_name);
1381 return PTR_ERR(rdev);
1382 }
1383 }
1384
1385 return 0;
1386}
1387
1388static struct of_regulator_match palmas_matches[] = {
1389 { .name = "smps12", },
1390 { .name = "smps123", },
1391 { .name = "smps3", },
1392 { .name = "smps45", },
1393 { .name = "smps457", },
1394 { .name = "smps6", },
1395 { .name = "smps7", },
1396 { .name = "smps8", },
1397 { .name = "smps9", },
1398 { .name = "smps10_out2", },
1399 { .name = "smps10_out1", },
1400 { .name = "ldo1", },
1401 { .name = "ldo2", },
1402 { .name = "ldo3", },
1403 { .name = "ldo4", },
1404 { .name = "ldo5", },
1405 { .name = "ldo6", },
1406 { .name = "ldo7", },
1407 { .name = "ldo8", },
1408 { .name = "ldo9", },
1409 { .name = "ldoln", },
1410 { .name = "ldousb", },
1411 { .name = "regen1", },
1412 { .name = "regen2", },
1413 { .name = "regen3", },
1414 { .name = "sysen1", },
1415 { .name = "sysen2", },
1416};
1417
1418static struct of_regulator_match tps65917_matches[] = {
1419 { .name = "smps1", },
1420 { .name = "smps2", },
1421 { .name = "smps3", },
1422 { .name = "smps4", },
1423 { .name = "smps5", },
1424 { .name = "smps12",},
1425 { .name = "ldo1", },
1426 { .name = "ldo2", },
1427 { .name = "ldo3", },
1428 { .name = "ldo4", },
1429 { .name = "ldo5", },
1430 { .name = "regen1", },
1431 { .name = "regen2", },
1432 { .name = "regen3", },
1433 { .name = "sysen1", },
1434 { .name = "sysen2", },
1435};
1436
1437static struct palmas_pmic_driver_data palmas_ddata = {
1438 .smps_start = PALMAS_REG_SMPS12,
1439 .smps_end = PALMAS_REG_SMPS10_OUT1,
1440 .ldo_begin = PALMAS_REG_LDO1,
1441 .ldo_end = PALMAS_REG_LDOUSB,
1442 .max_reg = PALMAS_NUM_REGS,
1443 .has_regen3 = true,
1444 .palmas_regs_info = palmas_generic_regs_info,
1445 .palmas_matches = palmas_matches,
1446 .sleep_req_info = palma_sleep_req_info,
1447 .smps_register = palmas_smps_registration,
1448 .ldo_register = palmas_ldo_registration,
1449};
1450
1451static struct palmas_pmic_driver_data tps65917_ddata = {
1452 .smps_start = TPS65917_REG_SMPS1,
1453 .smps_end = TPS65917_REG_SMPS12,
1454 .ldo_begin = TPS65917_REG_LDO1,
1455 .ldo_end = TPS65917_REG_LDO5,
1456 .max_reg = TPS65917_NUM_REGS,
1457 .has_regen3 = true,
1458 .palmas_regs_info = tps65917_regs_info,
1459 .palmas_matches = tps65917_matches,
1460 .sleep_req_info = tps65917_sleep_req_info,
1461 .smps_register = tps65917_smps_registration,
1462 .ldo_register = tps65917_ldo_registration,
1463};
1464
1465static int palmas_dt_to_pdata(struct device *dev,
1466 struct device_node *node,
1467 struct palmas_pmic_platform_data *pdata,
1468 struct palmas_pmic_driver_data *ddata)
1469{
1470 struct device_node *regulators;
1471 u32 prop;
1472 int idx, ret;
1473
1474 regulators = of_get_child_by_name(node, "regulators");
1475 if (!regulators) {
1476 dev_info(dev, "regulator node not found\n");
1477 return 0;
1478 }
1479
1480 ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
1481 ddata->max_reg);
1482 of_node_put(regulators);
1483 if (ret < 0) {
1484 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
1485 return 0;
1486 }
1487
1488 for (idx = 0; idx < ddata->max_reg; idx++) {
1489 struct of_regulator_match *match;
1490 struct palmas_reg_init *rinit;
1491 struct device_node *np;
1492
1493 match = &ddata->palmas_matches[idx];
1494 np = match->of_node;
1495
1496 if (!match->init_data || !np)
1497 continue;
1498
1499 rinit = devm_kzalloc(dev, sizeof(*rinit), GFP_KERNEL);
1500 if (!rinit)
1501 return -ENOMEM;
1502
1503 pdata->reg_data[idx] = match->init_data;
1504 pdata->reg_init[idx] = rinit;
1505
1506 rinit->warm_reset = of_property_read_bool(np, "ti,warm-reset");
1507 ret = of_property_read_u32(np, "ti,roof-floor", &prop);
1508 /* EINVAL: Property not found */
1509 if (ret != -EINVAL) {
1510 int econtrol;
1511
1512 /* use default value, when no value is specified */
1513 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1514 if (!ret) {
1515 switch (prop) {
1516 case 1:
1517 econtrol = PALMAS_EXT_CONTROL_ENABLE1;
1518 break;
1519 case 2:
1520 econtrol = PALMAS_EXT_CONTROL_ENABLE2;
1521 break;
1522 case 3:
1523 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1524 break;
1525 default:
1526 WARN_ON(1);
1527 dev_warn(dev,
1528 "%s: Invalid roof-floor option: %u\n",
1529 match->name, prop);
1530 break;
1531 }
1532 }
1533 rinit->roof_floor = econtrol;
1534 }
1535
1536 ret = of_property_read_u32(np, "ti,mode-sleep", &prop);
1537 if (!ret)
1538 rinit->mode_sleep = prop;
1539
1540 ret = of_property_read_bool(np, "ti,smps-range");
1541 if (ret)
1542 rinit->vsel = PALMAS_SMPS12_VOLTAGE_RANGE;
1543
1544 if (idx == PALMAS_REG_LDO8)
1545 pdata->enable_ldo8_tracking = of_property_read_bool(
1546 np, "ti,enable-ldo8-tracking");
1547 }
1548
1549 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
1550
1551 return 0;
1552}
1553
1554static const struct of_device_id of_palmas_match_tbl[] = {
1555 {
1556 .compatible = "ti,palmas-pmic",
1557 .data = &palmas_ddata,
1558 },
1559 {
1560 .compatible = "ti,twl6035-pmic",
1561 .data = &palmas_ddata,
1562 },
1563 {
1564 .compatible = "ti,twl6036-pmic",
1565 .data = &palmas_ddata,
1566 },
1567 {
1568 .compatible = "ti,twl6037-pmic",
1569 .data = &palmas_ddata,
1570 },
1571 {
1572 .compatible = "ti,tps65913-pmic",
1573 .data = &palmas_ddata,
1574 },
1575 {
1576 .compatible = "ti,tps65914-pmic",
1577 .data = &palmas_ddata,
1578 },
1579 {
1580 .compatible = "ti,tps80036-pmic",
1581 .data = &palmas_ddata,
1582 },
1583 {
1584 .compatible = "ti,tps659038-pmic",
1585 .data = &palmas_ddata,
1586 },
1587 {
1588 .compatible = "ti,tps65917-pmic",
1589 .data = &tps65917_ddata,
1590 },
1591 { /* end */ }
1592};
1593
1594static int palmas_regulators_probe(struct platform_device *pdev)
1595{
1596 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
1597 struct palmas_pmic_platform_data *pdata;
1598 struct device_node *node = pdev->dev.of_node;
1599 struct palmas_pmic_driver_data *driver_data;
1600 struct regulator_config config = { };
1601 struct palmas_pmic *pmic;
1602 const char *pdev_name;
1603 int ret = 0;
1604 unsigned int reg;
1605
1606 driver_data = (struct palmas_pmic_driver_data *)device_get_match_data(&pdev->dev);
1607 if (!driver_data)
1608 return -ENODATA;
1609
1610 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1611 if (!pdata)
1612 return -ENOMEM;
1613
1614 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1615 if (!pmic)
1616 return -ENOMEM;
1617
1618 if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
1619 palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
1620 TPS659038_REGEN2_CTRL;
1621 palmas_ddata.has_regen3 = false;
1622 }
1623
1624 pmic->dev = &pdev->dev;
1625 pmic->palmas = palmas;
1626 palmas->pmic = pmic;
1627 platform_set_drvdata(pdev, pmic);
1628 pmic->palmas->pmic_ddata = driver_data;
1629
1630 ret = palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
1631 if (ret)
1632 return ret;
1633
1634 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®);
1635 if (ret)
1636 return ret;
1637
1638 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN) {
1639 pmic->smps123 = 1;
1640 pmic->smps12 = 1;
1641 }
1642
1643 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
1644 pmic->smps457 = 1;
1645
1646 config.regmap = palmas->regmap[REGULATOR_SLAVE];
1647 config.dev = &pdev->dev;
1648 config.driver_data = pmic;
1649 pdev_name = pdev->name;
1650
1651 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
1652 config);
1653 if (ret)
1654 return ret;
1655
1656 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
1657 config);
1658
1659 return ret;
1660}
1661
1662static struct platform_driver palmas_driver = {
1663 .driver = {
1664 .name = "palmas-pmic",
1665 .probe_type = PROBE_PREFER_ASYNCHRONOUS,
1666 .of_match_table = of_palmas_match_tbl,
1667 },
1668 .probe = palmas_regulators_probe,
1669};
1670
1671static int __init palmas_init(void)
1672{
1673 return platform_driver_register(&palmas_driver);
1674}
1675subsys_initcall(palmas_init);
1676
1677static void __exit palmas_exit(void)
1678{
1679 platform_driver_unregister(&palmas_driver);
1680}
1681module_exit(palmas_exit);
1682
1683MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1684MODULE_DESCRIPTION("Palmas voltage regulator driver");
1685MODULE_LICENSE("GPL");
1686MODULE_ALIAS("platform:palmas-pmic");
1687MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);
1/*
2 * Driver for Regulator part of Palmas PMIC Chips
3 *
4 * Copyright 2011-2013 Texas Instruments Inc.
5 *
6 * Author: Graeme Gregory <gg@slimlogic.co.uk>
7 * Author: Ian Lartey <ian@slimlogic.co.uk>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/err.h>
20#include <linux/platform_device.h>
21#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h>
23#include <linux/slab.h>
24#include <linux/regmap.h>
25#include <linux/mfd/palmas.h>
26#include <linux/of.h>
27#include <linux/of_platform.h>
28#include <linux/regulator/of_regulator.h>
29
30static const struct regulator_linear_range smps_low_ranges[] = {
31 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
32 REGULATOR_LINEAR_RANGE(500000, 0x1, 0x6, 0),
33 REGULATOR_LINEAR_RANGE(510000, 0x7, 0x79, 10000),
34 REGULATOR_LINEAR_RANGE(1650000, 0x7A, 0x7f, 0),
35};
36
37static const struct regulator_linear_range smps_high_ranges[] = {
38 REGULATOR_LINEAR_RANGE(0, 0x0, 0x0, 0),
39 REGULATOR_LINEAR_RANGE(1000000, 0x1, 0x6, 0),
40 REGULATOR_LINEAR_RANGE(1020000, 0x7, 0x79, 20000),
41 REGULATOR_LINEAR_RANGE(3300000, 0x7A, 0x7f, 0),
42};
43
44static struct palmas_regs_info palmas_generic_regs_info[] = {
45 {
46 .name = "SMPS12",
47 .sname = "smps1-in",
48 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
49 .ctrl_addr = PALMAS_SMPS12_CTRL,
50 .tstep_addr = PALMAS_SMPS12_TSTEP,
51 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
52 },
53 {
54 .name = "SMPS123",
55 .sname = "smps1-in",
56 .vsel_addr = PALMAS_SMPS12_VOLTAGE,
57 .ctrl_addr = PALMAS_SMPS12_CTRL,
58 .tstep_addr = PALMAS_SMPS12_TSTEP,
59 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS12,
60 },
61 {
62 .name = "SMPS3",
63 .sname = "smps3-in",
64 .vsel_addr = PALMAS_SMPS3_VOLTAGE,
65 .ctrl_addr = PALMAS_SMPS3_CTRL,
66 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS3,
67 },
68 {
69 .name = "SMPS45",
70 .sname = "smps4-in",
71 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
72 .ctrl_addr = PALMAS_SMPS45_CTRL,
73 .tstep_addr = PALMAS_SMPS45_TSTEP,
74 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
75 },
76 {
77 .name = "SMPS457",
78 .sname = "smps4-in",
79 .vsel_addr = PALMAS_SMPS45_VOLTAGE,
80 .ctrl_addr = PALMAS_SMPS45_CTRL,
81 .tstep_addr = PALMAS_SMPS45_TSTEP,
82 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS45,
83 },
84 {
85 .name = "SMPS6",
86 .sname = "smps6-in",
87 .vsel_addr = PALMAS_SMPS6_VOLTAGE,
88 .ctrl_addr = PALMAS_SMPS6_CTRL,
89 .tstep_addr = PALMAS_SMPS6_TSTEP,
90 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS6,
91 },
92 {
93 .name = "SMPS7",
94 .sname = "smps7-in",
95 .vsel_addr = PALMAS_SMPS7_VOLTAGE,
96 .ctrl_addr = PALMAS_SMPS7_CTRL,
97 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS7,
98 },
99 {
100 .name = "SMPS8",
101 .sname = "smps8-in",
102 .vsel_addr = PALMAS_SMPS8_VOLTAGE,
103 .ctrl_addr = PALMAS_SMPS8_CTRL,
104 .tstep_addr = PALMAS_SMPS8_TSTEP,
105 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS8,
106 },
107 {
108 .name = "SMPS9",
109 .sname = "smps9-in",
110 .vsel_addr = PALMAS_SMPS9_VOLTAGE,
111 .ctrl_addr = PALMAS_SMPS9_CTRL,
112 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS9,
113 },
114 {
115 .name = "SMPS10_OUT2",
116 .sname = "smps10-in",
117 .ctrl_addr = PALMAS_SMPS10_CTRL,
118 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
119 },
120 {
121 .name = "SMPS10_OUT1",
122 .sname = "smps10-out2",
123 .ctrl_addr = PALMAS_SMPS10_CTRL,
124 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SMPS10,
125 },
126 {
127 .name = "LDO1",
128 .sname = "ldo1-in",
129 .vsel_addr = PALMAS_LDO1_VOLTAGE,
130 .ctrl_addr = PALMAS_LDO1_CTRL,
131 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO1,
132 },
133 {
134 .name = "LDO2",
135 .sname = "ldo2-in",
136 .vsel_addr = PALMAS_LDO2_VOLTAGE,
137 .ctrl_addr = PALMAS_LDO2_CTRL,
138 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO2,
139 },
140 {
141 .name = "LDO3",
142 .sname = "ldo3-in",
143 .vsel_addr = PALMAS_LDO3_VOLTAGE,
144 .ctrl_addr = PALMAS_LDO3_CTRL,
145 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO3,
146 },
147 {
148 .name = "LDO4",
149 .sname = "ldo4-in",
150 .vsel_addr = PALMAS_LDO4_VOLTAGE,
151 .ctrl_addr = PALMAS_LDO4_CTRL,
152 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO4,
153 },
154 {
155 .name = "LDO5",
156 .sname = "ldo5-in",
157 .vsel_addr = PALMAS_LDO5_VOLTAGE,
158 .ctrl_addr = PALMAS_LDO5_CTRL,
159 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO5,
160 },
161 {
162 .name = "LDO6",
163 .sname = "ldo6-in",
164 .vsel_addr = PALMAS_LDO6_VOLTAGE,
165 .ctrl_addr = PALMAS_LDO6_CTRL,
166 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO6,
167 },
168 {
169 .name = "LDO7",
170 .sname = "ldo7-in",
171 .vsel_addr = PALMAS_LDO7_VOLTAGE,
172 .ctrl_addr = PALMAS_LDO7_CTRL,
173 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO7,
174 },
175 {
176 .name = "LDO8",
177 .sname = "ldo8-in",
178 .vsel_addr = PALMAS_LDO8_VOLTAGE,
179 .ctrl_addr = PALMAS_LDO8_CTRL,
180 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO8,
181 },
182 {
183 .name = "LDO9",
184 .sname = "ldo9-in",
185 .vsel_addr = PALMAS_LDO9_VOLTAGE,
186 .ctrl_addr = PALMAS_LDO9_CTRL,
187 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDO9,
188 },
189 {
190 .name = "LDOLN",
191 .sname = "ldoln-in",
192 .vsel_addr = PALMAS_LDOLN_VOLTAGE,
193 .ctrl_addr = PALMAS_LDOLN_CTRL,
194 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOLN,
195 },
196 {
197 .name = "LDOUSB",
198 .sname = "ldousb-in",
199 .vsel_addr = PALMAS_LDOUSB_VOLTAGE,
200 .ctrl_addr = PALMAS_LDOUSB_CTRL,
201 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_LDOUSB,
202 },
203 {
204 .name = "REGEN1",
205 .ctrl_addr = PALMAS_REGEN1_CTRL,
206 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN1,
207 },
208 {
209 .name = "REGEN2",
210 .ctrl_addr = PALMAS_REGEN2_CTRL,
211 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN2,
212 },
213 {
214 .name = "REGEN3",
215 .ctrl_addr = PALMAS_REGEN3_CTRL,
216 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_REGEN3,
217 },
218 {
219 .name = "SYSEN1",
220 .ctrl_addr = PALMAS_SYSEN1_CTRL,
221 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN1,
222 },
223 {
224 .name = "SYSEN2",
225 .ctrl_addr = PALMAS_SYSEN2_CTRL,
226 .sleep_id = PALMAS_EXTERNAL_REQSTR_ID_SYSEN2,
227 },
228};
229
230static struct palmas_regs_info tps65917_regs_info[] = {
231 {
232 .name = "SMPS1",
233 .sname = "smps1-in",
234 .vsel_addr = TPS65917_SMPS1_VOLTAGE,
235 .ctrl_addr = TPS65917_SMPS1_CTRL,
236 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS1,
237 },
238 {
239 .name = "SMPS2",
240 .sname = "smps2-in",
241 .vsel_addr = TPS65917_SMPS2_VOLTAGE,
242 .ctrl_addr = TPS65917_SMPS2_CTRL,
243 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS2,
244 },
245 {
246 .name = "SMPS3",
247 .sname = "smps3-in",
248 .vsel_addr = TPS65917_SMPS3_VOLTAGE,
249 .ctrl_addr = TPS65917_SMPS3_CTRL,
250 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS3,
251 },
252 {
253 .name = "SMPS4",
254 .sname = "smps4-in",
255 .vsel_addr = TPS65917_SMPS4_VOLTAGE,
256 .ctrl_addr = TPS65917_SMPS4_CTRL,
257 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS4,
258 },
259 {
260 .name = "SMPS5",
261 .sname = "smps5-in",
262 .vsel_addr = TPS65917_SMPS5_VOLTAGE,
263 .ctrl_addr = TPS65917_SMPS5_CTRL,
264 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_SMPS5,
265 },
266 {
267 .name = "LDO1",
268 .sname = "ldo1-in",
269 .vsel_addr = TPS65917_LDO1_VOLTAGE,
270 .ctrl_addr = TPS65917_LDO1_CTRL,
271 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO1,
272 },
273 {
274 .name = "LDO2",
275 .sname = "ldo2-in",
276 .vsel_addr = TPS65917_LDO2_VOLTAGE,
277 .ctrl_addr = TPS65917_LDO2_CTRL,
278 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO2,
279 },
280 {
281 .name = "LDO3",
282 .sname = "ldo3-in",
283 .vsel_addr = TPS65917_LDO3_VOLTAGE,
284 .ctrl_addr = TPS65917_LDO3_CTRL,
285 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO3,
286 },
287 {
288 .name = "LDO4",
289 .sname = "ldo4-in",
290 .vsel_addr = TPS65917_LDO4_VOLTAGE,
291 .ctrl_addr = TPS65917_LDO4_CTRL,
292 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO4,
293 },
294 {
295 .name = "LDO5",
296 .sname = "ldo5-in",
297 .vsel_addr = TPS65917_LDO5_VOLTAGE,
298 .ctrl_addr = TPS65917_LDO5_CTRL,
299 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_LDO5,
300 },
301 {
302 .name = "REGEN1",
303 .ctrl_addr = TPS65917_REGEN1_CTRL,
304 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN1,
305 },
306 {
307 .name = "REGEN2",
308 .ctrl_addr = TPS65917_REGEN2_CTRL,
309 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN2,
310 },
311 {
312 .name = "REGEN3",
313 .ctrl_addr = TPS65917_REGEN3_CTRL,
314 .sleep_id = TPS65917_EXTERNAL_REQSTR_ID_REGEN3,
315 },
316};
317
318#define EXTERNAL_REQUESTOR(_id, _offset, _pos) \
319 [PALMAS_EXTERNAL_REQSTR_ID_##_id] = { \
320 .id = PALMAS_EXTERNAL_REQSTR_ID_##_id, \
321 .reg_offset = _offset, \
322 .bit_pos = _pos, \
323 }
324
325static struct palmas_sleep_requestor_info palma_sleep_req_info[] = {
326 EXTERNAL_REQUESTOR(REGEN1, 0, 0),
327 EXTERNAL_REQUESTOR(REGEN2, 0, 1),
328 EXTERNAL_REQUESTOR(SYSEN1, 0, 2),
329 EXTERNAL_REQUESTOR(SYSEN2, 0, 3),
330 EXTERNAL_REQUESTOR(CLK32KG, 0, 4),
331 EXTERNAL_REQUESTOR(CLK32KGAUDIO, 0, 5),
332 EXTERNAL_REQUESTOR(REGEN3, 0, 6),
333 EXTERNAL_REQUESTOR(SMPS12, 1, 0),
334 EXTERNAL_REQUESTOR(SMPS3, 1, 1),
335 EXTERNAL_REQUESTOR(SMPS45, 1, 2),
336 EXTERNAL_REQUESTOR(SMPS6, 1, 3),
337 EXTERNAL_REQUESTOR(SMPS7, 1, 4),
338 EXTERNAL_REQUESTOR(SMPS8, 1, 5),
339 EXTERNAL_REQUESTOR(SMPS9, 1, 6),
340 EXTERNAL_REQUESTOR(SMPS10, 1, 7),
341 EXTERNAL_REQUESTOR(LDO1, 2, 0),
342 EXTERNAL_REQUESTOR(LDO2, 2, 1),
343 EXTERNAL_REQUESTOR(LDO3, 2, 2),
344 EXTERNAL_REQUESTOR(LDO4, 2, 3),
345 EXTERNAL_REQUESTOR(LDO5, 2, 4),
346 EXTERNAL_REQUESTOR(LDO6, 2, 5),
347 EXTERNAL_REQUESTOR(LDO7, 2, 6),
348 EXTERNAL_REQUESTOR(LDO8, 2, 7),
349 EXTERNAL_REQUESTOR(LDO9, 3, 0),
350 EXTERNAL_REQUESTOR(LDOLN, 3, 1),
351 EXTERNAL_REQUESTOR(LDOUSB, 3, 2),
352};
353
354#define EXTERNAL_REQUESTOR_TPS65917(_id, _offset, _pos) \
355 [TPS65917_EXTERNAL_REQSTR_ID_##_id] = { \
356 .id = TPS65917_EXTERNAL_REQSTR_ID_##_id, \
357 .reg_offset = _offset, \
358 .bit_pos = _pos, \
359 }
360
361static struct palmas_sleep_requestor_info tps65917_sleep_req_info[] = {
362 EXTERNAL_REQUESTOR_TPS65917(REGEN1, 0, 0),
363 EXTERNAL_REQUESTOR_TPS65917(REGEN2, 0, 1),
364 EXTERNAL_REQUESTOR_TPS65917(REGEN3, 0, 6),
365 EXTERNAL_REQUESTOR_TPS65917(SMPS1, 1, 0),
366 EXTERNAL_REQUESTOR_TPS65917(SMPS2, 1, 1),
367 EXTERNAL_REQUESTOR_TPS65917(SMPS3, 1, 2),
368 EXTERNAL_REQUESTOR_TPS65917(SMPS4, 1, 3),
369 EXTERNAL_REQUESTOR_TPS65917(SMPS5, 1, 4),
370 EXTERNAL_REQUESTOR_TPS65917(LDO1, 2, 0),
371 EXTERNAL_REQUESTOR_TPS65917(LDO2, 2, 1),
372 EXTERNAL_REQUESTOR_TPS65917(LDO3, 2, 2),
373 EXTERNAL_REQUESTOR_TPS65917(LDO4, 2, 3),
374 EXTERNAL_REQUESTOR_TPS65917(LDO5, 2, 4),
375};
376
377static unsigned int palmas_smps_ramp_delay[4] = {0, 10000, 5000, 2500};
378
379#define SMPS_CTRL_MODE_OFF 0x00
380#define SMPS_CTRL_MODE_ON 0x01
381#define SMPS_CTRL_MODE_ECO 0x02
382#define SMPS_CTRL_MODE_PWM 0x03
383
384#define PALMAS_SMPS_NUM_VOLTAGES 122
385#define PALMAS_SMPS10_NUM_VOLTAGES 2
386#define PALMAS_LDO_NUM_VOLTAGES 50
387
388#define SMPS10_VSEL (1<<3)
389#define SMPS10_BOOST_EN (1<<2)
390#define SMPS10_BYPASS_EN (1<<1)
391#define SMPS10_SWITCH_EN (1<<0)
392
393#define REGULATOR_SLAVE 0
394
395static int palmas_smps_read(struct palmas *palmas, unsigned int reg,
396 unsigned int *dest)
397{
398 unsigned int addr;
399
400 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
401
402 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
403}
404
405static int palmas_smps_write(struct palmas *palmas, unsigned int reg,
406 unsigned int value)
407{
408 unsigned int addr;
409
410 addr = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE, reg);
411
412 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
413}
414
415static int palmas_ldo_read(struct palmas *palmas, unsigned int reg,
416 unsigned int *dest)
417{
418 unsigned int addr;
419
420 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
421
422 return regmap_read(palmas->regmap[REGULATOR_SLAVE], addr, dest);
423}
424
425static int palmas_ldo_write(struct palmas *palmas, unsigned int reg,
426 unsigned int value)
427{
428 unsigned int addr;
429
430 addr = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE, reg);
431
432 return regmap_write(palmas->regmap[REGULATOR_SLAVE], addr, value);
433}
434
435static int palmas_set_mode_smps(struct regulator_dev *dev, unsigned int mode)
436{
437 int id = rdev_get_id(dev);
438 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
439 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
440 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
441 unsigned int reg;
442 bool rail_enable = true;
443
444 palmas_smps_read(pmic->palmas, rinfo->ctrl_addr, ®);
445
446 reg &= ~PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
447
448 if (reg == SMPS_CTRL_MODE_OFF)
449 rail_enable = false;
450
451 switch (mode) {
452 case REGULATOR_MODE_NORMAL:
453 reg |= SMPS_CTRL_MODE_ON;
454 break;
455 case REGULATOR_MODE_IDLE:
456 reg |= SMPS_CTRL_MODE_ECO;
457 break;
458 case REGULATOR_MODE_FAST:
459 reg |= SMPS_CTRL_MODE_PWM;
460 break;
461 default:
462 return -EINVAL;
463 }
464
465 pmic->current_reg_mode[id] = reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
466 if (rail_enable)
467 palmas_smps_write(pmic->palmas, rinfo->ctrl_addr, reg);
468
469 /* Switch the enable value to ensure this is used for enable */
470 pmic->desc[id].enable_val = pmic->current_reg_mode[id];
471
472 return 0;
473}
474
475static unsigned int palmas_get_mode_smps(struct regulator_dev *dev)
476{
477 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
478 int id = rdev_get_id(dev);
479 unsigned int reg;
480
481 reg = pmic->current_reg_mode[id] & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
482
483 switch (reg) {
484 case SMPS_CTRL_MODE_ON:
485 return REGULATOR_MODE_NORMAL;
486 case SMPS_CTRL_MODE_ECO:
487 return REGULATOR_MODE_IDLE;
488 case SMPS_CTRL_MODE_PWM:
489 return REGULATOR_MODE_FAST;
490 }
491
492 return 0;
493}
494
495static int palmas_smps_set_ramp_delay(struct regulator_dev *rdev,
496 int ramp_delay)
497{
498 int id = rdev_get_id(rdev);
499 struct palmas_pmic *pmic = rdev_get_drvdata(rdev);
500 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
501 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
502 unsigned int reg = 0;
503 int ret;
504
505 /* SMPS3 and SMPS7 do not have tstep_addr setting */
506 switch (id) {
507 case PALMAS_REG_SMPS3:
508 case PALMAS_REG_SMPS7:
509 return 0;
510 }
511
512 if (ramp_delay <= 0)
513 reg = 0;
514 else if (ramp_delay <= 2500)
515 reg = 3;
516 else if (ramp_delay <= 5000)
517 reg = 2;
518 else
519 reg = 1;
520
521 ret = palmas_smps_write(pmic->palmas, rinfo->tstep_addr, reg);
522 if (ret < 0) {
523 dev_err(pmic->palmas->dev, "TSTEP write failed: %d\n", ret);
524 return ret;
525 }
526
527 pmic->ramp_delay[id] = palmas_smps_ramp_delay[reg];
528 return ret;
529}
530
531static struct regulator_ops palmas_ops_smps = {
532 .is_enabled = regulator_is_enabled_regmap,
533 .enable = regulator_enable_regmap,
534 .disable = regulator_disable_regmap,
535 .set_mode = palmas_set_mode_smps,
536 .get_mode = palmas_get_mode_smps,
537 .get_voltage_sel = regulator_get_voltage_sel_regmap,
538 .set_voltage_sel = regulator_set_voltage_sel_regmap,
539 .list_voltage = regulator_list_voltage_linear_range,
540 .map_voltage = regulator_map_voltage_linear_range,
541 .set_voltage_time_sel = regulator_set_voltage_time_sel,
542 .set_ramp_delay = palmas_smps_set_ramp_delay,
543};
544
545static struct regulator_ops palmas_ops_ext_control_smps = {
546 .set_mode = palmas_set_mode_smps,
547 .get_mode = palmas_get_mode_smps,
548 .get_voltage_sel = regulator_get_voltage_sel_regmap,
549 .set_voltage_sel = regulator_set_voltage_sel_regmap,
550 .list_voltage = regulator_list_voltage_linear_range,
551 .map_voltage = regulator_map_voltage_linear_range,
552 .set_voltage_time_sel = regulator_set_voltage_time_sel,
553 .set_ramp_delay = palmas_smps_set_ramp_delay,
554};
555
556static struct regulator_ops palmas_ops_smps10 = {
557 .is_enabled = regulator_is_enabled_regmap,
558 .enable = regulator_enable_regmap,
559 .disable = regulator_disable_regmap,
560 .get_voltage_sel = regulator_get_voltage_sel_regmap,
561 .set_voltage_sel = regulator_set_voltage_sel_regmap,
562 .list_voltage = regulator_list_voltage_linear,
563 .map_voltage = regulator_map_voltage_linear,
564 .set_bypass = regulator_set_bypass_regmap,
565 .get_bypass = regulator_get_bypass_regmap,
566};
567
568static struct regulator_ops tps65917_ops_smps = {
569 .is_enabled = regulator_is_enabled_regmap,
570 .enable = regulator_enable_regmap,
571 .disable = regulator_disable_regmap,
572 .set_mode = palmas_set_mode_smps,
573 .get_mode = palmas_get_mode_smps,
574 .get_voltage_sel = regulator_get_voltage_sel_regmap,
575 .set_voltage_sel = regulator_set_voltage_sel_regmap,
576 .list_voltage = regulator_list_voltage_linear_range,
577 .map_voltage = regulator_map_voltage_linear_range,
578 .set_voltage_time_sel = regulator_set_voltage_time_sel,
579};
580
581static struct regulator_ops tps65917_ops_ext_control_smps = {
582 .set_mode = palmas_set_mode_smps,
583 .get_mode = palmas_get_mode_smps,
584 .get_voltage_sel = regulator_get_voltage_sel_regmap,
585 .set_voltage_sel = regulator_set_voltage_sel_regmap,
586 .list_voltage = regulator_list_voltage_linear_range,
587 .map_voltage = regulator_map_voltage_linear_range,
588};
589
590static int palmas_is_enabled_ldo(struct regulator_dev *dev)
591{
592 int id = rdev_get_id(dev);
593 struct palmas_pmic *pmic = rdev_get_drvdata(dev);
594 struct palmas_pmic_driver_data *ddata = pmic->palmas->pmic_ddata;
595 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
596 unsigned int reg;
597
598 palmas_ldo_read(pmic->palmas, rinfo->ctrl_addr, ®);
599
600 reg &= PALMAS_LDO1_CTRL_STATUS;
601
602 return !!(reg);
603}
604
605static struct regulator_ops palmas_ops_ldo = {
606 .is_enabled = palmas_is_enabled_ldo,
607 .enable = regulator_enable_regmap,
608 .disable = regulator_disable_regmap,
609 .get_voltage_sel = regulator_get_voltage_sel_regmap,
610 .set_voltage_sel = regulator_set_voltage_sel_regmap,
611 .list_voltage = regulator_list_voltage_linear,
612 .map_voltage = regulator_map_voltage_linear,
613};
614
615static struct regulator_ops palmas_ops_ldo9 = {
616 .is_enabled = palmas_is_enabled_ldo,
617 .enable = regulator_enable_regmap,
618 .disable = regulator_disable_regmap,
619 .get_voltage_sel = regulator_get_voltage_sel_regmap,
620 .set_voltage_sel = regulator_set_voltage_sel_regmap,
621 .list_voltage = regulator_list_voltage_linear,
622 .map_voltage = regulator_map_voltage_linear,
623 .set_bypass = regulator_set_bypass_regmap,
624 .get_bypass = regulator_get_bypass_regmap,
625};
626
627static struct regulator_ops palmas_ops_ext_control_ldo = {
628 .get_voltage_sel = regulator_get_voltage_sel_regmap,
629 .set_voltage_sel = regulator_set_voltage_sel_regmap,
630 .list_voltage = regulator_list_voltage_linear,
631 .map_voltage = regulator_map_voltage_linear,
632};
633
634static struct regulator_ops palmas_ops_extreg = {
635 .is_enabled = regulator_is_enabled_regmap,
636 .enable = regulator_enable_regmap,
637 .disable = regulator_disable_regmap,
638};
639
640static struct regulator_ops palmas_ops_ext_control_extreg = {
641};
642
643static struct regulator_ops tps65917_ops_ldo = {
644 .is_enabled = palmas_is_enabled_ldo,
645 .enable = regulator_enable_regmap,
646 .disable = regulator_disable_regmap,
647 .get_voltage_sel = regulator_get_voltage_sel_regmap,
648 .set_voltage_sel = regulator_set_voltage_sel_regmap,
649 .list_voltage = regulator_list_voltage_linear,
650 .map_voltage = regulator_map_voltage_linear,
651 .set_voltage_time_sel = regulator_set_voltage_time_sel,
652};
653
654static struct regulator_ops tps65917_ops_ldo_1_2 = {
655 .is_enabled = palmas_is_enabled_ldo,
656 .enable = regulator_enable_regmap,
657 .disable = regulator_disable_regmap,
658 .get_voltage_sel = regulator_get_voltage_sel_regmap,
659 .set_voltage_sel = regulator_set_voltage_sel_regmap,
660 .list_voltage = regulator_list_voltage_linear,
661 .map_voltage = regulator_map_voltage_linear,
662 .set_voltage_time_sel = regulator_set_voltage_time_sel,
663 .set_bypass = regulator_set_bypass_regmap,
664 .get_bypass = regulator_get_bypass_regmap,
665};
666
667static int palmas_regulator_config_external(struct palmas *palmas, int id,
668 struct palmas_reg_init *reg_init)
669{
670 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
671 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
672 int ret;
673
674 ret = palmas_ext_control_req_config(palmas, rinfo->sleep_id,
675 reg_init->roof_floor, true);
676 if (ret < 0)
677 dev_err(palmas->dev,
678 "Ext control config for regulator %d failed %d\n",
679 id, ret);
680 return ret;
681}
682
683/*
684 * setup the hardware based sleep configuration of the SMPS/LDO regulators
685 * from the platform data. This is different to the software based control
686 * supported by the regulator framework as it is controlled by toggling
687 * pins on the PMIC such as PREQ, SYSEN, ...
688 */
689static int palmas_smps_init(struct palmas *palmas, int id,
690 struct palmas_reg_init *reg_init)
691{
692 unsigned int reg;
693 int ret;
694 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
695 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
696 unsigned int addr = rinfo->ctrl_addr;
697
698 ret = palmas_smps_read(palmas, addr, ®);
699 if (ret)
700 return ret;
701
702 switch (id) {
703 case PALMAS_REG_SMPS10_OUT1:
704 case PALMAS_REG_SMPS10_OUT2:
705 reg &= ~PALMAS_SMPS10_CTRL_MODE_SLEEP_MASK;
706 if (reg_init->mode_sleep)
707 reg |= reg_init->mode_sleep <<
708 PALMAS_SMPS10_CTRL_MODE_SLEEP_SHIFT;
709 break;
710 default:
711 if (reg_init->warm_reset)
712 reg |= PALMAS_SMPS12_CTRL_WR_S;
713 else
714 reg &= ~PALMAS_SMPS12_CTRL_WR_S;
715
716 if (reg_init->roof_floor)
717 reg |= PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
718 else
719 reg &= ~PALMAS_SMPS12_CTRL_ROOF_FLOOR_EN;
720
721 reg &= ~PALMAS_SMPS12_CTRL_MODE_SLEEP_MASK;
722 if (reg_init->mode_sleep)
723 reg |= reg_init->mode_sleep <<
724 PALMAS_SMPS12_CTRL_MODE_SLEEP_SHIFT;
725 }
726
727 ret = palmas_smps_write(palmas, addr, reg);
728 if (ret)
729 return ret;
730
731 if (rinfo->vsel_addr && reg_init->vsel) {
732
733 reg = reg_init->vsel;
734
735 ret = palmas_smps_write(palmas, rinfo->vsel_addr, reg);
736 if (ret)
737 return ret;
738 }
739
740 if (reg_init->roof_floor && (id != PALMAS_REG_SMPS10_OUT1) &&
741 (id != PALMAS_REG_SMPS10_OUT2)) {
742 /* Enable externally controlled regulator */
743 ret = palmas_smps_read(palmas, addr, ®);
744 if (ret < 0)
745 return ret;
746
747 if (!(reg & PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK)) {
748 reg |= SMPS_CTRL_MODE_ON;
749 ret = palmas_smps_write(palmas, addr, reg);
750 if (ret < 0)
751 return ret;
752 }
753 return palmas_regulator_config_external(palmas, id, reg_init);
754 }
755 return 0;
756}
757
758static int palmas_ldo_init(struct palmas *palmas, int id,
759 struct palmas_reg_init *reg_init)
760{
761 unsigned int reg;
762 unsigned int addr;
763 int ret;
764 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
765 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
766
767 addr = rinfo->ctrl_addr;
768
769 ret = palmas_ldo_read(palmas, addr, ®);
770 if (ret)
771 return ret;
772
773 if (reg_init->warm_reset)
774 reg |= PALMAS_LDO1_CTRL_WR_S;
775 else
776 reg &= ~PALMAS_LDO1_CTRL_WR_S;
777
778 if (reg_init->mode_sleep)
779 reg |= PALMAS_LDO1_CTRL_MODE_SLEEP;
780 else
781 reg &= ~PALMAS_LDO1_CTRL_MODE_SLEEP;
782
783 ret = palmas_ldo_write(palmas, addr, reg);
784 if (ret)
785 return ret;
786
787 if (reg_init->roof_floor) {
788 /* Enable externally controlled regulator */
789 ret = palmas_update_bits(palmas, PALMAS_LDO_BASE,
790 addr, PALMAS_LDO1_CTRL_MODE_ACTIVE,
791 PALMAS_LDO1_CTRL_MODE_ACTIVE);
792 if (ret < 0) {
793 dev_err(palmas->dev,
794 "LDO Register 0x%02x update failed %d\n",
795 addr, ret);
796 return ret;
797 }
798 return palmas_regulator_config_external(palmas, id, reg_init);
799 }
800 return 0;
801}
802
803static int palmas_extreg_init(struct palmas *palmas, int id,
804 struct palmas_reg_init *reg_init)
805{
806 unsigned int addr;
807 int ret;
808 unsigned int val = 0;
809 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
810 struct palmas_regs_info *rinfo = &ddata->palmas_regs_info[id];
811
812 addr = rinfo->ctrl_addr;
813
814 if (reg_init->mode_sleep)
815 val = PALMAS_REGEN1_CTRL_MODE_SLEEP;
816
817 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
818 addr, PALMAS_REGEN1_CTRL_MODE_SLEEP, val);
819 if (ret < 0) {
820 dev_err(palmas->dev, "Resource reg 0x%02x update failed %d\n",
821 addr, ret);
822 return ret;
823 }
824
825 if (reg_init->roof_floor) {
826 /* Enable externally controlled regulator */
827 ret = palmas_update_bits(palmas, PALMAS_RESOURCE_BASE,
828 addr, PALMAS_REGEN1_CTRL_MODE_ACTIVE,
829 PALMAS_REGEN1_CTRL_MODE_ACTIVE);
830 if (ret < 0) {
831 dev_err(palmas->dev,
832 "Resource Register 0x%02x update failed %d\n",
833 addr, ret);
834 return ret;
835 }
836 return palmas_regulator_config_external(palmas, id, reg_init);
837 }
838 return 0;
839}
840
841static void palmas_enable_ldo8_track(struct palmas *palmas)
842{
843 unsigned int reg;
844 unsigned int addr;
845 int ret;
846 struct palmas_pmic_driver_data *ddata = palmas->pmic_ddata;
847 struct palmas_regs_info *rinfo;
848
849 rinfo = &ddata->palmas_regs_info[PALMAS_REG_LDO8];
850 addr = rinfo->ctrl_addr;
851
852 ret = palmas_ldo_read(palmas, addr, ®);
853 if (ret) {
854 dev_err(palmas->dev, "Error in reading ldo8 control reg\n");
855 return;
856 }
857
858 reg |= PALMAS_LDO8_CTRL_LDO_TRACKING_EN;
859 ret = palmas_ldo_write(palmas, addr, reg);
860 if (ret < 0) {
861 dev_err(palmas->dev, "Error in enabling tracking mode\n");
862 return;
863 }
864 /*
865 * When SMPS45 is set to off and LDO8 tracking is enabled, the LDO8
866 * output is defined by the LDO8_VOLTAGE.VSEL register divided by two,
867 * and can be set from 0.45 to 1.65 V.
868 */
869 addr = rinfo->vsel_addr;
870 ret = palmas_ldo_read(palmas, addr, ®);
871 if (ret) {
872 dev_err(palmas->dev, "Error in reading ldo8 voltage reg\n");
873 return;
874 }
875
876 reg = (reg << 1) & PALMAS_LDO8_VOLTAGE_VSEL_MASK;
877 ret = palmas_ldo_write(palmas, addr, reg);
878 if (ret < 0)
879 dev_err(palmas->dev, "Error in setting ldo8 voltage reg\n");
880
881 return;
882}
883
884static int palmas_ldo_registration(struct palmas_pmic *pmic,
885 struct palmas_pmic_driver_data *ddata,
886 struct palmas_pmic_platform_data *pdata,
887 const char *pdev_name,
888 struct regulator_config config)
889{
890 int id, ret;
891 struct regulator_dev *rdev;
892 struct palmas_reg_init *reg_init;
893 struct palmas_regs_info *rinfo;
894 struct regulator_desc *desc;
895
896 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
897 if (pdata && pdata->reg_init[id])
898 reg_init = pdata->reg_init[id];
899 else
900 reg_init = NULL;
901
902 rinfo = &ddata->palmas_regs_info[id];
903 /* Miss out regulators which are not available due
904 * to alternate functions.
905 */
906
907 /* Register the regulators */
908 desc = &pmic->desc[id];
909 desc->name = rinfo->name;
910 desc->id = id;
911 desc->type = REGULATOR_VOLTAGE;
912 desc->owner = THIS_MODULE;
913
914 if (id < PALMAS_REG_REGEN1) {
915 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
916 if (reg_init && reg_init->roof_floor)
917 desc->ops = &palmas_ops_ext_control_ldo;
918 else
919 desc->ops = &palmas_ops_ldo;
920 desc->min_uV = 900000;
921 desc->uV_step = 50000;
922 desc->linear_min_sel = 1;
923 desc->enable_time = 500;
924 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
925 rinfo->vsel_addr);
926 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
927 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
928 rinfo->ctrl_addr);
929 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
930
931 /* Check if LDO8 is in tracking mode or not */
932 if (pdata && (id == PALMAS_REG_LDO8) &&
933 pdata->enable_ldo8_tracking) {
934 palmas_enable_ldo8_track(pmic->palmas);
935 desc->min_uV = 450000;
936 desc->uV_step = 25000;
937 }
938
939 /* LOD6 in vibrator mode will have enable time 2000us */
940 if (pdata && pdata->ldo6_vibrator &&
941 (id == PALMAS_REG_LDO6))
942 desc->enable_time = 2000;
943
944 if (id == PALMAS_REG_LDO9) {
945 desc->ops = &palmas_ops_ldo9;
946 desc->bypass_reg = desc->enable_reg;
947 desc->bypass_mask =
948 PALMAS_LDO9_CTRL_LDO_BYPASS_EN;
949 }
950 } else {
951 if (!ddata->has_regen3 && id == PALMAS_REG_REGEN3)
952 continue;
953
954 desc->n_voltages = 1;
955 if (reg_init && reg_init->roof_floor)
956 desc->ops = &palmas_ops_ext_control_extreg;
957 else
958 desc->ops = &palmas_ops_extreg;
959 desc->enable_reg =
960 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
961 rinfo->ctrl_addr);
962 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
963 }
964
965 if (pdata)
966 config.init_data = pdata->reg_data[id];
967 else
968 config.init_data = NULL;
969
970 desc->supply_name = rinfo->sname;
971 config.of_node = ddata->palmas_matches[id].of_node;
972
973 rdev = devm_regulator_register(pmic->dev, desc, &config);
974 if (IS_ERR(rdev)) {
975 dev_err(pmic->dev,
976 "failed to register %s regulator\n",
977 pdev_name);
978 return PTR_ERR(rdev);
979 }
980
981 /* Save regulator for cleanup */
982 pmic->rdev[id] = rdev;
983
984 /* Initialise sleep/init values from platform data */
985 if (pdata) {
986 reg_init = pdata->reg_init[id];
987 if (reg_init) {
988 if (id <= ddata->ldo_end)
989 ret = palmas_ldo_init(pmic->palmas, id,
990 reg_init);
991 else
992 ret = palmas_extreg_init(pmic->palmas,
993 id, reg_init);
994 if (ret)
995 return ret;
996 }
997 }
998 }
999
1000 return 0;
1001}
1002
1003static int tps65917_ldo_registration(struct palmas_pmic *pmic,
1004 struct palmas_pmic_driver_data *ddata,
1005 struct palmas_pmic_platform_data *pdata,
1006 const char *pdev_name,
1007 struct regulator_config config)
1008{
1009 int id, ret;
1010 struct regulator_dev *rdev;
1011 struct palmas_reg_init *reg_init;
1012 struct palmas_regs_info *rinfo;
1013 struct regulator_desc *desc;
1014
1015 for (id = ddata->ldo_begin; id < ddata->max_reg; id++) {
1016 if (pdata && pdata->reg_init[id])
1017 reg_init = pdata->reg_init[id];
1018 else
1019 reg_init = NULL;
1020
1021 /* Miss out regulators which are not available due
1022 * to alternate functions.
1023 */
1024 rinfo = &ddata->palmas_regs_info[id];
1025
1026 /* Register the regulators */
1027 desc = &pmic->desc[id];
1028 desc->name = rinfo->name;
1029 desc->id = id;
1030 desc->type = REGULATOR_VOLTAGE;
1031 desc->owner = THIS_MODULE;
1032
1033 if (id < TPS65917_REG_REGEN1) {
1034 desc->n_voltages = PALMAS_LDO_NUM_VOLTAGES;
1035 if (reg_init && reg_init->roof_floor)
1036 desc->ops = &palmas_ops_ext_control_ldo;
1037 else
1038 desc->ops = &tps65917_ops_ldo;
1039 desc->min_uV = 900000;
1040 desc->uV_step = 50000;
1041 desc->linear_min_sel = 1;
1042 desc->enable_time = 500;
1043 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1044 rinfo->vsel_addr);
1045 desc->vsel_mask = PALMAS_LDO1_VOLTAGE_VSEL_MASK;
1046 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_LDO_BASE,
1047 rinfo->ctrl_addr);
1048 desc->enable_mask = PALMAS_LDO1_CTRL_MODE_ACTIVE;
1049 /*
1050 * To be confirmed. Discussion on going with PMIC Team.
1051 * It is of the order of ~60mV/uS.
1052 */
1053 desc->ramp_delay = 2500;
1054 if (id == TPS65917_REG_LDO1 ||
1055 id == TPS65917_REG_LDO2) {
1056 desc->ops = &tps65917_ops_ldo_1_2;
1057 desc->bypass_reg = desc->enable_reg;
1058 desc->bypass_mask =
1059 TPS65917_LDO1_CTRL_BYPASS_EN;
1060 }
1061 } else {
1062 desc->n_voltages = 1;
1063 if (reg_init && reg_init->roof_floor)
1064 desc->ops = &palmas_ops_ext_control_extreg;
1065 else
1066 desc->ops = &palmas_ops_extreg;
1067 desc->enable_reg =
1068 PALMAS_BASE_TO_REG(PALMAS_RESOURCE_BASE,
1069 rinfo->ctrl_addr);
1070 desc->enable_mask = PALMAS_REGEN1_CTRL_MODE_ACTIVE;
1071 }
1072
1073 if (pdata)
1074 config.init_data = pdata->reg_data[id];
1075 else
1076 config.init_data = NULL;
1077
1078 desc->supply_name = rinfo->sname;
1079 config.of_node = ddata->palmas_matches[id].of_node;
1080
1081 rdev = devm_regulator_register(pmic->dev, desc, &config);
1082 if (IS_ERR(rdev)) {
1083 dev_err(pmic->dev,
1084 "failed to register %s regulator\n",
1085 pdev_name);
1086 return PTR_ERR(rdev);
1087 }
1088
1089 /* Save regulator for cleanup */
1090 pmic->rdev[id] = rdev;
1091
1092 /* Initialise sleep/init values from platform data */
1093 if (pdata) {
1094 reg_init = pdata->reg_init[id];
1095 if (reg_init) {
1096 if (id < TPS65917_REG_REGEN1)
1097 ret = palmas_ldo_init(pmic->palmas,
1098 id, reg_init);
1099 else
1100 ret = palmas_extreg_init(pmic->palmas,
1101 id, reg_init);
1102 if (ret)
1103 return ret;
1104 }
1105 }
1106 }
1107
1108 return 0;
1109}
1110
1111static int palmas_smps_registration(struct palmas_pmic *pmic,
1112 struct palmas_pmic_driver_data *ddata,
1113 struct palmas_pmic_platform_data *pdata,
1114 const char *pdev_name,
1115 struct regulator_config config)
1116{
1117 int id, ret;
1118 unsigned int addr, reg;
1119 struct regulator_dev *rdev;
1120 struct palmas_reg_init *reg_init;
1121 struct palmas_regs_info *rinfo;
1122 struct regulator_desc *desc;
1123
1124 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1125 bool ramp_delay_support = false;
1126
1127 /*
1128 * Miss out regulators which are not available due
1129 * to slaving configurations.
1130 */
1131 switch (id) {
1132 case PALMAS_REG_SMPS12:
1133 case PALMAS_REG_SMPS3:
1134 if (pmic->smps123)
1135 continue;
1136 if (id == PALMAS_REG_SMPS12)
1137 ramp_delay_support = true;
1138 break;
1139 case PALMAS_REG_SMPS123:
1140 if (!pmic->smps123)
1141 continue;
1142 ramp_delay_support = true;
1143 break;
1144 case PALMAS_REG_SMPS45:
1145 case PALMAS_REG_SMPS7:
1146 if (pmic->smps457)
1147 continue;
1148 if (id == PALMAS_REG_SMPS45)
1149 ramp_delay_support = true;
1150 break;
1151 case PALMAS_REG_SMPS457:
1152 if (!pmic->smps457)
1153 continue;
1154 ramp_delay_support = true;
1155 break;
1156 case PALMAS_REG_SMPS10_OUT1:
1157 case PALMAS_REG_SMPS10_OUT2:
1158 if (!PALMAS_PMIC_HAS(pmic->palmas, SMPS10_BOOST))
1159 continue;
1160 }
1161 rinfo = &ddata->palmas_regs_info[id];
1162 desc = &pmic->desc[id];
1163
1164 if ((id == PALMAS_REG_SMPS6) || (id == PALMAS_REG_SMPS8))
1165 ramp_delay_support = true;
1166
1167 if (ramp_delay_support) {
1168 addr = rinfo->tstep_addr;
1169 ret = palmas_smps_read(pmic->palmas, addr, ®);
1170 if (ret < 0) {
1171 dev_err(pmic->dev,
1172 "reading TSTEP reg failed: %d\n", ret);
1173 return ret;
1174 }
1175 desc->ramp_delay = palmas_smps_ramp_delay[reg & 0x3];
1176 pmic->ramp_delay[id] = desc->ramp_delay;
1177 }
1178
1179 /* Initialise sleep/init values from platform data */
1180 if (pdata && pdata->reg_init[id]) {
1181 reg_init = pdata->reg_init[id];
1182 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1183 if (ret)
1184 return ret;
1185 } else {
1186 reg_init = NULL;
1187 }
1188
1189 /* Register the regulators */
1190 desc->name = rinfo->name;
1191 desc->id = id;
1192
1193 switch (id) {
1194 case PALMAS_REG_SMPS10_OUT1:
1195 case PALMAS_REG_SMPS10_OUT2:
1196 desc->n_voltages = PALMAS_SMPS10_NUM_VOLTAGES;
1197 desc->ops = &palmas_ops_smps10;
1198 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1199 PALMAS_SMPS10_CTRL);
1200 desc->vsel_mask = SMPS10_VSEL;
1201 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1202 PALMAS_SMPS10_CTRL);
1203 if (id == PALMAS_REG_SMPS10_OUT1)
1204 desc->enable_mask = SMPS10_SWITCH_EN;
1205 else
1206 desc->enable_mask = SMPS10_BOOST_EN;
1207 desc->bypass_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1208 PALMAS_SMPS10_CTRL);
1209 desc->bypass_mask = SMPS10_BYPASS_EN;
1210 desc->min_uV = 3750000;
1211 desc->uV_step = 1250000;
1212 break;
1213 default:
1214 /*
1215 * Read and store the RANGE bit for later use
1216 * This must be done before regulator is probed,
1217 * otherwise we error in probe with unsupportable
1218 * ranges. Read the current smps mode for later use.
1219 */
1220 addr = rinfo->vsel_addr;
1221 desc->n_linear_ranges = 3;
1222
1223 ret = palmas_smps_read(pmic->palmas, addr, ®);
1224 if (ret)
1225 return ret;
1226 if (reg & PALMAS_SMPS12_VOLTAGE_RANGE)
1227 pmic->range[id] = 1;
1228 if (pmic->range[id])
1229 desc->linear_ranges = smps_high_ranges;
1230 else
1231 desc->linear_ranges = smps_low_ranges;
1232
1233 if (reg_init && reg_init->roof_floor)
1234 desc->ops = &palmas_ops_ext_control_smps;
1235 else
1236 desc->ops = &palmas_ops_smps;
1237 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1238 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1239 rinfo->vsel_addr);
1240 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1241
1242 /* Read the smps mode for later use. */
1243 addr = rinfo->ctrl_addr;
1244 ret = palmas_smps_read(pmic->palmas, addr, ®);
1245 if (ret)
1246 return ret;
1247 pmic->current_reg_mode[id] = reg &
1248 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1249
1250 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1251 rinfo->ctrl_addr);
1252 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1253 /* set_mode overrides this value */
1254 desc->enable_val = SMPS_CTRL_MODE_ON;
1255 }
1256
1257 desc->type = REGULATOR_VOLTAGE;
1258 desc->owner = THIS_MODULE;
1259
1260 if (pdata)
1261 config.init_data = pdata->reg_data[id];
1262 else
1263 config.init_data = NULL;
1264
1265 desc->supply_name = rinfo->sname;
1266 config.of_node = ddata->palmas_matches[id].of_node;
1267
1268 rdev = devm_regulator_register(pmic->dev, desc, &config);
1269 if (IS_ERR(rdev)) {
1270 dev_err(pmic->dev,
1271 "failed to register %s regulator\n",
1272 pdev_name);
1273 return PTR_ERR(rdev);
1274 }
1275
1276 /* Save regulator for cleanup */
1277 pmic->rdev[id] = rdev;
1278 }
1279
1280 return 0;
1281}
1282
1283static int tps65917_smps_registration(struct palmas_pmic *pmic,
1284 struct palmas_pmic_driver_data *ddata,
1285 struct palmas_pmic_platform_data *pdata,
1286 const char *pdev_name,
1287 struct regulator_config config)
1288{
1289 int id, ret;
1290 unsigned int addr, reg;
1291 struct regulator_dev *rdev;
1292 struct palmas_reg_init *reg_init;
1293 struct palmas_regs_info *rinfo;
1294 struct regulator_desc *desc;
1295
1296 for (id = ddata->smps_start; id <= ddata->smps_end; id++) {
1297 /*
1298 * Miss out regulators which are not available due
1299 * to slaving configurations.
1300 */
1301 desc = &pmic->desc[id];
1302 desc->n_linear_ranges = 3;
1303 if ((id == TPS65917_REG_SMPS2) && pmic->smps12)
1304 continue;
1305
1306 /* Initialise sleep/init values from platform data */
1307 if (pdata && pdata->reg_init[id]) {
1308 reg_init = pdata->reg_init[id];
1309 ret = palmas_smps_init(pmic->palmas, id, reg_init);
1310 if (ret)
1311 return ret;
1312 } else {
1313 reg_init = NULL;
1314 }
1315 rinfo = &ddata->palmas_regs_info[id];
1316
1317 /* Register the regulators */
1318 desc->name = rinfo->name;
1319 desc->id = id;
1320
1321 /*
1322 * Read and store the RANGE bit for later use
1323 * This must be done before regulator is probed,
1324 * otherwise we error in probe with unsupportable
1325 * ranges. Read the current smps mode for later use.
1326 */
1327 addr = rinfo->vsel_addr;
1328
1329 ret = palmas_smps_read(pmic->palmas, addr, ®);
1330 if (ret)
1331 return ret;
1332 if (reg & TPS65917_SMPS1_VOLTAGE_RANGE)
1333 pmic->range[id] = 1;
1334
1335 if (pmic->range[id])
1336 desc->linear_ranges = smps_high_ranges;
1337 else
1338 desc->linear_ranges = smps_low_ranges;
1339
1340 if (reg_init && reg_init->roof_floor)
1341 desc->ops = &tps65917_ops_ext_control_smps;
1342 else
1343 desc->ops = &tps65917_ops_smps;
1344 desc->n_voltages = PALMAS_SMPS_NUM_VOLTAGES;
1345 desc->vsel_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1346 rinfo->vsel_addr);
1347 desc->vsel_mask = PALMAS_SMPS12_VOLTAGE_VSEL_MASK;
1348 desc->ramp_delay = 2500;
1349
1350 /* Read the smps mode for later use. */
1351 addr = rinfo->ctrl_addr;
1352 ret = palmas_smps_read(pmic->palmas, addr, ®);
1353 if (ret)
1354 return ret;
1355 pmic->current_reg_mode[id] = reg &
1356 PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1357 desc->enable_reg = PALMAS_BASE_TO_REG(PALMAS_SMPS_BASE,
1358 rinfo->ctrl_addr);
1359 desc->enable_mask = PALMAS_SMPS12_CTRL_MODE_ACTIVE_MASK;
1360 /* set_mode overrides this value */
1361 desc->enable_val = SMPS_CTRL_MODE_ON;
1362
1363 desc->type = REGULATOR_VOLTAGE;
1364 desc->owner = THIS_MODULE;
1365
1366 if (pdata)
1367 config.init_data = pdata->reg_data[id];
1368 else
1369 config.init_data = NULL;
1370
1371 desc->supply_name = rinfo->sname;
1372 config.of_node = ddata->palmas_matches[id].of_node;
1373
1374 rdev = devm_regulator_register(pmic->dev, desc, &config);
1375 if (IS_ERR(rdev)) {
1376 dev_err(pmic->dev,
1377 "failed to register %s regulator\n",
1378 pdev_name);
1379 return PTR_ERR(rdev);
1380 }
1381
1382 /* Save regulator for cleanup */
1383 pmic->rdev[id] = rdev;
1384 }
1385
1386 return 0;
1387}
1388
1389static struct of_regulator_match palmas_matches[] = {
1390 { .name = "smps12", },
1391 { .name = "smps123", },
1392 { .name = "smps3", },
1393 { .name = "smps45", },
1394 { .name = "smps457", },
1395 { .name = "smps6", },
1396 { .name = "smps7", },
1397 { .name = "smps8", },
1398 { .name = "smps9", },
1399 { .name = "smps10_out2", },
1400 { .name = "smps10_out1", },
1401 { .name = "ldo1", },
1402 { .name = "ldo2", },
1403 { .name = "ldo3", },
1404 { .name = "ldo4", },
1405 { .name = "ldo5", },
1406 { .name = "ldo6", },
1407 { .name = "ldo7", },
1408 { .name = "ldo8", },
1409 { .name = "ldo9", },
1410 { .name = "ldoln", },
1411 { .name = "ldousb", },
1412 { .name = "regen1", },
1413 { .name = "regen2", },
1414 { .name = "regen3", },
1415 { .name = "sysen1", },
1416 { .name = "sysen2", },
1417};
1418
1419static struct of_regulator_match tps65917_matches[] = {
1420 { .name = "smps1", },
1421 { .name = "smps2", },
1422 { .name = "smps3", },
1423 { .name = "smps4", },
1424 { .name = "smps5", },
1425 { .name = "ldo1", },
1426 { .name = "ldo2", },
1427 { .name = "ldo3", },
1428 { .name = "ldo4", },
1429 { .name = "ldo5", },
1430 { .name = "regen1", },
1431 { .name = "regen2", },
1432 { .name = "regen3", },
1433 { .name = "sysen1", },
1434 { .name = "sysen2", },
1435};
1436
1437static struct palmas_pmic_driver_data palmas_ddata = {
1438 .smps_start = PALMAS_REG_SMPS12,
1439 .smps_end = PALMAS_REG_SMPS10_OUT1,
1440 .ldo_begin = PALMAS_REG_LDO1,
1441 .ldo_end = PALMAS_REG_LDOUSB,
1442 .max_reg = PALMAS_NUM_REGS,
1443 .has_regen3 = true,
1444 .palmas_regs_info = palmas_generic_regs_info,
1445 .palmas_matches = palmas_matches,
1446 .sleep_req_info = palma_sleep_req_info,
1447 .smps_register = palmas_smps_registration,
1448 .ldo_register = palmas_ldo_registration,
1449};
1450
1451static struct palmas_pmic_driver_data tps65917_ddata = {
1452 .smps_start = TPS65917_REG_SMPS1,
1453 .smps_end = TPS65917_REG_SMPS5,
1454 .ldo_begin = TPS65917_REG_LDO1,
1455 .ldo_end = TPS65917_REG_LDO5,
1456 .max_reg = TPS65917_NUM_REGS,
1457 .has_regen3 = true,
1458 .palmas_regs_info = tps65917_regs_info,
1459 .palmas_matches = tps65917_matches,
1460 .sleep_req_info = tps65917_sleep_req_info,
1461 .smps_register = tps65917_smps_registration,
1462 .ldo_register = tps65917_ldo_registration,
1463};
1464
1465static void palmas_dt_to_pdata(struct device *dev,
1466 struct device_node *node,
1467 struct palmas_pmic_platform_data *pdata,
1468 struct palmas_pmic_driver_data *ddata)
1469{
1470 struct device_node *regulators;
1471 u32 prop;
1472 int idx, ret;
1473
1474 regulators = of_get_child_by_name(node, "regulators");
1475 if (!regulators) {
1476 dev_info(dev, "regulator node not found\n");
1477 return;
1478 }
1479
1480 ret = of_regulator_match(dev, regulators, ddata->palmas_matches,
1481 ddata->max_reg);
1482 of_node_put(regulators);
1483 if (ret < 0) {
1484 dev_err(dev, "Error parsing regulator init data: %d\n", ret);
1485 return;
1486 }
1487
1488 for (idx = 0; idx < ddata->max_reg; idx++) {
1489 if (!ddata->palmas_matches[idx].init_data ||
1490 !ddata->palmas_matches[idx].of_node)
1491 continue;
1492
1493 pdata->reg_data[idx] = ddata->palmas_matches[idx].init_data;
1494
1495 pdata->reg_init[idx] = devm_kzalloc(dev,
1496 sizeof(struct palmas_reg_init), GFP_KERNEL);
1497
1498 pdata->reg_init[idx]->warm_reset =
1499 of_property_read_bool(ddata->palmas_matches[idx].of_node,
1500 "ti,warm-reset");
1501
1502 ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
1503 "ti,roof-floor", &prop);
1504 /* EINVAL: Property not found */
1505 if (ret != -EINVAL) {
1506 int econtrol;
1507
1508 /* use default value, when no value is specified */
1509 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1510 if (!ret) {
1511 switch (prop) {
1512 case 1:
1513 econtrol = PALMAS_EXT_CONTROL_ENABLE1;
1514 break;
1515 case 2:
1516 econtrol = PALMAS_EXT_CONTROL_ENABLE2;
1517 break;
1518 case 3:
1519 econtrol = PALMAS_EXT_CONTROL_NSLEEP;
1520 break;
1521 default:
1522 WARN_ON(1);
1523 dev_warn(dev,
1524 "%s: Invalid roof-floor option: %u\n",
1525 palmas_matches[idx].name, prop);
1526 break;
1527 }
1528 }
1529 pdata->reg_init[idx]->roof_floor = econtrol;
1530 }
1531
1532 ret = of_property_read_u32(ddata->palmas_matches[idx].of_node,
1533 "ti,mode-sleep", &prop);
1534 if (!ret)
1535 pdata->reg_init[idx]->mode_sleep = prop;
1536
1537 ret = of_property_read_bool(ddata->palmas_matches[idx].of_node,
1538 "ti,smps-range");
1539 if (ret)
1540 pdata->reg_init[idx]->vsel =
1541 PALMAS_SMPS12_VOLTAGE_RANGE;
1542
1543 if (idx == PALMAS_REG_LDO8)
1544 pdata->enable_ldo8_tracking = of_property_read_bool(
1545 ddata->palmas_matches[idx].of_node,
1546 "ti,enable-ldo8-tracking");
1547 }
1548
1549 pdata->ldo6_vibrator = of_property_read_bool(node, "ti,ldo6-vibrator");
1550}
1551
1552static const struct of_device_id of_palmas_match_tbl[] = {
1553 {
1554 .compatible = "ti,palmas-pmic",
1555 .data = &palmas_ddata,
1556 },
1557 {
1558 .compatible = "ti,twl6035-pmic",
1559 .data = &palmas_ddata,
1560 },
1561 {
1562 .compatible = "ti,twl6036-pmic",
1563 .data = &palmas_ddata,
1564 },
1565 {
1566 .compatible = "ti,twl6037-pmic",
1567 .data = &palmas_ddata,
1568 },
1569 {
1570 .compatible = "ti,tps65913-pmic",
1571 .data = &palmas_ddata,
1572 },
1573 {
1574 .compatible = "ti,tps65914-pmic",
1575 .data = &palmas_ddata,
1576 },
1577 {
1578 .compatible = "ti,tps80036-pmic",
1579 .data = &palmas_ddata,
1580 },
1581 {
1582 .compatible = "ti,tps659038-pmic",
1583 .data = &palmas_ddata,
1584 },
1585 {
1586 .compatible = "ti,tps65917-pmic",
1587 .data = &tps65917_ddata,
1588 },
1589 { /* end */ }
1590};
1591
1592static int palmas_regulators_probe(struct platform_device *pdev)
1593{
1594 struct palmas *palmas = dev_get_drvdata(pdev->dev.parent);
1595 struct palmas_pmic_platform_data *pdata = dev_get_platdata(&pdev->dev);
1596 struct device_node *node = pdev->dev.of_node;
1597 struct palmas_pmic_driver_data *driver_data;
1598 struct regulator_config config = { };
1599 struct palmas_pmic *pmic;
1600 const char *pdev_name;
1601 const struct of_device_id *match;
1602 int ret = 0;
1603 unsigned int reg;
1604
1605 match = of_match_device(of_match_ptr(of_palmas_match_tbl), &pdev->dev);
1606
1607 if (!match)
1608 return -ENODATA;
1609
1610 driver_data = (struct palmas_pmic_driver_data *)match->data;
1611 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
1612 if (!pdata)
1613 return -ENOMEM;
1614
1615 pmic = devm_kzalloc(&pdev->dev, sizeof(*pmic), GFP_KERNEL);
1616 if (!pmic)
1617 return -ENOMEM;
1618
1619 if (of_device_is_compatible(node, "ti,tps659038-pmic")) {
1620 palmas_generic_regs_info[PALMAS_REG_REGEN2].ctrl_addr =
1621 TPS659038_REGEN2_CTRL;
1622 palmas_ddata.has_regen3 = false;
1623 }
1624
1625 pmic->dev = &pdev->dev;
1626 pmic->palmas = palmas;
1627 palmas->pmic = pmic;
1628 platform_set_drvdata(pdev, pmic);
1629 pmic->palmas->pmic_ddata = driver_data;
1630
1631 palmas_dt_to_pdata(&pdev->dev, node, pdata, driver_data);
1632
1633 ret = palmas_smps_read(palmas, PALMAS_SMPS_CTRL, ®);
1634 if (ret)
1635 return ret;
1636
1637 if (reg & PALMAS_SMPS_CTRL_SMPS12_SMPS123_EN)
1638 pmic->smps123 = 1;
1639
1640 if (reg & PALMAS_SMPS_CTRL_SMPS45_SMPS457_EN)
1641 pmic->smps457 = 1;
1642
1643 config.regmap = palmas->regmap[REGULATOR_SLAVE];
1644 config.dev = &pdev->dev;
1645 config.driver_data = pmic;
1646 pdev_name = pdev->name;
1647
1648 ret = driver_data->smps_register(pmic, driver_data, pdata, pdev_name,
1649 config);
1650 if (ret)
1651 return ret;
1652
1653 ret = driver_data->ldo_register(pmic, driver_data, pdata, pdev_name,
1654 config);
1655
1656 return ret;
1657}
1658
1659static struct platform_driver palmas_driver = {
1660 .driver = {
1661 .name = "palmas-pmic",
1662 .of_match_table = of_palmas_match_tbl,
1663 },
1664 .probe = palmas_regulators_probe,
1665};
1666
1667static int __init palmas_init(void)
1668{
1669 return platform_driver_register(&palmas_driver);
1670}
1671subsys_initcall(palmas_init);
1672
1673static void __exit palmas_exit(void)
1674{
1675 platform_driver_unregister(&palmas_driver);
1676}
1677module_exit(palmas_exit);
1678
1679MODULE_AUTHOR("Graeme Gregory <gg@slimlogic.co.uk>");
1680MODULE_DESCRIPTION("Palmas voltage regulator driver");
1681MODULE_LICENSE("GPL");
1682MODULE_ALIAS("platform:palmas-pmic");
1683MODULE_DEVICE_TABLE(of, of_palmas_match_tbl);