1/*******************************************************************************
  2
  3  Intel PRO/10GbE Linux driver
  4  Copyright(c) 1999 - 2008 Intel Corporation.
  5
  6  This program is free software; you can redistribute it and/or modify it
  7  under the terms and conditions of the GNU General Public License,
  8  version 2, as published by the Free Software Foundation.
  9
 10  This program is distributed in the hope it will be useful, but WITHOUT
 11  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 12  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 13  more details.
 14
 15  You should have received a copy of the GNU General Public License along with
 16  this program; if not, write to the Free Software Foundation, Inc.,
 17  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
 18
 19  The full GNU General Public License is included in this distribution in
 20  the file called "COPYING".
 21
 22  Contact Information:
 23  Linux NICS <linux.nics@intel.com>
 24  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
 25  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 26
 27*******************************************************************************/
 28
 29#ifndef _IXGB_EE_H_
 30#define _IXGB_EE_H_
 31
 32#define IXGB_EEPROM_SIZE    64	/* Size in words */
 33
 34/* EEPROM Commands */
 35#define EEPROM_READ_OPCODE  0x6	/* EEPROM read opcode */
 36#define EEPROM_WRITE_OPCODE 0x5	/* EEPROM write opcode */
 37#define EEPROM_ERASE_OPCODE 0x7	/* EEPROM erase opcode */
 38#define EEPROM_EWEN_OPCODE  0x13	/* EEPROM erase/write enable */
 39#define EEPROM_EWDS_OPCODE  0x10	/* EEPROM erase/write disable */
 40
 41/* EEPROM MAP (Word Offsets) */
 42#define EEPROM_IA_1_2_REG        0x0000
 43#define EEPROM_IA_3_4_REG        0x0001
 44#define EEPROM_IA_5_6_REG        0x0002
 45#define EEPROM_COMPATIBILITY_REG 0x0003
 46#define EEPROM_PBA_1_2_REG       0x0008
 47#define EEPROM_PBA_3_4_REG       0x0009
 48#define EEPROM_INIT_CONTROL1_REG 0x000A
 49#define EEPROM_SUBSYS_ID_REG     0x000B
 50#define EEPROM_SUBVEND_ID_REG    0x000C
 51#define EEPROM_DEVICE_ID_REG     0x000D
 52#define EEPROM_VENDOR_ID_REG     0x000E
 53#define EEPROM_INIT_CONTROL2_REG 0x000F
 54#define EEPROM_SWDPINS_REG       0x0020
 55#define EEPROM_CIRCUIT_CTRL_REG  0x0021
 56#define EEPROM_D0_D3_POWER_REG   0x0022
 57#define EEPROM_FLASH_VERSION     0x0032
 58#define EEPROM_CHECKSUM_REG      0x003F
 59
 60/* Mask bits for fields in Word 0x0a of the EEPROM */
 61
 62#define EEPROM_ICW1_SIGNATURE_MASK  0xC000
 63#define EEPROM_ICW1_SIGNATURE_VALID 0x4000
 64#define EEPROM_ICW1_SIGNATURE_CLEAR 0x0000
 65
 66/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
 67#define EEPROM_SUM 0xBABA
 68
 69/* EEPROM Map Sizes (Byte Counts) */
 70#define PBA_SIZE 4
 71
 72/* EEPROM Map defines (WORD OFFSETS)*/
 73
 74/* EEPROM structure */
 75struct ixgb_ee_map_type {
 76	u8 mac_addr[ETH_ALEN];
 77	__le16 compatibility;
 78	__le16 reserved1[4];
 79	__le32 pba_number;
 80	__le16 init_ctrl_reg_1;
 81	__le16 subsystem_id;
 82	__le16 subvendor_id;
 83	__le16 device_id;
 84	__le16 vendor_id;
 85	__le16 init_ctrl_reg_2;
 86	__le16 oem_reserved[16];
 87	__le16 swdpins_reg;
 88	__le16 circuit_ctrl_reg;
 89	u8 d3_power;
 90	u8 d0_power;
 91	__le16 reserved2[28];
 92	__le16 checksum;
 93};
 94
 95/* EEPROM Functions */
 96u16 ixgb_read_eeprom(struct ixgb_hw *hw, u16 reg);
 97
 98bool ixgb_validate_eeprom_checksum(struct ixgb_hw *hw);
 99
100void ixgb_update_eeprom_checksum(struct ixgb_hw *hw);
101
102void ixgb_write_eeprom(struct ixgb_hw *hw, u16 reg, u16 data);
103
104#endif				/* IXGB_EE_H */