1/* SPDX-License-Identifier: GPL-2.0 */
 2/* Copyright(c) 2013 - 2018 Intel Corporation. */
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 3
 4#ifndef _FM10K_COMMON_H_
 5#define _FM10K_COMMON_H_
 6
 7#include "fm10k_type.h"
 8
 9#define FM10K_REMOVED(hw_addr) unlikely(!(hw_addr))
10
11/* PCI configuration read */
12u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg);
13
14/* read operations, indexed using DWORDS */
15u32 fm10k_read_reg(struct fm10k_hw *hw, int reg);
16
17/* write operations, indexed using DWORDS */
18#define fm10k_write_reg(hw, reg, val) \
19do { \
20	u32 __iomem *hw_addr = READ_ONCE((hw)->hw_addr); \
21	if (!FM10K_REMOVED(hw_addr)) \
22		writel((val), &hw_addr[(reg)]); \
23} while (0)
24
25/* Switch register write operations, index using DWORDS */
26#define fm10k_write_sw_reg(hw, reg, val) \
27do { \
28	u32 __iomem *sw_addr = READ_ONCE((hw)->sw_addr); \
29	if (!FM10K_REMOVED(sw_addr)) \
30		writel((val), &sw_addr[(reg)]); \
31} while (0)
32
33/* read ctrl register which has no clear on read fields as PCIe flush */
34#define fm10k_write_flush(hw) fm10k_read_reg((hw), FM10K_CTRL)
35s32 fm10k_get_bus_info_generic(struct fm10k_hw *hw);
36s32 fm10k_get_invariants_generic(struct fm10k_hw *hw);
37s32 fm10k_disable_queues_generic(struct fm10k_hw *hw, u16 q_cnt);
38s32 fm10k_start_hw_generic(struct fm10k_hw *hw);
39s32 fm10k_stop_hw_generic(struct fm10k_hw *hw);
40u32 fm10k_read_hw_stats_32b(struct fm10k_hw *hw, u32 addr,
41			    struct fm10k_hw_stat *stat);
42#define fm10k_update_hw_base_32b(stat, delta) ((stat)->base_l += (delta))
43void fm10k_update_hw_stats_q(struct fm10k_hw *hw, struct fm10k_hw_stats_q *q,
44			     u32 idx, u32 count);
45#define fm10k_unbind_hw_stats_32b(s) ((s)->base_h = 0)
46void fm10k_unbind_hw_stats_q(struct fm10k_hw_stats_q *q, u32 idx, u32 count);
47s32 fm10k_get_host_state_generic(struct fm10k_hw *hw, bool *host_ready);
48#endif /* _FM10K_COMMON_H_ */

 1/* Intel Ethernet Switch Host Interface Driver
 2 * Copyright(c) 2013 - 2014 Intel Corporation.
 3 *
 4 * This program is free software; you can redistribute it and/or modify it
 5 * under the terms and conditions of the GNU General Public License,
 6 * version 2, as published by the Free Software Foundation.
 7 *
 8 * This program is distributed in the hope it will be useful, but WITHOUT
 9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
11 * more details.
12 *
13 * The full GNU General Public License is included in this distribution in
14 * the file called "COPYING".
15 *
16 * Contact Information:
17 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
18 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
19 */
20
21#ifndef _FM10K_COMMON_H_
22#define _FM10K_COMMON_H_
23
24#include "fm10k_type.h"
25
26#define FM10K_REMOVED(hw_addr) unlikely(!(hw_addr))
27
28/* PCI configuration read */
29u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg);
30
31/* read operations, indexed using DWORDS */
32u32 fm10k_read_reg(struct fm10k_hw *hw, int reg);
33
34/* write operations, indexed using DWORDS */
35#define fm10k_write_reg(hw, reg, val) \
36do { \
37	u32 __iomem *hw_addr = ACCESS_ONCE((hw)->hw_addr); \
38	if (!FM10K_REMOVED(hw_addr)) \
39		writel((val), &hw_addr[(reg)]); \
40} while (0)
41
42/* Switch register write operations, index using DWORDS */
43#define fm10k_write_sw_reg(hw, reg, val) \
44do { \
45	u32 __iomem *sw_addr = ACCESS_ONCE((hw)->sw_addr); \
46	if (!FM10K_REMOVED(sw_addr)) \
47		writel((val), &sw_addr[(reg)]); \
48} while (0)
49
50/* read ctrl register which has no clear on read fields as PCIe flush */
51#define fm10k_write_flush(hw) fm10k_read_reg((hw), FM10K_CTRL)
52s32 fm10k_get_bus_info_generic(struct fm10k_hw *hw);
53s32 fm10k_get_invariants_generic(struct fm10k_hw *hw);
54s32 fm10k_disable_queues_generic(struct fm10k_hw *hw, u16 q_cnt);
55s32 fm10k_start_hw_generic(struct fm10k_hw *hw);
56s32 fm10k_stop_hw_generic(struct fm10k_hw *hw);
57u32 fm10k_read_hw_stats_32b(struct fm10k_hw *hw, u32 addr,
58			    struct fm10k_hw_stat *stat);
59#define fm10k_update_hw_base_32b(stat, delta) ((stat)->base_l += (delta))
60void fm10k_update_hw_stats_q(struct fm10k_hw *hw, struct fm10k_hw_stats_q *q,
61			     u32 idx, u32 count);
62#define fm10k_unbind_hw_stats_32b(s) ((s)->base_h = 0)
63void fm10k_unbind_hw_stats_q(struct fm10k_hw_stats_q *q, u32 idx, u32 count);
64s32 fm10k_get_host_state_generic(struct fm10k_hw *hw, bool *host_ready);
65#endif /* _FM10K_COMMON_H_ */