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1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <linux/aperture.h>
26#include <linux/delay.h>
27#include <linux/module.h>
28#include <linux/pci.h>
29#include <linux/pm_runtime.h>
30#include <linux/vga_switcheroo.h>
31#include <linux/mmu_notifier.h>
32#include <linux/dynamic_debug.h>
33
34#include <drm/drm_client_setup.h>
35#include <drm/drm_drv.h>
36#include <drm/drm_fbdev_ttm.h>
37#include <drm/drm_gem_ttm_helper.h>
38#include <drm/drm_ioctl.h>
39#include <drm/drm_vblank.h>
40
41#include <core/gpuobj.h>
42#include <core/option.h>
43#include <core/pci.h>
44#include <core/tegra.h>
45
46#include <nvif/driver.h>
47#include <nvif/fifo.h>
48#include <nvif/push006c.h>
49#include <nvif/user.h>
50
51#include <nvif/class.h>
52#include <nvif/cl0002.h>
53
54#include "nouveau_drv.h"
55#include "nouveau_dma.h"
56#include "nouveau_ttm.h"
57#include "nouveau_gem.h"
58#include "nouveau_vga.h"
59#include "nouveau_led.h"
60#include "nouveau_hwmon.h"
61#include "nouveau_acpi.h"
62#include "nouveau_bios.h"
63#include "nouveau_ioctl.h"
64#include "nouveau_abi16.h"
65#include "nouveau_fence.h"
66#include "nouveau_debugfs.h"
67#include "nouveau_connector.h"
68#include "nouveau_platform.h"
69#include "nouveau_svm.h"
70#include "nouveau_dmem.h"
71#include "nouveau_exec.h"
72#include "nouveau_uvmm.h"
73#include "nouveau_sched.h"
74
75DECLARE_DYNDBG_CLASSMAP(drm_debug_classes, DD_CLASS_TYPE_DISJOINT_BITS, 0,
76 "DRM_UT_CORE",
77 "DRM_UT_DRIVER",
78 "DRM_UT_KMS",
79 "DRM_UT_PRIME",
80 "DRM_UT_ATOMIC",
81 "DRM_UT_VBL",
82 "DRM_UT_STATE",
83 "DRM_UT_LEASE",
84 "DRM_UT_DP",
85 "DRM_UT_DRMRES");
86
87MODULE_PARM_DESC(config, "option string to pass to driver core");
88static char *nouveau_config;
89module_param_named(config, nouveau_config, charp, 0400);
90
91MODULE_PARM_DESC(debug, "debug string to pass to driver core");
92static char *nouveau_debug;
93module_param_named(debug, nouveau_debug, charp, 0400);
94
95MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
96static int nouveau_noaccel = 0;
97module_param_named(noaccel, nouveau_noaccel, int, 0400);
98
99MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
100 "0 = disabled, 1 = enabled, 2 = headless)");
101int nouveau_modeset = -1;
102module_param_named(modeset, nouveau_modeset, int, 0400);
103
104MODULE_PARM_DESC(atomic, "Expose atomic ioctl (default: disabled)");
105static int nouveau_atomic = 0;
106module_param_named(atomic, nouveau_atomic, int, 0400);
107
108MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
109static int nouveau_runtime_pm = -1;
110module_param_named(runpm, nouveau_runtime_pm, int, 0400);
111
112static struct drm_driver driver_stub;
113static struct drm_driver driver_pci;
114static struct drm_driver driver_platform;
115
116static u64
117nouveau_pci_name(struct pci_dev *pdev)
118{
119 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
120 name |= pdev->bus->number << 16;
121 name |= PCI_SLOT(pdev->devfn) << 8;
122 return name | PCI_FUNC(pdev->devfn);
123}
124
125static u64
126nouveau_platform_name(struct platform_device *platformdev)
127{
128 return platformdev->id;
129}
130
131static u64
132nouveau_name(struct drm_device *dev)
133{
134 if (dev_is_pci(dev->dev))
135 return nouveau_pci_name(to_pci_dev(dev->dev));
136 else
137 return nouveau_platform_name(to_platform_device(dev->dev));
138}
139
140static inline bool
141nouveau_cli_work_ready(struct dma_fence *fence)
142{
143 bool ret = true;
144
145 spin_lock_irq(fence->lock);
146 if (!dma_fence_is_signaled_locked(fence))
147 ret = false;
148 spin_unlock_irq(fence->lock);
149
150 if (ret == true)
151 dma_fence_put(fence);
152 return ret;
153}
154
155static void
156nouveau_cli_work(struct work_struct *w)
157{
158 struct nouveau_cli *cli = container_of(w, typeof(*cli), work);
159 struct nouveau_cli_work *work, *wtmp;
160 mutex_lock(&cli->lock);
161 list_for_each_entry_safe(work, wtmp, &cli->worker, head) {
162 if (!work->fence || nouveau_cli_work_ready(work->fence)) {
163 list_del(&work->head);
164 work->func(work);
165 }
166 }
167 mutex_unlock(&cli->lock);
168}
169
170static void
171nouveau_cli_work_fence(struct dma_fence *fence, struct dma_fence_cb *cb)
172{
173 struct nouveau_cli_work *work = container_of(cb, typeof(*work), cb);
174 schedule_work(&work->cli->work);
175}
176
177void
178nouveau_cli_work_queue(struct nouveau_cli *cli, struct dma_fence *fence,
179 struct nouveau_cli_work *work)
180{
181 work->fence = dma_fence_get(fence);
182 work->cli = cli;
183 mutex_lock(&cli->lock);
184 list_add_tail(&work->head, &cli->worker);
185 if (dma_fence_add_callback(fence, &work->cb, nouveau_cli_work_fence))
186 nouveau_cli_work_fence(fence, &work->cb);
187 mutex_unlock(&cli->lock);
188}
189
190static void
191nouveau_cli_fini(struct nouveau_cli *cli)
192{
193 struct nouveau_uvmm *uvmm = nouveau_cli_uvmm_locked(cli);
194
195 /* All our channels are dead now, which means all the fences they
196 * own are signalled, and all callback functions have been called.
197 *
198 * So, after flushing the workqueue, there should be nothing left.
199 */
200 flush_work(&cli->work);
201 WARN_ON(!list_empty(&cli->worker));
202
203 if (cli->sched)
204 nouveau_sched_destroy(&cli->sched);
205 if (uvmm)
206 nouveau_uvmm_fini(uvmm);
207 nouveau_vmm_fini(&cli->svm);
208 nouveau_vmm_fini(&cli->vmm);
209 nvif_mmu_dtor(&cli->mmu);
210 cli->device.object.map.ptr = NULL;
211 nvif_device_dtor(&cli->device);
212 mutex_lock(&cli->drm->client_mutex);
213 nvif_client_dtor(&cli->base);
214 mutex_unlock(&cli->drm->client_mutex);
215}
216
217static int
218nouveau_cli_init(struct nouveau_drm *drm, const char *sname,
219 struct nouveau_cli *cli)
220{
221 static const struct nvif_mclass
222 mems[] = {
223 { NVIF_CLASS_MEM_GF100, -1 },
224 { NVIF_CLASS_MEM_NV50 , -1 },
225 { NVIF_CLASS_MEM_NV04 , -1 },
226 {}
227 };
228 static const struct nvif_mclass
229 vmms[] = {
230 { NVIF_CLASS_VMM_GP100, -1 },
231 { NVIF_CLASS_VMM_GM200, -1 },
232 { NVIF_CLASS_VMM_GF100, -1 },
233 { NVIF_CLASS_VMM_NV50 , -1 },
234 { NVIF_CLASS_VMM_NV04 , -1 },
235 {}
236 };
237 int ret;
238
239 snprintf(cli->name, sizeof(cli->name), "%s", sname);
240 cli->drm = drm;
241 mutex_init(&cli->mutex);
242
243 INIT_WORK(&cli->work, nouveau_cli_work);
244 INIT_LIST_HEAD(&cli->worker);
245 mutex_init(&cli->lock);
246
247 mutex_lock(&drm->client_mutex);
248 ret = nvif_client_ctor(&drm->_client, cli->name, &cli->base);
249 mutex_unlock(&drm->client_mutex);
250 if (ret) {
251 NV_PRINTK(err, cli, "Client allocation failed: %d\n", ret);
252 goto done;
253 }
254
255 ret = nvif_device_ctor(&cli->base, "drmDevice", &cli->device);
256 if (ret) {
257 NV_PRINTK(err, cli, "Device allocation failed: %d\n", ret);
258 goto done;
259 }
260
261 cli->device.object.map.ptr = drm->device.object.map.ptr;
262
263 ret = nvif_mmu_ctor(&cli->device.object, "drmMmu", drm->mmu.object.oclass,
264 &cli->mmu);
265 if (ret) {
266 NV_PRINTK(err, cli, "MMU allocation failed: %d\n", ret);
267 goto done;
268 }
269
270 ret = nvif_mclass(&cli->mmu.object, vmms);
271 if (ret < 0) {
272 NV_PRINTK(err, cli, "No supported VMM class\n");
273 goto done;
274 }
275
276 ret = nouveau_vmm_init(cli, vmms[ret].oclass, &cli->vmm);
277 if (ret) {
278 NV_PRINTK(err, cli, "VMM allocation failed: %d\n", ret);
279 goto done;
280 }
281
282 ret = nvif_mclass(&cli->mmu.object, mems);
283 if (ret < 0) {
284 NV_PRINTK(err, cli, "No supported MEM class\n");
285 goto done;
286 }
287
288 cli->mem = &mems[ret];
289
290 /* Don't pass in the (shared) sched_wq in order to let
291 * nouveau_sched_create() create a dedicated one for VM_BIND jobs.
292 *
293 * This is required to ensure that for VM_BIND jobs free_job() work and
294 * run_job() work can always run concurrently and hence, free_job() work
295 * can never stall run_job() work. For EXEC jobs we don't have this
296 * requirement, since EXEC job's free_job() does not require to take any
297 * locks which indirectly or directly are held for allocations
298 * elsewhere.
299 */
300 ret = nouveau_sched_create(&cli->sched, drm, NULL, 1);
301 if (ret)
302 goto done;
303
304 return 0;
305done:
306 if (ret)
307 nouveau_cli_fini(cli);
308 return ret;
309}
310
311static void
312nouveau_accel_ce_fini(struct nouveau_drm *drm)
313{
314 nouveau_channel_idle(drm->cechan);
315 nvif_object_dtor(&drm->ttm.copy);
316 nouveau_channel_del(&drm->cechan);
317}
318
319static void
320nouveau_accel_ce_init(struct nouveau_drm *drm)
321{
322 struct nvif_device *device = &drm->client.device;
323 u64 runm;
324 int ret = 0;
325
326 /* Allocate channel that has access to a (preferably async) copy
327 * engine, to use for TTM buffer moves.
328 */
329 runm = nvif_fifo_runlist_ce(device);
330 if (!runm) {
331 NV_DEBUG(drm, "no ce runlist\n");
332 return;
333 }
334
335 ret = nouveau_channel_new(&drm->client, true, runm, NvDmaFB, NvDmaTT, &drm->cechan);
336 if (ret)
337 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
338}
339
340static void
341nouveau_accel_gr_fini(struct nouveau_drm *drm)
342{
343 nouveau_channel_idle(drm->channel);
344 nvif_object_dtor(&drm->ntfy);
345 nvkm_gpuobj_del(&drm->notify);
346 nouveau_channel_del(&drm->channel);
347}
348
349static void
350nouveau_accel_gr_init(struct nouveau_drm *drm)
351{
352 struct nvif_device *device = &drm->client.device;
353 u64 runm;
354 int ret;
355
356 /* Allocate channel that has access to the graphics engine. */
357 runm = nvif_fifo_runlist(device, NV_DEVICE_HOST_RUNLIST_ENGINES_GR);
358 if (!runm) {
359 NV_DEBUG(drm, "no gr runlist\n");
360 return;
361 }
362
363 ret = nouveau_channel_new(&drm->client, false, runm, NvDmaFB, NvDmaTT, &drm->channel);
364 if (ret) {
365 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
366 nouveau_accel_gr_fini(drm);
367 return;
368 }
369
370 /* A SW class is used on pre-NV50 HW to assist with handling the
371 * synchronisation of page flips, as well as to implement fences
372 * on TNT/TNT2 HW that lacks any kind of support in host.
373 */
374 if (!drm->channel->nvsw.client && device->info.family < NV_DEVICE_INFO_V0_TESLA) {
375 ret = nvif_object_ctor(&drm->channel->user, "drmNvsw",
376 NVDRM_NVSW, nouveau_abi16_swclass(drm),
377 NULL, 0, &drm->channel->nvsw);
378
379 if (ret == 0 && device->info.chipset >= 0x11) {
380 ret = nvif_object_ctor(&drm->channel->user, "drmBlit",
381 0x005f, 0x009f,
382 NULL, 0, &drm->channel->blit);
383 }
384
385 if (ret == 0) {
386 struct nvif_push *push = &drm->channel->chan.push;
387
388 ret = PUSH_WAIT(push, 8);
389 if (ret == 0) {
390 if (device->info.chipset >= 0x11) {
391 PUSH_NVSQ(push, NV05F, 0x0000, drm->channel->blit.handle);
392 PUSH_NVSQ(push, NV09F, 0x0120, 0,
393 0x0124, 1,
394 0x0128, 2);
395 }
396 PUSH_NVSQ(push, NV_SW, 0x0000, drm->channel->nvsw.handle);
397 }
398 }
399
400 if (ret) {
401 NV_ERROR(drm, "failed to allocate sw or blit class, %d\n", ret);
402 nouveau_accel_gr_fini(drm);
403 return;
404 }
405 }
406
407 /* NvMemoryToMemoryFormat requires a notifier ctxdma for some reason,
408 * even if notification is never requested, so, allocate a ctxdma on
409 * any GPU where it's possible we'll end up using M2MF for BO moves.
410 */
411 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
412 ret = nvkm_gpuobj_new(nvxx_device(drm), 32, 0, false, NULL, &drm->notify);
413 if (ret) {
414 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
415 nouveau_accel_gr_fini(drm);
416 return;
417 }
418
419 ret = nvif_object_ctor(&drm->channel->user, "drmM2mfNtfy",
420 NvNotify0, NV_DMA_IN_MEMORY,
421 &(struct nv_dma_v0) {
422 .target = NV_DMA_V0_TARGET_VRAM,
423 .access = NV_DMA_V0_ACCESS_RDWR,
424 .start = drm->notify->addr,
425 .limit = drm->notify->addr + 31
426 }, sizeof(struct nv_dma_v0),
427 &drm->ntfy);
428 if (ret) {
429 nouveau_accel_gr_fini(drm);
430 return;
431 }
432 }
433}
434
435static void
436nouveau_accel_fini(struct nouveau_drm *drm)
437{
438 nouveau_accel_ce_fini(drm);
439 nouveau_accel_gr_fini(drm);
440 if (drm->fence)
441 nouveau_fence(drm)->dtor(drm);
442 nouveau_channels_fini(drm);
443}
444
445static void
446nouveau_accel_init(struct nouveau_drm *drm)
447{
448 struct nvif_device *device = &drm->client.device;
449 struct nvif_sclass *sclass;
450 int ret, i, n;
451
452 if (nouveau_noaccel)
453 return;
454
455 /* Initialise global support for channels, and synchronisation. */
456 ret = nouveau_channels_init(drm);
457 if (ret)
458 return;
459
460 /*XXX: this is crap, but the fence/channel stuff is a little
461 * backwards in some places. this will be fixed.
462 */
463 ret = n = nvif_object_sclass_get(&device->object, &sclass);
464 if (ret < 0)
465 return;
466
467 for (ret = -ENOSYS, i = 0; i < n; i++) {
468 switch (sclass[i].oclass) {
469 case NV03_CHANNEL_DMA:
470 ret = nv04_fence_create(drm);
471 break;
472 case NV10_CHANNEL_DMA:
473 ret = nv10_fence_create(drm);
474 break;
475 case NV17_CHANNEL_DMA:
476 case NV40_CHANNEL_DMA:
477 ret = nv17_fence_create(drm);
478 break;
479 case NV50_CHANNEL_GPFIFO:
480 ret = nv50_fence_create(drm);
481 break;
482 case G82_CHANNEL_GPFIFO:
483 ret = nv84_fence_create(drm);
484 break;
485 case FERMI_CHANNEL_GPFIFO:
486 case KEPLER_CHANNEL_GPFIFO_A:
487 case KEPLER_CHANNEL_GPFIFO_B:
488 case MAXWELL_CHANNEL_GPFIFO_A:
489 case PASCAL_CHANNEL_GPFIFO_A:
490 case VOLTA_CHANNEL_GPFIFO_A:
491 case TURING_CHANNEL_GPFIFO_A:
492 case AMPERE_CHANNEL_GPFIFO_A:
493 case AMPERE_CHANNEL_GPFIFO_B:
494 ret = nvc0_fence_create(drm);
495 break;
496 default:
497 break;
498 }
499 }
500
501 nvif_object_sclass_put(&sclass);
502 if (ret) {
503 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
504 nouveau_accel_fini(drm);
505 return;
506 }
507
508 /* Volta requires access to a doorbell register for kickoff. */
509 if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_VOLTA) {
510 ret = nvif_user_ctor(device, "drmUsermode");
511 if (ret)
512 return;
513 }
514
515 /* Allocate channels we need to support various functions. */
516 nouveau_accel_gr_init(drm);
517 nouveau_accel_ce_init(drm);
518
519 /* Initialise accelerated TTM buffer moves. */
520 nouveau_bo_move_init(drm);
521}
522
523static void __printf(2, 3)
524nouveau_drm_errorf(struct nvif_object *object, const char *fmt, ...)
525{
526 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
527 struct va_format vaf;
528 va_list va;
529
530 va_start(va, fmt);
531 vaf.fmt = fmt;
532 vaf.va = &va;
533 NV_ERROR(drm, "%pV", &vaf);
534 va_end(va);
535}
536
537static void __printf(2, 3)
538nouveau_drm_debugf(struct nvif_object *object, const char *fmt, ...)
539{
540 struct nouveau_drm *drm = container_of(object->parent, typeof(*drm), parent);
541 struct va_format vaf;
542 va_list va;
543
544 va_start(va, fmt);
545 vaf.fmt = fmt;
546 vaf.va = &va;
547 NV_DEBUG(drm, "%pV", &vaf);
548 va_end(va);
549}
550
551static const struct nvif_parent_func
552nouveau_parent = {
553 .debugf = nouveau_drm_debugf,
554 .errorf = nouveau_drm_errorf,
555};
556
557static void
558nouveau_drm_device_fini(struct nouveau_drm *drm)
559{
560 struct drm_device *dev = drm->dev;
561 struct nouveau_cli *cli, *temp_cli;
562
563 if (nouveau_pmops_runtime()) {
564 pm_runtime_get_sync(dev->dev);
565 pm_runtime_forbid(dev->dev);
566 }
567
568 nouveau_led_fini(dev);
569 nouveau_dmem_fini(drm);
570 nouveau_svm_fini(drm);
571 nouveau_hwmon_fini(dev);
572 nouveau_debugfs_fini(drm);
573
574 if (dev->mode_config.num_crtc)
575 nouveau_display_fini(dev, false, false);
576 nouveau_display_destroy(dev);
577
578 nouveau_accel_fini(drm);
579 nouveau_bios_takedown(dev);
580
581 nouveau_ttm_fini(drm);
582 nouveau_vga_fini(drm);
583
584 /*
585 * There may be existing clients from as-yet unclosed files. For now,
586 * clean them up here rather than deferring until the file is closed,
587 * but this likely not correct if we want to support hot-unplugging
588 * properly.
589 */
590 mutex_lock(&drm->clients_lock);
591 list_for_each_entry_safe(cli, temp_cli, &drm->clients, head) {
592 list_del(&cli->head);
593 mutex_lock(&cli->mutex);
594 if (cli->abi16)
595 nouveau_abi16_fini(cli->abi16);
596 mutex_unlock(&cli->mutex);
597 nouveau_cli_fini(cli);
598 kfree(cli);
599 }
600 mutex_unlock(&drm->clients_lock);
601
602 nouveau_cli_fini(&drm->client);
603 destroy_workqueue(drm->sched_wq);
604 mutex_destroy(&drm->clients_lock);
605}
606
607static int
608nouveau_drm_device_init(struct nouveau_drm *drm)
609{
610 struct drm_device *dev = drm->dev;
611 int ret;
612
613 drm->sched_wq = alloc_workqueue("nouveau_sched_wq_shared", 0,
614 WQ_MAX_ACTIVE);
615 if (!drm->sched_wq)
616 return -ENOMEM;
617
618 ret = nouveau_cli_init(drm, "DRM", &drm->client);
619 if (ret)
620 goto fail_wq;
621
622 INIT_LIST_HEAD(&drm->clients);
623 mutex_init(&drm->clients_lock);
624 spin_lock_init(&drm->tile.lock);
625
626 /* workaround an odd issue on nvc1 by disabling the device's
627 * nosnoop capability. hopefully won't cause issues until a
628 * better fix is found - assuming there is one...
629 */
630 if (drm->client.device.info.chipset == 0xc1)
631 nvif_mask(&drm->client.device.object, 0x00088080, 0x00000800, 0x00000000);
632
633 nouveau_vga_init(drm);
634
635 ret = nouveau_ttm_init(drm);
636 if (ret)
637 goto fail_ttm;
638
639 ret = nouveau_bios_init(dev);
640 if (ret)
641 goto fail_bios;
642
643 nouveau_accel_init(drm);
644
645 ret = nouveau_display_create(dev);
646 if (ret)
647 goto fail_dispctor;
648
649 if (dev->mode_config.num_crtc) {
650 ret = nouveau_display_init(dev, false, false);
651 if (ret)
652 goto fail_dispinit;
653 }
654
655 nouveau_debugfs_init(drm);
656 nouveau_hwmon_init(dev);
657 nouveau_svm_init(drm);
658 nouveau_dmem_init(drm);
659 nouveau_led_init(dev);
660
661 if (nouveau_pmops_runtime()) {
662 pm_runtime_use_autosuspend(dev->dev);
663 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
664 pm_runtime_set_active(dev->dev);
665 pm_runtime_allow(dev->dev);
666 pm_runtime_mark_last_busy(dev->dev);
667 pm_runtime_put(dev->dev);
668 }
669
670 ret = drm_dev_register(drm->dev, 0);
671 if (ret) {
672 nouveau_drm_device_fini(drm);
673 return ret;
674 }
675
676 return 0;
677fail_dispinit:
678 nouveau_display_destroy(dev);
679fail_dispctor:
680 nouveau_accel_fini(drm);
681 nouveau_bios_takedown(dev);
682fail_bios:
683 nouveau_ttm_fini(drm);
684fail_ttm:
685 nouveau_vga_fini(drm);
686 nouveau_cli_fini(&drm->client);
687fail_wq:
688 destroy_workqueue(drm->sched_wq);
689 return ret;
690}
691
692static void
693nouveau_drm_device_del(struct nouveau_drm *drm)
694{
695 if (drm->dev)
696 drm_dev_put(drm->dev);
697
698 nvif_mmu_dtor(&drm->mmu);
699 nvif_device_dtor(&drm->device);
700 nvif_client_dtor(&drm->_client);
701 nvif_parent_dtor(&drm->parent);
702
703 mutex_destroy(&drm->client_mutex);
704 kfree(drm);
705}
706
707static struct nouveau_drm *
708nouveau_drm_device_new(const struct drm_driver *drm_driver, struct device *parent,
709 struct nvkm_device *device)
710{
711 static const struct nvif_mclass
712 mmus[] = {
713 { NVIF_CLASS_MMU_GF100, -1 },
714 { NVIF_CLASS_MMU_NV50 , -1 },
715 { NVIF_CLASS_MMU_NV04 , -1 },
716 {}
717 };
718 struct nouveau_drm *drm;
719 int ret;
720
721 drm = kzalloc(sizeof(*drm), GFP_KERNEL);
722 if (!drm)
723 return ERR_PTR(-ENOMEM);
724
725 drm->nvkm = device;
726
727 drm->dev = drm_dev_alloc(drm_driver, parent);
728 if (IS_ERR(drm->dev)) {
729 ret = PTR_ERR(drm->dev);
730 goto done;
731 }
732
733 drm->dev->dev_private = drm;
734 dev_set_drvdata(parent, drm);
735
736 nvif_parent_ctor(&nouveau_parent, &drm->parent);
737 mutex_init(&drm->client_mutex);
738 drm->_client.object.parent = &drm->parent;
739
740 ret = nvif_driver_init(NULL, nouveau_config, nouveau_debug, "drm",
741 nouveau_name(drm->dev), &drm->_client);
742 if (ret)
743 goto done;
744
745 ret = nvif_device_ctor(&drm->_client, "drmDevice", &drm->device);
746 if (ret) {
747 NV_ERROR(drm, "Device allocation failed: %d\n", ret);
748 goto done;
749 }
750
751 ret = nvif_device_map(&drm->device);
752 if (ret) {
753 NV_ERROR(drm, "Failed to map PRI: %d\n", ret);
754 goto done;
755 }
756
757 ret = nvif_mclass(&drm->device.object, mmus);
758 if (ret < 0) {
759 NV_ERROR(drm, "No supported MMU class\n");
760 goto done;
761 }
762
763 ret = nvif_mmu_ctor(&drm->device.object, "drmMmu", mmus[ret].oclass, &drm->mmu);
764 if (ret) {
765 NV_ERROR(drm, "MMU allocation failed: %d\n", ret);
766 goto done;
767 }
768
769done:
770 if (ret) {
771 nouveau_drm_device_del(drm);
772 drm = NULL;
773 }
774
775 return ret ? ERR_PTR(ret) : drm;
776}
777
778/*
779 * On some Intel PCIe bridge controllers doing a
780 * D0 -> D3hot -> D3cold -> D0 sequence causes Nvidia GPUs to not reappear.
781 * Skipping the intermediate D3hot step seems to make it work again. This is
782 * probably caused by not meeting the expectation the involved AML code has
783 * when the GPU is put into D3hot state before invoking it.
784 *
785 * This leads to various manifestations of this issue:
786 * - AML code execution to power on the GPU hits an infinite loop (as the
787 * code waits on device memory to change).
788 * - kernel crashes, as all PCI reads return -1, which most code isn't able
789 * to handle well enough.
790 *
791 * In all cases dmesg will contain at least one line like this:
792 * 'nouveau 0000:01:00.0: Refused to change power state, currently in D3'
793 * followed by a lot of nouveau timeouts.
794 *
795 * In the \_SB.PCI0.PEG0.PG00._OFF code deeper down writes bit 0x80 to the not
796 * documented PCI config space register 0x248 of the Intel PCIe bridge
797 * controller (0x1901) in order to change the state of the PCIe link between
798 * the PCIe port and the GPU. There are alternative code paths using other
799 * registers, which seem to work fine (executed pre Windows 8):
800 * - 0xbc bit 0x20 (publicly available documentation claims 'reserved')
801 * - 0xb0 bit 0x10 (link disable)
802 * Changing the conditions inside the firmware by poking into the relevant
803 * addresses does resolve the issue, but it seemed to be ACPI private memory
804 * and not any device accessible memory at all, so there is no portable way of
805 * changing the conditions.
806 * On a XPS 9560 that means bits [0,3] on \CPEX need to be cleared.
807 *
808 * The only systems where this behavior can be seen are hybrid graphics laptops
809 * with a secondary Nvidia Maxwell, Pascal or Turing GPU. It's unclear whether
810 * this issue only occurs in combination with listed Intel PCIe bridge
811 * controllers and the mentioned GPUs or other devices as well.
812 *
813 * documentation on the PCIe bridge controller can be found in the
814 * "7th Generation Intel® Processor Families for H Platforms Datasheet Volume 2"
815 * Section "12 PCI Express* Controller (x16) Registers"
816 */
817
818static void quirk_broken_nv_runpm(struct pci_dev *pdev)
819{
820 struct nouveau_drm *drm = pci_get_drvdata(pdev);
821 struct pci_dev *bridge = pci_upstream_bridge(pdev);
822
823 if (!bridge || bridge->vendor != PCI_VENDOR_ID_INTEL)
824 return;
825
826 switch (bridge->device) {
827 case 0x1901:
828 drm->old_pm_cap = pdev->pm_cap;
829 pdev->pm_cap = 0;
830 NV_INFO(drm, "Disabling PCI power management to avoid bug\n");
831 break;
832 }
833}
834
835static int nouveau_drm_probe(struct pci_dev *pdev,
836 const struct pci_device_id *pent)
837{
838 struct nvkm_device *device;
839 struct nouveau_drm *drm;
840 const struct drm_format_info *format;
841 int ret;
842
843 if (vga_switcheroo_client_probe_defer(pdev))
844 return -EPROBE_DEFER;
845
846 /* We need to check that the chipset is supported before booting
847 * fbdev off the hardware, as there's no way to put it back.
848 */
849 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug, &device);
850 if (ret)
851 return ret;
852
853 /* Remove conflicting drivers (vesafb, efifb etc). */
854 ret = aperture_remove_conflicting_pci_devices(pdev, driver_pci.name);
855 if (ret)
856 return ret;
857
858 pci_set_master(pdev);
859
860 if (nouveau_atomic)
861 driver_pci.driver_features |= DRIVER_ATOMIC;
862
863 drm = nouveau_drm_device_new(&driver_pci, &pdev->dev, device);
864 if (IS_ERR(drm)) {
865 ret = PTR_ERR(drm);
866 goto fail_nvkm;
867 }
868
869 ret = pci_enable_device(pdev);
870 if (ret)
871 goto fail_drm;
872
873 ret = nouveau_drm_device_init(drm);
874 if (ret)
875 goto fail_pci;
876
877 if (drm->client.device.info.ram_size <= 32 * 1024 * 1024)
878 format = drm_format_info(DRM_FORMAT_C8);
879 else
880 format = NULL;
881
882 drm_client_setup(drm->dev, format);
883
884 quirk_broken_nv_runpm(pdev);
885 return 0;
886
887fail_pci:
888 pci_disable_device(pdev);
889fail_drm:
890 nouveau_drm_device_del(drm);
891fail_nvkm:
892 nvkm_device_del(&device);
893 return ret;
894}
895
896void
897nouveau_drm_device_remove(struct nouveau_drm *drm)
898{
899 struct nvkm_device *device = drm->nvkm;
900
901 drm_dev_unplug(drm->dev);
902
903 nouveau_drm_device_fini(drm);
904 nouveau_drm_device_del(drm);
905 nvkm_device_del(&device);
906}
907
908static void
909nouveau_drm_remove(struct pci_dev *pdev)
910{
911 struct nouveau_drm *drm = pci_get_drvdata(pdev);
912
913 /* revert our workaround */
914 if (drm->old_pm_cap)
915 pdev->pm_cap = drm->old_pm_cap;
916 nouveau_drm_device_remove(drm);
917 pci_disable_device(pdev);
918}
919
920static int
921nouveau_do_suspend(struct nouveau_drm *drm, bool runtime)
922{
923 struct drm_device *dev = drm->dev;
924 struct ttm_resource_manager *man;
925 int ret;
926
927 nouveau_svm_suspend(drm);
928 nouveau_dmem_suspend(drm);
929 nouveau_led_suspend(dev);
930
931 if (dev->mode_config.num_crtc) {
932 NV_DEBUG(drm, "suspending display...\n");
933 ret = nouveau_display_suspend(dev, runtime);
934 if (ret)
935 return ret;
936 }
937
938 NV_DEBUG(drm, "evicting buffers...\n");
939
940 man = ttm_manager_type(&drm->ttm.bdev, TTM_PL_VRAM);
941 ttm_resource_manager_evict_all(&drm->ttm.bdev, man);
942
943 NV_DEBUG(drm, "waiting for kernel channels to go idle...\n");
944 if (drm->cechan) {
945 ret = nouveau_channel_idle(drm->cechan);
946 if (ret)
947 goto fail_display;
948 }
949
950 if (drm->channel) {
951 ret = nouveau_channel_idle(drm->channel);
952 if (ret)
953 goto fail_display;
954 }
955
956 NV_DEBUG(drm, "suspending fence...\n");
957 if (drm->fence && nouveau_fence(drm)->suspend) {
958 if (!nouveau_fence(drm)->suspend(drm)) {
959 ret = -ENOMEM;
960 goto fail_display;
961 }
962 }
963
964 NV_DEBUG(drm, "suspending object tree...\n");
965 ret = nvif_client_suspend(&drm->_client);
966 if (ret)
967 goto fail_client;
968
969 return 0;
970
971fail_client:
972 if (drm->fence && nouveau_fence(drm)->resume)
973 nouveau_fence(drm)->resume(drm);
974
975fail_display:
976 if (dev->mode_config.num_crtc) {
977 NV_DEBUG(drm, "resuming display...\n");
978 nouveau_display_resume(dev, runtime);
979 }
980 return ret;
981}
982
983static int
984nouveau_do_resume(struct nouveau_drm *drm, bool runtime)
985{
986 struct drm_device *dev = drm->dev;
987 int ret = 0;
988
989 NV_DEBUG(drm, "resuming object tree...\n");
990 ret = nvif_client_resume(&drm->_client);
991 if (ret) {
992 NV_ERROR(drm, "Client resume failed with error: %d\n", ret);
993 return ret;
994 }
995
996 NV_DEBUG(drm, "resuming fence...\n");
997 if (drm->fence && nouveau_fence(drm)->resume)
998 nouveau_fence(drm)->resume(drm);
999
1000 nouveau_run_vbios_init(dev);
1001
1002 if (dev->mode_config.num_crtc) {
1003 NV_DEBUG(drm, "resuming display...\n");
1004 nouveau_display_resume(dev, runtime);
1005 }
1006
1007 nouveau_led_resume(dev);
1008 nouveau_dmem_resume(drm);
1009 nouveau_svm_resume(drm);
1010 return 0;
1011}
1012
1013int
1014nouveau_pmops_suspend(struct device *dev)
1015{
1016 struct pci_dev *pdev = to_pci_dev(dev);
1017 struct nouveau_drm *drm = pci_get_drvdata(pdev);
1018 int ret;
1019
1020 if (drm->dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
1021 drm->dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
1022 return 0;
1023
1024 ret = nouveau_do_suspend(drm, false);
1025 if (ret)
1026 return ret;
1027
1028 pci_save_state(pdev);
1029 pci_disable_device(pdev);
1030 pci_set_power_state(pdev, PCI_D3hot);
1031 udelay(200);
1032 return 0;
1033}
1034
1035int
1036nouveau_pmops_resume(struct device *dev)
1037{
1038 struct pci_dev *pdev = to_pci_dev(dev);
1039 struct nouveau_drm *drm = pci_get_drvdata(pdev);
1040 int ret;
1041
1042 if (drm->dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
1043 drm->dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
1044 return 0;
1045
1046 pci_set_power_state(pdev, PCI_D0);
1047 pci_restore_state(pdev);
1048 ret = pci_enable_device(pdev);
1049 if (ret)
1050 return ret;
1051 pci_set_master(pdev);
1052
1053 ret = nouveau_do_resume(drm, false);
1054
1055 /* Monitors may have been connected / disconnected during suspend */
1056 nouveau_display_hpd_resume(drm);
1057
1058 return ret;
1059}
1060
1061static int
1062nouveau_pmops_freeze(struct device *dev)
1063{
1064 struct nouveau_drm *drm = dev_get_drvdata(dev);
1065
1066 return nouveau_do_suspend(drm, false);
1067}
1068
1069static int
1070nouveau_pmops_thaw(struct device *dev)
1071{
1072 struct nouveau_drm *drm = dev_get_drvdata(dev);
1073
1074 return nouveau_do_resume(drm, false);
1075}
1076
1077bool
1078nouveau_pmops_runtime(void)
1079{
1080 if (nouveau_runtime_pm == -1)
1081 return nouveau_is_optimus() || nouveau_is_v1_dsm();
1082 return nouveau_runtime_pm == 1;
1083}
1084
1085static int
1086nouveau_pmops_runtime_suspend(struct device *dev)
1087{
1088 struct pci_dev *pdev = to_pci_dev(dev);
1089 struct nouveau_drm *drm = pci_get_drvdata(pdev);
1090 int ret;
1091
1092 if (!nouveau_pmops_runtime()) {
1093 pm_runtime_forbid(dev);
1094 return -EBUSY;
1095 }
1096
1097 nouveau_switcheroo_optimus_dsm();
1098 ret = nouveau_do_suspend(drm, true);
1099 pci_save_state(pdev);
1100 pci_disable_device(pdev);
1101 pci_ignore_hotplug(pdev);
1102 pci_set_power_state(pdev, PCI_D3cold);
1103 drm->dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
1104 return ret;
1105}
1106
1107static int
1108nouveau_pmops_runtime_resume(struct device *dev)
1109{
1110 struct pci_dev *pdev = to_pci_dev(dev);
1111 struct nouveau_drm *drm = pci_get_drvdata(pdev);
1112 struct nvif_device *device = &drm->client.device;
1113 int ret;
1114
1115 if (!nouveau_pmops_runtime()) {
1116 pm_runtime_forbid(dev);
1117 return -EBUSY;
1118 }
1119
1120 pci_set_power_state(pdev, PCI_D0);
1121 pci_restore_state(pdev);
1122 ret = pci_enable_device(pdev);
1123 if (ret)
1124 return ret;
1125 pci_set_master(pdev);
1126
1127 ret = nouveau_do_resume(drm, true);
1128 if (ret) {
1129 NV_ERROR(drm, "resume failed with: %d\n", ret);
1130 return ret;
1131 }
1132
1133 /* do magic */
1134 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
1135 drm->dev->switch_power_state = DRM_SWITCH_POWER_ON;
1136
1137 /* Monitors may have been connected / disconnected during suspend */
1138 nouveau_display_hpd_resume(drm);
1139
1140 return ret;
1141}
1142
1143static int
1144nouveau_pmops_runtime_idle(struct device *dev)
1145{
1146 if (!nouveau_pmops_runtime()) {
1147 pm_runtime_forbid(dev);
1148 return -EBUSY;
1149 }
1150
1151 pm_runtime_mark_last_busy(dev);
1152 pm_runtime_autosuspend(dev);
1153 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
1154 return 1;
1155}
1156
1157static int
1158nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
1159{
1160 struct nouveau_drm *drm = nouveau_drm(dev);
1161 struct nouveau_cli *cli;
1162 char name[32], tmpname[TASK_COMM_LEN];
1163 int ret;
1164
1165 /* need to bring up power immediately if opening device */
1166 ret = pm_runtime_get_sync(dev->dev);
1167 if (ret < 0 && ret != -EACCES) {
1168 pm_runtime_put_autosuspend(dev->dev);
1169 return ret;
1170 }
1171
1172 get_task_comm(tmpname, current);
1173 rcu_read_lock();
1174 snprintf(name, sizeof(name), "%s[%d]",
1175 tmpname, pid_nr(rcu_dereference(fpriv->pid)));
1176 rcu_read_unlock();
1177
1178 if (!(cli = kzalloc(sizeof(*cli), GFP_KERNEL))) {
1179 ret = -ENOMEM;
1180 goto done;
1181 }
1182
1183 ret = nouveau_cli_init(drm, name, cli);
1184 if (ret)
1185 goto done;
1186
1187 fpriv->driver_priv = cli;
1188
1189 mutex_lock(&drm->clients_lock);
1190 list_add(&cli->head, &drm->clients);
1191 mutex_unlock(&drm->clients_lock);
1192
1193done:
1194 if (ret && cli) {
1195 nouveau_cli_fini(cli);
1196 kfree(cli);
1197 }
1198
1199 pm_runtime_mark_last_busy(dev->dev);
1200 pm_runtime_put_autosuspend(dev->dev);
1201 return ret;
1202}
1203
1204static void
1205nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
1206{
1207 struct nouveau_cli *cli = nouveau_cli(fpriv);
1208 struct nouveau_drm *drm = nouveau_drm(dev);
1209 int dev_index;
1210
1211 /*
1212 * The device is gone, and as it currently stands all clients are
1213 * cleaned up in the removal codepath. In the future this may change
1214 * so that we can support hot-unplugging, but for now we immediately
1215 * return to avoid a double-free situation.
1216 */
1217 if (!drm_dev_enter(dev, &dev_index))
1218 return;
1219
1220 pm_runtime_get_sync(dev->dev);
1221
1222 mutex_lock(&cli->mutex);
1223 if (cli->abi16)
1224 nouveau_abi16_fini(cli->abi16);
1225 mutex_unlock(&cli->mutex);
1226
1227 mutex_lock(&drm->clients_lock);
1228 list_del(&cli->head);
1229 mutex_unlock(&drm->clients_lock);
1230
1231 nouveau_cli_fini(cli);
1232 kfree(cli);
1233 pm_runtime_mark_last_busy(dev->dev);
1234 pm_runtime_put_autosuspend(dev->dev);
1235 drm_dev_exit(dev_index);
1236}
1237
1238static const struct drm_ioctl_desc
1239nouveau_ioctls[] = {
1240 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_RENDER_ALLOW),
1241 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, drm_invalid_op, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1242 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_RENDER_ALLOW),
1243 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_RENDER_ALLOW),
1244 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_RENDER_ALLOW),
1245 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_RENDER_ALLOW),
1246 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_RENDER_ALLOW),
1247 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_INIT, nouveau_svmm_init, DRM_RENDER_ALLOW),
1248 DRM_IOCTL_DEF_DRV(NOUVEAU_SVM_BIND, nouveau_svmm_bind, DRM_RENDER_ALLOW),
1249 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_RENDER_ALLOW),
1250 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_RENDER_ALLOW),
1251 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_RENDER_ALLOW),
1252 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_RENDER_ALLOW),
1253 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_RENDER_ALLOW),
1254 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_INIT, nouveau_uvmm_ioctl_vm_init, DRM_RENDER_ALLOW),
1255 DRM_IOCTL_DEF_DRV(NOUVEAU_VM_BIND, nouveau_uvmm_ioctl_vm_bind, DRM_RENDER_ALLOW),
1256 DRM_IOCTL_DEF_DRV(NOUVEAU_EXEC, nouveau_exec_ioctl_exec, DRM_RENDER_ALLOW),
1257};
1258
1259long
1260nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1261{
1262 struct drm_file *filp = file->private_data;
1263 struct drm_device *dev = filp->minor->dev;
1264 long ret;
1265
1266 ret = pm_runtime_get_sync(dev->dev);
1267 if (ret < 0 && ret != -EACCES) {
1268 pm_runtime_put_autosuspend(dev->dev);
1269 return ret;
1270 }
1271
1272 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
1273 case DRM_NOUVEAU_NVIF:
1274 ret = nouveau_abi16_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
1275 break;
1276 default:
1277 ret = drm_ioctl(file, cmd, arg);
1278 break;
1279 }
1280
1281 pm_runtime_mark_last_busy(dev->dev);
1282 pm_runtime_put_autosuspend(dev->dev);
1283 return ret;
1284}
1285
1286static const struct file_operations
1287nouveau_driver_fops = {
1288 .owner = THIS_MODULE,
1289 .open = drm_open,
1290 .release = drm_release,
1291 .unlocked_ioctl = nouveau_drm_ioctl,
1292 .mmap = drm_gem_mmap,
1293 .poll = drm_poll,
1294 .read = drm_read,
1295#if defined(CONFIG_COMPAT)
1296 .compat_ioctl = nouveau_compat_ioctl,
1297#endif
1298 .llseek = noop_llseek,
1299 .fop_flags = FOP_UNSIGNED_OFFSET,
1300};
1301
1302static struct drm_driver
1303driver_stub = {
1304 .driver_features = DRIVER_GEM |
1305 DRIVER_SYNCOBJ | DRIVER_SYNCOBJ_TIMELINE |
1306 DRIVER_GEM_GPUVA |
1307 DRIVER_MODESET |
1308 DRIVER_RENDER,
1309 .open = nouveau_drm_open,
1310 .postclose = nouveau_drm_postclose,
1311
1312#if defined(CONFIG_DEBUG_FS)
1313 .debugfs_init = nouveau_drm_debugfs_init,
1314#endif
1315
1316 .ioctls = nouveau_ioctls,
1317 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
1318 .fops = &nouveau_driver_fops,
1319
1320 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
1321
1322 .dumb_create = nouveau_display_dumb_create,
1323 .dumb_map_offset = drm_gem_ttm_dumb_map_offset,
1324
1325 DRM_FBDEV_TTM_DRIVER_OPS,
1326
1327 .name = DRIVER_NAME,
1328 .desc = DRIVER_DESC,
1329#ifdef GIT_REVISION
1330 .date = GIT_REVISION,
1331#else
1332 .date = DRIVER_DATE,
1333#endif
1334 .major = DRIVER_MAJOR,
1335 .minor = DRIVER_MINOR,
1336 .patchlevel = DRIVER_PATCHLEVEL,
1337};
1338
1339static struct pci_device_id
1340nouveau_drm_pci_table[] = {
1341 {
1342 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
1343 .class = PCI_BASE_CLASS_DISPLAY << 16,
1344 .class_mask = 0xff << 16,
1345 },
1346 {
1347 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1348 .class = PCI_BASE_CLASS_DISPLAY << 16,
1349 .class_mask = 0xff << 16,
1350 },
1351 {}
1352};
1353
1354static void nouveau_display_options(void)
1355{
1356 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1357
1358 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1359 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1360 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1361 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1362 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1363 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1364 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1365 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1366 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1367 DRM_DEBUG_DRIVER("... hdmimhz : %d\n", nouveau_hdmimhz);
1368}
1369
1370static const struct dev_pm_ops nouveau_pm_ops = {
1371 .suspend = nouveau_pmops_suspend,
1372 .resume = nouveau_pmops_resume,
1373 .freeze = nouveau_pmops_freeze,
1374 .thaw = nouveau_pmops_thaw,
1375 .poweroff = nouveau_pmops_freeze,
1376 .restore = nouveau_pmops_resume,
1377 .runtime_suspend = nouveau_pmops_runtime_suspend,
1378 .runtime_resume = nouveau_pmops_runtime_resume,
1379 .runtime_idle = nouveau_pmops_runtime_idle,
1380};
1381
1382static struct pci_driver
1383nouveau_drm_pci_driver = {
1384 .name = "nouveau",
1385 .id_table = nouveau_drm_pci_table,
1386 .probe = nouveau_drm_probe,
1387 .remove = nouveau_drm_remove,
1388 .driver.pm = &nouveau_pm_ops,
1389};
1390
1391struct drm_device *
1392nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1393 struct platform_device *pdev,
1394 struct nvkm_device **pdevice)
1395{
1396 struct nouveau_drm *drm;
1397 int err;
1398
1399 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug, pdevice);
1400 if (err)
1401 goto err_free;
1402
1403 drm = nouveau_drm_device_new(&driver_platform, &pdev->dev, *pdevice);
1404 if (IS_ERR(drm)) {
1405 err = PTR_ERR(drm);
1406 goto err_free;
1407 }
1408
1409 err = nouveau_drm_device_init(drm);
1410 if (err)
1411 goto err_put;
1412
1413 return drm->dev;
1414
1415err_put:
1416 nouveau_drm_device_del(drm);
1417err_free:
1418 nvkm_device_del(pdevice);
1419
1420 return ERR_PTR(err);
1421}
1422
1423static int __init
1424nouveau_drm_init(void)
1425{
1426 driver_pci = driver_stub;
1427 driver_platform = driver_stub;
1428
1429 nouveau_display_options();
1430
1431 if (nouveau_modeset == -1) {
1432 if (drm_firmware_drivers_only())
1433 nouveau_modeset = 0;
1434 }
1435
1436 if (!nouveau_modeset)
1437 return 0;
1438
1439#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1440 platform_driver_register(&nouveau_platform_driver);
1441#endif
1442
1443 nouveau_register_dsm_handler();
1444 nouveau_backlight_ctor();
1445
1446#ifdef CONFIG_PCI
1447 return pci_register_driver(&nouveau_drm_pci_driver);
1448#else
1449 return 0;
1450#endif
1451}
1452
1453static void __exit
1454nouveau_drm_exit(void)
1455{
1456 if (!nouveau_modeset)
1457 return;
1458
1459#ifdef CONFIG_PCI
1460 pci_unregister_driver(&nouveau_drm_pci_driver);
1461#endif
1462 nouveau_backlight_dtor();
1463 nouveau_unregister_dsm_handler();
1464
1465#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1466 platform_driver_unregister(&nouveau_platform_driver);
1467#endif
1468 if (IS_ENABLED(CONFIG_DRM_NOUVEAU_SVM))
1469 mmu_notifier_synchronize();
1470}
1471
1472module_init(nouveau_drm_init);
1473module_exit(nouveau_drm_exit);
1474
1475MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1476MODULE_AUTHOR(DRIVER_AUTHOR);
1477MODULE_DESCRIPTION(DRIVER_DESC);
1478MODULE_LICENSE("GPL and additional rights");
1/*
2 * Copyright 2012 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * Authors: Ben Skeggs
23 */
24
25#include <linux/apple-gmux.h>
26#include <linux/console.h>
27#include <linux/delay.h>
28#include <linux/module.h>
29#include <linux/pci.h>
30#include <linux/pm_runtime.h>
31#include <linux/vgaarb.h>
32#include <linux/vga_switcheroo.h>
33
34#include "drmP.h"
35#include "drm_crtc_helper.h"
36
37#include <core/gpuobj.h>
38#include <core/option.h>
39#include <core/pci.h>
40#include <core/tegra.h>
41
42#include <nvif/class.h>
43#include <nvif/cl0002.h>
44#include <nvif/cla06f.h>
45#include <nvif/if0004.h>
46
47#include "nouveau_drm.h"
48#include "nouveau_dma.h"
49#include "nouveau_ttm.h"
50#include "nouveau_gem.h"
51#include "nouveau_vga.h"
52#include "nouveau_hwmon.h"
53#include "nouveau_acpi.h"
54#include "nouveau_bios.h"
55#include "nouveau_ioctl.h"
56#include "nouveau_abi16.h"
57#include "nouveau_fbcon.h"
58#include "nouveau_fence.h"
59#include "nouveau_debugfs.h"
60#include "nouveau_usif.h"
61#include "nouveau_connector.h"
62#include "nouveau_platform.h"
63
64MODULE_PARM_DESC(config, "option string to pass to driver core");
65static char *nouveau_config;
66module_param_named(config, nouveau_config, charp, 0400);
67
68MODULE_PARM_DESC(debug, "debug string to pass to driver core");
69static char *nouveau_debug;
70module_param_named(debug, nouveau_debug, charp, 0400);
71
72MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
73static int nouveau_noaccel = 0;
74module_param_named(noaccel, nouveau_noaccel, int, 0400);
75
76MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
77 "0 = disabled, 1 = enabled, 2 = headless)");
78int nouveau_modeset = -1;
79module_param_named(modeset, nouveau_modeset, int, 0400);
80
81MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
82int nouveau_runtime_pm = -1;
83module_param_named(runpm, nouveau_runtime_pm, int, 0400);
84
85static struct drm_driver driver_stub;
86static struct drm_driver driver_pci;
87static struct drm_driver driver_platform;
88
89static u64
90nouveau_pci_name(struct pci_dev *pdev)
91{
92 u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
93 name |= pdev->bus->number << 16;
94 name |= PCI_SLOT(pdev->devfn) << 8;
95 return name | PCI_FUNC(pdev->devfn);
96}
97
98static u64
99nouveau_platform_name(struct platform_device *platformdev)
100{
101 return platformdev->id;
102}
103
104static u64
105nouveau_name(struct drm_device *dev)
106{
107 if (dev->pdev)
108 return nouveau_pci_name(dev->pdev);
109 else
110 return nouveau_platform_name(dev->platformdev);
111}
112
113static int
114nouveau_cli_create(struct drm_device *dev, const char *sname,
115 int size, void **pcli)
116{
117 struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
118 int ret;
119 if (cli) {
120 snprintf(cli->name, sizeof(cli->name), "%s", sname);
121 cli->dev = dev;
122
123 ret = nvif_client_init(NULL, cli->name, nouveau_name(dev),
124 nouveau_config, nouveau_debug,
125 &cli->base);
126 if (ret == 0) {
127 mutex_init(&cli->mutex);
128 usif_client_init(cli);
129 }
130 return ret;
131 }
132 return -ENOMEM;
133}
134
135static void
136nouveau_cli_destroy(struct nouveau_cli *cli)
137{
138 nvkm_vm_ref(NULL, &nvxx_client(&cli->base)->vm, NULL);
139 nvif_client_fini(&cli->base);
140 usif_client_fini(cli);
141 kfree(cli);
142}
143
144static void
145nouveau_accel_fini(struct nouveau_drm *drm)
146{
147 nouveau_channel_idle(drm->channel);
148 nvif_object_fini(&drm->ntfy);
149 nvkm_gpuobj_del(&drm->notify);
150 nvif_notify_fini(&drm->flip);
151 nvif_object_fini(&drm->nvsw);
152 nouveau_channel_del(&drm->channel);
153
154 nouveau_channel_idle(drm->cechan);
155 nvif_object_fini(&drm->ttm.copy);
156 nouveau_channel_del(&drm->cechan);
157
158 if (drm->fence)
159 nouveau_fence(drm)->dtor(drm);
160}
161
162static void
163nouveau_accel_init(struct nouveau_drm *drm)
164{
165 struct nvif_device *device = &drm->device;
166 struct nvif_sclass *sclass;
167 u32 arg0, arg1;
168 int ret, i, n;
169
170 if (nouveau_noaccel)
171 return;
172
173 /* initialise synchronisation routines */
174 /*XXX: this is crap, but the fence/channel stuff is a little
175 * backwards in some places. this will be fixed.
176 */
177 ret = n = nvif_object_sclass_get(&device->object, &sclass);
178 if (ret < 0)
179 return;
180
181 for (ret = -ENOSYS, i = 0; i < n; i++) {
182 switch (sclass[i].oclass) {
183 case NV03_CHANNEL_DMA:
184 ret = nv04_fence_create(drm);
185 break;
186 case NV10_CHANNEL_DMA:
187 ret = nv10_fence_create(drm);
188 break;
189 case NV17_CHANNEL_DMA:
190 case NV40_CHANNEL_DMA:
191 ret = nv17_fence_create(drm);
192 break;
193 case NV50_CHANNEL_GPFIFO:
194 ret = nv50_fence_create(drm);
195 break;
196 case G82_CHANNEL_GPFIFO:
197 ret = nv84_fence_create(drm);
198 break;
199 case FERMI_CHANNEL_GPFIFO:
200 case KEPLER_CHANNEL_GPFIFO_A:
201 case KEPLER_CHANNEL_GPFIFO_B:
202 case MAXWELL_CHANNEL_GPFIFO_A:
203 ret = nvc0_fence_create(drm);
204 break;
205 default:
206 break;
207 }
208 }
209
210 nvif_object_sclass_put(&sclass);
211 if (ret) {
212 NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
213 nouveau_accel_fini(drm);
214 return;
215 }
216
217 if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
218 ret = nouveau_channel_new(drm, &drm->device,
219 NVA06F_V0_ENGINE_CE0 |
220 NVA06F_V0_ENGINE_CE1,
221 0, &drm->cechan);
222 if (ret)
223 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
224
225 arg0 = NVA06F_V0_ENGINE_GR;
226 arg1 = 1;
227 } else
228 if (device->info.chipset >= 0xa3 &&
229 device->info.chipset != 0xaa &&
230 device->info.chipset != 0xac) {
231 ret = nouveau_channel_new(drm, &drm->device,
232 NvDmaFB, NvDmaTT, &drm->cechan);
233 if (ret)
234 NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
235
236 arg0 = NvDmaFB;
237 arg1 = NvDmaTT;
238 } else {
239 arg0 = NvDmaFB;
240 arg1 = NvDmaTT;
241 }
242
243 ret = nouveau_channel_new(drm, &drm->device, arg0, arg1, &drm->channel);
244 if (ret) {
245 NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
246 nouveau_accel_fini(drm);
247 return;
248 }
249
250 ret = nvif_object_init(&drm->channel->user, NVDRM_NVSW,
251 nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
252 if (ret == 0) {
253 ret = RING_SPACE(drm->channel, 2);
254 if (ret == 0) {
255 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
256 BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
257 OUT_RING (drm->channel, NVDRM_NVSW);
258 } else
259 if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
260 BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
261 OUT_RING (drm->channel, 0x001f0000);
262 }
263 }
264
265 ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
266 false, NV04_NVSW_NTFY_UEVENT,
267 NULL, 0, 0, &drm->flip);
268 if (ret == 0)
269 ret = nvif_notify_get(&drm->flip);
270 if (ret) {
271 nouveau_accel_fini(drm);
272 return;
273 }
274 }
275
276 if (ret) {
277 NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
278 nouveau_accel_fini(drm);
279 return;
280 }
281
282 if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
283 ret = nvkm_gpuobj_new(nvxx_device(&drm->device), 32, 0, false,
284 NULL, &drm->notify);
285 if (ret) {
286 NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
287 nouveau_accel_fini(drm);
288 return;
289 }
290
291 ret = nvif_object_init(&drm->channel->user, NvNotify0,
292 NV_DMA_IN_MEMORY,
293 &(struct nv_dma_v0) {
294 .target = NV_DMA_V0_TARGET_VRAM,
295 .access = NV_DMA_V0_ACCESS_RDWR,
296 .start = drm->notify->addr,
297 .limit = drm->notify->addr + 31
298 }, sizeof(struct nv_dma_v0),
299 &drm->ntfy);
300 if (ret) {
301 nouveau_accel_fini(drm);
302 return;
303 }
304 }
305
306
307 nouveau_bo_move_init(drm);
308}
309
310static int nouveau_drm_probe(struct pci_dev *pdev,
311 const struct pci_device_id *pent)
312{
313 struct nvkm_device *device;
314 struct apertures_struct *aper;
315 bool boot = false;
316 int ret;
317
318 /*
319 * apple-gmux is needed on dual GPU MacBook Pro
320 * to probe the panel if we're the inactive GPU.
321 */
322 if (IS_ENABLED(CONFIG_VGA_ARB) && IS_ENABLED(CONFIG_VGA_SWITCHEROO) &&
323 apple_gmux_present() && pdev != vga_default_device() &&
324 !vga_switcheroo_handler_flags())
325 return -EPROBE_DEFER;
326
327 /* remove conflicting drivers (vesafb, efifb etc) */
328 aper = alloc_apertures(3);
329 if (!aper)
330 return -ENOMEM;
331
332 aper->ranges[0].base = pci_resource_start(pdev, 1);
333 aper->ranges[0].size = pci_resource_len(pdev, 1);
334 aper->count = 1;
335
336 if (pci_resource_len(pdev, 2)) {
337 aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
338 aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
339 aper->count++;
340 }
341
342 if (pci_resource_len(pdev, 3)) {
343 aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
344 aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
345 aper->count++;
346 }
347
348#ifdef CONFIG_X86
349 boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
350#endif
351 if (nouveau_modeset != 2)
352 remove_conflicting_framebuffers(aper, "nouveaufb", boot);
353 kfree(aper);
354
355 ret = nvkm_device_pci_new(pdev, nouveau_config, nouveau_debug,
356 true, true, ~0ULL, &device);
357 if (ret)
358 return ret;
359
360 pci_set_master(pdev);
361
362 ret = drm_get_pci_dev(pdev, pent, &driver_pci);
363 if (ret) {
364 nvkm_device_del(&device);
365 return ret;
366 }
367
368 return 0;
369}
370
371#define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
372
373static void
374nouveau_get_hdmi_dev(struct nouveau_drm *drm)
375{
376 struct pci_dev *pdev = drm->dev->pdev;
377
378 if (!pdev) {
379 NV_DEBUG(drm, "not a PCI device; no HDMI\n");
380 drm->hdmi_device = NULL;
381 return;
382 }
383
384 /* subfunction one is a hdmi audio device? */
385 drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
386 PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
387
388 if (!drm->hdmi_device) {
389 NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
390 return;
391 }
392
393 if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
394 NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
395 pci_dev_put(drm->hdmi_device);
396 drm->hdmi_device = NULL;
397 return;
398 }
399}
400
401static int
402nouveau_drm_load(struct drm_device *dev, unsigned long flags)
403{
404 struct nouveau_drm *drm;
405 int ret;
406
407 ret = nouveau_cli_create(dev, "DRM", sizeof(*drm), (void **)&drm);
408 if (ret)
409 return ret;
410
411 dev->dev_private = drm;
412 drm->dev = dev;
413 nvxx_client(&drm->client.base)->debug =
414 nvkm_dbgopt(nouveau_debug, "DRM");
415
416 INIT_LIST_HEAD(&drm->clients);
417 spin_lock_init(&drm->tile.lock);
418
419 nouveau_get_hdmi_dev(drm);
420
421 ret = nvif_device_init(&drm->client.base.object, 0, NV_DEVICE,
422 &(struct nv_device_v0) {
423 .device = ~0,
424 }, sizeof(struct nv_device_v0),
425 &drm->device);
426 if (ret)
427 goto fail_device;
428
429 dev->irq_enabled = true;
430
431 /* workaround an odd issue on nvc1 by disabling the device's
432 * nosnoop capability. hopefully won't cause issues until a
433 * better fix is found - assuming there is one...
434 */
435 if (drm->device.info.chipset == 0xc1)
436 nvif_mask(&drm->device.object, 0x00088080, 0x00000800, 0x00000000);
437
438 nouveau_vga_init(drm);
439
440 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
441 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
442 0x1000, NULL, &drm->client.vm);
443 if (ret)
444 goto fail_device;
445
446 nvxx_client(&drm->client.base)->vm = drm->client.vm;
447 }
448
449 ret = nouveau_ttm_init(drm);
450 if (ret)
451 goto fail_ttm;
452
453 ret = nouveau_bios_init(dev);
454 if (ret)
455 goto fail_bios;
456
457 ret = nouveau_display_create(dev);
458 if (ret)
459 goto fail_dispctor;
460
461 if (dev->mode_config.num_crtc) {
462 ret = nouveau_display_init(dev);
463 if (ret)
464 goto fail_dispinit;
465 }
466
467 nouveau_debugfs_init(drm);
468 nouveau_hwmon_init(dev);
469 nouveau_accel_init(drm);
470 nouveau_fbcon_init(dev);
471
472 if (nouveau_runtime_pm != 0) {
473 pm_runtime_use_autosuspend(dev->dev);
474 pm_runtime_set_autosuspend_delay(dev->dev, 5000);
475 pm_runtime_set_active(dev->dev);
476 pm_runtime_allow(dev->dev);
477 pm_runtime_mark_last_busy(dev->dev);
478 pm_runtime_put(dev->dev);
479 }
480 return 0;
481
482fail_dispinit:
483 nouveau_display_destroy(dev);
484fail_dispctor:
485 nouveau_bios_takedown(dev);
486fail_bios:
487 nouveau_ttm_fini(drm);
488fail_ttm:
489 nouveau_vga_fini(drm);
490fail_device:
491 nvif_device_fini(&drm->device);
492 nouveau_cli_destroy(&drm->client);
493 return ret;
494}
495
496static int
497nouveau_drm_unload(struct drm_device *dev)
498{
499 struct nouveau_drm *drm = nouveau_drm(dev);
500
501 pm_runtime_get_sync(dev->dev);
502 nouveau_fbcon_fini(dev);
503 nouveau_accel_fini(drm);
504 nouveau_hwmon_fini(dev);
505 nouveau_debugfs_fini(drm);
506
507 if (dev->mode_config.num_crtc)
508 nouveau_display_fini(dev);
509 nouveau_display_destroy(dev);
510
511 nouveau_bios_takedown(dev);
512
513 nouveau_ttm_fini(drm);
514 nouveau_vga_fini(drm);
515
516 nvif_device_fini(&drm->device);
517 if (drm->hdmi_device)
518 pci_dev_put(drm->hdmi_device);
519 nouveau_cli_destroy(&drm->client);
520 return 0;
521}
522
523void
524nouveau_drm_device_remove(struct drm_device *dev)
525{
526 struct nouveau_drm *drm = nouveau_drm(dev);
527 struct nvkm_client *client;
528 struct nvkm_device *device;
529
530 dev->irq_enabled = false;
531 client = nvxx_client(&drm->client.base);
532 device = nvkm_device_find(client->device);
533 drm_put_dev(dev);
534
535 nvkm_device_del(&device);
536}
537
538static void
539nouveau_drm_remove(struct pci_dev *pdev)
540{
541 struct drm_device *dev = pci_get_drvdata(pdev);
542
543 nouveau_drm_device_remove(dev);
544}
545
546static int
547nouveau_do_suspend(struct drm_device *dev, bool runtime)
548{
549 struct nouveau_drm *drm = nouveau_drm(dev);
550 struct nouveau_cli *cli;
551 int ret;
552
553 if (dev->mode_config.num_crtc) {
554 NV_INFO(drm, "suspending console...\n");
555 nouveau_fbcon_set_suspend(dev, 1);
556 NV_INFO(drm, "suspending display...\n");
557 ret = nouveau_display_suspend(dev, runtime);
558 if (ret)
559 return ret;
560 }
561
562 NV_INFO(drm, "evicting buffers...\n");
563 ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
564
565 NV_INFO(drm, "waiting for kernel channels to go idle...\n");
566 if (drm->cechan) {
567 ret = nouveau_channel_idle(drm->cechan);
568 if (ret)
569 goto fail_display;
570 }
571
572 if (drm->channel) {
573 ret = nouveau_channel_idle(drm->channel);
574 if (ret)
575 goto fail_display;
576 }
577
578 NV_INFO(drm, "suspending client object trees...\n");
579 if (drm->fence && nouveau_fence(drm)->suspend) {
580 if (!nouveau_fence(drm)->suspend(drm)) {
581 ret = -ENOMEM;
582 goto fail_display;
583 }
584 }
585
586 list_for_each_entry(cli, &drm->clients, head) {
587 ret = nvif_client_suspend(&cli->base);
588 if (ret)
589 goto fail_client;
590 }
591
592 NV_INFO(drm, "suspending kernel object tree...\n");
593 ret = nvif_client_suspend(&drm->client.base);
594 if (ret)
595 goto fail_client;
596
597 return 0;
598
599fail_client:
600 list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
601 nvif_client_resume(&cli->base);
602 }
603
604 if (drm->fence && nouveau_fence(drm)->resume)
605 nouveau_fence(drm)->resume(drm);
606
607fail_display:
608 if (dev->mode_config.num_crtc) {
609 NV_INFO(drm, "resuming display...\n");
610 nouveau_display_resume(dev, runtime);
611 }
612 return ret;
613}
614
615static int
616nouveau_do_resume(struct drm_device *dev, bool runtime)
617{
618 struct nouveau_drm *drm = nouveau_drm(dev);
619 struct nouveau_cli *cli;
620
621 NV_INFO(drm, "resuming kernel object tree...\n");
622 nvif_client_resume(&drm->client.base);
623
624 NV_INFO(drm, "resuming client object trees...\n");
625 if (drm->fence && nouveau_fence(drm)->resume)
626 nouveau_fence(drm)->resume(drm);
627
628 list_for_each_entry(cli, &drm->clients, head) {
629 nvif_client_resume(&cli->base);
630 }
631
632 nouveau_run_vbios_init(dev);
633
634 if (dev->mode_config.num_crtc) {
635 NV_INFO(drm, "resuming display...\n");
636 nouveau_display_resume(dev, runtime);
637 NV_INFO(drm, "resuming console...\n");
638 nouveau_fbcon_set_suspend(dev, 0);
639 }
640
641 return 0;
642}
643
644int
645nouveau_pmops_suspend(struct device *dev)
646{
647 struct pci_dev *pdev = to_pci_dev(dev);
648 struct drm_device *drm_dev = pci_get_drvdata(pdev);
649 int ret;
650
651 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
652 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
653 return 0;
654
655 ret = nouveau_do_suspend(drm_dev, false);
656 if (ret)
657 return ret;
658
659 pci_save_state(pdev);
660 pci_disable_device(pdev);
661 pci_set_power_state(pdev, PCI_D3hot);
662 udelay(200);
663 return 0;
664}
665
666int
667nouveau_pmops_resume(struct device *dev)
668{
669 struct pci_dev *pdev = to_pci_dev(dev);
670 struct drm_device *drm_dev = pci_get_drvdata(pdev);
671 int ret;
672
673 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
674 drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
675 return 0;
676
677 pci_set_power_state(pdev, PCI_D0);
678 pci_restore_state(pdev);
679 ret = pci_enable_device(pdev);
680 if (ret)
681 return ret;
682 pci_set_master(pdev);
683
684 return nouveau_do_resume(drm_dev, false);
685}
686
687static int
688nouveau_pmops_freeze(struct device *dev)
689{
690 struct pci_dev *pdev = to_pci_dev(dev);
691 struct drm_device *drm_dev = pci_get_drvdata(pdev);
692 return nouveau_do_suspend(drm_dev, false);
693}
694
695static int
696nouveau_pmops_thaw(struct device *dev)
697{
698 struct pci_dev *pdev = to_pci_dev(dev);
699 struct drm_device *drm_dev = pci_get_drvdata(pdev);
700 return nouveau_do_resume(drm_dev, false);
701}
702
703static int
704nouveau_pmops_runtime_suspend(struct device *dev)
705{
706 struct pci_dev *pdev = to_pci_dev(dev);
707 struct drm_device *drm_dev = pci_get_drvdata(pdev);
708 int ret;
709
710 if (nouveau_runtime_pm == 0) {
711 pm_runtime_forbid(dev);
712 return -EBUSY;
713 }
714
715 /* are we optimus enabled? */
716 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
717 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
718 pm_runtime_forbid(dev);
719 return -EBUSY;
720 }
721
722 drm_kms_helper_poll_disable(drm_dev);
723 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
724 nouveau_switcheroo_optimus_dsm();
725 ret = nouveau_do_suspend(drm_dev, true);
726 pci_save_state(pdev);
727 pci_disable_device(pdev);
728 pci_ignore_hotplug(pdev);
729 pci_set_power_state(pdev, PCI_D3cold);
730 drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
731 return ret;
732}
733
734static int
735nouveau_pmops_runtime_resume(struct device *dev)
736{
737 struct pci_dev *pdev = to_pci_dev(dev);
738 struct drm_device *drm_dev = pci_get_drvdata(pdev);
739 struct nvif_device *device = &nouveau_drm(drm_dev)->device;
740 int ret;
741
742 if (nouveau_runtime_pm == 0)
743 return -EINVAL;
744
745 pci_set_power_state(pdev, PCI_D0);
746 pci_restore_state(pdev);
747 ret = pci_enable_device(pdev);
748 if (ret)
749 return ret;
750 pci_set_master(pdev);
751
752 ret = nouveau_do_resume(drm_dev, true);
753 drm_kms_helper_poll_enable(drm_dev);
754 /* do magic */
755 nvif_mask(&device->object, 0x088488, (1 << 25), (1 << 25));
756 vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
757 drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
758 return ret;
759}
760
761static int
762nouveau_pmops_runtime_idle(struct device *dev)
763{
764 struct pci_dev *pdev = to_pci_dev(dev);
765 struct drm_device *drm_dev = pci_get_drvdata(pdev);
766 struct nouveau_drm *drm = nouveau_drm(drm_dev);
767 struct drm_crtc *crtc;
768
769 if (nouveau_runtime_pm == 0) {
770 pm_runtime_forbid(dev);
771 return -EBUSY;
772 }
773
774 /* are we optimus enabled? */
775 if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
776 DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
777 pm_runtime_forbid(dev);
778 return -EBUSY;
779 }
780
781 /* if we have a hdmi audio device - make sure it has a driver loaded */
782 if (drm->hdmi_device) {
783 if (!drm->hdmi_device->driver) {
784 DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
785 pm_runtime_mark_last_busy(dev);
786 return -EBUSY;
787 }
788 }
789
790 list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
791 if (crtc->enabled) {
792 DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
793 return -EBUSY;
794 }
795 }
796 pm_runtime_mark_last_busy(dev);
797 pm_runtime_autosuspend(dev);
798 /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
799 return 1;
800}
801
802static int
803nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
804{
805 struct nouveau_drm *drm = nouveau_drm(dev);
806 struct nouveau_cli *cli;
807 char name[32], tmpname[TASK_COMM_LEN];
808 int ret;
809
810 /* need to bring up power immediately if opening device */
811 ret = pm_runtime_get_sync(dev->dev);
812 if (ret < 0 && ret != -EACCES)
813 return ret;
814
815 get_task_comm(tmpname, current);
816 snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
817
818 ret = nouveau_cli_create(dev, name, sizeof(*cli), (void **)&cli);
819
820 if (ret)
821 goto out_suspend;
822
823 cli->base.super = false;
824
825 if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
826 ret = nvkm_vm_new(nvxx_device(&drm->device), 0, (1ULL << 40),
827 0x1000, NULL, &cli->vm);
828 if (ret) {
829 nouveau_cli_destroy(cli);
830 goto out_suspend;
831 }
832
833 nvxx_client(&cli->base)->vm = cli->vm;
834 }
835
836 fpriv->driver_priv = cli;
837
838 mutex_lock(&drm->client.mutex);
839 list_add(&cli->head, &drm->clients);
840 mutex_unlock(&drm->client.mutex);
841
842out_suspend:
843 pm_runtime_mark_last_busy(dev->dev);
844 pm_runtime_put_autosuspend(dev->dev);
845
846 return ret;
847}
848
849static void
850nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
851{
852 struct nouveau_cli *cli = nouveau_cli(fpriv);
853 struct nouveau_drm *drm = nouveau_drm(dev);
854
855 pm_runtime_get_sync(dev->dev);
856
857 mutex_lock(&cli->mutex);
858 if (cli->abi16)
859 nouveau_abi16_fini(cli->abi16);
860 mutex_unlock(&cli->mutex);
861
862 mutex_lock(&drm->client.mutex);
863 list_del(&cli->head);
864 mutex_unlock(&drm->client.mutex);
865
866}
867
868static void
869nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
870{
871 struct nouveau_cli *cli = nouveau_cli(fpriv);
872 nouveau_cli_destroy(cli);
873 pm_runtime_mark_last_busy(dev->dev);
874 pm_runtime_put_autosuspend(dev->dev);
875}
876
877static const struct drm_ioctl_desc
878nouveau_ioctls[] = {
879 DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_AUTH|DRM_RENDER_ALLOW),
880 DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
881 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
882 DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_AUTH|DRM_RENDER_ALLOW),
883 DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
884 DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_AUTH|DRM_RENDER_ALLOW),
885 DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_AUTH|DRM_RENDER_ALLOW),
886 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_AUTH|DRM_RENDER_ALLOW),
887 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_AUTH|DRM_RENDER_ALLOW),
888 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_AUTH|DRM_RENDER_ALLOW),
889 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_AUTH|DRM_RENDER_ALLOW),
890 DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_AUTH|DRM_RENDER_ALLOW),
891};
892
893long
894nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
895{
896 struct drm_file *filp = file->private_data;
897 struct drm_device *dev = filp->minor->dev;
898 long ret;
899
900 ret = pm_runtime_get_sync(dev->dev);
901 if (ret < 0 && ret != -EACCES)
902 return ret;
903
904 switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
905 case DRM_NOUVEAU_NVIF:
906 ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
907 break;
908 default:
909 ret = drm_ioctl(file, cmd, arg);
910 break;
911 }
912
913 pm_runtime_mark_last_busy(dev->dev);
914 pm_runtime_put_autosuspend(dev->dev);
915 return ret;
916}
917
918static const struct file_operations
919nouveau_driver_fops = {
920 .owner = THIS_MODULE,
921 .open = drm_open,
922 .release = drm_release,
923 .unlocked_ioctl = nouveau_drm_ioctl,
924 .mmap = nouveau_ttm_mmap,
925 .poll = drm_poll,
926 .read = drm_read,
927#if defined(CONFIG_COMPAT)
928 .compat_ioctl = nouveau_compat_ioctl,
929#endif
930 .llseek = noop_llseek,
931};
932
933static struct drm_driver
934driver_stub = {
935 .driver_features =
936 DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER |
937 DRIVER_KMS_LEGACY_CONTEXT,
938
939 .load = nouveau_drm_load,
940 .unload = nouveau_drm_unload,
941 .open = nouveau_drm_open,
942 .preclose = nouveau_drm_preclose,
943 .postclose = nouveau_drm_postclose,
944 .lastclose = nouveau_vga_lastclose,
945
946#if defined(CONFIG_DEBUG_FS)
947 .debugfs_init = nouveau_drm_debugfs_init,
948 .debugfs_cleanup = nouveau_drm_debugfs_cleanup,
949#endif
950
951 .get_vblank_counter = drm_vblank_no_hw_counter,
952 .enable_vblank = nouveau_display_vblank_enable,
953 .disable_vblank = nouveau_display_vblank_disable,
954 .get_scanout_position = nouveau_display_scanoutpos,
955 .get_vblank_timestamp = nouveau_display_vblstamp,
956
957 .ioctls = nouveau_ioctls,
958 .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
959 .fops = &nouveau_driver_fops,
960
961 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
962 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
963 .gem_prime_export = drm_gem_prime_export,
964 .gem_prime_import = drm_gem_prime_import,
965 .gem_prime_pin = nouveau_gem_prime_pin,
966 .gem_prime_res_obj = nouveau_gem_prime_res_obj,
967 .gem_prime_unpin = nouveau_gem_prime_unpin,
968 .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
969 .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
970 .gem_prime_vmap = nouveau_gem_prime_vmap,
971 .gem_prime_vunmap = nouveau_gem_prime_vunmap,
972
973 .gem_free_object = nouveau_gem_object_del,
974 .gem_open_object = nouveau_gem_object_open,
975 .gem_close_object = nouveau_gem_object_close,
976
977 .dumb_create = nouveau_display_dumb_create,
978 .dumb_map_offset = nouveau_display_dumb_map_offset,
979 .dumb_destroy = drm_gem_dumb_destroy,
980
981 .name = DRIVER_NAME,
982 .desc = DRIVER_DESC,
983#ifdef GIT_REVISION
984 .date = GIT_REVISION,
985#else
986 .date = DRIVER_DATE,
987#endif
988 .major = DRIVER_MAJOR,
989 .minor = DRIVER_MINOR,
990 .patchlevel = DRIVER_PATCHLEVEL,
991};
992
993static struct pci_device_id
994nouveau_drm_pci_table[] = {
995 {
996 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
997 .class = PCI_BASE_CLASS_DISPLAY << 16,
998 .class_mask = 0xff << 16,
999 },
1000 {
1001 PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
1002 .class = PCI_BASE_CLASS_DISPLAY << 16,
1003 .class_mask = 0xff << 16,
1004 },
1005 {}
1006};
1007
1008static void nouveau_display_options(void)
1009{
1010 DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
1011
1012 DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
1013 DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
1014 DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
1015 DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
1016 DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
1017 DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
1018 DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
1019 DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
1020 DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
1021 DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
1022}
1023
1024static const struct dev_pm_ops nouveau_pm_ops = {
1025 .suspend = nouveau_pmops_suspend,
1026 .resume = nouveau_pmops_resume,
1027 .freeze = nouveau_pmops_freeze,
1028 .thaw = nouveau_pmops_thaw,
1029 .poweroff = nouveau_pmops_freeze,
1030 .restore = nouveau_pmops_resume,
1031 .runtime_suspend = nouveau_pmops_runtime_suspend,
1032 .runtime_resume = nouveau_pmops_runtime_resume,
1033 .runtime_idle = nouveau_pmops_runtime_idle,
1034};
1035
1036static struct pci_driver
1037nouveau_drm_pci_driver = {
1038 .name = "nouveau",
1039 .id_table = nouveau_drm_pci_table,
1040 .probe = nouveau_drm_probe,
1041 .remove = nouveau_drm_remove,
1042 .driver.pm = &nouveau_pm_ops,
1043};
1044
1045struct drm_device *
1046nouveau_platform_device_create(const struct nvkm_device_tegra_func *func,
1047 struct platform_device *pdev,
1048 struct nvkm_device **pdevice)
1049{
1050 struct drm_device *drm;
1051 int err;
1052
1053 err = nvkm_device_tegra_new(func, pdev, nouveau_config, nouveau_debug,
1054 true, true, ~0ULL, pdevice);
1055 if (err)
1056 goto err_free;
1057
1058 drm = drm_dev_alloc(&driver_platform, &pdev->dev);
1059 if (!drm) {
1060 err = -ENOMEM;
1061 goto err_free;
1062 }
1063
1064 drm->platformdev = pdev;
1065 platform_set_drvdata(pdev, drm);
1066
1067 return drm;
1068
1069err_free:
1070 nvkm_device_del(pdevice);
1071
1072 return ERR_PTR(err);
1073}
1074
1075static int __init
1076nouveau_drm_init(void)
1077{
1078 driver_pci = driver_stub;
1079 driver_pci.set_busid = drm_pci_set_busid;
1080 driver_platform = driver_stub;
1081 driver_platform.set_busid = drm_platform_set_busid;
1082
1083 nouveau_display_options();
1084
1085 if (nouveau_modeset == -1) {
1086#ifdef CONFIG_VGA_CONSOLE
1087 if (vgacon_text_force())
1088 nouveau_modeset = 0;
1089#endif
1090 }
1091
1092 if (!nouveau_modeset)
1093 return 0;
1094
1095#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1096 platform_driver_register(&nouveau_platform_driver);
1097#endif
1098
1099 nouveau_register_dsm_handler();
1100 return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
1101}
1102
1103static void __exit
1104nouveau_drm_exit(void)
1105{
1106 if (!nouveau_modeset)
1107 return;
1108
1109 drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
1110 nouveau_unregister_dsm_handler();
1111
1112#ifdef CONFIG_NOUVEAU_PLATFORM_DRIVER
1113 platform_driver_unregister(&nouveau_platform_driver);
1114#endif
1115}
1116
1117module_init(nouveau_drm_init);
1118module_exit(nouveau_drm_exit);
1119
1120MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
1121MODULE_AUTHOR(DRIVER_AUTHOR);
1122MODULE_DESCRIPTION(DRIVER_DESC);
1123MODULE_LICENSE("GPL and additional rights");