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1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28
29#include <linux/delay.h>
30#include <linux/i2c.h>
31#include <linux/kernel.h>
32#include <linux/module.h>
33#include <linux/slab.h>
34
35#include <drm/drm_crtc.h>
36#include <drm/drm_crtc_helper.h>
37#include <drm/drm_edid.h>
38#include <drm/drm_modeset_helper_vtables.h>
39
40#include "psb_drv.h"
41#include "psb_intel_drv.h"
42#include "psb_intel_reg.h"
43#include "psb_intel_sdvo_regs.h"
44
45#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
46#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
47#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
48#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
49
50#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
51 SDVO_TV_MASK)
52
53#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
54#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
55#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
56#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
57
58
59static const char *tv_format_names[] = {
60 "NTSC_M" , "NTSC_J" , "NTSC_443",
61 "PAL_B" , "PAL_D" , "PAL_G" ,
62 "PAL_H" , "PAL_I" , "PAL_M" ,
63 "PAL_N" , "PAL_NC" , "PAL_60" ,
64 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
65 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
66 "SECAM_60"
67};
68
69struct psb_intel_sdvo {
70 struct gma_encoder base;
71
72 struct i2c_adapter *i2c;
73 u8 target_addr;
74
75 struct i2c_adapter ddc;
76
77 /* Register for the SDVO device: SDVOB or SDVOC */
78 int sdvo_reg;
79
80 /* Active outputs controlled by this SDVO output */
81 uint16_t controlled_output;
82
83 /*
84 * Capabilities of the SDVO device returned by
85 * i830_sdvo_get_capabilities()
86 */
87 struct psb_intel_sdvo_caps caps;
88
89 /* Pixel clock limitations reported by the SDVO device, in kHz */
90 int pixel_clock_min, pixel_clock_max;
91
92 /*
93 * For multiple function SDVO device,
94 * this is for current attached outputs.
95 */
96 uint16_t attached_output;
97
98 /**
99 * This is used to select the color range of RBG outputs in HDMI mode.
100 * It is only valid when using TMDS encoding and 8 bit per color mode.
101 */
102 uint32_t color_range;
103
104 /**
105 * This is set if we're going to treat the device as TV-out.
106 *
107 * While we have these nice friendly flags for output types that ought
108 * to decide this for us, the S-Video output on our HDMI+S-Video card
109 * shows up as RGB1 (VGA).
110 */
111 bool is_tv;
112
113 /* This is for current tv format name */
114 int tv_format_index;
115
116 /**
117 * This is set if we treat the device as HDMI, instead of DVI.
118 */
119 bool is_hdmi;
120 bool has_hdmi_monitor;
121 bool has_hdmi_audio;
122
123 /**
124 * This is set if we detect output of sdvo device as LVDS and
125 * have a valid fixed mode to use with the panel.
126 */
127 bool is_lvds;
128
129 /**
130 * This is sdvo fixed panel mode pointer
131 */
132 struct drm_display_mode *sdvo_lvds_fixed_mode;
133
134 /* DDC bus used by this SDVO encoder */
135 uint8_t ddc_bus;
136
137 u8 pixel_multiplier;
138
139 /* Input timings for adjusted_mode */
140 struct psb_intel_sdvo_dtd input_dtd;
141
142 /* Saved SDVO output states */
143 uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */
144};
145
146struct psb_intel_sdvo_connector {
147 struct gma_connector base;
148
149 /* Mark the type of connector */
150 uint16_t output_flag;
151
152 int force_audio;
153
154 /* This contains all current supported TV format */
155 u8 tv_format_supported[ARRAY_SIZE(tv_format_names)];
156 int format_supported_num;
157 struct drm_property *tv_format;
158
159 /* add the property for the SDVO-TV */
160 struct drm_property *left;
161 struct drm_property *right;
162 struct drm_property *top;
163 struct drm_property *bottom;
164 struct drm_property *hpos;
165 struct drm_property *vpos;
166 struct drm_property *contrast;
167 struct drm_property *saturation;
168 struct drm_property *hue;
169 struct drm_property *sharpness;
170 struct drm_property *flicker_filter;
171 struct drm_property *flicker_filter_adaptive;
172 struct drm_property *flicker_filter_2d;
173 struct drm_property *tv_chroma_filter;
174 struct drm_property *tv_luma_filter;
175 struct drm_property *dot_crawl;
176
177 /* add the property for the SDVO-TV/LVDS */
178 struct drm_property *brightness;
179
180 /* Add variable to record current setting for the above property */
181 u32 left_margin, right_margin, top_margin, bottom_margin;
182
183 /* this is to get the range of margin.*/
184 u32 max_hscan, max_vscan;
185 u32 max_hpos, cur_hpos;
186 u32 max_vpos, cur_vpos;
187 u32 cur_brightness, max_brightness;
188 u32 cur_contrast, max_contrast;
189 u32 cur_saturation, max_saturation;
190 u32 cur_hue, max_hue;
191 u32 cur_sharpness, max_sharpness;
192 u32 cur_flicker_filter, max_flicker_filter;
193 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
194 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
195 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
196 u32 cur_tv_luma_filter, max_tv_luma_filter;
197 u32 cur_dot_crawl, max_dot_crawl;
198};
199
200static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder)
201{
202 return container_of(encoder, struct psb_intel_sdvo, base.base);
203}
204
205static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
206{
207 return container_of(gma_attached_encoder(connector),
208 struct psb_intel_sdvo, base);
209}
210
211static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector)
212{
213 return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base);
214}
215
216static bool
217psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags);
218static bool
219psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
220 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
221 int type);
222static bool
223psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
224 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector);
225
226/*
227 * Writes the SDVOB or SDVOC with the given value, but always writes both
228 * SDVOB and SDVOC to work around apparent hardware issues (according to
229 * comments in the BIOS).
230 */
231static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val)
232{
233 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
234 u32 bval = val, cval = val;
235 int i, j;
236 int need_aux = IS_MRST(dev) ? 1 : 0;
237
238 for (j = 0; j <= need_aux; j++) {
239 if (psb_intel_sdvo->sdvo_reg == SDVOB)
240 cval = REG_READ_WITH_AUX(SDVOC, j);
241 else
242 bval = REG_READ_WITH_AUX(SDVOB, j);
243
244 /*
245 * Write the registers twice for luck. Sometimes,
246 * writing them only once doesn't appear to 'stick'.
247 * The BIOS does this too. Yay, magic
248 */
249 for (i = 0; i < 2; i++) {
250 REG_WRITE_WITH_AUX(SDVOB, bval, j);
251 REG_READ_WITH_AUX(SDVOB, j);
252 REG_WRITE_WITH_AUX(SDVOC, cval, j);
253 REG_READ_WITH_AUX(SDVOC, j);
254 }
255 }
256}
257
258static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch)
259{
260 struct i2c_msg msgs[] = {
261 {
262 .addr = psb_intel_sdvo->target_addr,
263 .flags = 0,
264 .len = 1,
265 .buf = &addr,
266 },
267 {
268 .addr = psb_intel_sdvo->target_addr,
269 .flags = I2C_M_RD,
270 .len = 1,
271 .buf = ch,
272 }
273 };
274 int ret;
275
276 if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2)
277 return true;
278
279 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
280 return false;
281}
282
283#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
284/** Mapping of command numbers to names, for debug output */
285static const struct _sdvo_cmd_name {
286 u8 cmd;
287 const char *name;
288} sdvo_cmd_names[] = {
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
328 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
329 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
332
333 /* Add the op code for SDVO enhancements */
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
374 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
375 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
378
379 /* HDMI op code */
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
396 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
397 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
398 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
399 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
400};
401
402#define IS_SDVOB(reg) (reg == SDVOB)
403#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
404
405static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo,
406 u8 cmd, const void *args, int args_len)
407{
408 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
409 int i, pos = 0;
410 char buffer[73];
411
412#define BUF_PRINT(args...) \
413 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
414
415 for (i = 0; i < args_len; i++) {
416 BUF_PRINT("%02X ", ((u8 *)args)[i]);
417 }
418
419 for (; i < 8; i++) {
420 BUF_PRINT(" ");
421 }
422
423 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
424 if (cmd == sdvo_cmd_names[i].cmd) {
425 BUF_PRINT("(%s)", sdvo_cmd_names[i].name);
426 break;
427 }
428 }
429
430 if (i == ARRAY_SIZE(sdvo_cmd_names))
431 BUF_PRINT("(%02X)", cmd);
432
433 drm_WARN_ON(dev, pos >= sizeof(buffer) - 1);
434#undef BUF_PRINT
435
436 DRM_DEBUG_KMS("%s: W: %02X %s\n", SDVO_NAME(psb_intel_sdvo), cmd, buffer);
437}
438
439static const char *cmd_status_names[] = {
440 "Power on",
441 "Success",
442 "Not supported",
443 "Invalid arg",
444 "Pending",
445 "Target not specified",
446 "Scaling not supported"
447};
448
449#define MAX_ARG_LEN 32
450
451static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
452 const void *args, int args_len)
453{
454 u8 buf[MAX_ARG_LEN*2 + 2], status;
455 struct i2c_msg msgs[MAX_ARG_LEN + 3];
456 int i, ret;
457
458 if (args_len > MAX_ARG_LEN) {
459 DRM_ERROR("Need to increase arg length\n");
460 return false;
461 }
462
463 psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len);
464
465 for (i = 0; i < args_len; i++) {
466 msgs[i].addr = psb_intel_sdvo->target_addr;
467 msgs[i].flags = 0;
468 msgs[i].len = 2;
469 msgs[i].buf = buf + 2 *i;
470 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
471 buf[2*i + 1] = ((u8*)args)[i];
472 }
473 msgs[i].addr = psb_intel_sdvo->target_addr;
474 msgs[i].flags = 0;
475 msgs[i].len = 2;
476 msgs[i].buf = buf + 2*i;
477 buf[2*i + 0] = SDVO_I2C_OPCODE;
478 buf[2*i + 1] = cmd;
479
480 /* the following two are to read the response */
481 status = SDVO_I2C_CMD_STATUS;
482 msgs[i+1].addr = psb_intel_sdvo->target_addr;
483 msgs[i+1].flags = 0;
484 msgs[i+1].len = 1;
485 msgs[i+1].buf = &status;
486
487 msgs[i+2].addr = psb_intel_sdvo->target_addr;
488 msgs[i+2].flags = I2C_M_RD;
489 msgs[i+2].len = 1;
490 msgs[i+2].buf = &status;
491
492 ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3);
493 if (ret < 0) {
494 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
495 return false;
496 }
497 if (ret != i+3) {
498 /* failure in I2C transfer */
499 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
500 return false;
501 }
502
503 return true;
504}
505
506static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo,
507 void *response, int response_len)
508{
509 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
510 char buffer[73];
511 int i, pos = 0;
512 u8 retry = 5;
513 u8 status;
514
515 /*
516 * The documentation states that all commands will be
517 * processed within 15µs, and that we need only poll
518 * the status byte a maximum of 3 times in order for the
519 * command to be complete.
520 *
521 * Check 5 times in case the hardware failed to read the docs.
522 */
523 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
524 SDVO_I2C_CMD_STATUS,
525 &status))
526 goto log_fail;
527
528 while ((status == SDVO_CMD_STATUS_PENDING ||
529 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) {
530 udelay(15);
531 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
532 SDVO_I2C_CMD_STATUS,
533 &status))
534 goto log_fail;
535 }
536
537#define BUF_PRINT(args...) \
538 pos += snprintf(buffer + pos, max_t(int, sizeof(buffer) - pos, 0), args)
539
540 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
541 BUF_PRINT("(%s)", cmd_status_names[status]);
542 else
543 BUF_PRINT("(??? %d)", status);
544
545 if (status != SDVO_CMD_STATUS_SUCCESS)
546 goto log_fail;
547
548 /* Read the command response */
549 for (i = 0; i < response_len; i++) {
550 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
551 SDVO_I2C_RETURN_0 + i,
552 &((u8 *)response)[i]))
553 goto log_fail;
554 BUF_PRINT(" %02X", ((u8 *)response)[i]);
555 }
556
557 drm_WARN_ON(dev, pos >= sizeof(buffer) - 1);
558#undef BUF_PRINT
559
560 DRM_DEBUG_KMS("%s: R: %s\n", SDVO_NAME(psb_intel_sdvo), buffer);
561 return true;
562
563log_fail:
564 DRM_DEBUG_KMS("%s: R: ... failed %s\n",
565 SDVO_NAME(psb_intel_sdvo), buffer);
566 return false;
567}
568
569static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
570{
571 if (mode->clock >= 100000)
572 return 1;
573 else if (mode->clock >= 50000)
574 return 2;
575 else
576 return 4;
577}
578
579static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo,
580 u8 ddc_bus)
581{
582 /* This must be the immediately preceding write before the i2c xfer */
583 return psb_intel_sdvo_write_cmd(psb_intel_sdvo,
584 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
585 &ddc_bus, 1);
586}
587
588static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len)
589{
590 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len))
591 return false;
592
593 return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0);
594}
595
596static bool
597psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len)
598{
599 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0))
600 return false;
601
602 return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len);
603}
604
605static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo)
606{
607 struct psb_intel_sdvo_set_target_input_args targets = {0};
608 return psb_intel_sdvo_set_value(psb_intel_sdvo,
609 SDVO_CMD_SET_TARGET_INPUT,
610 &targets, sizeof(targets));
611}
612
613/*
614 * Return whether each input is trained.
615 *
616 * This function is making an assumption about the layout of the response,
617 * which should be checked against the docs.
618 */
619static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2)
620{
621 struct psb_intel_sdvo_get_trained_inputs_response response;
622
623 BUILD_BUG_ON(sizeof(response) != 1);
624 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
625 &response, sizeof(response)))
626 return false;
627
628 *input_1 = response.input0_trained;
629 *input_2 = response.input1_trained;
630 return true;
631}
632
633static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo,
634 u16 outputs)
635{
636 return psb_intel_sdvo_set_value(psb_intel_sdvo,
637 SDVO_CMD_SET_ACTIVE_OUTPUTS,
638 &outputs, sizeof(outputs));
639}
640
641static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo,
642 int mode)
643{
644 u8 state = SDVO_ENCODER_STATE_ON;
645
646 switch (mode) {
647 case DRM_MODE_DPMS_ON:
648 state = SDVO_ENCODER_STATE_ON;
649 break;
650 case DRM_MODE_DPMS_STANDBY:
651 state = SDVO_ENCODER_STATE_STANDBY;
652 break;
653 case DRM_MODE_DPMS_SUSPEND:
654 state = SDVO_ENCODER_STATE_SUSPEND;
655 break;
656 case DRM_MODE_DPMS_OFF:
657 state = SDVO_ENCODER_STATE_OFF;
658 break;
659 }
660
661 return psb_intel_sdvo_set_value(psb_intel_sdvo,
662 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
663}
664
665static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo,
666 int *clock_min,
667 int *clock_max)
668{
669 struct psb_intel_sdvo_pixel_clock_range clocks;
670
671 BUILD_BUG_ON(sizeof(clocks) != 4);
672 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
673 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
674 &clocks, sizeof(clocks)))
675 return false;
676
677 /* Convert the values from units of 10 kHz to kHz. */
678 *clock_min = clocks.min * 10;
679 *clock_max = clocks.max * 10;
680 return true;
681}
682
683static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo,
684 u16 outputs)
685{
686 return psb_intel_sdvo_set_value(psb_intel_sdvo,
687 SDVO_CMD_SET_TARGET_OUTPUT,
688 &outputs, sizeof(outputs));
689}
690
691static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
692 struct psb_intel_sdvo_dtd *dtd)
693{
694 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
695 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
696}
697
698static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
699 struct psb_intel_sdvo_dtd *dtd)
700{
701 return psb_intel_sdvo_set_timing(psb_intel_sdvo,
702 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
703}
704
705static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo,
706 struct psb_intel_sdvo_dtd *dtd)
707{
708 return psb_intel_sdvo_set_timing(psb_intel_sdvo,
709 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
710}
711
712static bool
713psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
714 uint16_t clock,
715 uint16_t width,
716 uint16_t height)
717{
718 struct psb_intel_sdvo_preferred_input_timing_args args;
719
720 memset(&args, 0, sizeof(args));
721 args.clock = clock;
722 args.width = width;
723 args.height = height;
724 args.interlace = 0;
725
726 if (psb_intel_sdvo->is_lvds &&
727 (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
728 psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
729 args.scaled = 1;
730
731 return psb_intel_sdvo_set_value(psb_intel_sdvo,
732 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
733 &args, sizeof(args));
734}
735
736static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
737 struct psb_intel_sdvo_dtd *dtd)
738{
739 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
740 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
741 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
742 &dtd->part1, sizeof(dtd->part1)) &&
743 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
744 &dtd->part2, sizeof(dtd->part2));
745}
746
747static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val)
748{
749 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
750}
751
752static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd,
753 const struct drm_display_mode *mode)
754{
755 uint16_t width, height;
756 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
757 uint16_t h_sync_offset, v_sync_offset;
758
759 width = mode->crtc_hdisplay;
760 height = mode->crtc_vdisplay;
761
762 /* do some mode translations */
763 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
764 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
765
766 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
767 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
768
769 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
770 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
771
772 dtd->part1.clock = mode->clock / 10;
773 dtd->part1.h_active = width & 0xff;
774 dtd->part1.h_blank = h_blank_len & 0xff;
775 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
776 ((h_blank_len >> 8) & 0xf);
777 dtd->part1.v_active = height & 0xff;
778 dtd->part1.v_blank = v_blank_len & 0xff;
779 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
780 ((v_blank_len >> 8) & 0xf);
781
782 dtd->part2.h_sync_off = h_sync_offset & 0xff;
783 dtd->part2.h_sync_width = h_sync_len & 0xff;
784 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
785 (v_sync_len & 0xf);
786 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
787 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
788 ((v_sync_len & 0x30) >> 4);
789
790 dtd->part2.dtd_flags = 0x18;
791 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
792 dtd->part2.dtd_flags |= 0x2;
793 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
794 dtd->part2.dtd_flags |= 0x4;
795
796 dtd->part2.sdvo_flags = 0;
797 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
798 dtd->part2.reserved = 0;
799}
800
801static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
802 const struct psb_intel_sdvo_dtd *dtd)
803{
804 mode->hdisplay = dtd->part1.h_active;
805 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
806 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
807 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
808 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
809 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
810 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
811 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
812
813 mode->vdisplay = dtd->part1.v_active;
814 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
815 mode->vsync_start = mode->vdisplay;
816 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
817 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
818 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
819 mode->vsync_end = mode->vsync_start +
820 (dtd->part2.v_sync_off_width & 0xf);
821 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
822 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
823 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
824
825 mode->clock = dtd->part1.clock * 10;
826
827 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
828 if (dtd->part2.dtd_flags & 0x2)
829 mode->flags |= DRM_MODE_FLAG_PHSYNC;
830 if (dtd->part2.dtd_flags & 0x4)
831 mode->flags |= DRM_MODE_FLAG_PVSYNC;
832}
833
834static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo)
835{
836 struct psb_intel_sdvo_encode encode;
837
838 BUILD_BUG_ON(sizeof(encode) != 2);
839 return psb_intel_sdvo_get_value(psb_intel_sdvo,
840 SDVO_CMD_GET_SUPP_ENCODE,
841 &encode, sizeof(encode));
842}
843
844static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo,
845 uint8_t mode)
846{
847 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
848}
849
850static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo,
851 uint8_t mode)
852{
853 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
854}
855
856#if 0
857static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo)
858{
859 int i, j;
860 uint8_t set_buf_index[2];
861 uint8_t av_split;
862 uint8_t buf_size;
863 uint8_t buf[48];
864 uint8_t *pos;
865
866 psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
867
868 for (i = 0; i <= av_split; i++) {
869 set_buf_index[0] = i; set_buf_index[1] = 0;
870 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
871 set_buf_index, 2);
872 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
873 psb_intel_sdvo_read_response(encoder, &buf_size, 1);
874
875 pos = buf;
876 for (j = 0; j <= buf_size; j += 8) {
877 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
878 NULL, 0);
879 psb_intel_sdvo_read_response(encoder, pos, 8);
880 pos += 8;
881 }
882 }
883}
884#endif
885
886static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo)
887{
888 DRM_INFO("HDMI is not supported yet");
889
890 return false;
891}
892
893static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
894{
895 struct psb_intel_sdvo_tv_format format;
896 uint32_t format_map;
897
898 format_map = 1 << psb_intel_sdvo->tv_format_index;
899 memset(&format, 0, sizeof(format));
900 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
901
902 BUILD_BUG_ON(sizeof(format) != 6);
903 return psb_intel_sdvo_set_value(psb_intel_sdvo,
904 SDVO_CMD_SET_TV_FORMAT,
905 &format, sizeof(format));
906}
907
908static bool
909psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
910 const struct drm_display_mode *mode)
911{
912 struct psb_intel_sdvo_dtd output_dtd;
913
914 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
915 psb_intel_sdvo->attached_output))
916 return false;
917
918 psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
919 if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd))
920 return false;
921
922 return true;
923}
924
925static bool
926psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
927 const struct drm_display_mode *mode,
928 struct drm_display_mode *adjusted_mode)
929{
930 /* Reset the input timing to the screen. Assume always input 0. */
931 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
932 return false;
933
934 if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo,
935 mode->clock / 10,
936 mode->hdisplay,
937 mode->vdisplay))
938 return false;
939
940 if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo,
941 &psb_intel_sdvo->input_dtd))
942 return false;
943
944 psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd);
945
946 drm_mode_set_crtcinfo(adjusted_mode, 0);
947 return true;
948}
949
950static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
951 const struct drm_display_mode *mode,
952 struct drm_display_mode *adjusted_mode)
953{
954 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
955
956 /* We need to construct preferred input timings based on our
957 * output timings. To do that, we have to set the output
958 * timings, even though this isn't really the right place in
959 * the sequence to do it. Oh well.
960 */
961 if (psb_intel_sdvo->is_tv) {
962 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode))
963 return false;
964
965 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
966 mode,
967 adjusted_mode);
968 } else if (psb_intel_sdvo->is_lvds) {
969 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo,
970 psb_intel_sdvo->sdvo_lvds_fixed_mode))
971 return false;
972
973 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
974 mode,
975 adjusted_mode);
976 }
977
978 /* Make the CRTC code factor in the SDVO pixel multiplier. The
979 * SDVO device will factor out the multiplier during mode_set.
980 */
981 psb_intel_sdvo->pixel_multiplier =
982 psb_intel_sdvo_get_pixel_multiplier(adjusted_mode);
983 adjusted_mode->clock *= psb_intel_sdvo->pixel_multiplier;
984
985 return true;
986}
987
988static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
989 struct drm_display_mode *mode,
990 struct drm_display_mode *adjusted_mode)
991{
992 struct drm_device *dev = encoder->dev;
993 struct drm_crtc *crtc = encoder->crtc;
994 struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
995 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
996 u32 sdvox;
997 struct psb_intel_sdvo_in_out_map in_out;
998 struct psb_intel_sdvo_dtd input_dtd;
999 int rate;
1000 int need_aux = IS_MRST(dev) ? 1 : 0;
1001
1002 if (!mode)
1003 return;
1004
1005 /* First, set the input mapping for the first input to our controlled
1006 * output. This is only correct if we're a single-input device, in
1007 * which case the first input is the output from the appropriate SDVO
1008 * channel on the motherboard. In a two-input device, the first input
1009 * will be SDVOB and the second SDVOC.
1010 */
1011 in_out.in0 = psb_intel_sdvo->attached_output;
1012 in_out.in1 = 0;
1013
1014 psb_intel_sdvo_set_value(psb_intel_sdvo,
1015 SDVO_CMD_SET_IN_OUT_MAP,
1016 &in_out, sizeof(in_out));
1017
1018 /* Set the output timings to the screen */
1019 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1020 psb_intel_sdvo->attached_output))
1021 return;
1022
1023 /* We have tried to get input timing in mode_fixup, and filled into
1024 * adjusted_mode.
1025 */
1026 if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) {
1027 input_dtd = psb_intel_sdvo->input_dtd;
1028 } else {
1029 /* Set the output timing to the screen */
1030 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1031 psb_intel_sdvo->attached_output))
1032 return;
1033
1034 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1035 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd);
1036 }
1037
1038 /* Set the input timing to the screen. Assume always input 0. */
1039 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
1040 return;
1041
1042 if (psb_intel_sdvo->has_hdmi_monitor) {
1043 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI);
1044 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo,
1045 SDVO_COLORIMETRY_RGB256);
1046 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo);
1047 } else
1048 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI);
1049
1050 if (psb_intel_sdvo->is_tv &&
1051 !psb_intel_sdvo_set_tv_format(psb_intel_sdvo))
1052 return;
1053
1054 (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd);
1055
1056 switch (psb_intel_sdvo->pixel_multiplier) {
1057 default:
1058 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1059 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1060 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1061 }
1062 if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate))
1063 return;
1064
1065 /* Set the SDVO control regs. */
1066 if (need_aux)
1067 sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1068 else
1069 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
1070
1071 switch (psb_intel_sdvo->sdvo_reg) {
1072 case SDVOB:
1073 sdvox &= SDVOB_PRESERVE_MASK;
1074 break;
1075 case SDVOC:
1076 sdvox &= SDVOC_PRESERVE_MASK;
1077 break;
1078 }
1079 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1080
1081 if (gma_crtc->pipe == 1)
1082 sdvox |= SDVO_PIPE_B_SELECT;
1083 if (psb_intel_sdvo->has_hdmi_audio)
1084 sdvox |= SDVO_AUDIO_ENABLE;
1085
1086 /* FIXME: Check if this is needed for PSB
1087 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1088 */
1089
1090 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1091 sdvox |= SDVO_STALL_SELECT;
1092 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox);
1093}
1094
1095static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1096{
1097 struct drm_device *dev = encoder->dev;
1098 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1099 u32 temp;
1100 int i;
1101 int need_aux = IS_MRST(dev) ? 1 : 0;
1102
1103 switch (mode) {
1104 case DRM_MODE_DPMS_ON:
1105 DRM_DEBUG("DPMS_ON");
1106 break;
1107 case DRM_MODE_DPMS_OFF:
1108 DRM_DEBUG("DPMS_OFF");
1109 break;
1110 default:
1111 DRM_DEBUG("DPMS: %d", mode);
1112 }
1113
1114 if (mode != DRM_MODE_DPMS_ON) {
1115 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0);
1116 if (0)
1117 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1118
1119 if (mode == DRM_MODE_DPMS_OFF) {
1120 if (need_aux)
1121 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1122 else
1123 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1124
1125 if ((temp & SDVO_ENABLE) != 0) {
1126 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
1127 }
1128 }
1129 } else {
1130 bool input1, input2;
1131 u8 status;
1132
1133 if (need_aux)
1134 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1135 else
1136 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1137
1138 if ((temp & SDVO_ENABLE) == 0)
1139 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
1140
1141 for (i = 0; i < 2; i++)
1142 gma_wait_for_vblank(dev);
1143
1144 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
1145 /* Warn if the device reported failure to sync.
1146 * A lot of SDVO devices fail to notify of sync, but it's
1147 * a given it the status is a success, we succeeded.
1148 */
1149 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1150 DRM_DEBUG_KMS("First %s output reported failure to "
1151 "sync\n", SDVO_NAME(psb_intel_sdvo));
1152 }
1153
1154 if (0)
1155 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1156 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output);
1157 }
1158 return;
1159}
1160
1161static enum drm_mode_status psb_intel_sdvo_mode_valid(struct drm_connector *connector,
1162 struct drm_display_mode *mode)
1163{
1164 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1165
1166 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1167 return MODE_NO_DBLESCAN;
1168
1169 if (psb_intel_sdvo->pixel_clock_min > mode->clock)
1170 return MODE_CLOCK_LOW;
1171
1172 if (psb_intel_sdvo->pixel_clock_max < mode->clock)
1173 return MODE_CLOCK_HIGH;
1174
1175 if (psb_intel_sdvo->is_lvds) {
1176 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1177 return MODE_PANEL;
1178
1179 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1180 return MODE_PANEL;
1181 }
1182
1183 return MODE_OK;
1184}
1185
1186static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps)
1187{
1188 BUILD_BUG_ON(sizeof(*caps) != 8);
1189 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
1190 SDVO_CMD_GET_DEVICE_CAPS,
1191 caps, sizeof(*caps)))
1192 return false;
1193
1194 DRM_DEBUG_KMS("SDVO capabilities:\n"
1195 " vendor_id: %d\n"
1196 " device_id: %d\n"
1197 " device_rev_id: %d\n"
1198 " sdvo_version_major: %d\n"
1199 " sdvo_version_minor: %d\n"
1200 " sdvo_inputs_mask: %d\n"
1201 " smooth_scaling: %d\n"
1202 " sharp_scaling: %d\n"
1203 " up_scaling: %d\n"
1204 " down_scaling: %d\n"
1205 " stall_support: %d\n"
1206 " output_flags: %d\n",
1207 caps->vendor_id,
1208 caps->device_id,
1209 caps->device_rev_id,
1210 caps->sdvo_version_major,
1211 caps->sdvo_version_minor,
1212 caps->sdvo_inputs_mask,
1213 caps->smooth_scaling,
1214 caps->sharp_scaling,
1215 caps->up_scaling,
1216 caps->down_scaling,
1217 caps->stall_support,
1218 caps->output_flags);
1219
1220 return true;
1221}
1222
1223static bool
1224psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo)
1225{
1226 /* Is there more than one type of output? */
1227 int caps = psb_intel_sdvo->caps.output_flags & 0xf;
1228 return caps & -caps;
1229}
1230
1231static struct edid *
1232psb_intel_sdvo_get_edid(struct drm_connector *connector)
1233{
1234 struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector);
1235 return drm_get_edid(connector, &sdvo->ddc);
1236}
1237
1238/* Mac mini hack -- use the same DDC as the analog connector */
1239static struct edid *
1240psb_intel_sdvo_get_analog_edid(struct drm_connector *connector)
1241{
1242 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1243
1244 return drm_get_edid(connector,
1245 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1246}
1247
1248static enum drm_connector_status
1249psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1250{
1251 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1252 enum drm_connector_status status;
1253 struct edid *edid;
1254
1255 edid = psb_intel_sdvo_get_edid(connector);
1256
1257 if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) {
1258 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus;
1259
1260 /*
1261 * Don't use the 1 as the argument of DDC bus switch to get
1262 * the EDID. It is used for SDVO SPD ROM.
1263 */
1264 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1265 psb_intel_sdvo->ddc_bus = ddc;
1266 edid = psb_intel_sdvo_get_edid(connector);
1267 if (edid)
1268 break;
1269 }
1270 /*
1271 * If we found the EDID on the other bus,
1272 * assume that is the correct DDC bus.
1273 */
1274 if (edid == NULL)
1275 psb_intel_sdvo->ddc_bus = saved_ddc;
1276 }
1277
1278 /*
1279 * When there is no edid and no monitor is connected with VGA
1280 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1281 */
1282 if (edid == NULL)
1283 edid = psb_intel_sdvo_get_analog_edid(connector);
1284
1285 status = connector_status_unknown;
1286 if (edid != NULL) {
1287 /* DDC bus is shared, match EDID to connector type */
1288 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1289 status = connector_status_connected;
1290 if (psb_intel_sdvo->is_hdmi) {
1291 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1292 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1293 }
1294 } else
1295 status = connector_status_disconnected;
1296 kfree(edid);
1297 }
1298
1299 if (status == connector_status_connected) {
1300 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1301 if (psb_intel_sdvo_connector->force_audio)
1302 psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0;
1303 }
1304
1305 return status;
1306}
1307
1308static enum drm_connector_status
1309psb_intel_sdvo_detect(struct drm_connector *connector, bool force)
1310{
1311 uint16_t response;
1312 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1313 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1314 enum drm_connector_status ret;
1315
1316 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1317 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1318 return connector_status_unknown;
1319
1320 /* add 30ms delay when the output type might be TV */
1321 if (psb_intel_sdvo->caps.output_flags &
1322 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1323 mdelay(30);
1324
1325 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2))
1326 return connector_status_unknown;
1327
1328 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1329 response & 0xff, response >> 8,
1330 psb_intel_sdvo_connector->output_flag);
1331
1332 if (response == 0)
1333 return connector_status_disconnected;
1334
1335 psb_intel_sdvo->attached_output = response;
1336
1337 psb_intel_sdvo->has_hdmi_monitor = false;
1338 psb_intel_sdvo->has_hdmi_audio = false;
1339
1340 if ((psb_intel_sdvo_connector->output_flag & response) == 0)
1341 ret = connector_status_disconnected;
1342 else if (IS_TMDS(psb_intel_sdvo_connector))
1343 ret = psb_intel_sdvo_hdmi_sink_detect(connector);
1344 else {
1345 struct edid *edid;
1346
1347 /* if we have an edid check it matches the connection */
1348 edid = psb_intel_sdvo_get_edid(connector);
1349 if (edid == NULL)
1350 edid = psb_intel_sdvo_get_analog_edid(connector);
1351 if (edid != NULL) {
1352 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1353 ret = connector_status_disconnected;
1354 else
1355 ret = connector_status_connected;
1356 kfree(edid);
1357 } else
1358 ret = connector_status_connected;
1359 }
1360
1361 /* May update encoder flag for like clock for SDVO TV, etc.*/
1362 if (ret == connector_status_connected) {
1363 psb_intel_sdvo->is_tv = false;
1364 psb_intel_sdvo->is_lvds = false;
1365 psb_intel_sdvo->base.needs_tv_clock = false;
1366
1367 if (response & SDVO_TV_MASK) {
1368 psb_intel_sdvo->is_tv = true;
1369 psb_intel_sdvo->base.needs_tv_clock = true;
1370 }
1371 if (response & SDVO_LVDS_MASK)
1372 psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1373 }
1374
1375 return ret;
1376}
1377
1378static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1379{
1380 struct edid *edid;
1381
1382 /* set the bus switch and get the modes */
1383 edid = psb_intel_sdvo_get_edid(connector);
1384
1385 /*
1386 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1387 * link between analog and digital outputs. So, if the regular SDVO
1388 * DDC fails, check to see if the analog output is disconnected, in
1389 * which case we'll look there for the digital DDC data.
1390 */
1391 if (edid == NULL)
1392 edid = psb_intel_sdvo_get_analog_edid(connector);
1393
1394 if (edid != NULL) {
1395 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1396 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1397 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector);
1398
1399 if (connector_is_digital == monitor_is_digital) {
1400 drm_connector_update_edid_property(connector, edid);
1401 drm_add_edid_modes(connector, edid);
1402 }
1403
1404 kfree(edid);
1405 }
1406}
1407
1408/*
1409 * Set of SDVO TV modes.
1410 * Note! This is in reply order (see loop in get_tv_modes).
1411 * XXX: all 60Hz refresh?
1412 */
1413static const struct drm_display_mode sdvo_tv_modes[] = {
1414 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1415 416, 0, 200, 201, 232, 233, 0,
1416 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1417 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1418 416, 0, 240, 241, 272, 273, 0,
1419 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1420 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1421 496, 0, 300, 301, 332, 333, 0,
1422 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1423 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1424 736, 0, 350, 351, 382, 383, 0,
1425 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1426 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1427 736, 0, 400, 401, 432, 433, 0,
1428 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1429 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1430 736, 0, 480, 481, 512, 513, 0,
1431 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1432 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1433 800, 0, 480, 481, 512, 513, 0,
1434 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1435 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1436 800, 0, 576, 577, 608, 609, 0,
1437 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1438 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1439 816, 0, 350, 351, 382, 383, 0,
1440 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1441 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1442 816, 0, 400, 401, 432, 433, 0,
1443 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1444 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1445 816, 0, 480, 481, 512, 513, 0,
1446 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1447 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1448 816, 0, 540, 541, 572, 573, 0,
1449 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1450 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1451 816, 0, 576, 577, 608, 609, 0,
1452 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1453 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1454 864, 0, 576, 577, 608, 609, 0,
1455 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1456 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1457 896, 0, 600, 601, 632, 633, 0,
1458 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1459 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1460 928, 0, 624, 625, 656, 657, 0,
1461 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1462 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1463 1016, 0, 766, 767, 798, 799, 0,
1464 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1465 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1466 1120, 0, 768, 769, 800, 801, 0,
1467 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1468 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1469 1376, 0, 1024, 1025, 1056, 1057, 0,
1470 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1471};
1472
1473static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector)
1474{
1475 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1476 struct psb_intel_sdvo_sdtv_resolution_request tv_res;
1477 uint32_t reply = 0, format_map = 0;
1478 int i;
1479
1480 /* Read the list of supported input resolutions for the selected TV
1481 * format.
1482 */
1483 format_map = 1 << psb_intel_sdvo->tv_format_index;
1484 memcpy(&tv_res, &format_map,
1485 min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request)));
1486
1487 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output))
1488 return;
1489
1490 BUILD_BUG_ON(sizeof(tv_res) != 3);
1491 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1492 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1493 &tv_res, sizeof(tv_res)))
1494 return;
1495 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3))
1496 return;
1497
1498 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1499 if (reply & (1 << i)) {
1500 struct drm_display_mode *nmode;
1501 nmode = drm_mode_duplicate(connector->dev,
1502 &sdvo_tv_modes[i]);
1503 if (nmode)
1504 drm_mode_probed_add(connector, nmode);
1505 }
1506}
1507
1508static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1509{
1510 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1511 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1512 struct drm_display_mode *newmode;
1513
1514 /*
1515 * Attempt to get the mode list from DDC.
1516 * Assume that the preferred modes are
1517 * arranged in priority order.
1518 */
1519 psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c);
1520 if (list_empty(&connector->probed_modes) == false)
1521 goto end;
1522
1523 /* Fetch modes from VBT */
1524 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1525 newmode = drm_mode_duplicate(connector->dev,
1526 dev_priv->sdvo_lvds_vbt_mode);
1527 if (newmode != NULL) {
1528 /* Guarantee the mode is preferred */
1529 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1530 DRM_MODE_TYPE_DRIVER);
1531 drm_mode_probed_add(connector, newmode);
1532 }
1533 }
1534
1535end:
1536 list_for_each_entry(newmode, &connector->probed_modes, head) {
1537 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1538 psb_intel_sdvo->sdvo_lvds_fixed_mode =
1539 drm_mode_duplicate(connector->dev, newmode);
1540
1541 drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode,
1542 0);
1543
1544 psb_intel_sdvo->is_lvds = true;
1545 break;
1546 }
1547 }
1548
1549}
1550
1551static int psb_intel_sdvo_get_modes(struct drm_connector *connector)
1552{
1553 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1554
1555 if (IS_TV(psb_intel_sdvo_connector))
1556 psb_intel_sdvo_get_tv_modes(connector);
1557 else if (IS_LVDS(psb_intel_sdvo_connector))
1558 psb_intel_sdvo_get_lvds_modes(connector);
1559 else
1560 psb_intel_sdvo_get_ddc_modes(connector);
1561
1562 return !list_empty(&connector->probed_modes);
1563}
1564
1565static void psb_intel_sdvo_destroy(struct drm_connector *connector)
1566{
1567 struct gma_connector *gma_connector = to_gma_connector(connector);
1568
1569 drm_connector_cleanup(connector);
1570 kfree(gma_connector);
1571}
1572
1573static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1574{
1575 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1576 struct edid *edid;
1577 bool has_audio = false;
1578
1579 if (!psb_intel_sdvo->is_hdmi)
1580 return false;
1581
1582 edid = psb_intel_sdvo_get_edid(connector);
1583 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1584 has_audio = drm_detect_monitor_audio(edid);
1585
1586 return has_audio;
1587}
1588
1589static int
1590psb_intel_sdvo_set_property(struct drm_connector *connector,
1591 struct drm_property *property,
1592 uint64_t val)
1593{
1594 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1595 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1596 struct drm_psb_private *dev_priv = to_drm_psb_private(connector->dev);
1597 uint16_t temp_value;
1598 uint8_t cmd;
1599 int ret;
1600
1601 ret = drm_object_property_set_value(&connector->base, property, val);
1602 if (ret)
1603 return ret;
1604
1605 if (property == dev_priv->force_audio_property) {
1606 int i = val;
1607 bool has_audio;
1608
1609 if (i == psb_intel_sdvo_connector->force_audio)
1610 return 0;
1611
1612 psb_intel_sdvo_connector->force_audio = i;
1613
1614 if (i == 0)
1615 has_audio = psb_intel_sdvo_detect_hdmi_audio(connector);
1616 else
1617 has_audio = i > 0;
1618
1619 if (has_audio == psb_intel_sdvo->has_hdmi_audio)
1620 return 0;
1621
1622 psb_intel_sdvo->has_hdmi_audio = has_audio;
1623 goto done;
1624 }
1625
1626 if (property == dev_priv->broadcast_rgb_property) {
1627 if (val == !!psb_intel_sdvo->color_range)
1628 return 0;
1629
1630 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1631 goto done;
1632 }
1633
1634#define CHECK_PROPERTY(name, NAME) \
1635 if (psb_intel_sdvo_connector->name == property) { \
1636 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \
1637 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1638 cmd = SDVO_CMD_SET_##NAME; \
1639 psb_intel_sdvo_connector->cur_##name = temp_value; \
1640 goto set_value; \
1641 }
1642
1643 if (property == psb_intel_sdvo_connector->tv_format) {
1644 if (val >= ARRAY_SIZE(tv_format_names))
1645 return -EINVAL;
1646
1647 if (psb_intel_sdvo->tv_format_index ==
1648 psb_intel_sdvo_connector->tv_format_supported[val])
1649 return 0;
1650
1651 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val];
1652 goto done;
1653 } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) {
1654 temp_value = val;
1655 if (psb_intel_sdvo_connector->left == property) {
1656 drm_object_property_set_value(&connector->base,
1657 psb_intel_sdvo_connector->right, val);
1658 if (psb_intel_sdvo_connector->left_margin == temp_value)
1659 return 0;
1660
1661 psb_intel_sdvo_connector->left_margin = temp_value;
1662 psb_intel_sdvo_connector->right_margin = temp_value;
1663 temp_value = psb_intel_sdvo_connector->max_hscan -
1664 psb_intel_sdvo_connector->left_margin;
1665 cmd = SDVO_CMD_SET_OVERSCAN_H;
1666 goto set_value;
1667 } else if (psb_intel_sdvo_connector->right == property) {
1668 drm_object_property_set_value(&connector->base,
1669 psb_intel_sdvo_connector->left, val);
1670 if (psb_intel_sdvo_connector->right_margin == temp_value)
1671 return 0;
1672
1673 psb_intel_sdvo_connector->left_margin = temp_value;
1674 psb_intel_sdvo_connector->right_margin = temp_value;
1675 temp_value = psb_intel_sdvo_connector->max_hscan -
1676 psb_intel_sdvo_connector->left_margin;
1677 cmd = SDVO_CMD_SET_OVERSCAN_H;
1678 goto set_value;
1679 } else if (psb_intel_sdvo_connector->top == property) {
1680 drm_object_property_set_value(&connector->base,
1681 psb_intel_sdvo_connector->bottom, val);
1682 if (psb_intel_sdvo_connector->top_margin == temp_value)
1683 return 0;
1684
1685 psb_intel_sdvo_connector->top_margin = temp_value;
1686 psb_intel_sdvo_connector->bottom_margin = temp_value;
1687 temp_value = psb_intel_sdvo_connector->max_vscan -
1688 psb_intel_sdvo_connector->top_margin;
1689 cmd = SDVO_CMD_SET_OVERSCAN_V;
1690 goto set_value;
1691 } else if (psb_intel_sdvo_connector->bottom == property) {
1692 drm_object_property_set_value(&connector->base,
1693 psb_intel_sdvo_connector->top, val);
1694 if (psb_intel_sdvo_connector->bottom_margin == temp_value)
1695 return 0;
1696
1697 psb_intel_sdvo_connector->top_margin = temp_value;
1698 psb_intel_sdvo_connector->bottom_margin = temp_value;
1699 temp_value = psb_intel_sdvo_connector->max_vscan -
1700 psb_intel_sdvo_connector->top_margin;
1701 cmd = SDVO_CMD_SET_OVERSCAN_V;
1702 goto set_value;
1703 }
1704 CHECK_PROPERTY(hpos, HPOS)
1705 CHECK_PROPERTY(vpos, VPOS)
1706 CHECK_PROPERTY(saturation, SATURATION)
1707 CHECK_PROPERTY(contrast, CONTRAST)
1708 CHECK_PROPERTY(hue, HUE)
1709 CHECK_PROPERTY(brightness, BRIGHTNESS)
1710 CHECK_PROPERTY(sharpness, SHARPNESS)
1711 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1712 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1713 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1714 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1715 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1716 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1717 }
1718
1719 return -EINVAL; /* unknown property */
1720
1721set_value:
1722 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2))
1723 return -EIO;
1724
1725
1726done:
1727 if (psb_intel_sdvo->base.base.crtc) {
1728 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
1729 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1730 crtc->y, crtc->primary->fb);
1731 }
1732
1733 return 0;
1734#undef CHECK_PROPERTY
1735}
1736
1737static void psb_intel_sdvo_save(struct drm_connector *connector)
1738{
1739 struct drm_device *dev = connector->dev;
1740 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
1741 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base);
1742
1743 sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
1744}
1745
1746static void psb_intel_sdvo_restore(struct drm_connector *connector)
1747{
1748 struct drm_device *dev = connector->dev;
1749 struct drm_encoder *encoder = &gma_attached_encoder(connector)->base;
1750 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
1751 struct drm_crtc *crtc = encoder->crtc;
1752
1753 REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO);
1754
1755 /* Force a full mode set on the crtc. We're supposed to have the
1756 mode_config lock already. */
1757 if (connector->status == connector_status_connected)
1758 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
1759 NULL);
1760}
1761
1762static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
1763 .dpms = psb_intel_sdvo_dpms,
1764 .mode_fixup = psb_intel_sdvo_mode_fixup,
1765 .prepare = gma_encoder_prepare,
1766 .mode_set = psb_intel_sdvo_mode_set,
1767 .commit = gma_encoder_commit,
1768};
1769
1770static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
1771 .dpms = drm_helper_connector_dpms,
1772 .detect = psb_intel_sdvo_detect,
1773 .fill_modes = drm_helper_probe_single_connector_modes,
1774 .set_property = psb_intel_sdvo_set_property,
1775 .destroy = psb_intel_sdvo_destroy,
1776};
1777
1778static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = {
1779 .get_modes = psb_intel_sdvo_get_modes,
1780 .mode_valid = psb_intel_sdvo_mode_valid,
1781 .best_encoder = gma_best_encoder,
1782};
1783
1784static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1785{
1786 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1787
1788 if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1789 drm_mode_destroy(encoder->dev,
1790 psb_intel_sdvo->sdvo_lvds_fixed_mode);
1791
1792 i2c_del_adapter(&psb_intel_sdvo->ddc);
1793 gma_encoder_destroy(encoder);
1794}
1795
1796static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
1797 .destroy = psb_intel_sdvo_enc_destroy,
1798};
1799
1800static void
1801psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo)
1802{
1803 /* FIXME: At the moment, ddc_bus = 2 is the only thing that works.
1804 * We need to figure out if this is true for all available poulsbo
1805 * hardware, or if we need to fiddle with the guessing code above.
1806 * The problem might go away if we can parse sdvo mappings from bios */
1807 sdvo->ddc_bus = 2;
1808
1809#if 0
1810 uint16_t mask = 0;
1811 unsigned int num_bits;
1812
1813 /* Make a mask of outputs less than or equal to our own priority in the
1814 * list.
1815 */
1816 switch (sdvo->controlled_output) {
1817 case SDVO_OUTPUT_LVDS1:
1818 mask |= SDVO_OUTPUT_LVDS1;
1819 case SDVO_OUTPUT_LVDS0:
1820 mask |= SDVO_OUTPUT_LVDS0;
1821 case SDVO_OUTPUT_TMDS1:
1822 mask |= SDVO_OUTPUT_TMDS1;
1823 case SDVO_OUTPUT_TMDS0:
1824 mask |= SDVO_OUTPUT_TMDS0;
1825 case SDVO_OUTPUT_RGB1:
1826 mask |= SDVO_OUTPUT_RGB1;
1827 case SDVO_OUTPUT_RGB0:
1828 mask |= SDVO_OUTPUT_RGB0;
1829 break;
1830 }
1831
1832 /* Count bits to find what number we are in the priority list. */
1833 mask &= sdvo->caps.output_flags;
1834 num_bits = hweight16(mask);
1835 /* If more than 3 outputs, default to DDC bus 3 for now. */
1836 if (num_bits > 3)
1837 num_bits = 3;
1838
1839 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1840 sdvo->ddc_bus = 1 << num_bits;
1841#endif
1842}
1843
1844/*
1845 * Choose the appropriate DDC bus for control bus switch command for this
1846 * SDVO output based on the controlled output.
1847 *
1848 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1849 * outputs, then LVDS outputs.
1850 */
1851static void
1852psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv,
1853 struct psb_intel_sdvo *sdvo, u32 reg)
1854{
1855 struct sdvo_device_mapping *mapping;
1856
1857 if (IS_SDVOB(reg))
1858 mapping = &(dev_priv->sdvo_mappings[0]);
1859 else
1860 mapping = &(dev_priv->sdvo_mappings[1]);
1861
1862 if (mapping->initialized)
1863 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1864 else
1865 psb_intel_sdvo_guess_ddc_bus(sdvo);
1866}
1867
1868static void
1869psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv,
1870 struct psb_intel_sdvo *sdvo, u32 reg)
1871{
1872 struct sdvo_device_mapping *mapping;
1873 u8 pin, speed;
1874
1875 if (IS_SDVOB(reg))
1876 mapping = &dev_priv->sdvo_mappings[0];
1877 else
1878 mapping = &dev_priv->sdvo_mappings[1];
1879
1880 pin = GMBUS_PORT_DPB;
1881 speed = GMBUS_RATE_1MHZ >> 8;
1882 if (mapping->initialized) {
1883 pin = mapping->i2c_pin;
1884 speed = mapping->i2c_speed;
1885 }
1886
1887 if (pin < GMBUS_NUM_PORTS) {
1888 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1889 gma_intel_gmbus_set_speed(sdvo->i2c, speed);
1890 gma_intel_gmbus_force_bit(sdvo->i2c, true);
1891 } else
1892 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1893}
1894
1895static bool
1896psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1897{
1898 return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo);
1899}
1900
1901static u8
1902psb_intel_sdvo_get_target_addr(struct drm_device *dev, int sdvo_reg)
1903{
1904 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
1905 struct sdvo_device_mapping *my_mapping, *other_mapping;
1906
1907 if (IS_SDVOB(sdvo_reg)) {
1908 my_mapping = &dev_priv->sdvo_mappings[0];
1909 other_mapping = &dev_priv->sdvo_mappings[1];
1910 } else {
1911 my_mapping = &dev_priv->sdvo_mappings[1];
1912 other_mapping = &dev_priv->sdvo_mappings[0];
1913 }
1914
1915 /* If the BIOS described our SDVO device, take advantage of it. */
1916 if (my_mapping->target_addr)
1917 return my_mapping->target_addr;
1918
1919 /* If the BIOS only described a different SDVO device, use the
1920 * address that it isn't using.
1921 */
1922 if (other_mapping->target_addr) {
1923 if (other_mapping->target_addr == 0x70)
1924 return 0x72;
1925 else
1926 return 0x70;
1927 }
1928
1929 /* No SDVO device info is found for another DVO port,
1930 * so use mapping assumption we had before BIOS parsing.
1931 */
1932 if (IS_SDVOB(sdvo_reg))
1933 return 0x70;
1934 else
1935 return 0x72;
1936}
1937
1938static void
1939psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector,
1940 struct psb_intel_sdvo *encoder)
1941{
1942 drm_connector_init(encoder->base.base.dev,
1943 &connector->base.base,
1944 &psb_intel_sdvo_connector_funcs,
1945 connector->base.base.connector_type);
1946
1947 drm_connector_helper_add(&connector->base.base,
1948 &psb_intel_sdvo_connector_helper_funcs);
1949
1950 connector->base.base.interlace_allowed = 0;
1951 connector->base.base.doublescan_allowed = 0;
1952 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
1953
1954 connector->base.save = psb_intel_sdvo_save;
1955 connector->base.restore = psb_intel_sdvo_restore;
1956
1957 gma_connector_attach_encoder(&connector->base, &encoder->base);
1958}
1959
1960static void
1961psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector)
1962{
1963 /* FIXME: We don't support HDMI at the moment
1964 struct drm_device *dev = connector->base.base.dev;
1965
1966 intel_attach_force_audio_property(&connector->base.base);
1967 intel_attach_broadcast_rgb_property(&connector->base.base);
1968 */
1969}
1970
1971static bool
1972psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1973{
1974 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
1975 struct drm_connector *connector;
1976 struct gma_connector *intel_connector;
1977 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
1978
1979 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
1980 if (!psb_intel_sdvo_connector)
1981 return false;
1982
1983 if (device == 0) {
1984 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
1985 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
1986 } else if (device == 1) {
1987 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
1988 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
1989 }
1990
1991 intel_connector = &psb_intel_sdvo_connector->base;
1992 connector = &intel_connector->base;
1993 // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
1994 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
1995 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
1996
1997 if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) {
1998 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
1999 psb_intel_sdvo->is_hdmi = true;
2000 }
2001 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2002 (1 << INTEL_ANALOG_CLONE_BIT));
2003
2004 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2005 if (psb_intel_sdvo->is_hdmi)
2006 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector);
2007
2008 return true;
2009}
2010
2011static bool
2012psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type)
2013{
2014 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2015 struct drm_connector *connector;
2016 struct gma_connector *intel_connector;
2017 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2018
2019 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2020 if (!psb_intel_sdvo_connector)
2021 return false;
2022
2023 intel_connector = &psb_intel_sdvo_connector->base;
2024 connector = &intel_connector->base;
2025 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2026 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2027
2028 psb_intel_sdvo->controlled_output |= type;
2029 psb_intel_sdvo_connector->output_flag = type;
2030
2031 psb_intel_sdvo->is_tv = true;
2032 psb_intel_sdvo->base.needs_tv_clock = true;
2033 psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2034
2035 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2036
2037 if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type))
2038 goto err;
2039
2040 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2041 goto err;
2042
2043 return true;
2044
2045err:
2046 psb_intel_sdvo_destroy(connector);
2047 return false;
2048}
2049
2050static bool
2051psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2052{
2053 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2054 struct drm_connector *connector;
2055 struct gma_connector *intel_connector;
2056 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2057
2058 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2059 if (!psb_intel_sdvo_connector)
2060 return false;
2061
2062 intel_connector = &psb_intel_sdvo_connector->base;
2063 connector = &intel_connector->base;
2064 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2065 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2066 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2067
2068 if (device == 0) {
2069 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2070 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2071 } else if (device == 1) {
2072 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2073 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2074 }
2075
2076 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2077 (1 << INTEL_ANALOG_CLONE_BIT));
2078
2079 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector,
2080 psb_intel_sdvo);
2081 return true;
2082}
2083
2084static bool
2085psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2086{
2087 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2088 struct drm_connector *connector;
2089 struct gma_connector *intel_connector;
2090 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2091
2092 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2093 if (!psb_intel_sdvo_connector)
2094 return false;
2095
2096 intel_connector = &psb_intel_sdvo_connector->base;
2097 connector = &intel_connector->base;
2098 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2099 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2100
2101 if (device == 0) {
2102 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2103 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2104 } else if (device == 1) {
2105 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2106 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2107 }
2108
2109 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2110 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2111
2112 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2113 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2114 goto err;
2115
2116 return true;
2117
2118err:
2119 psb_intel_sdvo_destroy(connector);
2120 return false;
2121}
2122
2123static bool
2124psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags)
2125{
2126 psb_intel_sdvo->is_tv = false;
2127 psb_intel_sdvo->base.needs_tv_clock = false;
2128 psb_intel_sdvo->is_lvds = false;
2129
2130 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2131
2132 if (flags & SDVO_OUTPUT_TMDS0)
2133 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0))
2134 return false;
2135
2136 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2137 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1))
2138 return false;
2139
2140 /* TV has no XXX1 function block */
2141 if (flags & SDVO_OUTPUT_SVID0)
2142 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0))
2143 return false;
2144
2145 if (flags & SDVO_OUTPUT_CVBS0)
2146 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0))
2147 return false;
2148
2149 if (flags & SDVO_OUTPUT_RGB0)
2150 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0))
2151 return false;
2152
2153 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2154 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1))
2155 return false;
2156
2157 if (flags & SDVO_OUTPUT_LVDS0)
2158 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0))
2159 return false;
2160
2161 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2162 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1))
2163 return false;
2164
2165 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2166 unsigned char bytes[2];
2167
2168 psb_intel_sdvo->controlled_output = 0;
2169 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2);
2170 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2171 SDVO_NAME(psb_intel_sdvo),
2172 bytes[0], bytes[1]);
2173 return false;
2174 }
2175 psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2176
2177 return true;
2178}
2179
2180static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
2181 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2182 int type)
2183{
2184 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2185 struct psb_intel_sdvo_tv_format format;
2186 uint32_t format_map, i;
2187
2188 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type))
2189 return false;
2190
2191 BUILD_BUG_ON(sizeof(format) != 6);
2192 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2193 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2194 &format, sizeof(format)))
2195 return false;
2196
2197 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2198
2199 if (format_map == 0)
2200 return false;
2201
2202 psb_intel_sdvo_connector->format_supported_num = 0;
2203 for (i = 0 ; i < ARRAY_SIZE(tv_format_names); i++)
2204 if (format_map & (1 << i))
2205 psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i;
2206
2207
2208 psb_intel_sdvo_connector->tv_format =
2209 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2210 "mode", psb_intel_sdvo_connector->format_supported_num);
2211 if (!psb_intel_sdvo_connector->tv_format)
2212 return false;
2213
2214 for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++)
2215 drm_property_add_enum(
2216 psb_intel_sdvo_connector->tv_format,
2217 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]);
2218
2219 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0];
2220 drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base,
2221 psb_intel_sdvo_connector->tv_format, 0);
2222 return true;
2223
2224}
2225
2226#define ENHANCEMENT(name, NAME) do { \
2227 if (enhancements.name) { \
2228 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2229 !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2230 return false; \
2231 psb_intel_sdvo_connector->max_##name = data_value[0]; \
2232 psb_intel_sdvo_connector->cur_##name = response; \
2233 psb_intel_sdvo_connector->name = \
2234 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2235 if (!psb_intel_sdvo_connector->name) return false; \
2236 drm_object_attach_property(&connector->base, \
2237 psb_intel_sdvo_connector->name, \
2238 psb_intel_sdvo_connector->cur_##name); \
2239 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2240 data_value[0], data_value[1], response); \
2241 } \
2242} while(0)
2243
2244static bool
2245psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo,
2246 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2247 struct psb_intel_sdvo_enhancements_reply enhancements)
2248{
2249 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2250 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2251 uint16_t response, data_value[2];
2252
2253 /* when horizontal overscan is supported, Add the left/right property */
2254 if (enhancements.overscan_h) {
2255 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2256 SDVO_CMD_GET_MAX_OVERSCAN_H,
2257 &data_value, 4))
2258 return false;
2259
2260 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2261 SDVO_CMD_GET_OVERSCAN_H,
2262 &response, 2))
2263 return false;
2264
2265 psb_intel_sdvo_connector->max_hscan = data_value[0];
2266 psb_intel_sdvo_connector->left_margin = data_value[0] - response;
2267 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin;
2268 psb_intel_sdvo_connector->left =
2269 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2270 if (!psb_intel_sdvo_connector->left)
2271 return false;
2272
2273 drm_object_attach_property(&connector->base,
2274 psb_intel_sdvo_connector->left,
2275 psb_intel_sdvo_connector->left_margin);
2276
2277 psb_intel_sdvo_connector->right =
2278 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2279 if (!psb_intel_sdvo_connector->right)
2280 return false;
2281
2282 drm_object_attach_property(&connector->base,
2283 psb_intel_sdvo_connector->right,
2284 psb_intel_sdvo_connector->right_margin);
2285 DRM_DEBUG_KMS("h_overscan: max %d, "
2286 "default %d, current %d\n",
2287 data_value[0], data_value[1], response);
2288 }
2289
2290 if (enhancements.overscan_v) {
2291 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2292 SDVO_CMD_GET_MAX_OVERSCAN_V,
2293 &data_value, 4))
2294 return false;
2295
2296 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2297 SDVO_CMD_GET_OVERSCAN_V,
2298 &response, 2))
2299 return false;
2300
2301 psb_intel_sdvo_connector->max_vscan = data_value[0];
2302 psb_intel_sdvo_connector->top_margin = data_value[0] - response;
2303 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin;
2304 psb_intel_sdvo_connector->top =
2305 drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]);
2306 if (!psb_intel_sdvo_connector->top)
2307 return false;
2308
2309 drm_object_attach_property(&connector->base,
2310 psb_intel_sdvo_connector->top,
2311 psb_intel_sdvo_connector->top_margin);
2312
2313 psb_intel_sdvo_connector->bottom =
2314 drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]);
2315 if (!psb_intel_sdvo_connector->bottom)
2316 return false;
2317
2318 drm_object_attach_property(&connector->base,
2319 psb_intel_sdvo_connector->bottom,
2320 psb_intel_sdvo_connector->bottom_margin);
2321 DRM_DEBUG_KMS("v_overscan: max %d, "
2322 "default %d, current %d\n",
2323 data_value[0], data_value[1], response);
2324 }
2325
2326 ENHANCEMENT(hpos, HPOS);
2327 ENHANCEMENT(vpos, VPOS);
2328 ENHANCEMENT(saturation, SATURATION);
2329 ENHANCEMENT(contrast, CONTRAST);
2330 ENHANCEMENT(hue, HUE);
2331 ENHANCEMENT(sharpness, SHARPNESS);
2332 ENHANCEMENT(brightness, BRIGHTNESS);
2333 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2334 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2335 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2336 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2337 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2338
2339 if (enhancements.dot_crawl) {
2340 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2341 return false;
2342
2343 psb_intel_sdvo_connector->max_dot_crawl = 1;
2344 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2345 psb_intel_sdvo_connector->dot_crawl =
2346 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2347 if (!psb_intel_sdvo_connector->dot_crawl)
2348 return false;
2349
2350 drm_object_attach_property(&connector->base,
2351 psb_intel_sdvo_connector->dot_crawl,
2352 psb_intel_sdvo_connector->cur_dot_crawl);
2353 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2354 }
2355
2356 return true;
2357}
2358
2359static bool
2360psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo,
2361 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2362 struct psb_intel_sdvo_enhancements_reply enhancements)
2363{
2364 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2365 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2366 uint16_t response, data_value[2];
2367
2368 ENHANCEMENT(brightness, BRIGHTNESS);
2369
2370 return true;
2371}
2372#undef ENHANCEMENT
2373
2374static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
2375 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector)
2376{
2377 union {
2378 struct psb_intel_sdvo_enhancements_reply reply;
2379 uint16_t response;
2380 } enhancements;
2381
2382 BUILD_BUG_ON(sizeof(enhancements) != 2);
2383
2384 enhancements.response = 0;
2385 psb_intel_sdvo_get_value(psb_intel_sdvo,
2386 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2387 &enhancements, sizeof(enhancements));
2388 if (enhancements.response == 0) {
2389 DRM_DEBUG_KMS("No enhancement is supported\n");
2390 return true;
2391 }
2392
2393 if (IS_TV(psb_intel_sdvo_connector))
2394 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2395 else if(IS_LVDS(psb_intel_sdvo_connector))
2396 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2397 else
2398 return true;
2399}
2400
2401static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2402 struct i2c_msg *msgs,
2403 int num)
2404{
2405 struct psb_intel_sdvo *sdvo = adapter->algo_data;
2406
2407 if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2408 return -EIO;
2409
2410 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2411}
2412
2413static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2414{
2415 struct psb_intel_sdvo *sdvo = adapter->algo_data;
2416 return sdvo->i2c->algo->functionality(sdvo->i2c);
2417}
2418
2419static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = {
2420 .master_xfer = psb_intel_sdvo_ddc_proxy_xfer,
2421 .functionality = psb_intel_sdvo_ddc_proxy_func
2422};
2423
2424static bool
2425psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo,
2426 struct drm_device *dev)
2427{
2428 sdvo->ddc.owner = THIS_MODULE;
2429 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2430 sdvo->ddc.dev.parent = dev->dev;
2431 sdvo->ddc.algo_data = sdvo;
2432 sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy;
2433
2434 return i2c_add_adapter(&sdvo->ddc) == 0;
2435}
2436
2437bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2438{
2439 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
2440 struct gma_encoder *gma_encoder;
2441 struct psb_intel_sdvo *psb_intel_sdvo;
2442 int i;
2443
2444 psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL);
2445 if (!psb_intel_sdvo)
2446 return false;
2447
2448 psb_intel_sdvo->sdvo_reg = sdvo_reg;
2449 psb_intel_sdvo->target_addr = psb_intel_sdvo_get_target_addr(dev, sdvo_reg) >> 1;
2450 psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2451 if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) {
2452 kfree(psb_intel_sdvo);
2453 return false;
2454 }
2455
2456 /* encoder type will be decided later */
2457 gma_encoder = &psb_intel_sdvo->base;
2458 gma_encoder->type = INTEL_OUTPUT_SDVO;
2459 drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs,
2460 0, NULL);
2461
2462 /* Read the regs to test if we can talk to the device */
2463 for (i = 0; i < 0x40; i++) {
2464 u8 byte;
2465
2466 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) {
2467 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2468 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2469 goto err;
2470 }
2471 }
2472
2473 if (IS_SDVOB(sdvo_reg))
2474 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2475 else
2476 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2477
2478 drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs);
2479
2480 /* In default case sdvo lvds is false */
2481 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
2482 goto err;
2483
2484 if (psb_intel_sdvo_output_setup(psb_intel_sdvo,
2485 psb_intel_sdvo->caps.output_flags) != true) {
2486 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2487 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2488 goto err;
2489 }
2490
2491 psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2492
2493 /* Set the input timing to the screen. Assume always input 0. */
2494 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
2495 goto err;
2496
2497 if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo,
2498 &psb_intel_sdvo->pixel_clock_min,
2499 &psb_intel_sdvo->pixel_clock_max))
2500 goto err;
2501
2502 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2503 "clock range %dMHz - %dMHz, "
2504 "input 1: %c, input 2: %c, "
2505 "output 1: %c, output 2: %c\n",
2506 SDVO_NAME(psb_intel_sdvo),
2507 psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id,
2508 psb_intel_sdvo->caps.device_rev_id,
2509 psb_intel_sdvo->pixel_clock_min / 1000,
2510 psb_intel_sdvo->pixel_clock_max / 1000,
2511 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2512 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2513 /* check currently supported outputs */
2514 psb_intel_sdvo->caps.output_flags &
2515 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2516 psb_intel_sdvo->caps.output_flags &
2517 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2518 return true;
2519
2520err:
2521 drm_encoder_cleanup(&gma_encoder->base);
2522 i2c_del_adapter(&psb_intel_sdvo->ddc);
2523 kfree(psb_intel_sdvo);
2524
2525 return false;
2526}
1/*
2 * Copyright 2006 Dave Airlie <airlied@linux.ie>
3 * Copyright © 2006-2007 Intel Corporation
4 * Jesse Barnes <jesse.barnes@intel.com>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
23 * DEALINGS IN THE SOFTWARE.
24 *
25 * Authors:
26 * Eric Anholt <eric@anholt.net>
27 */
28#include <linux/module.h>
29#include <linux/i2c.h>
30#include <linux/slab.h>
31#include <linux/delay.h>
32#include <drm/drmP.h>
33#include <drm/drm_crtc.h>
34#include <drm/drm_edid.h>
35#include "psb_intel_drv.h"
36#include <drm/gma_drm.h>
37#include "psb_drv.h"
38#include "psb_intel_sdvo_regs.h"
39#include "psb_intel_reg.h"
40
41#define SDVO_TMDS_MASK (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_TMDS1)
42#define SDVO_RGB_MASK (SDVO_OUTPUT_RGB0 | SDVO_OUTPUT_RGB1)
43#define SDVO_LVDS_MASK (SDVO_OUTPUT_LVDS0 | SDVO_OUTPUT_LVDS1)
44#define SDVO_TV_MASK (SDVO_OUTPUT_CVBS0 | SDVO_OUTPUT_SVID0)
45
46#define SDVO_OUTPUT_MASK (SDVO_TMDS_MASK | SDVO_RGB_MASK | SDVO_LVDS_MASK |\
47 SDVO_TV_MASK)
48
49#define IS_TV(c) (c->output_flag & SDVO_TV_MASK)
50#define IS_TMDS(c) (c->output_flag & SDVO_TMDS_MASK)
51#define IS_LVDS(c) (c->output_flag & SDVO_LVDS_MASK)
52#define IS_TV_OR_LVDS(c) (c->output_flag & (SDVO_TV_MASK | SDVO_LVDS_MASK))
53
54
55static const char *tv_format_names[] = {
56 "NTSC_M" , "NTSC_J" , "NTSC_443",
57 "PAL_B" , "PAL_D" , "PAL_G" ,
58 "PAL_H" , "PAL_I" , "PAL_M" ,
59 "PAL_N" , "PAL_NC" , "PAL_60" ,
60 "SECAM_B" , "SECAM_D" , "SECAM_G" ,
61 "SECAM_K" , "SECAM_K1", "SECAM_L" ,
62 "SECAM_60"
63};
64
65#define TV_FORMAT_NUM (sizeof(tv_format_names) / sizeof(*tv_format_names))
66
67struct psb_intel_sdvo {
68 struct gma_encoder base;
69
70 struct i2c_adapter *i2c;
71 u8 slave_addr;
72
73 struct i2c_adapter ddc;
74
75 /* Register for the SDVO device: SDVOB or SDVOC */
76 int sdvo_reg;
77
78 /* Active outputs controlled by this SDVO output */
79 uint16_t controlled_output;
80
81 /*
82 * Capabilities of the SDVO device returned by
83 * i830_sdvo_get_capabilities()
84 */
85 struct psb_intel_sdvo_caps caps;
86
87 /* Pixel clock limitations reported by the SDVO device, in kHz */
88 int pixel_clock_min, pixel_clock_max;
89
90 /*
91 * For multiple function SDVO device,
92 * this is for current attached outputs.
93 */
94 uint16_t attached_output;
95
96 /**
97 * This is used to select the color range of RBG outputs in HDMI mode.
98 * It is only valid when using TMDS encoding and 8 bit per color mode.
99 */
100 uint32_t color_range;
101
102 /**
103 * This is set if we're going to treat the device as TV-out.
104 *
105 * While we have these nice friendly flags for output types that ought
106 * to decide this for us, the S-Video output on our HDMI+S-Video card
107 * shows up as RGB1 (VGA).
108 */
109 bool is_tv;
110
111 /* This is for current tv format name */
112 int tv_format_index;
113
114 /**
115 * This is set if we treat the device as HDMI, instead of DVI.
116 */
117 bool is_hdmi;
118 bool has_hdmi_monitor;
119 bool has_hdmi_audio;
120
121 /**
122 * This is set if we detect output of sdvo device as LVDS and
123 * have a valid fixed mode to use with the panel.
124 */
125 bool is_lvds;
126
127 /**
128 * This is sdvo fixed pannel mode pointer
129 */
130 struct drm_display_mode *sdvo_lvds_fixed_mode;
131
132 /* DDC bus used by this SDVO encoder */
133 uint8_t ddc_bus;
134
135 /* Input timings for adjusted_mode */
136 struct psb_intel_sdvo_dtd input_dtd;
137
138 /* Saved SDVO output states */
139 uint32_t saveSDVO; /* Can be SDVOB or SDVOC depending on sdvo_reg */
140};
141
142struct psb_intel_sdvo_connector {
143 struct gma_connector base;
144
145 /* Mark the type of connector */
146 uint16_t output_flag;
147
148 int force_audio;
149
150 /* This contains all current supported TV format */
151 u8 tv_format_supported[TV_FORMAT_NUM];
152 int format_supported_num;
153 struct drm_property *tv_format;
154
155 /* add the property for the SDVO-TV */
156 struct drm_property *left;
157 struct drm_property *right;
158 struct drm_property *top;
159 struct drm_property *bottom;
160 struct drm_property *hpos;
161 struct drm_property *vpos;
162 struct drm_property *contrast;
163 struct drm_property *saturation;
164 struct drm_property *hue;
165 struct drm_property *sharpness;
166 struct drm_property *flicker_filter;
167 struct drm_property *flicker_filter_adaptive;
168 struct drm_property *flicker_filter_2d;
169 struct drm_property *tv_chroma_filter;
170 struct drm_property *tv_luma_filter;
171 struct drm_property *dot_crawl;
172
173 /* add the property for the SDVO-TV/LVDS */
174 struct drm_property *brightness;
175
176 /* Add variable to record current setting for the above property */
177 u32 left_margin, right_margin, top_margin, bottom_margin;
178
179 /* this is to get the range of margin.*/
180 u32 max_hscan, max_vscan;
181 u32 max_hpos, cur_hpos;
182 u32 max_vpos, cur_vpos;
183 u32 cur_brightness, max_brightness;
184 u32 cur_contrast, max_contrast;
185 u32 cur_saturation, max_saturation;
186 u32 cur_hue, max_hue;
187 u32 cur_sharpness, max_sharpness;
188 u32 cur_flicker_filter, max_flicker_filter;
189 u32 cur_flicker_filter_adaptive, max_flicker_filter_adaptive;
190 u32 cur_flicker_filter_2d, max_flicker_filter_2d;
191 u32 cur_tv_chroma_filter, max_tv_chroma_filter;
192 u32 cur_tv_luma_filter, max_tv_luma_filter;
193 u32 cur_dot_crawl, max_dot_crawl;
194};
195
196static struct psb_intel_sdvo *to_psb_intel_sdvo(struct drm_encoder *encoder)
197{
198 return container_of(encoder, struct psb_intel_sdvo, base.base);
199}
200
201static struct psb_intel_sdvo *intel_attached_sdvo(struct drm_connector *connector)
202{
203 return container_of(gma_attached_encoder(connector),
204 struct psb_intel_sdvo, base);
205}
206
207static struct psb_intel_sdvo_connector *to_psb_intel_sdvo_connector(struct drm_connector *connector)
208{
209 return container_of(to_gma_connector(connector), struct psb_intel_sdvo_connector, base);
210}
211
212static bool
213psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags);
214static bool
215psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
216 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
217 int type);
218static bool
219psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
220 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector);
221
222/**
223 * Writes the SDVOB or SDVOC with the given value, but always writes both
224 * SDVOB and SDVOC to work around apparent hardware issues (according to
225 * comments in the BIOS).
226 */
227static void psb_intel_sdvo_write_sdvox(struct psb_intel_sdvo *psb_intel_sdvo, u32 val)
228{
229 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
230 u32 bval = val, cval = val;
231 int i, j;
232 int need_aux = IS_MRST(dev) ? 1 : 0;
233
234 for (j = 0; j <= need_aux; j++) {
235 if (psb_intel_sdvo->sdvo_reg == SDVOB)
236 cval = REG_READ_WITH_AUX(SDVOC, j);
237 else
238 bval = REG_READ_WITH_AUX(SDVOB, j);
239
240 /*
241 * Write the registers twice for luck. Sometimes,
242 * writing them only once doesn't appear to 'stick'.
243 * The BIOS does this too. Yay, magic
244 */
245 for (i = 0; i < 2; i++) {
246 REG_WRITE_WITH_AUX(SDVOB, bval, j);
247 REG_READ_WITH_AUX(SDVOB, j);
248 REG_WRITE_WITH_AUX(SDVOC, cval, j);
249 REG_READ_WITH_AUX(SDVOC, j);
250 }
251 }
252}
253
254static bool psb_intel_sdvo_read_byte(struct psb_intel_sdvo *psb_intel_sdvo, u8 addr, u8 *ch)
255{
256 struct i2c_msg msgs[] = {
257 {
258 .addr = psb_intel_sdvo->slave_addr,
259 .flags = 0,
260 .len = 1,
261 .buf = &addr,
262 },
263 {
264 .addr = psb_intel_sdvo->slave_addr,
265 .flags = I2C_M_RD,
266 .len = 1,
267 .buf = ch,
268 }
269 };
270 int ret;
271
272 if ((ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, 2)) == 2)
273 return true;
274
275 DRM_DEBUG_KMS("i2c transfer returned %d\n", ret);
276 return false;
277}
278
279#define SDVO_CMD_NAME_ENTRY(cmd) {cmd, #cmd}
280/** Mapping of command numbers to names, for debug output */
281static const struct _sdvo_cmd_name {
282 u8 cmd;
283 const char *name;
284} sdvo_cmd_names[] = {
285 SDVO_CMD_NAME_ENTRY(SDVO_CMD_RESET),
286 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DEVICE_CAPS),
287 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FIRMWARE_REV),
288 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TRAINED_INPUTS),
289 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_OUTPUTS),
290 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_OUTPUTS),
291 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_IN_OUT_MAP),
292 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_IN_OUT_MAP),
293 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ATTACHED_DISPLAYS),
294 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HOT_PLUG_SUPPORT),
295 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ACTIVE_HOT_PLUG),
296 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ACTIVE_HOT_PLUG),
297 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INTERRUPT_EVENT_SOURCE),
298 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_INPUT),
299 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TARGET_OUTPUT),
300 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART1),
301 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_TIMINGS_PART2),
302 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
303 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART2),
304 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_INPUT_TIMINGS_PART1),
305 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART1),
306 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OUTPUT_TIMINGS_PART2),
307 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART1),
308 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_TIMINGS_PART2),
309 SDVO_CMD_NAME_ENTRY(SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING),
310 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1),
311 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2),
312 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE),
313 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OUTPUT_PIXEL_CLOCK_RANGE),
314 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_CLOCK_RATE_MULTS),
315 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CLOCK_RATE_MULT),
316 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CLOCK_RATE_MULT),
317 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_TV_FORMATS),
318 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_FORMAT),
319 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_FORMAT),
320 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_POWER_STATES),
321 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_POWER_STATE),
322 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODER_POWER_STATE),
323 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DISPLAY_POWER_STATE),
324 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTROL_BUS_SWITCH),
325 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT),
326 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SCALED_HDTV_RESOLUTION_SUPPORT),
327 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS),
328
329 /* Add the op code for SDVO enhancements */
330 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HPOS),
331 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HPOS),
332 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HPOS),
333 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_VPOS),
334 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_VPOS),
335 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_VPOS),
336 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SATURATION),
337 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SATURATION),
338 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SATURATION),
339 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_HUE),
340 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HUE),
341 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HUE),
342 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_CONTRAST),
343 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_CONTRAST),
344 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_CONTRAST),
345 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_BRIGHTNESS),
346 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_BRIGHTNESS),
347 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_BRIGHTNESS),
348 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_H),
349 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_H),
350 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_H),
351 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_OVERSCAN_V),
352 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_OVERSCAN_V),
353 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_OVERSCAN_V),
354 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER),
355 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER),
356 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER),
357 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_ADAPTIVE),
358 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_ADAPTIVE),
359 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_ADAPTIVE),
360 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_FLICKER_FILTER_2D),
361 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_FLICKER_FILTER_2D),
362 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_FLICKER_FILTER_2D),
363 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_SHARPNESS),
364 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SHARPNESS),
365 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_SHARPNESS),
366 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_DOT_CRAWL),
367 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_DOT_CRAWL),
368 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_CHROMA_FILTER),
369 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_CHROMA_FILTER),
370 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_CHROMA_FILTER),
371 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_MAX_TV_LUMA_FILTER),
372 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_TV_LUMA_FILTER),
373 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_TV_LUMA_FILTER),
374
375 /* HDMI op code */
376 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_SUPP_ENCODE),
377 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_ENCODE),
378 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_ENCODE),
379 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_PIXEL_REPLI),
380 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_PIXEL_REPLI),
381 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY_CAP),
382 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_COLORIMETRY),
383 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_COLORIMETRY),
384 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_ENCRYPT_PREFER),
385 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_AUDIO_STAT),
386 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_AUDIO_STAT),
387 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INDEX),
388 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_INDEX),
389 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_INFO),
390 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_AV_SPLIT),
391 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_AV_SPLIT),
392 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_TXRATE),
393 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_TXRATE),
394 SDVO_CMD_NAME_ENTRY(SDVO_CMD_SET_HBUF_DATA),
395 SDVO_CMD_NAME_ENTRY(SDVO_CMD_GET_HBUF_DATA),
396};
397
398#define IS_SDVOB(reg) (reg == SDVOB)
399#define SDVO_NAME(svdo) (IS_SDVOB((svdo)->sdvo_reg) ? "SDVOB" : "SDVOC")
400
401static void psb_intel_sdvo_debug_write(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
402 const void *args, int args_len)
403{
404 int i;
405
406 DRM_DEBUG_KMS("%s: W: %02X ",
407 SDVO_NAME(psb_intel_sdvo), cmd);
408 for (i = 0; i < args_len; i++)
409 DRM_DEBUG_KMS("%02X ", ((u8 *)args)[i]);
410 for (; i < 8; i++)
411 DRM_DEBUG_KMS(" ");
412 for (i = 0; i < ARRAY_SIZE(sdvo_cmd_names); i++) {
413 if (cmd == sdvo_cmd_names[i].cmd) {
414 DRM_DEBUG_KMS("(%s)", sdvo_cmd_names[i].name);
415 break;
416 }
417 }
418 if (i == ARRAY_SIZE(sdvo_cmd_names))
419 DRM_DEBUG_KMS("(%02X)", cmd);
420 DRM_DEBUG_KMS("\n");
421}
422
423static const char *cmd_status_names[] = {
424 "Power on",
425 "Success",
426 "Not supported",
427 "Invalid arg",
428 "Pending",
429 "Target not specified",
430 "Scaling not supported"
431};
432
433static bool psb_intel_sdvo_write_cmd(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
434 const void *args, int args_len)
435{
436 u8 buf[args_len*2 + 2], status;
437 struct i2c_msg msgs[args_len + 3];
438 int i, ret;
439
440 psb_intel_sdvo_debug_write(psb_intel_sdvo, cmd, args, args_len);
441
442 for (i = 0; i < args_len; i++) {
443 msgs[i].addr = psb_intel_sdvo->slave_addr;
444 msgs[i].flags = 0;
445 msgs[i].len = 2;
446 msgs[i].buf = buf + 2 *i;
447 buf[2*i + 0] = SDVO_I2C_ARG_0 - i;
448 buf[2*i + 1] = ((u8*)args)[i];
449 }
450 msgs[i].addr = psb_intel_sdvo->slave_addr;
451 msgs[i].flags = 0;
452 msgs[i].len = 2;
453 msgs[i].buf = buf + 2*i;
454 buf[2*i + 0] = SDVO_I2C_OPCODE;
455 buf[2*i + 1] = cmd;
456
457 /* the following two are to read the response */
458 status = SDVO_I2C_CMD_STATUS;
459 msgs[i+1].addr = psb_intel_sdvo->slave_addr;
460 msgs[i+1].flags = 0;
461 msgs[i+1].len = 1;
462 msgs[i+1].buf = &status;
463
464 msgs[i+2].addr = psb_intel_sdvo->slave_addr;
465 msgs[i+2].flags = I2C_M_RD;
466 msgs[i+2].len = 1;
467 msgs[i+2].buf = &status;
468
469 ret = i2c_transfer(psb_intel_sdvo->i2c, msgs, i+3);
470 if (ret < 0) {
471 DRM_DEBUG_KMS("I2c transfer returned %d\n", ret);
472 return false;
473 }
474 if (ret != i+3) {
475 /* failure in I2C transfer */
476 DRM_DEBUG_KMS("I2c transfer returned %d/%d\n", ret, i+3);
477 return false;
478 }
479
480 return true;
481}
482
483static bool psb_intel_sdvo_read_response(struct psb_intel_sdvo *psb_intel_sdvo,
484 void *response, int response_len)
485{
486 u8 retry = 5;
487 u8 status;
488 int i;
489
490 DRM_DEBUG_KMS("%s: R: ", SDVO_NAME(psb_intel_sdvo));
491
492 /*
493 * The documentation states that all commands will be
494 * processed within 15µs, and that we need only poll
495 * the status byte a maximum of 3 times in order for the
496 * command to be complete.
497 *
498 * Check 5 times in case the hardware failed to read the docs.
499 */
500 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
501 SDVO_I2C_CMD_STATUS,
502 &status))
503 goto log_fail;
504
505 while ((status == SDVO_CMD_STATUS_PENDING ||
506 status == SDVO_CMD_STATUS_TARGET_NOT_SPECIFIED) && retry--) {
507 udelay(15);
508 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
509 SDVO_I2C_CMD_STATUS,
510 &status))
511 goto log_fail;
512 }
513
514 if (status <= SDVO_CMD_STATUS_SCALING_NOT_SUPP)
515 DRM_DEBUG_KMS("(%s)", cmd_status_names[status]);
516 else
517 DRM_DEBUG_KMS("(??? %d)", status);
518
519 if (status != SDVO_CMD_STATUS_SUCCESS)
520 goto log_fail;
521
522 /* Read the command response */
523 for (i = 0; i < response_len; i++) {
524 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo,
525 SDVO_I2C_RETURN_0 + i,
526 &((u8 *)response)[i]))
527 goto log_fail;
528 DRM_DEBUG_KMS(" %02X", ((u8 *)response)[i]);
529 }
530 DRM_DEBUG_KMS("\n");
531 return true;
532
533log_fail:
534 DRM_DEBUG_KMS("... failed\n");
535 return false;
536}
537
538static int psb_intel_sdvo_get_pixel_multiplier(struct drm_display_mode *mode)
539{
540 if (mode->clock >= 100000)
541 return 1;
542 else if (mode->clock >= 50000)
543 return 2;
544 else
545 return 4;
546}
547
548static bool psb_intel_sdvo_set_control_bus_switch(struct psb_intel_sdvo *psb_intel_sdvo,
549 u8 ddc_bus)
550{
551 /* This must be the immediately preceding write before the i2c xfer */
552 return psb_intel_sdvo_write_cmd(psb_intel_sdvo,
553 SDVO_CMD_SET_CONTROL_BUS_SWITCH,
554 &ddc_bus, 1);
555}
556
557static bool psb_intel_sdvo_set_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, const void *data, int len)
558{
559 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, data, len))
560 return false;
561
562 return psb_intel_sdvo_read_response(psb_intel_sdvo, NULL, 0);
563}
564
565static bool
566psb_intel_sdvo_get_value(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd, void *value, int len)
567{
568 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo, cmd, NULL, 0))
569 return false;
570
571 return psb_intel_sdvo_read_response(psb_intel_sdvo, value, len);
572}
573
574static bool psb_intel_sdvo_set_target_input(struct psb_intel_sdvo *psb_intel_sdvo)
575{
576 struct psb_intel_sdvo_set_target_input_args targets = {0};
577 return psb_intel_sdvo_set_value(psb_intel_sdvo,
578 SDVO_CMD_SET_TARGET_INPUT,
579 &targets, sizeof(targets));
580}
581
582/**
583 * Return whether each input is trained.
584 *
585 * This function is making an assumption about the layout of the response,
586 * which should be checked against the docs.
587 */
588static bool psb_intel_sdvo_get_trained_inputs(struct psb_intel_sdvo *psb_intel_sdvo, bool *input_1, bool *input_2)
589{
590 struct psb_intel_sdvo_get_trained_inputs_response response;
591
592 BUILD_BUG_ON(sizeof(response) != 1);
593 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_TRAINED_INPUTS,
594 &response, sizeof(response)))
595 return false;
596
597 *input_1 = response.input0_trained;
598 *input_2 = response.input1_trained;
599 return true;
600}
601
602static bool psb_intel_sdvo_set_active_outputs(struct psb_intel_sdvo *psb_intel_sdvo,
603 u16 outputs)
604{
605 return psb_intel_sdvo_set_value(psb_intel_sdvo,
606 SDVO_CMD_SET_ACTIVE_OUTPUTS,
607 &outputs, sizeof(outputs));
608}
609
610static bool psb_intel_sdvo_set_encoder_power_state(struct psb_intel_sdvo *psb_intel_sdvo,
611 int mode)
612{
613 u8 state = SDVO_ENCODER_STATE_ON;
614
615 switch (mode) {
616 case DRM_MODE_DPMS_ON:
617 state = SDVO_ENCODER_STATE_ON;
618 break;
619 case DRM_MODE_DPMS_STANDBY:
620 state = SDVO_ENCODER_STATE_STANDBY;
621 break;
622 case DRM_MODE_DPMS_SUSPEND:
623 state = SDVO_ENCODER_STATE_SUSPEND;
624 break;
625 case DRM_MODE_DPMS_OFF:
626 state = SDVO_ENCODER_STATE_OFF;
627 break;
628 }
629
630 return psb_intel_sdvo_set_value(psb_intel_sdvo,
631 SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state));
632}
633
634static bool psb_intel_sdvo_get_input_pixel_clock_range(struct psb_intel_sdvo *psb_intel_sdvo,
635 int *clock_min,
636 int *clock_max)
637{
638 struct psb_intel_sdvo_pixel_clock_range clocks;
639
640 BUILD_BUG_ON(sizeof(clocks) != 4);
641 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
642 SDVO_CMD_GET_INPUT_PIXEL_CLOCK_RANGE,
643 &clocks, sizeof(clocks)))
644 return false;
645
646 /* Convert the values from units of 10 kHz to kHz. */
647 *clock_min = clocks.min * 10;
648 *clock_max = clocks.max * 10;
649 return true;
650}
651
652static bool psb_intel_sdvo_set_target_output(struct psb_intel_sdvo *psb_intel_sdvo,
653 u16 outputs)
654{
655 return psb_intel_sdvo_set_value(psb_intel_sdvo,
656 SDVO_CMD_SET_TARGET_OUTPUT,
657 &outputs, sizeof(outputs));
658}
659
660static bool psb_intel_sdvo_set_timing(struct psb_intel_sdvo *psb_intel_sdvo, u8 cmd,
661 struct psb_intel_sdvo_dtd *dtd)
662{
663 return psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &dtd->part1, sizeof(dtd->part1)) &&
664 psb_intel_sdvo_set_value(psb_intel_sdvo, cmd + 1, &dtd->part2, sizeof(dtd->part2));
665}
666
667static bool psb_intel_sdvo_set_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
668 struct psb_intel_sdvo_dtd *dtd)
669{
670 return psb_intel_sdvo_set_timing(psb_intel_sdvo,
671 SDVO_CMD_SET_INPUT_TIMINGS_PART1, dtd);
672}
673
674static bool psb_intel_sdvo_set_output_timing(struct psb_intel_sdvo *psb_intel_sdvo,
675 struct psb_intel_sdvo_dtd *dtd)
676{
677 return psb_intel_sdvo_set_timing(psb_intel_sdvo,
678 SDVO_CMD_SET_OUTPUT_TIMINGS_PART1, dtd);
679}
680
681static bool
682psb_intel_sdvo_create_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
683 uint16_t clock,
684 uint16_t width,
685 uint16_t height)
686{
687 struct psb_intel_sdvo_preferred_input_timing_args args;
688
689 memset(&args, 0, sizeof(args));
690 args.clock = clock;
691 args.width = width;
692 args.height = height;
693 args.interlace = 0;
694
695 if (psb_intel_sdvo->is_lvds &&
696 (psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay != width ||
697 psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay != height))
698 args.scaled = 1;
699
700 return psb_intel_sdvo_set_value(psb_intel_sdvo,
701 SDVO_CMD_CREATE_PREFERRED_INPUT_TIMING,
702 &args, sizeof(args));
703}
704
705static bool psb_intel_sdvo_get_preferred_input_timing(struct psb_intel_sdvo *psb_intel_sdvo,
706 struct psb_intel_sdvo_dtd *dtd)
707{
708 BUILD_BUG_ON(sizeof(dtd->part1) != 8);
709 BUILD_BUG_ON(sizeof(dtd->part2) != 8);
710 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART1,
711 &dtd->part1, sizeof(dtd->part1)) &&
712 psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_PREFERRED_INPUT_TIMING_PART2,
713 &dtd->part2, sizeof(dtd->part2));
714}
715
716static bool psb_intel_sdvo_set_clock_rate_mult(struct psb_intel_sdvo *psb_intel_sdvo, u8 val)
717{
718 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_CLOCK_RATE_MULT, &val, 1);
719}
720
721static void psb_intel_sdvo_get_dtd_from_mode(struct psb_intel_sdvo_dtd *dtd,
722 const struct drm_display_mode *mode)
723{
724 uint16_t width, height;
725 uint16_t h_blank_len, h_sync_len, v_blank_len, v_sync_len;
726 uint16_t h_sync_offset, v_sync_offset;
727
728 width = mode->crtc_hdisplay;
729 height = mode->crtc_vdisplay;
730
731 /* do some mode translations */
732 h_blank_len = mode->crtc_hblank_end - mode->crtc_hblank_start;
733 h_sync_len = mode->crtc_hsync_end - mode->crtc_hsync_start;
734
735 v_blank_len = mode->crtc_vblank_end - mode->crtc_vblank_start;
736 v_sync_len = mode->crtc_vsync_end - mode->crtc_vsync_start;
737
738 h_sync_offset = mode->crtc_hsync_start - mode->crtc_hblank_start;
739 v_sync_offset = mode->crtc_vsync_start - mode->crtc_vblank_start;
740
741 dtd->part1.clock = mode->clock / 10;
742 dtd->part1.h_active = width & 0xff;
743 dtd->part1.h_blank = h_blank_len & 0xff;
744 dtd->part1.h_high = (((width >> 8) & 0xf) << 4) |
745 ((h_blank_len >> 8) & 0xf);
746 dtd->part1.v_active = height & 0xff;
747 dtd->part1.v_blank = v_blank_len & 0xff;
748 dtd->part1.v_high = (((height >> 8) & 0xf) << 4) |
749 ((v_blank_len >> 8) & 0xf);
750
751 dtd->part2.h_sync_off = h_sync_offset & 0xff;
752 dtd->part2.h_sync_width = h_sync_len & 0xff;
753 dtd->part2.v_sync_off_width = (v_sync_offset & 0xf) << 4 |
754 (v_sync_len & 0xf);
755 dtd->part2.sync_off_width_high = ((h_sync_offset & 0x300) >> 2) |
756 ((h_sync_len & 0x300) >> 4) | ((v_sync_offset & 0x30) >> 2) |
757 ((v_sync_len & 0x30) >> 4);
758
759 dtd->part2.dtd_flags = 0x18;
760 if (mode->flags & DRM_MODE_FLAG_PHSYNC)
761 dtd->part2.dtd_flags |= 0x2;
762 if (mode->flags & DRM_MODE_FLAG_PVSYNC)
763 dtd->part2.dtd_flags |= 0x4;
764
765 dtd->part2.sdvo_flags = 0;
766 dtd->part2.v_sync_off_high = v_sync_offset & 0xc0;
767 dtd->part2.reserved = 0;
768}
769
770static void psb_intel_sdvo_get_mode_from_dtd(struct drm_display_mode * mode,
771 const struct psb_intel_sdvo_dtd *dtd)
772{
773 mode->hdisplay = dtd->part1.h_active;
774 mode->hdisplay += ((dtd->part1.h_high >> 4) & 0x0f) << 8;
775 mode->hsync_start = mode->hdisplay + dtd->part2.h_sync_off;
776 mode->hsync_start += (dtd->part2.sync_off_width_high & 0xc0) << 2;
777 mode->hsync_end = mode->hsync_start + dtd->part2.h_sync_width;
778 mode->hsync_end += (dtd->part2.sync_off_width_high & 0x30) << 4;
779 mode->htotal = mode->hdisplay + dtd->part1.h_blank;
780 mode->htotal += (dtd->part1.h_high & 0xf) << 8;
781
782 mode->vdisplay = dtd->part1.v_active;
783 mode->vdisplay += ((dtd->part1.v_high >> 4) & 0x0f) << 8;
784 mode->vsync_start = mode->vdisplay;
785 mode->vsync_start += (dtd->part2.v_sync_off_width >> 4) & 0xf;
786 mode->vsync_start += (dtd->part2.sync_off_width_high & 0x0c) << 2;
787 mode->vsync_start += dtd->part2.v_sync_off_high & 0xc0;
788 mode->vsync_end = mode->vsync_start +
789 (dtd->part2.v_sync_off_width & 0xf);
790 mode->vsync_end += (dtd->part2.sync_off_width_high & 0x3) << 4;
791 mode->vtotal = mode->vdisplay + dtd->part1.v_blank;
792 mode->vtotal += (dtd->part1.v_high & 0xf) << 8;
793
794 mode->clock = dtd->part1.clock * 10;
795
796 mode->flags &= ~(DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC);
797 if (dtd->part2.dtd_flags & 0x2)
798 mode->flags |= DRM_MODE_FLAG_PHSYNC;
799 if (dtd->part2.dtd_flags & 0x4)
800 mode->flags |= DRM_MODE_FLAG_PVSYNC;
801}
802
803static bool psb_intel_sdvo_check_supp_encode(struct psb_intel_sdvo *psb_intel_sdvo)
804{
805 struct psb_intel_sdvo_encode encode;
806
807 BUILD_BUG_ON(sizeof(encode) != 2);
808 return psb_intel_sdvo_get_value(psb_intel_sdvo,
809 SDVO_CMD_GET_SUPP_ENCODE,
810 &encode, sizeof(encode));
811}
812
813static bool psb_intel_sdvo_set_encode(struct psb_intel_sdvo *psb_intel_sdvo,
814 uint8_t mode)
815{
816 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_ENCODE, &mode, 1);
817}
818
819static bool psb_intel_sdvo_set_colorimetry(struct psb_intel_sdvo *psb_intel_sdvo,
820 uint8_t mode)
821{
822 return psb_intel_sdvo_set_value(psb_intel_sdvo, SDVO_CMD_SET_COLORIMETRY, &mode, 1);
823}
824
825#if 0
826static void psb_intel_sdvo_dump_hdmi_buf(struct psb_intel_sdvo *psb_intel_sdvo)
827{
828 int i, j;
829 uint8_t set_buf_index[2];
830 uint8_t av_split;
831 uint8_t buf_size;
832 uint8_t buf[48];
833 uint8_t *pos;
834
835 psb_intel_sdvo_get_value(encoder, SDVO_CMD_GET_HBUF_AV_SPLIT, &av_split, 1);
836
837 for (i = 0; i <= av_split; i++) {
838 set_buf_index[0] = i; set_buf_index[1] = 0;
839 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_SET_HBUF_INDEX,
840 set_buf_index, 2);
841 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_INFO, NULL, 0);
842 psb_intel_sdvo_read_response(encoder, &buf_size, 1);
843
844 pos = buf;
845 for (j = 0; j <= buf_size; j += 8) {
846 psb_intel_sdvo_write_cmd(encoder, SDVO_CMD_GET_HBUF_DATA,
847 NULL, 0);
848 psb_intel_sdvo_read_response(encoder, pos, 8);
849 pos += 8;
850 }
851 }
852}
853#endif
854
855static bool psb_intel_sdvo_set_avi_infoframe(struct psb_intel_sdvo *psb_intel_sdvo)
856{
857 DRM_INFO("HDMI is not supported yet");
858
859 return false;
860#if 0
861 struct dip_infoframe avi_if = {
862 .type = DIP_TYPE_AVI,
863 .ver = DIP_VERSION_AVI,
864 .len = DIP_LEN_AVI,
865 };
866 uint8_t tx_rate = SDVO_HBUF_TX_VSYNC;
867 uint8_t set_buf_index[2] = { 1, 0 };
868 uint64_t *data = (uint64_t *)&avi_if;
869 unsigned i;
870
871 intel_dip_infoframe_csum(&avi_if);
872
873 if (!psb_intel_sdvo_set_value(psb_intel_sdvo,
874 SDVO_CMD_SET_HBUF_INDEX,
875 set_buf_index, 2))
876 return false;
877
878 for (i = 0; i < sizeof(avi_if); i += 8) {
879 if (!psb_intel_sdvo_set_value(psb_intel_sdvo,
880 SDVO_CMD_SET_HBUF_DATA,
881 data, 8))
882 return false;
883 data++;
884 }
885
886 return psb_intel_sdvo_set_value(psb_intel_sdvo,
887 SDVO_CMD_SET_HBUF_TXRATE,
888 &tx_rate, 1);
889#endif
890}
891
892static bool psb_intel_sdvo_set_tv_format(struct psb_intel_sdvo *psb_intel_sdvo)
893{
894 struct psb_intel_sdvo_tv_format format;
895 uint32_t format_map;
896
897 format_map = 1 << psb_intel_sdvo->tv_format_index;
898 memset(&format, 0, sizeof(format));
899 memcpy(&format, &format_map, min(sizeof(format), sizeof(format_map)));
900
901 BUILD_BUG_ON(sizeof(format) != 6);
902 return psb_intel_sdvo_set_value(psb_intel_sdvo,
903 SDVO_CMD_SET_TV_FORMAT,
904 &format, sizeof(format));
905}
906
907static bool
908psb_intel_sdvo_set_output_timings_from_mode(struct psb_intel_sdvo *psb_intel_sdvo,
909 const struct drm_display_mode *mode)
910{
911 struct psb_intel_sdvo_dtd output_dtd;
912
913 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
914 psb_intel_sdvo->attached_output))
915 return false;
916
917 psb_intel_sdvo_get_dtd_from_mode(&output_dtd, mode);
918 if (!psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &output_dtd))
919 return false;
920
921 return true;
922}
923
924static bool
925psb_intel_sdvo_set_input_timings_for_mode(struct psb_intel_sdvo *psb_intel_sdvo,
926 const struct drm_display_mode *mode,
927 struct drm_display_mode *adjusted_mode)
928{
929 /* Reset the input timing to the screen. Assume always input 0. */
930 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
931 return false;
932
933 if (!psb_intel_sdvo_create_preferred_input_timing(psb_intel_sdvo,
934 mode->clock / 10,
935 mode->hdisplay,
936 mode->vdisplay))
937 return false;
938
939 if (!psb_intel_sdvo_get_preferred_input_timing(psb_intel_sdvo,
940 &psb_intel_sdvo->input_dtd))
941 return false;
942
943 psb_intel_sdvo_get_mode_from_dtd(adjusted_mode, &psb_intel_sdvo->input_dtd);
944
945 drm_mode_set_crtcinfo(adjusted_mode, 0);
946 return true;
947}
948
949static bool psb_intel_sdvo_mode_fixup(struct drm_encoder *encoder,
950 const struct drm_display_mode *mode,
951 struct drm_display_mode *adjusted_mode)
952{
953 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
954 int multiplier;
955
956 /* We need to construct preferred input timings based on our
957 * output timings. To do that, we have to set the output
958 * timings, even though this isn't really the right place in
959 * the sequence to do it. Oh well.
960 */
961 if (psb_intel_sdvo->is_tv) {
962 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo, mode))
963 return false;
964
965 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
966 mode,
967 adjusted_mode);
968 } else if (psb_intel_sdvo->is_lvds) {
969 if (!psb_intel_sdvo_set_output_timings_from_mode(psb_intel_sdvo,
970 psb_intel_sdvo->sdvo_lvds_fixed_mode))
971 return false;
972
973 (void) psb_intel_sdvo_set_input_timings_for_mode(psb_intel_sdvo,
974 mode,
975 adjusted_mode);
976 }
977
978 /* Make the CRTC code factor in the SDVO pixel multiplier. The
979 * SDVO device will factor out the multiplier during mode_set.
980 */
981 multiplier = psb_intel_sdvo_get_pixel_multiplier(adjusted_mode);
982 psb_intel_mode_set_pixel_multiplier(adjusted_mode, multiplier);
983
984 return true;
985}
986
987static void psb_intel_sdvo_mode_set(struct drm_encoder *encoder,
988 struct drm_display_mode *mode,
989 struct drm_display_mode *adjusted_mode)
990{
991 struct drm_device *dev = encoder->dev;
992 struct drm_crtc *crtc = encoder->crtc;
993 struct gma_crtc *gma_crtc = to_gma_crtc(crtc);
994 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
995 u32 sdvox;
996 struct psb_intel_sdvo_in_out_map in_out;
997 struct psb_intel_sdvo_dtd input_dtd;
998 int pixel_multiplier = psb_intel_mode_get_pixel_multiplier(adjusted_mode);
999 int rate;
1000 int need_aux = IS_MRST(dev) ? 1 : 0;
1001
1002 if (!mode)
1003 return;
1004
1005 /* First, set the input mapping for the first input to our controlled
1006 * output. This is only correct if we're a single-input device, in
1007 * which case the first input is the output from the appropriate SDVO
1008 * channel on the motherboard. In a two-input device, the first input
1009 * will be SDVOB and the second SDVOC.
1010 */
1011 in_out.in0 = psb_intel_sdvo->attached_output;
1012 in_out.in1 = 0;
1013
1014 psb_intel_sdvo_set_value(psb_intel_sdvo,
1015 SDVO_CMD_SET_IN_OUT_MAP,
1016 &in_out, sizeof(in_out));
1017
1018 /* Set the output timings to the screen */
1019 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1020 psb_intel_sdvo->attached_output))
1021 return;
1022
1023 /* We have tried to get input timing in mode_fixup, and filled into
1024 * adjusted_mode.
1025 */
1026 if (psb_intel_sdvo->is_tv || psb_intel_sdvo->is_lvds) {
1027 input_dtd = psb_intel_sdvo->input_dtd;
1028 } else {
1029 /* Set the output timing to the screen */
1030 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo,
1031 psb_intel_sdvo->attached_output))
1032 return;
1033
1034 psb_intel_sdvo_get_dtd_from_mode(&input_dtd, adjusted_mode);
1035 (void) psb_intel_sdvo_set_output_timing(psb_intel_sdvo, &input_dtd);
1036 }
1037
1038 /* Set the input timing to the screen. Assume always input 0. */
1039 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
1040 return;
1041
1042 if (psb_intel_sdvo->has_hdmi_monitor) {
1043 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_HDMI);
1044 psb_intel_sdvo_set_colorimetry(psb_intel_sdvo,
1045 SDVO_COLORIMETRY_RGB256);
1046 psb_intel_sdvo_set_avi_infoframe(psb_intel_sdvo);
1047 } else
1048 psb_intel_sdvo_set_encode(psb_intel_sdvo, SDVO_ENCODE_DVI);
1049
1050 if (psb_intel_sdvo->is_tv &&
1051 !psb_intel_sdvo_set_tv_format(psb_intel_sdvo))
1052 return;
1053
1054 (void) psb_intel_sdvo_set_input_timing(psb_intel_sdvo, &input_dtd);
1055
1056 switch (pixel_multiplier) {
1057 default:
1058 case 1: rate = SDVO_CLOCK_RATE_MULT_1X; break;
1059 case 2: rate = SDVO_CLOCK_RATE_MULT_2X; break;
1060 case 4: rate = SDVO_CLOCK_RATE_MULT_4X; break;
1061 }
1062 if (!psb_intel_sdvo_set_clock_rate_mult(psb_intel_sdvo, rate))
1063 return;
1064
1065 /* Set the SDVO control regs. */
1066 if (need_aux)
1067 sdvox = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1068 else
1069 sdvox = REG_READ(psb_intel_sdvo->sdvo_reg);
1070
1071 switch (psb_intel_sdvo->sdvo_reg) {
1072 case SDVOB:
1073 sdvox &= SDVOB_PRESERVE_MASK;
1074 break;
1075 case SDVOC:
1076 sdvox &= SDVOC_PRESERVE_MASK;
1077 break;
1078 }
1079 sdvox |= (9 << 19) | SDVO_BORDER_ENABLE;
1080
1081 if (gma_crtc->pipe == 1)
1082 sdvox |= SDVO_PIPE_B_SELECT;
1083 if (psb_intel_sdvo->has_hdmi_audio)
1084 sdvox |= SDVO_AUDIO_ENABLE;
1085
1086 /* FIXME: Check if this is needed for PSB
1087 sdvox |= (pixel_multiplier - 1) << SDVO_PORT_MULTIPLY_SHIFT;
1088 */
1089
1090 if (input_dtd.part2.sdvo_flags & SDVO_NEED_TO_STALL)
1091 sdvox |= SDVO_STALL_SELECT;
1092 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, sdvox);
1093}
1094
1095static void psb_intel_sdvo_dpms(struct drm_encoder *encoder, int mode)
1096{
1097 struct drm_device *dev = encoder->dev;
1098 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1099 u32 temp;
1100 int i;
1101 int need_aux = IS_MRST(dev) ? 1 : 0;
1102
1103 switch (mode) {
1104 case DRM_MODE_DPMS_ON:
1105 DRM_DEBUG("DPMS_ON");
1106 break;
1107 case DRM_MODE_DPMS_OFF:
1108 DRM_DEBUG("DPMS_OFF");
1109 break;
1110 default:
1111 DRM_DEBUG("DPMS: %d", mode);
1112 }
1113
1114 if (mode != DRM_MODE_DPMS_ON) {
1115 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, 0);
1116 if (0)
1117 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1118
1119 if (mode == DRM_MODE_DPMS_OFF) {
1120 if (need_aux)
1121 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1122 else
1123 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1124
1125 if ((temp & SDVO_ENABLE) != 0) {
1126 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp & ~SDVO_ENABLE);
1127 }
1128 }
1129 } else {
1130 bool input1, input2;
1131 u8 status;
1132
1133 if (need_aux)
1134 temp = REG_READ_AUX(psb_intel_sdvo->sdvo_reg);
1135 else
1136 temp = REG_READ(psb_intel_sdvo->sdvo_reg);
1137
1138 if ((temp & SDVO_ENABLE) == 0)
1139 psb_intel_sdvo_write_sdvox(psb_intel_sdvo, temp | SDVO_ENABLE);
1140
1141 for (i = 0; i < 2; i++)
1142 gma_wait_for_vblank(dev);
1143
1144 status = psb_intel_sdvo_get_trained_inputs(psb_intel_sdvo, &input1, &input2);
1145 /* Warn if the device reported failure to sync.
1146 * A lot of SDVO devices fail to notify of sync, but it's
1147 * a given it the status is a success, we succeeded.
1148 */
1149 if (status == SDVO_CMD_STATUS_SUCCESS && !input1) {
1150 DRM_DEBUG_KMS("First %s output reported failure to "
1151 "sync\n", SDVO_NAME(psb_intel_sdvo));
1152 }
1153
1154 if (0)
1155 psb_intel_sdvo_set_encoder_power_state(psb_intel_sdvo, mode);
1156 psb_intel_sdvo_set_active_outputs(psb_intel_sdvo, psb_intel_sdvo->attached_output);
1157 }
1158 return;
1159}
1160
1161static int psb_intel_sdvo_mode_valid(struct drm_connector *connector,
1162 struct drm_display_mode *mode)
1163{
1164 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1165
1166 if (mode->flags & DRM_MODE_FLAG_DBLSCAN)
1167 return MODE_NO_DBLESCAN;
1168
1169 if (psb_intel_sdvo->pixel_clock_min > mode->clock)
1170 return MODE_CLOCK_LOW;
1171
1172 if (psb_intel_sdvo->pixel_clock_max < mode->clock)
1173 return MODE_CLOCK_HIGH;
1174
1175 if (psb_intel_sdvo->is_lvds) {
1176 if (mode->hdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->hdisplay)
1177 return MODE_PANEL;
1178
1179 if (mode->vdisplay > psb_intel_sdvo->sdvo_lvds_fixed_mode->vdisplay)
1180 return MODE_PANEL;
1181 }
1182
1183 return MODE_OK;
1184}
1185
1186static bool psb_intel_sdvo_get_capabilities(struct psb_intel_sdvo *psb_intel_sdvo, struct psb_intel_sdvo_caps *caps)
1187{
1188 BUILD_BUG_ON(sizeof(*caps) != 8);
1189 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
1190 SDVO_CMD_GET_DEVICE_CAPS,
1191 caps, sizeof(*caps)))
1192 return false;
1193
1194 DRM_DEBUG_KMS("SDVO capabilities:\n"
1195 " vendor_id: %d\n"
1196 " device_id: %d\n"
1197 " device_rev_id: %d\n"
1198 " sdvo_version_major: %d\n"
1199 " sdvo_version_minor: %d\n"
1200 " sdvo_inputs_mask: %d\n"
1201 " smooth_scaling: %d\n"
1202 " sharp_scaling: %d\n"
1203 " up_scaling: %d\n"
1204 " down_scaling: %d\n"
1205 " stall_support: %d\n"
1206 " output_flags: %d\n",
1207 caps->vendor_id,
1208 caps->device_id,
1209 caps->device_rev_id,
1210 caps->sdvo_version_major,
1211 caps->sdvo_version_minor,
1212 caps->sdvo_inputs_mask,
1213 caps->smooth_scaling,
1214 caps->sharp_scaling,
1215 caps->up_scaling,
1216 caps->down_scaling,
1217 caps->stall_support,
1218 caps->output_flags);
1219
1220 return true;
1221}
1222
1223/* No use! */
1224#if 0
1225struct drm_connector* psb_intel_sdvo_find(struct drm_device *dev, int sdvoB)
1226{
1227 struct drm_connector *connector = NULL;
1228 struct psb_intel_sdvo *iout = NULL;
1229 struct psb_intel_sdvo *sdvo;
1230
1231 /* find the sdvo connector */
1232 list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
1233 iout = to_psb_intel_sdvo(connector);
1234
1235 if (iout->type != INTEL_OUTPUT_SDVO)
1236 continue;
1237
1238 sdvo = iout->dev_priv;
1239
1240 if (sdvo->sdvo_reg == SDVOB && sdvoB)
1241 return connector;
1242
1243 if (sdvo->sdvo_reg == SDVOC && !sdvoB)
1244 return connector;
1245
1246 }
1247
1248 return NULL;
1249}
1250
1251int psb_intel_sdvo_supports_hotplug(struct drm_connector *connector)
1252{
1253 u8 response[2];
1254 u8 status;
1255 struct psb_intel_sdvo *psb_intel_sdvo;
1256 DRM_DEBUG_KMS("\n");
1257
1258 if (!connector)
1259 return 0;
1260
1261 psb_intel_sdvo = to_psb_intel_sdvo(connector);
1262
1263 return psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT,
1264 &response, 2) && response[0];
1265}
1266
1267void psb_intel_sdvo_set_hotplug(struct drm_connector *connector, int on)
1268{
1269 u8 response[2];
1270 u8 status;
1271 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(connector);
1272
1273 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1274 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1275
1276 if (on) {
1277 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_HOT_PLUG_SUPPORT, NULL, 0);
1278 status = psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1279
1280 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1281 } else {
1282 response[0] = 0;
1283 response[1] = 0;
1284 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_SET_ACTIVE_HOT_PLUG, &response, 2);
1285 }
1286
1287 psb_intel_sdvo_write_cmd(psb_intel_sdvo, SDVO_CMD_GET_ACTIVE_HOT_PLUG, NULL, 0);
1288 psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2);
1289}
1290#endif
1291
1292static bool
1293psb_intel_sdvo_multifunc_encoder(struct psb_intel_sdvo *psb_intel_sdvo)
1294{
1295 /* Is there more than one type of output? */
1296 int caps = psb_intel_sdvo->caps.output_flags & 0xf;
1297 return caps & -caps;
1298}
1299
1300static struct edid *
1301psb_intel_sdvo_get_edid(struct drm_connector *connector)
1302{
1303 struct psb_intel_sdvo *sdvo = intel_attached_sdvo(connector);
1304 return drm_get_edid(connector, &sdvo->ddc);
1305}
1306
1307/* Mac mini hack -- use the same DDC as the analog connector */
1308static struct edid *
1309psb_intel_sdvo_get_analog_edid(struct drm_connector *connector)
1310{
1311 struct drm_psb_private *dev_priv = connector->dev->dev_private;
1312
1313 return drm_get_edid(connector,
1314 &dev_priv->gmbus[dev_priv->crt_ddc_pin].adapter);
1315}
1316
1317static enum drm_connector_status
1318psb_intel_sdvo_hdmi_sink_detect(struct drm_connector *connector)
1319{
1320 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1321 enum drm_connector_status status;
1322 struct edid *edid;
1323
1324 edid = psb_intel_sdvo_get_edid(connector);
1325
1326 if (edid == NULL && psb_intel_sdvo_multifunc_encoder(psb_intel_sdvo)) {
1327 u8 ddc, saved_ddc = psb_intel_sdvo->ddc_bus;
1328
1329 /*
1330 * Don't use the 1 as the argument of DDC bus switch to get
1331 * the EDID. It is used for SDVO SPD ROM.
1332 */
1333 for (ddc = psb_intel_sdvo->ddc_bus >> 1; ddc > 1; ddc >>= 1) {
1334 psb_intel_sdvo->ddc_bus = ddc;
1335 edid = psb_intel_sdvo_get_edid(connector);
1336 if (edid)
1337 break;
1338 }
1339 /*
1340 * If we found the EDID on the other bus,
1341 * assume that is the correct DDC bus.
1342 */
1343 if (edid == NULL)
1344 psb_intel_sdvo->ddc_bus = saved_ddc;
1345 }
1346
1347 /*
1348 * When there is no edid and no monitor is connected with VGA
1349 * port, try to use the CRT ddc to read the EDID for DVI-connector.
1350 */
1351 if (edid == NULL)
1352 edid = psb_intel_sdvo_get_analog_edid(connector);
1353
1354 status = connector_status_unknown;
1355 if (edid != NULL) {
1356 /* DDC bus is shared, match EDID to connector type */
1357 if (edid->input & DRM_EDID_INPUT_DIGITAL) {
1358 status = connector_status_connected;
1359 if (psb_intel_sdvo->is_hdmi) {
1360 psb_intel_sdvo->has_hdmi_monitor = drm_detect_hdmi_monitor(edid);
1361 psb_intel_sdvo->has_hdmi_audio = drm_detect_monitor_audio(edid);
1362 }
1363 } else
1364 status = connector_status_disconnected;
1365 kfree(edid);
1366 }
1367
1368 if (status == connector_status_connected) {
1369 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1370 if (psb_intel_sdvo_connector->force_audio)
1371 psb_intel_sdvo->has_hdmi_audio = psb_intel_sdvo_connector->force_audio > 0;
1372 }
1373
1374 return status;
1375}
1376
1377static enum drm_connector_status
1378psb_intel_sdvo_detect(struct drm_connector *connector, bool force)
1379{
1380 uint16_t response;
1381 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1382 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1383 enum drm_connector_status ret;
1384
1385 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1386 SDVO_CMD_GET_ATTACHED_DISPLAYS, NULL, 0))
1387 return connector_status_unknown;
1388
1389 /* add 30ms delay when the output type might be TV */
1390 if (psb_intel_sdvo->caps.output_flags &
1391 (SDVO_OUTPUT_SVID0 | SDVO_OUTPUT_CVBS0))
1392 mdelay(30);
1393
1394 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &response, 2))
1395 return connector_status_unknown;
1396
1397 DRM_DEBUG_KMS("SDVO response %d %d [%x]\n",
1398 response & 0xff, response >> 8,
1399 psb_intel_sdvo_connector->output_flag);
1400
1401 if (response == 0)
1402 return connector_status_disconnected;
1403
1404 psb_intel_sdvo->attached_output = response;
1405
1406 psb_intel_sdvo->has_hdmi_monitor = false;
1407 psb_intel_sdvo->has_hdmi_audio = false;
1408
1409 if ((psb_intel_sdvo_connector->output_flag & response) == 0)
1410 ret = connector_status_disconnected;
1411 else if (IS_TMDS(psb_intel_sdvo_connector))
1412 ret = psb_intel_sdvo_hdmi_sink_detect(connector);
1413 else {
1414 struct edid *edid;
1415
1416 /* if we have an edid check it matches the connection */
1417 edid = psb_intel_sdvo_get_edid(connector);
1418 if (edid == NULL)
1419 edid = psb_intel_sdvo_get_analog_edid(connector);
1420 if (edid != NULL) {
1421 if (edid->input & DRM_EDID_INPUT_DIGITAL)
1422 ret = connector_status_disconnected;
1423 else
1424 ret = connector_status_connected;
1425 kfree(edid);
1426 } else
1427 ret = connector_status_connected;
1428 }
1429
1430 /* May update encoder flag for like clock for SDVO TV, etc.*/
1431 if (ret == connector_status_connected) {
1432 psb_intel_sdvo->is_tv = false;
1433 psb_intel_sdvo->is_lvds = false;
1434 psb_intel_sdvo->base.needs_tv_clock = false;
1435
1436 if (response & SDVO_TV_MASK) {
1437 psb_intel_sdvo->is_tv = true;
1438 psb_intel_sdvo->base.needs_tv_clock = true;
1439 }
1440 if (response & SDVO_LVDS_MASK)
1441 psb_intel_sdvo->is_lvds = psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL;
1442 }
1443
1444 return ret;
1445}
1446
1447static void psb_intel_sdvo_get_ddc_modes(struct drm_connector *connector)
1448{
1449 struct edid *edid;
1450
1451 /* set the bus switch and get the modes */
1452 edid = psb_intel_sdvo_get_edid(connector);
1453
1454 /*
1455 * Mac mini hack. On this device, the DVI-I connector shares one DDC
1456 * link between analog and digital outputs. So, if the regular SDVO
1457 * DDC fails, check to see if the analog output is disconnected, in
1458 * which case we'll look there for the digital DDC data.
1459 */
1460 if (edid == NULL)
1461 edid = psb_intel_sdvo_get_analog_edid(connector);
1462
1463 if (edid != NULL) {
1464 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1465 bool monitor_is_digital = !!(edid->input & DRM_EDID_INPUT_DIGITAL);
1466 bool connector_is_digital = !!IS_TMDS(psb_intel_sdvo_connector);
1467
1468 if (connector_is_digital == monitor_is_digital) {
1469 drm_mode_connector_update_edid_property(connector, edid);
1470 drm_add_edid_modes(connector, edid);
1471 }
1472
1473 kfree(edid);
1474 }
1475}
1476
1477/*
1478 * Set of SDVO TV modes.
1479 * Note! This is in reply order (see loop in get_tv_modes).
1480 * XXX: all 60Hz refresh?
1481 */
1482static const struct drm_display_mode sdvo_tv_modes[] = {
1483 { DRM_MODE("320x200", DRM_MODE_TYPE_DRIVER, 5815, 320, 321, 384,
1484 416, 0, 200, 201, 232, 233, 0,
1485 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1486 { DRM_MODE("320x240", DRM_MODE_TYPE_DRIVER, 6814, 320, 321, 384,
1487 416, 0, 240, 241, 272, 273, 0,
1488 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1489 { DRM_MODE("400x300", DRM_MODE_TYPE_DRIVER, 9910, 400, 401, 464,
1490 496, 0, 300, 301, 332, 333, 0,
1491 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1492 { DRM_MODE("640x350", DRM_MODE_TYPE_DRIVER, 16913, 640, 641, 704,
1493 736, 0, 350, 351, 382, 383, 0,
1494 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1495 { DRM_MODE("640x400", DRM_MODE_TYPE_DRIVER, 19121, 640, 641, 704,
1496 736, 0, 400, 401, 432, 433, 0,
1497 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1498 { DRM_MODE("640x480", DRM_MODE_TYPE_DRIVER, 22654, 640, 641, 704,
1499 736, 0, 480, 481, 512, 513, 0,
1500 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1501 { DRM_MODE("704x480", DRM_MODE_TYPE_DRIVER, 24624, 704, 705, 768,
1502 800, 0, 480, 481, 512, 513, 0,
1503 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1504 { DRM_MODE("704x576", DRM_MODE_TYPE_DRIVER, 29232, 704, 705, 768,
1505 800, 0, 576, 577, 608, 609, 0,
1506 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1507 { DRM_MODE("720x350", DRM_MODE_TYPE_DRIVER, 18751, 720, 721, 784,
1508 816, 0, 350, 351, 382, 383, 0,
1509 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1510 { DRM_MODE("720x400", DRM_MODE_TYPE_DRIVER, 21199, 720, 721, 784,
1511 816, 0, 400, 401, 432, 433, 0,
1512 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1513 { DRM_MODE("720x480", DRM_MODE_TYPE_DRIVER, 25116, 720, 721, 784,
1514 816, 0, 480, 481, 512, 513, 0,
1515 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1516 { DRM_MODE("720x540", DRM_MODE_TYPE_DRIVER, 28054, 720, 721, 784,
1517 816, 0, 540, 541, 572, 573, 0,
1518 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1519 { DRM_MODE("720x576", DRM_MODE_TYPE_DRIVER, 29816, 720, 721, 784,
1520 816, 0, 576, 577, 608, 609, 0,
1521 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1522 { DRM_MODE("768x576", DRM_MODE_TYPE_DRIVER, 31570, 768, 769, 832,
1523 864, 0, 576, 577, 608, 609, 0,
1524 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1525 { DRM_MODE("800x600", DRM_MODE_TYPE_DRIVER, 34030, 800, 801, 864,
1526 896, 0, 600, 601, 632, 633, 0,
1527 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1528 { DRM_MODE("832x624", DRM_MODE_TYPE_DRIVER, 36581, 832, 833, 896,
1529 928, 0, 624, 625, 656, 657, 0,
1530 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1531 { DRM_MODE("920x766", DRM_MODE_TYPE_DRIVER, 48707, 920, 921, 984,
1532 1016, 0, 766, 767, 798, 799, 0,
1533 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1534 { DRM_MODE("1024x768", DRM_MODE_TYPE_DRIVER, 53827, 1024, 1025, 1088,
1535 1120, 0, 768, 769, 800, 801, 0,
1536 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1537 { DRM_MODE("1280x1024", DRM_MODE_TYPE_DRIVER, 87265, 1280, 1281, 1344,
1538 1376, 0, 1024, 1025, 1056, 1057, 0,
1539 DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_PVSYNC) },
1540};
1541
1542static void psb_intel_sdvo_get_tv_modes(struct drm_connector *connector)
1543{
1544 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1545 struct psb_intel_sdvo_sdtv_resolution_request tv_res;
1546 uint32_t reply = 0, format_map = 0;
1547 int i;
1548
1549 /* Read the list of supported input resolutions for the selected TV
1550 * format.
1551 */
1552 format_map = 1 << psb_intel_sdvo->tv_format_index;
1553 memcpy(&tv_res, &format_map,
1554 min(sizeof(format_map), sizeof(struct psb_intel_sdvo_sdtv_resolution_request)));
1555
1556 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, psb_intel_sdvo->attached_output))
1557 return;
1558
1559 BUILD_BUG_ON(sizeof(tv_res) != 3);
1560 if (!psb_intel_sdvo_write_cmd(psb_intel_sdvo,
1561 SDVO_CMD_GET_SDTV_RESOLUTION_SUPPORT,
1562 &tv_res, sizeof(tv_res)))
1563 return;
1564 if (!psb_intel_sdvo_read_response(psb_intel_sdvo, &reply, 3))
1565 return;
1566
1567 for (i = 0; i < ARRAY_SIZE(sdvo_tv_modes); i++)
1568 if (reply & (1 << i)) {
1569 struct drm_display_mode *nmode;
1570 nmode = drm_mode_duplicate(connector->dev,
1571 &sdvo_tv_modes[i]);
1572 if (nmode)
1573 drm_mode_probed_add(connector, nmode);
1574 }
1575}
1576
1577static void psb_intel_sdvo_get_lvds_modes(struct drm_connector *connector)
1578{
1579 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1580 struct drm_psb_private *dev_priv = connector->dev->dev_private;
1581 struct drm_display_mode *newmode;
1582
1583 /*
1584 * Attempt to get the mode list from DDC.
1585 * Assume that the preferred modes are
1586 * arranged in priority order.
1587 */
1588 psb_intel_ddc_get_modes(connector, psb_intel_sdvo->i2c);
1589 if (list_empty(&connector->probed_modes) == false)
1590 goto end;
1591
1592 /* Fetch modes from VBT */
1593 if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
1594 newmode = drm_mode_duplicate(connector->dev,
1595 dev_priv->sdvo_lvds_vbt_mode);
1596 if (newmode != NULL) {
1597 /* Guarantee the mode is preferred */
1598 newmode->type = (DRM_MODE_TYPE_PREFERRED |
1599 DRM_MODE_TYPE_DRIVER);
1600 drm_mode_probed_add(connector, newmode);
1601 }
1602 }
1603
1604end:
1605 list_for_each_entry(newmode, &connector->probed_modes, head) {
1606 if (newmode->type & DRM_MODE_TYPE_PREFERRED) {
1607 psb_intel_sdvo->sdvo_lvds_fixed_mode =
1608 drm_mode_duplicate(connector->dev, newmode);
1609
1610 drm_mode_set_crtcinfo(psb_intel_sdvo->sdvo_lvds_fixed_mode,
1611 0);
1612
1613 psb_intel_sdvo->is_lvds = true;
1614 break;
1615 }
1616 }
1617
1618}
1619
1620static int psb_intel_sdvo_get_modes(struct drm_connector *connector)
1621{
1622 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1623
1624 if (IS_TV(psb_intel_sdvo_connector))
1625 psb_intel_sdvo_get_tv_modes(connector);
1626 else if (IS_LVDS(psb_intel_sdvo_connector))
1627 psb_intel_sdvo_get_lvds_modes(connector);
1628 else
1629 psb_intel_sdvo_get_ddc_modes(connector);
1630
1631 return !list_empty(&connector->probed_modes);
1632}
1633
1634static void psb_intel_sdvo_destroy(struct drm_connector *connector)
1635{
1636 drm_connector_unregister(connector);
1637 drm_connector_cleanup(connector);
1638 kfree(connector);
1639}
1640
1641static bool psb_intel_sdvo_detect_hdmi_audio(struct drm_connector *connector)
1642{
1643 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1644 struct edid *edid;
1645 bool has_audio = false;
1646
1647 if (!psb_intel_sdvo->is_hdmi)
1648 return false;
1649
1650 edid = psb_intel_sdvo_get_edid(connector);
1651 if (edid != NULL && edid->input & DRM_EDID_INPUT_DIGITAL)
1652 has_audio = drm_detect_monitor_audio(edid);
1653
1654 return has_audio;
1655}
1656
1657static int
1658psb_intel_sdvo_set_property(struct drm_connector *connector,
1659 struct drm_property *property,
1660 uint64_t val)
1661{
1662 struct psb_intel_sdvo *psb_intel_sdvo = intel_attached_sdvo(connector);
1663 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector = to_psb_intel_sdvo_connector(connector);
1664 struct drm_psb_private *dev_priv = connector->dev->dev_private;
1665 uint16_t temp_value;
1666 uint8_t cmd;
1667 int ret;
1668
1669 ret = drm_object_property_set_value(&connector->base, property, val);
1670 if (ret)
1671 return ret;
1672
1673 if (property == dev_priv->force_audio_property) {
1674 int i = val;
1675 bool has_audio;
1676
1677 if (i == psb_intel_sdvo_connector->force_audio)
1678 return 0;
1679
1680 psb_intel_sdvo_connector->force_audio = i;
1681
1682 if (i == 0)
1683 has_audio = psb_intel_sdvo_detect_hdmi_audio(connector);
1684 else
1685 has_audio = i > 0;
1686
1687 if (has_audio == psb_intel_sdvo->has_hdmi_audio)
1688 return 0;
1689
1690 psb_intel_sdvo->has_hdmi_audio = has_audio;
1691 goto done;
1692 }
1693
1694 if (property == dev_priv->broadcast_rgb_property) {
1695 if (val == !!psb_intel_sdvo->color_range)
1696 return 0;
1697
1698 psb_intel_sdvo->color_range = val ? SDVO_COLOR_RANGE_16_235 : 0;
1699 goto done;
1700 }
1701
1702#define CHECK_PROPERTY(name, NAME) \
1703 if (psb_intel_sdvo_connector->name == property) { \
1704 if (psb_intel_sdvo_connector->cur_##name == temp_value) return 0; \
1705 if (psb_intel_sdvo_connector->max_##name < temp_value) return -EINVAL; \
1706 cmd = SDVO_CMD_SET_##NAME; \
1707 psb_intel_sdvo_connector->cur_##name = temp_value; \
1708 goto set_value; \
1709 }
1710
1711 if (property == psb_intel_sdvo_connector->tv_format) {
1712 if (val >= TV_FORMAT_NUM)
1713 return -EINVAL;
1714
1715 if (psb_intel_sdvo->tv_format_index ==
1716 psb_intel_sdvo_connector->tv_format_supported[val])
1717 return 0;
1718
1719 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[val];
1720 goto done;
1721 } else if (IS_TV_OR_LVDS(psb_intel_sdvo_connector)) {
1722 temp_value = val;
1723 if (psb_intel_sdvo_connector->left == property) {
1724 drm_object_property_set_value(&connector->base,
1725 psb_intel_sdvo_connector->right, val);
1726 if (psb_intel_sdvo_connector->left_margin == temp_value)
1727 return 0;
1728
1729 psb_intel_sdvo_connector->left_margin = temp_value;
1730 psb_intel_sdvo_connector->right_margin = temp_value;
1731 temp_value = psb_intel_sdvo_connector->max_hscan -
1732 psb_intel_sdvo_connector->left_margin;
1733 cmd = SDVO_CMD_SET_OVERSCAN_H;
1734 goto set_value;
1735 } else if (psb_intel_sdvo_connector->right == property) {
1736 drm_object_property_set_value(&connector->base,
1737 psb_intel_sdvo_connector->left, val);
1738 if (psb_intel_sdvo_connector->right_margin == temp_value)
1739 return 0;
1740
1741 psb_intel_sdvo_connector->left_margin = temp_value;
1742 psb_intel_sdvo_connector->right_margin = temp_value;
1743 temp_value = psb_intel_sdvo_connector->max_hscan -
1744 psb_intel_sdvo_connector->left_margin;
1745 cmd = SDVO_CMD_SET_OVERSCAN_H;
1746 goto set_value;
1747 } else if (psb_intel_sdvo_connector->top == property) {
1748 drm_object_property_set_value(&connector->base,
1749 psb_intel_sdvo_connector->bottom, val);
1750 if (psb_intel_sdvo_connector->top_margin == temp_value)
1751 return 0;
1752
1753 psb_intel_sdvo_connector->top_margin = temp_value;
1754 psb_intel_sdvo_connector->bottom_margin = temp_value;
1755 temp_value = psb_intel_sdvo_connector->max_vscan -
1756 psb_intel_sdvo_connector->top_margin;
1757 cmd = SDVO_CMD_SET_OVERSCAN_V;
1758 goto set_value;
1759 } else if (psb_intel_sdvo_connector->bottom == property) {
1760 drm_object_property_set_value(&connector->base,
1761 psb_intel_sdvo_connector->top, val);
1762 if (psb_intel_sdvo_connector->bottom_margin == temp_value)
1763 return 0;
1764
1765 psb_intel_sdvo_connector->top_margin = temp_value;
1766 psb_intel_sdvo_connector->bottom_margin = temp_value;
1767 temp_value = psb_intel_sdvo_connector->max_vscan -
1768 psb_intel_sdvo_connector->top_margin;
1769 cmd = SDVO_CMD_SET_OVERSCAN_V;
1770 goto set_value;
1771 }
1772 CHECK_PROPERTY(hpos, HPOS)
1773 CHECK_PROPERTY(vpos, VPOS)
1774 CHECK_PROPERTY(saturation, SATURATION)
1775 CHECK_PROPERTY(contrast, CONTRAST)
1776 CHECK_PROPERTY(hue, HUE)
1777 CHECK_PROPERTY(brightness, BRIGHTNESS)
1778 CHECK_PROPERTY(sharpness, SHARPNESS)
1779 CHECK_PROPERTY(flicker_filter, FLICKER_FILTER)
1780 CHECK_PROPERTY(flicker_filter_2d, FLICKER_FILTER_2D)
1781 CHECK_PROPERTY(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE)
1782 CHECK_PROPERTY(tv_chroma_filter, TV_CHROMA_FILTER)
1783 CHECK_PROPERTY(tv_luma_filter, TV_LUMA_FILTER)
1784 CHECK_PROPERTY(dot_crawl, DOT_CRAWL)
1785 }
1786
1787 return -EINVAL; /* unknown property */
1788
1789set_value:
1790 if (!psb_intel_sdvo_set_value(psb_intel_sdvo, cmd, &temp_value, 2))
1791 return -EIO;
1792
1793
1794done:
1795 if (psb_intel_sdvo->base.base.crtc) {
1796 struct drm_crtc *crtc = psb_intel_sdvo->base.base.crtc;
1797 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x,
1798 crtc->y, crtc->primary->fb);
1799 }
1800
1801 return 0;
1802#undef CHECK_PROPERTY
1803}
1804
1805static void psb_intel_sdvo_save(struct drm_connector *connector)
1806{
1807 struct drm_device *dev = connector->dev;
1808 struct gma_encoder *gma_encoder = gma_attached_encoder(connector);
1809 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(&gma_encoder->base);
1810
1811 sdvo->saveSDVO = REG_READ(sdvo->sdvo_reg);
1812}
1813
1814static void psb_intel_sdvo_restore(struct drm_connector *connector)
1815{
1816 struct drm_device *dev = connector->dev;
1817 struct drm_encoder *encoder = &gma_attached_encoder(connector)->base;
1818 struct psb_intel_sdvo *sdvo = to_psb_intel_sdvo(encoder);
1819 struct drm_crtc *crtc = encoder->crtc;
1820
1821 REG_WRITE(sdvo->sdvo_reg, sdvo->saveSDVO);
1822
1823 /* Force a full mode set on the crtc. We're supposed to have the
1824 mode_config lock already. */
1825 if (connector->status == connector_status_connected)
1826 drm_crtc_helper_set_mode(crtc, &crtc->mode, crtc->x, crtc->y,
1827 NULL);
1828}
1829
1830static const struct drm_encoder_helper_funcs psb_intel_sdvo_helper_funcs = {
1831 .dpms = psb_intel_sdvo_dpms,
1832 .mode_fixup = psb_intel_sdvo_mode_fixup,
1833 .prepare = gma_encoder_prepare,
1834 .mode_set = psb_intel_sdvo_mode_set,
1835 .commit = gma_encoder_commit,
1836};
1837
1838static const struct drm_connector_funcs psb_intel_sdvo_connector_funcs = {
1839 .dpms = drm_helper_connector_dpms,
1840 .detect = psb_intel_sdvo_detect,
1841 .fill_modes = drm_helper_probe_single_connector_modes,
1842 .set_property = psb_intel_sdvo_set_property,
1843 .destroy = psb_intel_sdvo_destroy,
1844};
1845
1846static const struct drm_connector_helper_funcs psb_intel_sdvo_connector_helper_funcs = {
1847 .get_modes = psb_intel_sdvo_get_modes,
1848 .mode_valid = psb_intel_sdvo_mode_valid,
1849 .best_encoder = gma_best_encoder,
1850};
1851
1852static void psb_intel_sdvo_enc_destroy(struct drm_encoder *encoder)
1853{
1854 struct psb_intel_sdvo *psb_intel_sdvo = to_psb_intel_sdvo(encoder);
1855
1856 if (psb_intel_sdvo->sdvo_lvds_fixed_mode != NULL)
1857 drm_mode_destroy(encoder->dev,
1858 psb_intel_sdvo->sdvo_lvds_fixed_mode);
1859
1860 i2c_del_adapter(&psb_intel_sdvo->ddc);
1861 gma_encoder_destroy(encoder);
1862}
1863
1864static const struct drm_encoder_funcs psb_intel_sdvo_enc_funcs = {
1865 .destroy = psb_intel_sdvo_enc_destroy,
1866};
1867
1868static void
1869psb_intel_sdvo_guess_ddc_bus(struct psb_intel_sdvo *sdvo)
1870{
1871 /* FIXME: At the moment, ddc_bus = 2 is the only thing that works.
1872 * We need to figure out if this is true for all available poulsbo
1873 * hardware, or if we need to fiddle with the guessing code above.
1874 * The problem might go away if we can parse sdvo mappings from bios */
1875 sdvo->ddc_bus = 2;
1876
1877#if 0
1878 uint16_t mask = 0;
1879 unsigned int num_bits;
1880
1881 /* Make a mask of outputs less than or equal to our own priority in the
1882 * list.
1883 */
1884 switch (sdvo->controlled_output) {
1885 case SDVO_OUTPUT_LVDS1:
1886 mask |= SDVO_OUTPUT_LVDS1;
1887 case SDVO_OUTPUT_LVDS0:
1888 mask |= SDVO_OUTPUT_LVDS0;
1889 case SDVO_OUTPUT_TMDS1:
1890 mask |= SDVO_OUTPUT_TMDS1;
1891 case SDVO_OUTPUT_TMDS0:
1892 mask |= SDVO_OUTPUT_TMDS0;
1893 case SDVO_OUTPUT_RGB1:
1894 mask |= SDVO_OUTPUT_RGB1;
1895 case SDVO_OUTPUT_RGB0:
1896 mask |= SDVO_OUTPUT_RGB0;
1897 break;
1898 }
1899
1900 /* Count bits to find what number we are in the priority list. */
1901 mask &= sdvo->caps.output_flags;
1902 num_bits = hweight16(mask);
1903 /* If more than 3 outputs, default to DDC bus 3 for now. */
1904 if (num_bits > 3)
1905 num_bits = 3;
1906
1907 /* Corresponds to SDVO_CONTROL_BUS_DDCx */
1908 sdvo->ddc_bus = 1 << num_bits;
1909#endif
1910}
1911
1912/**
1913 * Choose the appropriate DDC bus for control bus switch command for this
1914 * SDVO output based on the controlled output.
1915 *
1916 * DDC bus number assignment is in a priority order of RGB outputs, then TMDS
1917 * outputs, then LVDS outputs.
1918 */
1919static void
1920psb_intel_sdvo_select_ddc_bus(struct drm_psb_private *dev_priv,
1921 struct psb_intel_sdvo *sdvo, u32 reg)
1922{
1923 struct sdvo_device_mapping *mapping;
1924
1925 if (IS_SDVOB(reg))
1926 mapping = &(dev_priv->sdvo_mappings[0]);
1927 else
1928 mapping = &(dev_priv->sdvo_mappings[1]);
1929
1930 if (mapping->initialized)
1931 sdvo->ddc_bus = 1 << ((mapping->ddc_pin & 0xf0) >> 4);
1932 else
1933 psb_intel_sdvo_guess_ddc_bus(sdvo);
1934}
1935
1936static void
1937psb_intel_sdvo_select_i2c_bus(struct drm_psb_private *dev_priv,
1938 struct psb_intel_sdvo *sdvo, u32 reg)
1939{
1940 struct sdvo_device_mapping *mapping;
1941 u8 pin, speed;
1942
1943 if (IS_SDVOB(reg))
1944 mapping = &dev_priv->sdvo_mappings[0];
1945 else
1946 mapping = &dev_priv->sdvo_mappings[1];
1947
1948 pin = GMBUS_PORT_DPB;
1949 speed = GMBUS_RATE_1MHZ >> 8;
1950 if (mapping->initialized) {
1951 pin = mapping->i2c_pin;
1952 speed = mapping->i2c_speed;
1953 }
1954
1955 if (pin < GMBUS_NUM_PORTS) {
1956 sdvo->i2c = &dev_priv->gmbus[pin].adapter;
1957 gma_intel_gmbus_set_speed(sdvo->i2c, speed);
1958 gma_intel_gmbus_force_bit(sdvo->i2c, true);
1959 } else
1960 sdvo->i2c = &dev_priv->gmbus[GMBUS_PORT_DPB].adapter;
1961}
1962
1963static bool
1964psb_intel_sdvo_is_hdmi_connector(struct psb_intel_sdvo *psb_intel_sdvo, int device)
1965{
1966 return psb_intel_sdvo_check_supp_encode(psb_intel_sdvo);
1967}
1968
1969static u8
1970psb_intel_sdvo_get_slave_addr(struct drm_device *dev, int sdvo_reg)
1971{
1972 struct drm_psb_private *dev_priv = dev->dev_private;
1973 struct sdvo_device_mapping *my_mapping, *other_mapping;
1974
1975 if (IS_SDVOB(sdvo_reg)) {
1976 my_mapping = &dev_priv->sdvo_mappings[0];
1977 other_mapping = &dev_priv->sdvo_mappings[1];
1978 } else {
1979 my_mapping = &dev_priv->sdvo_mappings[1];
1980 other_mapping = &dev_priv->sdvo_mappings[0];
1981 }
1982
1983 /* If the BIOS described our SDVO device, take advantage of it. */
1984 if (my_mapping->slave_addr)
1985 return my_mapping->slave_addr;
1986
1987 /* If the BIOS only described a different SDVO device, use the
1988 * address that it isn't using.
1989 */
1990 if (other_mapping->slave_addr) {
1991 if (other_mapping->slave_addr == 0x70)
1992 return 0x72;
1993 else
1994 return 0x70;
1995 }
1996
1997 /* No SDVO device info is found for another DVO port,
1998 * so use mapping assumption we had before BIOS parsing.
1999 */
2000 if (IS_SDVOB(sdvo_reg))
2001 return 0x70;
2002 else
2003 return 0x72;
2004}
2005
2006static void
2007psb_intel_sdvo_connector_init(struct psb_intel_sdvo_connector *connector,
2008 struct psb_intel_sdvo *encoder)
2009{
2010 drm_connector_init(encoder->base.base.dev,
2011 &connector->base.base,
2012 &psb_intel_sdvo_connector_funcs,
2013 connector->base.base.connector_type);
2014
2015 drm_connector_helper_add(&connector->base.base,
2016 &psb_intel_sdvo_connector_helper_funcs);
2017
2018 connector->base.base.interlace_allowed = 0;
2019 connector->base.base.doublescan_allowed = 0;
2020 connector->base.base.display_info.subpixel_order = SubPixelHorizontalRGB;
2021
2022 connector->base.save = psb_intel_sdvo_save;
2023 connector->base.restore = psb_intel_sdvo_restore;
2024
2025 gma_connector_attach_encoder(&connector->base, &encoder->base);
2026 drm_connector_register(&connector->base.base);
2027}
2028
2029static void
2030psb_intel_sdvo_add_hdmi_properties(struct psb_intel_sdvo_connector *connector)
2031{
2032 /* FIXME: We don't support HDMI at the moment
2033 struct drm_device *dev = connector->base.base.dev;
2034
2035 intel_attach_force_audio_property(&connector->base.base);
2036 intel_attach_broadcast_rgb_property(&connector->base.base);
2037 */
2038}
2039
2040static bool
2041psb_intel_sdvo_dvi_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2042{
2043 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2044 struct drm_connector *connector;
2045 struct gma_connector *intel_connector;
2046 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2047
2048 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2049 if (!psb_intel_sdvo_connector)
2050 return false;
2051
2052 if (device == 0) {
2053 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS0;
2054 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS0;
2055 } else if (device == 1) {
2056 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_TMDS1;
2057 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_TMDS1;
2058 }
2059
2060 intel_connector = &psb_intel_sdvo_connector->base;
2061 connector = &intel_connector->base;
2062 // connector->polled = DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
2063 encoder->encoder_type = DRM_MODE_ENCODER_TMDS;
2064 connector->connector_type = DRM_MODE_CONNECTOR_DVID;
2065
2066 if (psb_intel_sdvo_is_hdmi_connector(psb_intel_sdvo, device)) {
2067 connector->connector_type = DRM_MODE_CONNECTOR_HDMIA;
2068 psb_intel_sdvo->is_hdmi = true;
2069 }
2070 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2071 (1 << INTEL_ANALOG_CLONE_BIT));
2072
2073 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2074 if (psb_intel_sdvo->is_hdmi)
2075 psb_intel_sdvo_add_hdmi_properties(psb_intel_sdvo_connector);
2076
2077 return true;
2078}
2079
2080static bool
2081psb_intel_sdvo_tv_init(struct psb_intel_sdvo *psb_intel_sdvo, int type)
2082{
2083 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2084 struct drm_connector *connector;
2085 struct gma_connector *intel_connector;
2086 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2087
2088 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2089 if (!psb_intel_sdvo_connector)
2090 return false;
2091
2092 intel_connector = &psb_intel_sdvo_connector->base;
2093 connector = &intel_connector->base;
2094 encoder->encoder_type = DRM_MODE_ENCODER_TVDAC;
2095 connector->connector_type = DRM_MODE_CONNECTOR_SVIDEO;
2096
2097 psb_intel_sdvo->controlled_output |= type;
2098 psb_intel_sdvo_connector->output_flag = type;
2099
2100 psb_intel_sdvo->is_tv = true;
2101 psb_intel_sdvo->base.needs_tv_clock = true;
2102 psb_intel_sdvo->base.clone_mask = 1 << INTEL_SDVO_TV_CLONE_BIT;
2103
2104 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2105
2106 if (!psb_intel_sdvo_tv_create_property(psb_intel_sdvo, psb_intel_sdvo_connector, type))
2107 goto err;
2108
2109 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2110 goto err;
2111
2112 return true;
2113
2114err:
2115 psb_intel_sdvo_destroy(connector);
2116 return false;
2117}
2118
2119static bool
2120psb_intel_sdvo_analog_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2121{
2122 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2123 struct drm_connector *connector;
2124 struct gma_connector *intel_connector;
2125 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2126
2127 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2128 if (!psb_intel_sdvo_connector)
2129 return false;
2130
2131 intel_connector = &psb_intel_sdvo_connector->base;
2132 connector = &intel_connector->base;
2133 connector->polled = DRM_CONNECTOR_POLL_CONNECT;
2134 encoder->encoder_type = DRM_MODE_ENCODER_DAC;
2135 connector->connector_type = DRM_MODE_CONNECTOR_VGA;
2136
2137 if (device == 0) {
2138 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB0;
2139 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB0;
2140 } else if (device == 1) {
2141 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_RGB1;
2142 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_RGB1;
2143 }
2144
2145 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_SDVO_NON_TV_CLONE_BIT) |
2146 (1 << INTEL_ANALOG_CLONE_BIT));
2147
2148 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector,
2149 psb_intel_sdvo);
2150 return true;
2151}
2152
2153static bool
2154psb_intel_sdvo_lvds_init(struct psb_intel_sdvo *psb_intel_sdvo, int device)
2155{
2156 struct drm_encoder *encoder = &psb_intel_sdvo->base.base;
2157 struct drm_connector *connector;
2158 struct gma_connector *intel_connector;
2159 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector;
2160
2161 psb_intel_sdvo_connector = kzalloc(sizeof(struct psb_intel_sdvo_connector), GFP_KERNEL);
2162 if (!psb_intel_sdvo_connector)
2163 return false;
2164
2165 intel_connector = &psb_intel_sdvo_connector->base;
2166 connector = &intel_connector->base;
2167 encoder->encoder_type = DRM_MODE_ENCODER_LVDS;
2168 connector->connector_type = DRM_MODE_CONNECTOR_LVDS;
2169
2170 if (device == 0) {
2171 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS0;
2172 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS0;
2173 } else if (device == 1) {
2174 psb_intel_sdvo->controlled_output |= SDVO_OUTPUT_LVDS1;
2175 psb_intel_sdvo_connector->output_flag = SDVO_OUTPUT_LVDS1;
2176 }
2177
2178 psb_intel_sdvo->base.clone_mask = ((1 << INTEL_ANALOG_CLONE_BIT) |
2179 (1 << INTEL_SDVO_LVDS_CLONE_BIT));
2180
2181 psb_intel_sdvo_connector_init(psb_intel_sdvo_connector, psb_intel_sdvo);
2182 if (!psb_intel_sdvo_create_enhance_property(psb_intel_sdvo, psb_intel_sdvo_connector))
2183 goto err;
2184
2185 return true;
2186
2187err:
2188 psb_intel_sdvo_destroy(connector);
2189 return false;
2190}
2191
2192static bool
2193psb_intel_sdvo_output_setup(struct psb_intel_sdvo *psb_intel_sdvo, uint16_t flags)
2194{
2195 psb_intel_sdvo->is_tv = false;
2196 psb_intel_sdvo->base.needs_tv_clock = false;
2197 psb_intel_sdvo->is_lvds = false;
2198
2199 /* SDVO requires XXX1 function may not exist unless it has XXX0 function.*/
2200
2201 if (flags & SDVO_OUTPUT_TMDS0)
2202 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 0))
2203 return false;
2204
2205 if ((flags & SDVO_TMDS_MASK) == SDVO_TMDS_MASK)
2206 if (!psb_intel_sdvo_dvi_init(psb_intel_sdvo, 1))
2207 return false;
2208
2209 /* TV has no XXX1 function block */
2210 if (flags & SDVO_OUTPUT_SVID0)
2211 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_SVID0))
2212 return false;
2213
2214 if (flags & SDVO_OUTPUT_CVBS0)
2215 if (!psb_intel_sdvo_tv_init(psb_intel_sdvo, SDVO_OUTPUT_CVBS0))
2216 return false;
2217
2218 if (flags & SDVO_OUTPUT_RGB0)
2219 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 0))
2220 return false;
2221
2222 if ((flags & SDVO_RGB_MASK) == SDVO_RGB_MASK)
2223 if (!psb_intel_sdvo_analog_init(psb_intel_sdvo, 1))
2224 return false;
2225
2226 if (flags & SDVO_OUTPUT_LVDS0)
2227 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 0))
2228 return false;
2229
2230 if ((flags & SDVO_LVDS_MASK) == SDVO_LVDS_MASK)
2231 if (!psb_intel_sdvo_lvds_init(psb_intel_sdvo, 1))
2232 return false;
2233
2234 if ((flags & SDVO_OUTPUT_MASK) == 0) {
2235 unsigned char bytes[2];
2236
2237 psb_intel_sdvo->controlled_output = 0;
2238 memcpy(bytes, &psb_intel_sdvo->caps.output_flags, 2);
2239 DRM_DEBUG_KMS("%s: Unknown SDVO output type (0x%02x%02x)\n",
2240 SDVO_NAME(psb_intel_sdvo),
2241 bytes[0], bytes[1]);
2242 return false;
2243 }
2244 psb_intel_sdvo->base.crtc_mask = (1 << 0) | (1 << 1);
2245
2246 return true;
2247}
2248
2249static bool psb_intel_sdvo_tv_create_property(struct psb_intel_sdvo *psb_intel_sdvo,
2250 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2251 int type)
2252{
2253 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2254 struct psb_intel_sdvo_tv_format format;
2255 uint32_t format_map, i;
2256
2257 if (!psb_intel_sdvo_set_target_output(psb_intel_sdvo, type))
2258 return false;
2259
2260 BUILD_BUG_ON(sizeof(format) != 6);
2261 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2262 SDVO_CMD_GET_SUPPORTED_TV_FORMATS,
2263 &format, sizeof(format)))
2264 return false;
2265
2266 memcpy(&format_map, &format, min(sizeof(format_map), sizeof(format)));
2267
2268 if (format_map == 0)
2269 return false;
2270
2271 psb_intel_sdvo_connector->format_supported_num = 0;
2272 for (i = 0 ; i < TV_FORMAT_NUM; i++)
2273 if (format_map & (1 << i))
2274 psb_intel_sdvo_connector->tv_format_supported[psb_intel_sdvo_connector->format_supported_num++] = i;
2275
2276
2277 psb_intel_sdvo_connector->tv_format =
2278 drm_property_create(dev, DRM_MODE_PROP_ENUM,
2279 "mode", psb_intel_sdvo_connector->format_supported_num);
2280 if (!psb_intel_sdvo_connector->tv_format)
2281 return false;
2282
2283 for (i = 0; i < psb_intel_sdvo_connector->format_supported_num; i++)
2284 drm_property_add_enum(
2285 psb_intel_sdvo_connector->tv_format, i,
2286 i, tv_format_names[psb_intel_sdvo_connector->tv_format_supported[i]]);
2287
2288 psb_intel_sdvo->tv_format_index = psb_intel_sdvo_connector->tv_format_supported[0];
2289 drm_object_attach_property(&psb_intel_sdvo_connector->base.base.base,
2290 psb_intel_sdvo_connector->tv_format, 0);
2291 return true;
2292
2293}
2294
2295#define ENHANCEMENT(name, NAME) do { \
2296 if (enhancements.name) { \
2297 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_MAX_##NAME, &data_value, 4) || \
2298 !psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_##NAME, &response, 2)) \
2299 return false; \
2300 psb_intel_sdvo_connector->max_##name = data_value[0]; \
2301 psb_intel_sdvo_connector->cur_##name = response; \
2302 psb_intel_sdvo_connector->name = \
2303 drm_property_create_range(dev, 0, #name, 0, data_value[0]); \
2304 if (!psb_intel_sdvo_connector->name) return false; \
2305 drm_object_attach_property(&connector->base, \
2306 psb_intel_sdvo_connector->name, \
2307 psb_intel_sdvo_connector->cur_##name); \
2308 DRM_DEBUG_KMS(#name ": max %d, default %d, current %d\n", \
2309 data_value[0], data_value[1], response); \
2310 } \
2311} while(0)
2312
2313static bool
2314psb_intel_sdvo_create_enhance_property_tv(struct psb_intel_sdvo *psb_intel_sdvo,
2315 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2316 struct psb_intel_sdvo_enhancements_reply enhancements)
2317{
2318 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2319 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2320 uint16_t response, data_value[2];
2321
2322 /* when horizontal overscan is supported, Add the left/right property */
2323 if (enhancements.overscan_h) {
2324 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2325 SDVO_CMD_GET_MAX_OVERSCAN_H,
2326 &data_value, 4))
2327 return false;
2328
2329 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2330 SDVO_CMD_GET_OVERSCAN_H,
2331 &response, 2))
2332 return false;
2333
2334 psb_intel_sdvo_connector->max_hscan = data_value[0];
2335 psb_intel_sdvo_connector->left_margin = data_value[0] - response;
2336 psb_intel_sdvo_connector->right_margin = psb_intel_sdvo_connector->left_margin;
2337 psb_intel_sdvo_connector->left =
2338 drm_property_create_range(dev, 0, "left_margin", 0, data_value[0]);
2339 if (!psb_intel_sdvo_connector->left)
2340 return false;
2341
2342 drm_object_attach_property(&connector->base,
2343 psb_intel_sdvo_connector->left,
2344 psb_intel_sdvo_connector->left_margin);
2345
2346 psb_intel_sdvo_connector->right =
2347 drm_property_create_range(dev, 0, "right_margin", 0, data_value[0]);
2348 if (!psb_intel_sdvo_connector->right)
2349 return false;
2350
2351 drm_object_attach_property(&connector->base,
2352 psb_intel_sdvo_connector->right,
2353 psb_intel_sdvo_connector->right_margin);
2354 DRM_DEBUG_KMS("h_overscan: max %d, "
2355 "default %d, current %d\n",
2356 data_value[0], data_value[1], response);
2357 }
2358
2359 if (enhancements.overscan_v) {
2360 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2361 SDVO_CMD_GET_MAX_OVERSCAN_V,
2362 &data_value, 4))
2363 return false;
2364
2365 if (!psb_intel_sdvo_get_value(psb_intel_sdvo,
2366 SDVO_CMD_GET_OVERSCAN_V,
2367 &response, 2))
2368 return false;
2369
2370 psb_intel_sdvo_connector->max_vscan = data_value[0];
2371 psb_intel_sdvo_connector->top_margin = data_value[0] - response;
2372 psb_intel_sdvo_connector->bottom_margin = psb_intel_sdvo_connector->top_margin;
2373 psb_intel_sdvo_connector->top =
2374 drm_property_create_range(dev, 0, "top_margin", 0, data_value[0]);
2375 if (!psb_intel_sdvo_connector->top)
2376 return false;
2377
2378 drm_object_attach_property(&connector->base,
2379 psb_intel_sdvo_connector->top,
2380 psb_intel_sdvo_connector->top_margin);
2381
2382 psb_intel_sdvo_connector->bottom =
2383 drm_property_create_range(dev, 0, "bottom_margin", 0, data_value[0]);
2384 if (!psb_intel_sdvo_connector->bottom)
2385 return false;
2386
2387 drm_object_attach_property(&connector->base,
2388 psb_intel_sdvo_connector->bottom,
2389 psb_intel_sdvo_connector->bottom_margin);
2390 DRM_DEBUG_KMS("v_overscan: max %d, "
2391 "default %d, current %d\n",
2392 data_value[0], data_value[1], response);
2393 }
2394
2395 ENHANCEMENT(hpos, HPOS);
2396 ENHANCEMENT(vpos, VPOS);
2397 ENHANCEMENT(saturation, SATURATION);
2398 ENHANCEMENT(contrast, CONTRAST);
2399 ENHANCEMENT(hue, HUE);
2400 ENHANCEMENT(sharpness, SHARPNESS);
2401 ENHANCEMENT(brightness, BRIGHTNESS);
2402 ENHANCEMENT(flicker_filter, FLICKER_FILTER);
2403 ENHANCEMENT(flicker_filter_adaptive, FLICKER_FILTER_ADAPTIVE);
2404 ENHANCEMENT(flicker_filter_2d, FLICKER_FILTER_2D);
2405 ENHANCEMENT(tv_chroma_filter, TV_CHROMA_FILTER);
2406 ENHANCEMENT(tv_luma_filter, TV_LUMA_FILTER);
2407
2408 if (enhancements.dot_crawl) {
2409 if (!psb_intel_sdvo_get_value(psb_intel_sdvo, SDVO_CMD_GET_DOT_CRAWL, &response, 2))
2410 return false;
2411
2412 psb_intel_sdvo_connector->max_dot_crawl = 1;
2413 psb_intel_sdvo_connector->cur_dot_crawl = response & 0x1;
2414 psb_intel_sdvo_connector->dot_crawl =
2415 drm_property_create_range(dev, 0, "dot_crawl", 0, 1);
2416 if (!psb_intel_sdvo_connector->dot_crawl)
2417 return false;
2418
2419 drm_object_attach_property(&connector->base,
2420 psb_intel_sdvo_connector->dot_crawl,
2421 psb_intel_sdvo_connector->cur_dot_crawl);
2422 DRM_DEBUG_KMS("dot crawl: current %d\n", response);
2423 }
2424
2425 return true;
2426}
2427
2428static bool
2429psb_intel_sdvo_create_enhance_property_lvds(struct psb_intel_sdvo *psb_intel_sdvo,
2430 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector,
2431 struct psb_intel_sdvo_enhancements_reply enhancements)
2432{
2433 struct drm_device *dev = psb_intel_sdvo->base.base.dev;
2434 struct drm_connector *connector = &psb_intel_sdvo_connector->base.base;
2435 uint16_t response, data_value[2];
2436
2437 ENHANCEMENT(brightness, BRIGHTNESS);
2438
2439 return true;
2440}
2441#undef ENHANCEMENT
2442
2443static bool psb_intel_sdvo_create_enhance_property(struct psb_intel_sdvo *psb_intel_sdvo,
2444 struct psb_intel_sdvo_connector *psb_intel_sdvo_connector)
2445{
2446 union {
2447 struct psb_intel_sdvo_enhancements_reply reply;
2448 uint16_t response;
2449 } enhancements;
2450
2451 BUILD_BUG_ON(sizeof(enhancements) != 2);
2452
2453 enhancements.response = 0;
2454 psb_intel_sdvo_get_value(psb_intel_sdvo,
2455 SDVO_CMD_GET_SUPPORTED_ENHANCEMENTS,
2456 &enhancements, sizeof(enhancements));
2457 if (enhancements.response == 0) {
2458 DRM_DEBUG_KMS("No enhancement is supported\n");
2459 return true;
2460 }
2461
2462 if (IS_TV(psb_intel_sdvo_connector))
2463 return psb_intel_sdvo_create_enhance_property_tv(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2464 else if(IS_LVDS(psb_intel_sdvo_connector))
2465 return psb_intel_sdvo_create_enhance_property_lvds(psb_intel_sdvo, psb_intel_sdvo_connector, enhancements.reply);
2466 else
2467 return true;
2468}
2469
2470static int psb_intel_sdvo_ddc_proxy_xfer(struct i2c_adapter *adapter,
2471 struct i2c_msg *msgs,
2472 int num)
2473{
2474 struct psb_intel_sdvo *sdvo = adapter->algo_data;
2475
2476 if (!psb_intel_sdvo_set_control_bus_switch(sdvo, sdvo->ddc_bus))
2477 return -EIO;
2478
2479 return sdvo->i2c->algo->master_xfer(sdvo->i2c, msgs, num);
2480}
2481
2482static u32 psb_intel_sdvo_ddc_proxy_func(struct i2c_adapter *adapter)
2483{
2484 struct psb_intel_sdvo *sdvo = adapter->algo_data;
2485 return sdvo->i2c->algo->functionality(sdvo->i2c);
2486}
2487
2488static const struct i2c_algorithm psb_intel_sdvo_ddc_proxy = {
2489 .master_xfer = psb_intel_sdvo_ddc_proxy_xfer,
2490 .functionality = psb_intel_sdvo_ddc_proxy_func
2491};
2492
2493static bool
2494psb_intel_sdvo_init_ddc_proxy(struct psb_intel_sdvo *sdvo,
2495 struct drm_device *dev)
2496{
2497 sdvo->ddc.owner = THIS_MODULE;
2498 sdvo->ddc.class = I2C_CLASS_DDC;
2499 snprintf(sdvo->ddc.name, I2C_NAME_SIZE, "SDVO DDC proxy");
2500 sdvo->ddc.dev.parent = &dev->pdev->dev;
2501 sdvo->ddc.algo_data = sdvo;
2502 sdvo->ddc.algo = &psb_intel_sdvo_ddc_proxy;
2503
2504 return i2c_add_adapter(&sdvo->ddc) == 0;
2505}
2506
2507bool psb_intel_sdvo_init(struct drm_device *dev, int sdvo_reg)
2508{
2509 struct drm_psb_private *dev_priv = dev->dev_private;
2510 struct gma_encoder *gma_encoder;
2511 struct psb_intel_sdvo *psb_intel_sdvo;
2512 int i;
2513
2514 psb_intel_sdvo = kzalloc(sizeof(struct psb_intel_sdvo), GFP_KERNEL);
2515 if (!psb_intel_sdvo)
2516 return false;
2517
2518 psb_intel_sdvo->sdvo_reg = sdvo_reg;
2519 psb_intel_sdvo->slave_addr = psb_intel_sdvo_get_slave_addr(dev, sdvo_reg) >> 1;
2520 psb_intel_sdvo_select_i2c_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2521 if (!psb_intel_sdvo_init_ddc_proxy(psb_intel_sdvo, dev)) {
2522 kfree(psb_intel_sdvo);
2523 return false;
2524 }
2525
2526 /* encoder type will be decided later */
2527 gma_encoder = &psb_intel_sdvo->base;
2528 gma_encoder->type = INTEL_OUTPUT_SDVO;
2529 drm_encoder_init(dev, &gma_encoder->base, &psb_intel_sdvo_enc_funcs,
2530 0, NULL);
2531
2532 /* Read the regs to test if we can talk to the device */
2533 for (i = 0; i < 0x40; i++) {
2534 u8 byte;
2535
2536 if (!psb_intel_sdvo_read_byte(psb_intel_sdvo, i, &byte)) {
2537 DRM_DEBUG_KMS("No SDVO device found on SDVO%c\n",
2538 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2539 goto err;
2540 }
2541 }
2542
2543 if (IS_SDVOB(sdvo_reg))
2544 dev_priv->hotplug_supported_mask |= SDVOB_HOTPLUG_INT_STATUS;
2545 else
2546 dev_priv->hotplug_supported_mask |= SDVOC_HOTPLUG_INT_STATUS;
2547
2548 drm_encoder_helper_add(&gma_encoder->base, &psb_intel_sdvo_helper_funcs);
2549
2550 /* In default case sdvo lvds is false */
2551 if (!psb_intel_sdvo_get_capabilities(psb_intel_sdvo, &psb_intel_sdvo->caps))
2552 goto err;
2553
2554 if (psb_intel_sdvo_output_setup(psb_intel_sdvo,
2555 psb_intel_sdvo->caps.output_flags) != true) {
2556 DRM_DEBUG_KMS("SDVO output failed to setup on SDVO%c\n",
2557 IS_SDVOB(sdvo_reg) ? 'B' : 'C');
2558 goto err;
2559 }
2560
2561 psb_intel_sdvo_select_ddc_bus(dev_priv, psb_intel_sdvo, sdvo_reg);
2562
2563 /* Set the input timing to the screen. Assume always input 0. */
2564 if (!psb_intel_sdvo_set_target_input(psb_intel_sdvo))
2565 goto err;
2566
2567 if (!psb_intel_sdvo_get_input_pixel_clock_range(psb_intel_sdvo,
2568 &psb_intel_sdvo->pixel_clock_min,
2569 &psb_intel_sdvo->pixel_clock_max))
2570 goto err;
2571
2572 DRM_DEBUG_KMS("%s device VID/DID: %02X:%02X.%02X, "
2573 "clock range %dMHz - %dMHz, "
2574 "input 1: %c, input 2: %c, "
2575 "output 1: %c, output 2: %c\n",
2576 SDVO_NAME(psb_intel_sdvo),
2577 psb_intel_sdvo->caps.vendor_id, psb_intel_sdvo->caps.device_id,
2578 psb_intel_sdvo->caps.device_rev_id,
2579 psb_intel_sdvo->pixel_clock_min / 1000,
2580 psb_intel_sdvo->pixel_clock_max / 1000,
2581 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x1) ? 'Y' : 'N',
2582 (psb_intel_sdvo->caps.sdvo_inputs_mask & 0x2) ? 'Y' : 'N',
2583 /* check currently supported outputs */
2584 psb_intel_sdvo->caps.output_flags &
2585 (SDVO_OUTPUT_TMDS0 | SDVO_OUTPUT_RGB0) ? 'Y' : 'N',
2586 psb_intel_sdvo->caps.output_flags &
2587 (SDVO_OUTPUT_TMDS1 | SDVO_OUTPUT_RGB1) ? 'Y' : 'N');
2588 return true;
2589
2590err:
2591 drm_encoder_cleanup(&gma_encoder->base);
2592 i2c_del_adapter(&psb_intel_sdvo->ddc);
2593 kfree(psb_intel_sdvo);
2594
2595 return false;
2596}