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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * arch/sh/kernel/cpu/sh3/clock-sh3.c
4 *
5 * Generic SH-3 support for the clock framework
6 *
7 * Copyright (C) 2005 Paul Mundt
8 *
9 * FRQCR parsing hacked out of arch/sh/kernel/time.c
10 *
11 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
12 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
13 * Copyright (C) 2002, 2003, 2004 Paul Mundt
14 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
15 */
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <asm/clock.h>
19#include <asm/freq.h>
20#include <asm/io.h>
21
22static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
23static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 };
24static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
25
26static void master_clk_init(struct clk *clk)
27{
28 int frqcr = __raw_readw(FRQCR);
29 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
30
31 clk->rate *= pfc_divisors[idx];
32}
33
34static struct sh_clk_ops sh3_master_clk_ops = {
35 .init = master_clk_init,
36};
37
38static unsigned long module_clk_recalc(struct clk *clk)
39{
40 int frqcr = __raw_readw(FRQCR);
41 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
42
43 return clk->parent->rate / pfc_divisors[idx];
44}
45
46static struct sh_clk_ops sh3_module_clk_ops = {
47 .recalc = module_clk_recalc,
48};
49
50static unsigned long bus_clk_recalc(struct clk *clk)
51{
52 int frqcr = __raw_readw(FRQCR);
53 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
54
55 return clk->parent->rate / stc_multipliers[idx];
56}
57
58static struct sh_clk_ops sh3_bus_clk_ops = {
59 .recalc = bus_clk_recalc,
60};
61
62static unsigned long cpu_clk_recalc(struct clk *clk)
63{
64 int frqcr = __raw_readw(FRQCR);
65 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
66
67 return clk->parent->rate / ifc_divisors[idx];
68}
69
70static struct sh_clk_ops sh3_cpu_clk_ops = {
71 .recalc = cpu_clk_recalc,
72};
73
74static struct sh_clk_ops *sh3_clk_ops[] = {
75 &sh3_master_clk_ops,
76 &sh3_module_clk_ops,
77 &sh3_bus_clk_ops,
78 &sh3_cpu_clk_ops,
79};
80
81void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
82{
83 if (idx < ARRAY_SIZE(sh3_clk_ops))
84 *ops = sh3_clk_ops[idx];
85}
86
1/*
2 * arch/sh/kernel/cpu/sh3/clock-sh3.c
3 *
4 * Generic SH-3 support for the clock framework
5 *
6 * Copyright (C) 2005 Paul Mundt
7 *
8 * FRQCR parsing hacked out of arch/sh/kernel/time.c
9 *
10 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
11 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
12 * Copyright (C) 2002, 2003, 2004 Paul Mundt
13 * Copyright (C) 2002 M. R. Brown <mrbrown@linux-sh.org>
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file "COPYING" in the main directory of this archive
17 * for more details.
18 */
19#include <linux/init.h>
20#include <linux/kernel.h>
21#include <asm/clock.h>
22#include <asm/freq.h>
23#include <asm/io.h>
24
25static int stc_multipliers[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
26static int ifc_divisors[] = { 1, 2, 3, 4, 1, 1, 1, 1 };
27static int pfc_divisors[] = { 1, 2, 3, 4, 6, 1, 1, 1 };
28
29static void master_clk_init(struct clk *clk)
30{
31 int frqcr = __raw_readw(FRQCR);
32 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
33
34 clk->rate *= pfc_divisors[idx];
35}
36
37static struct sh_clk_ops sh3_master_clk_ops = {
38 .init = master_clk_init,
39};
40
41static unsigned long module_clk_recalc(struct clk *clk)
42{
43 int frqcr = __raw_readw(FRQCR);
44 int idx = ((frqcr & 0x2000) >> 11) | (frqcr & 0x0003);
45
46 return clk->parent->rate / pfc_divisors[idx];
47}
48
49static struct sh_clk_ops sh3_module_clk_ops = {
50 .recalc = module_clk_recalc,
51};
52
53static unsigned long bus_clk_recalc(struct clk *clk)
54{
55 int frqcr = __raw_readw(FRQCR);
56 int idx = ((frqcr & 0x8000) >> 13) | ((frqcr & 0x0030) >> 4);
57
58 return clk->parent->rate / stc_multipliers[idx];
59}
60
61static struct sh_clk_ops sh3_bus_clk_ops = {
62 .recalc = bus_clk_recalc,
63};
64
65static unsigned long cpu_clk_recalc(struct clk *clk)
66{
67 int frqcr = __raw_readw(FRQCR);
68 int idx = ((frqcr & 0x4000) >> 12) | ((frqcr & 0x000c) >> 2);
69
70 return clk->parent->rate / ifc_divisors[idx];
71}
72
73static struct sh_clk_ops sh3_cpu_clk_ops = {
74 .recalc = cpu_clk_recalc,
75};
76
77static struct sh_clk_ops *sh3_clk_ops[] = {
78 &sh3_master_clk_ops,
79 &sh3_module_clk_ops,
80 &sh3_bus_clk_ops,
81 &sh3_cpu_clk_ops,
82};
83
84void __init arch_init_clk_ops(struct sh_clk_ops **ops, int idx)
85{
86 if (idx < ARRAY_SIZE(sh3_clk_ops))
87 *ops = sh3_clk_ops[idx];
88}
89