1/*
  2 * Copyright 2014 Chen-Yu Tsai
  3 *
  4 * Chen-Yu Tsai <wens@csie.org>
  5 *
  6 * This file is dual-licensed: you can use it either under the terms
  7 * of the GPL or the X11 license, at your option. Note that this dual
  8 * licensing only applies to this file, and not this project as a
  9 * whole.
 10 *
 11 *  a) This file is free software; you can redistribute it and/or
 12 *     modify it under the terms of the GNU General Public License as
 13 *     published by the Free Software Foundation; either version 2 of the
 14 *     License, or (at your option) any later version.
 15 *
 16 *     This file is distributed in the hope that it will be useful,
 17 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 18 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 19 *     GNU General Public License for more details.
 20 *
 21 * Or, alternatively,
 22 *
 23 *  b) Permission is hereby granted, free of charge, to any person
 24 *     obtaining a copy of this software and associated documentation
 25 *     files (the "Software"), to deal in the Software without
 26 *     restriction, including without limitation the rights to use,
 27 *     copy, modify, merge, publish, distribute, sublicense, and/or
 28 *     sell copies of the Software, and to permit persons to whom the
 29 *     Software is furnished to do so, subject to the following
 30 *     conditions:
 31 *
 32 *     The above copyright notice and this permission notice shall be
 33 *     included in all copies or substantial portions of the Software.
 34 *
 35 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 36 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 37 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 38 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 39 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 40 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 41 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 42 *     OTHER DEALINGS IN THE SOFTWARE.
 43 */
 44
 45#include "sun8i-a23-a33.dtsi"
 46
 47/ {
 48	cpus {
 49		cpu@2 {
 50			compatible = "arm,cortex-a7";
 51			device_type = "cpu";
 52			reg = <2>;
 53		};
 54
 55		cpu@3 {
 56			compatible = "arm,cortex-a7";
 57			device_type = "cpu";
 58			reg = <3>;
 59		};
 60	};
 61
 62	memory {
 63		reg = <0x40000000 0x80000000>;
 64	};
 65
 66	clocks {
 67		/* Dummy clock for pll11 (DDR1) until actually implemented */
 68		pll11: pll11_clk {
 69			#clock-cells = <0>;
 70			compatible = "fixed-clock";
 71			clock-frequency = <0>;
 72			clock-output-names = "pll11";
 73		};
 74
 75		ahb1_gates: clk@01c20060 {
 76			#clock-cells = <1>;
 77			compatible = "allwinner,sun8i-a33-ahb1-gates-clk";
 78			reg = <0x01c20060 0x8>;
 79			clocks = <&ahb1>;
 80			clock-indices = <1>, <5>,
 81				        <6>, <8>, <9>,
 82				        <10>, <13>, <14>,
 83					<19>, <20>,
 84					<21>, <24>, <26>,
 85					<29>, <32>, <36>,
 86					<40>, <44>, <46>,
 87					<52>, <53>,
 88					<54>, <57>,
 89					<58>;
 90			clock-output-names = "ahb1_mipidsi", "ahb1_ss",
 91					"ahb1_dma","ahb1_mmc0", "ahb1_mmc1",
 92					"ahb1_mmc2", "ahb1_nand", "ahb1_sdram",
 93					"ahb1_hstimer", "ahb1_spi0",
 94					"ahb1_spi1", "ahb1_otg", "ahb1_ehci",
 95					"ahb1_ohci", "ahb1_ve", "ahb1_lcd",
 96					"ahb1_csi", "ahb1_be",	"ahb1_fe",
 97					"ahb1_gpu", "ahb1_msgbox",
 98					"ahb1_spinlock", "ahb1_drc",
 99					"ahb1_sat";
100		};
101
102		ss_clk: clk@01c2009c {
103			#clock-cells = <0>;
104			compatible = "allwinner,sun4i-a10-mod0-clk";
105			reg = <0x01c2009c 0x4>;
106			clocks = <&osc24M>, <&pll6 0>;
107			clock-output-names = "ss";
108		};
109
110		mbus_clk: clk@01c2015c {
111			#clock-cells = <0>;
112			compatible = "allwinner,sun8i-a23-mbus-clk";
113			reg = <0x01c2015c 0x4>;
114			clocks = <&osc24M>, <&pll6 1>, <&pll5>, <&pll11>;
115			clock-output-names = "mbus";
116		};
117	};
118
119	soc@01c00000 {
120		crypto: crypto-engine@01c15000 {
121			compatible = "allwinner,sun4i-a10-crypto";
122			reg = <0x01c15000 0x1000>;
123			interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
124			clocks = <&ahb1_gates 5>, <&ss_clk>;
125			clock-names = "ahb", "mod";
126			resets = <&ahb1_rst 5>;
127			reset-names = "ahb";
128		};
129
130		usb_otg: usb@01c19000 {
131			compatible = "allwinner,sun8i-a33-musb";
132			reg = <0x01c19000 0x0400>;
133			clocks = <&ahb1_gates 24>;
134			resets = <&ahb1_rst 24>;
135			interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
136			interrupt-names = "mc";
137			phys = <&usbphy 0>;
138			phy-names = "usb";
139			extcon = <&usbphy 0>;
140			status = "disabled";
141		};
142
143		usbphy: phy@01c19400 {
144			compatible = "allwinner,sun8i-a33-usb-phy";
145			reg = <0x01c19400 0x14>,
146			      <0x01c1a800 0x4>;
147			reg-names = "phy_ctrl",
148				    "pmu1";
149			clocks = <&usb_clk 8>,
150				 <&usb_clk 9>;
151			clock-names = "usb0_phy",
152				      "usb1_phy";
153			resets = <&usb_clk 0>,
154				 <&usb_clk 1>;
155			reset-names = "usb0_reset",
156				      "usb1_reset";
157			status = "disabled";
158			#phy-cells = <1>;
159		};
160	};
161};
162
163&pio {
164	compatible = "allwinner,sun8i-a33-pinctrl";
165	interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>,
166		     <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
167
168	uart0_pins_b: uart0@1 {
169		allwinner,pins = "PB0", "PB1";
170		allwinner,function = "uart0";
171		allwinner,drive = <SUN4I_PINCTRL_10_MA>;
172		allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
173	};
174
175};