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1/*
2 * Copyright 2012 ST-Ericsson AB
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include "ste-dbx5x0.dtsi"
13#include "ste-href-ab8500.dtsi"
14#include "ste-href.dtsi"
15
16/ {
17 model = "ST-Ericsson HREF (v60+) platform with Device Tree";
18 compatible = "st-ericsson,hrefv60+", "st-ericsson,u8500";
19
20 soc {
21 // External Micro SD slot
22 sdi0_per1@80126000 {
23 cd-gpios = <&gpio2 31 0x4>; // 95
24 };
25
26 vmmci: regulator-gpio {
27 gpios = <&gpio0 5 0x4>;
28 enable-gpio = <&gpio5 9 0x4>;
29 };
30
31 pinctrl {
32 /*
33 * Set this up using hogs, as time goes by and as seems fit, these
34 * can be moved over to being controlled by respective device.
35 */
36 pinctrl-names = "default";
37 pinctrl-0 = <&ipgpio_hrefv60_mode>,
38 <&etm_hrefv60_mode>,
39 <&nahj_hrefv60_mode>,
40 <&nfc_hrefv60_mode>,
41 <&force_hrefv60_mode>,
42 <&dipro_hrefv60_mode>,
43 <&vaudio_hf_hrefv60_mode>,
44 <&gbf_hrefv60_mode>,
45 <&hdtv_hrefv60_mode>,
46 <&gpios_hrefv60_mode>;
47
48 sdi0 {
49 sdi0_default_mode: sdi0_default {
50 /* SD card detect GPIO pin, extend default state */
51 default_hrefv60_cfg1 {
52 pins = "GPIO95_E8";
53 ste,config = <&gpio_in_pu>;
54 };
55 /* VMMCI level-shifter enable */
56 default_hrefv60_cfg2 {
57 pins = "GPIO169_D22";
58 ste,config = <&gpio_out_hi>;
59 };
60 /* VMMCI level-shifter voltage select */
61 default_hrefv60_cfg3 {
62 pins = "GPIO5_AG6";
63 ste,config = <&gpio_out_hi>;
64 };
65 };
66 };
67 ipgpio {
68 /*
69 * XENON Flashgun on image processor GPIO (controlled from image
70 * processor firmware), mux in these image processor GPIO lines 0
71 * (XENON_FLASH_ID), 1 (XENON_READY) and there is an assistant
72 * LED on IP GPIO 4 (XENON_EN2) on altfunction C, that need bias
73 * from GPIO21 so pull up 0, 1 and drive 4 and GPIO21 low as output.
74 */
75 ipgpio_hrefv60_mode: ipgpio_hrefv60 {
76 hrefv60_mux {
77 function = "ipgpio";
78 groups = "ipgpio0_c_1", "ipgpio1_c_1", "ipgpio4_c_1";
79 };
80 hrefv60_cfg1 {
81 pins = "GPIO6_AF6", "GPIO7_AG5";
82 ste,config = <&in_pu>;
83 };
84 hrefv60_cfg2 {
85 pins = "GPIO21_AB3";
86 ste,config = <&gpio_out_lo>;
87 };
88 hrefv60_cfg3 {
89 pins = "GPIO64_F3";
90 ste,config = <&out_lo>;
91 };
92 };
93 };
94 etm {
95 /*
96 * Drive D19-D23 for the ETM PTM trace interface low,
97 * (presumably pins are unconnected therefore grounded here,
98 * the "other alt C1" setting enables these pins)
99 */
100 etm_hrefv60_mode: etm_hrefv60 {
101 hrefv60_cfg1 {
102 pins =
103 "GPIO70_G5",
104 "GPIO71_G4",
105 "GPIO72_H4",
106 "GPIO73_H3",
107 "GPIO74_J3";
108 ste,config = <&gpio_out_lo>;
109 };
110 };
111 };
112 nahj {
113 nahj_hrefv60_mode: nahj_hrefv60 {
114 /* NAHJ CTRL on GPIO76 to low, CTRL_INV on GPIO216 to high */
115 hrefv60_cfg1 {
116 pins = "GPIO76_J2";
117 ste,config = <&gpio_out_lo>;
118 };
119 hrefv60_cfg2 {
120 pins = "GPIO216_AG12";
121 ste,config = <&gpio_out_hi>;
122 };
123 };
124 };
125 nfc {
126 nfc_hrefv60_mode: nfc_hrefv60 {
127 /* NFC ENA and RESET to low, pulldown IRQ line */
128 hrefv60_cfg1 {
129 pins =
130 "GPIO77_H1", /* NFC_ENA */
131 "GPIO142_C11"; /* NFC_RESET */
132 ste,config = <&gpio_out_lo>;
133 };
134 hrefv60_cfg2 {
135 pins = "GPIO144_B13"; /* NFC_IRQ */
136 ste,config = <&gpio_in_pd>;
137 };
138 };
139 };
140 force {
141 force_hrefv60_mode: force_hrefv60 {
142 hrefv60_cfg1 {
143 pins = "GPIO91_B6"; /* FORCE_SENSING_INT */
144 ste,config = <&gpio_in_pu>;
145 };
146 hrefv60_cfg2 {
147 pins =
148 "GPIO92_D6", /* FORCE_SENSING_RST */
149 "GPIO97_D9"; /* FORCE_SENSING_WU */
150 ste,config = <&gpio_out_lo>;
151 };
152 };
153 };
154 dipro {
155 dipro_hrefv60_mode: dipro_hrefv60 {
156 hrefv60_cfg1 {
157 pins = "GPIO139_C9"; /* DIPRO_INT */
158 ste,config = <&gpio_in_pu>;
159 };
160 };
161 };
162 vaudio_hf {
163 vaudio_hf_hrefv60_mode: vaudio_hf_hrefv60 {
164 /* Audio Amplifier HF enable GPIO */
165 hrefv60_cfg1 {
166 pins = "GPIO149_B14"; /* VAUDIO_HF_EN, enable MAX8968 */
167 ste,config = <&gpio_out_hi>;
168 };
169 };
170 };
171 gbf {
172 gbf_hrefv60_mode: gbf_hrefv60 {
173 /*
174 * GBF (GPS, Bluetooth, FM-radio) interface,
175 * pull low to reset state
176 */
177 hrefv60_cfg1 {
178 pins = "GPIO171_D23"; /* GBF_ENA_RESET */
179 ste,config = <&gpio_out_lo>;
180 };
181 };
182 };
183 hdtv {
184 hdtv_hrefv60_mode: hdtv_hrefv60 {
185 /* MSP : HDTV INTERFACE GPIO line */
186 hrefv60_cfg1 {
187 pins = "GPIO192_AJ27";
188 ste,config = <&gpio_in_pd>;
189 };
190 };
191 };
192 mcde {
193 lcd_hrefv60_mode: lcd_hrefv60 {
194 /*
195 * Display Interface 1 uses GPIO 65 for RST (reset).
196 * Display Interface 2 uses GPIO 66 for RST (reset).
197 * Drive DISP1 reset high (not reset), driver DISP2 reset low (reset)
198 */
199 hrefv60_cfg1 {
200 pins ="GPIO65_F1";
201 ste,config = <&gpio_out_hi>;
202 };
203 hrefv60_cfg2 {
204 pins ="GPIO66_G3";
205 ste,config = <&gpio_out_lo>;
206 };
207 };
208 };
209 gpios {
210 /* Dangling GPIO pins */
211 gpios_hrefv60_mode: gpios_hrefv60 {
212 default_cfg1 {
213 /* Normally UART1 RXD, now dangling */
214 pins = "GPIO4_AH6";
215 ste,config = <&in_pu>;
216 };
217 };
218 };
219 };
220 };
221};