1/*
  2 * Common device tree for IGEP boards based on AM/DM37x
  3 *
  4 * Copyright (C) 2012 Javier Martinez Canillas <javier@osg.samsung.com>
  5 * Copyright (C) 2012 Enric Balletbo i Serra <eballetbo@gmail.com>
  6 *
  7 * This program is free software; you can redistribute it and/or modify
  8 * it under the terms of the GNU General Public License version 2 as
  9 * published by the Free Software Foundation.
 10 */
 11/dts-v1/;
 12
 13#include "omap36xx.dtsi"
 14
 15/ {
 16	memory {
 17		device_type = "memory";
 18		reg = <0x80000000 0x20000000>; /* 512 MB */
 19	};
 20
 21	chosen {
 22		stdout-path = &uart3;
 23	};
 24
 25	sound {
 26		compatible = "ti,omap-twl4030";
 27		ti,model = "igep2";
 28		ti,mcbsp = <&mcbsp2>;
 29	};
 30
 31	vdd33: regulator-vdd33 {
 32		compatible = "regulator-fixed";
 33		regulator-name = "vdd33";
 34		regulator-always-on;
 35	};
 36
 37};
 38
 39&omap3_pmx_core {
 40	uart1_pins: pinmux_uart1_pins {
 41		pinctrl-single,pins = <
 42			OMAP3_CORE1_IOPAD(0x2182, PIN_INPUT | MUX_MODE0)	/* uart1_rx.uart1_rx */
 43			OMAP3_CORE1_IOPAD(0x217c, PIN_OUTPUT | MUX_MODE0)	/* uart1_tx.uart1_tx */
 44		>;
 45	};
 46
 47	uart3_pins: pinmux_uart3_pins {
 48		pinctrl-single,pins = <
 49			OMAP3_CORE1_IOPAD(0x219e, PIN_INPUT | MUX_MODE0)	/* uart3_rx.uart3_rx */
 50			OMAP3_CORE1_IOPAD(0x21a0, PIN_OUTPUT | MUX_MODE0)	/* uart3_tx.uart3_tx */
 51		>;
 52	};
 53
 54	mcbsp2_pins: pinmux_mcbsp2_pins {
 55		pinctrl-single,pins = <
 56			OMAP3_CORE1_IOPAD(0x213c, PIN_INPUT | MUX_MODE0)	/* mcbsp2_fsx.mcbsp2_fsx */
 57			OMAP3_CORE1_IOPAD(0x213e, PIN_INPUT | MUX_MODE0)	/* mcbsp2_clkx.mcbsp2_clkx */
 58			OMAP3_CORE1_IOPAD(0x2140, PIN_INPUT | MUX_MODE0)	/* mcbsp2_dr.mcbsp2.dr */
 59			OMAP3_CORE1_IOPAD(0x2142, PIN_OUTPUT | MUX_MODE0)	/* mcbsp2_dx.mcbsp2_dx */
 60		>;
 61	};
 62
 63	mmc1_pins: pinmux_mmc1_pins {
 64		pinctrl-single,pins = <
 65			OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_clk.sdmmc1_clk */
 66			OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_cmd.sdmmc1_cmd */
 67			OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */
 68			OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat1.sdmmc1_dat1 */
 69			OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat2.sdmmc1_dat2 */
 70			OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc1_dat3.sdmmc1_dat3 */
 71		>;
 72	};
 73
 74	mmc2_pins: pinmux_mmc2_pins {
 75		pinctrl-single,pins = <
 76			OMAP3_CORE1_IOPAD(0x2158, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_clk.sdmmc2_clk */
 77			OMAP3_CORE1_IOPAD(0x215a, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_cmd.sdmmc2_cmd */
 78			OMAP3_CORE1_IOPAD(0x215c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc2_dat0.sdmmc2_dat0 */
 79			OMAP3_CORE1_IOPAD(0x215e, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat1.sdmmc2_dat1 */
 80			OMAP3_CORE1_IOPAD(0x2160, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat2.sdmmc2_dat2 */
 81			OMAP3_CORE1_IOPAD(0x2162, PIN_INPUT_PULLUP | MUX_MODE0)	/* sdmmc2_dat3.sdmmc2_dat3 */
 82		>;
 83	};
 84
 85	i2c1_pins: pinmux_i2c1_pins {
 86		pinctrl-single,pins = <
 87			OMAP3_CORE1_IOPAD(0x21ba, PIN_INPUT | MUX_MODE0)	/* i2c1_scl.i2c1_scl */
 88			OMAP3_CORE1_IOPAD(0x21bc, PIN_INPUT | MUX_MODE0)	/* i2c1_sda.i2c1_sda */
 89		>;
 90	};
 91
 92	i2c3_pins: pinmux_i2c3_pins {
 93		pinctrl-single,pins = <
 94			OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT | MUX_MODE0)	/* i2c3_scl.i2c3_scl */
 95			OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT | MUX_MODE0)	/* i2c3_sda.i2c3_sda */
 96		>;
 97	};
 98};
 99
100&gpmc {
101	nand@0,0 {
102		compatible = "ti,omap2-nand";
103		reg = <0 0 4>; /* CS0, offset 0, IO size 4 */
104		interrupt-parent = <&gpmc>;
105		interrupts = <0 IRQ_TYPE_NONE>, /* fifoevent */
106			     <1 IRQ_TYPE_NONE>;	/* termcount */
107		linux,mtd-name= "micron,mt29c4g96maz";
108		nand-bus-width = <16>;
109		gpmc,device-width = <2>;
110		ti,nand-ecc-opt = "bch8";
111
112		gpmc,sync-clk-ps = <0>;
113		gpmc,cs-on-ns = <0>;
114		gpmc,cs-rd-off-ns = <44>;
115		gpmc,cs-wr-off-ns = <44>;
116		gpmc,adv-on-ns = <6>;
117		gpmc,adv-rd-off-ns = <34>;
118		gpmc,adv-wr-off-ns = <44>;
119		gpmc,we-off-ns = <40>;
120		gpmc,oe-off-ns = <54>;
121		gpmc,access-ns = <64>;
122		gpmc,rd-cycle-ns = <82>;
123		gpmc,wr-cycle-ns = <82>;
124		gpmc,wr-access-ns = <40>;
125		gpmc,wr-data-mux-bus-ns = <0>;
126
127		#address-cells = <1>;
128		#size-cells = <1>;
129
130		partition@0 {
131			label = "SPL";
132			reg = <0 0x100000>;
133		};
134		partition@80000 {
135			label = "U-Boot";
136			reg = <0x100000 0x180000>;
137		};
138		partition@1c0000 {
139			label = "Environment";
140			reg = <0x280000 0x100000>;
141		};
142		partition@280000 {
143			label = "Kernel";
144			reg = <0x380000 0x300000>;
145		};
146		partition@780000 {
147			label = "Filesystem";
148			reg = <0x680000 0x1f980000>;
149		};
150	};
151};
152
153&i2c1 {
154	pinctrl-names = "default";
155	pinctrl-0 = <&i2c1_pins>;
156	clock-frequency = <2600000>;
157
158	twl: twl@48 {
159		reg = <0x48>;
160		interrupts = <7>; /* SYS_NIRQ cascaded to intc */
161		interrupt-parent = <&intc>;
162
163		twl_audio: audio {
164			compatible = "ti,twl4030-audio";
165			codec {
166			};
167		};
168	};
169};
170
171#include "twl4030.dtsi"
172#include "twl4030_omap3.dtsi"
173
174&i2c3 {
175	pinctrl-names = "default";
176	pinctrl-0 = <&i2c3_pins>;
177};
178
179&mcbsp2 {
180	pinctrl-names = "default";
181	pinctrl-0 = <&mcbsp2_pins>;
182	status = "okay";
183};
184
185&mmc1 {
186	pinctrl-names = "default";
187	pinctrl-0 = <&mmc1_pins>;
188	vmmc-supply = <&vmmc1>;
189	vmmc_aux-supply = <&vsim>;
190	bus-width = <4>;
191};
192
193&mmc3 {
194	status = "disabled";
195};
196
197&uart1 {
198	pinctrl-names = "default";
199	pinctrl-0 = <&uart1_pins>;
200};
201
202&uart3 {
203	pinctrl-names = "default";
204	pinctrl-0 = <&uart3_pins>;
205};
206
207&twl_gpio {
208	ti,use-leds;
209};
210
211&usb_otg_hs {
212	interface-type = <0>;
213	usb-phy = <&usb2_phy>;
214	phys = <&usb2_phy>;
215	phy-names = "usb2-phy";
216	mode = <3>;
217	power = <50>;
218};