1/*
  2 * Copyright 2014 Carlo Caione <carlo@caione.org>
  3 *
  4 * This file is dual-licensed: you can use it either under the terms
  5 * of the GPL or the X11 license, at your option. Note that this dual
  6 * licensing only applies to this file, and not this project as a
  7 * whole.
  8 *
  9 *  a) This library is free software; you can redistribute it and/or
 10 *     modify it under the terms of the GNU General Public License as
 11 *     published by the Free Software Foundation; either version 2 of the
 12 *     License, or (at your option) any later version.
 13 *
 14 *     This library is distributed in the hope that it will be useful,
 15 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 16 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 17 *     GNU General Public License for more details.
 18 *
 19 *     You should have received a copy of the GNU General Public
 20 *     License along with this library; if not, write to the Free
 21 *     Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
 22 *     MA 02110-1301 USA
 23 *
 24 * Or, alternatively,
 25 *
 26 *  b) Permission is hereby granted, free of charge, to any person
 27 *     obtaining a copy of this software and associated documentation
 28 *     files (the "Software"), to deal in the Software without
 29 *     restriction, including without limitation the rights to use,
 30 *     copy, modify, merge, publish, distribute, sublicense, and/or
 31 *     sell copies of the Software, and to permit persons to whom the
 32 *     Software is furnished to do so, subject to the following
 33 *     conditions:
 34 *
 35 *     The above copyright notice and this permission notice shall be
 36 *     included in all copies or substantial portions of the Software.
 37 *
 38 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 39 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 40 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 41 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 42 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 43 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 44 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 45 *     OTHER DEALINGS IN THE SOFTWARE.
 46 */
 47
 48/include/ "skeleton.dtsi"
 49
 50/ {
 51	interrupt-parent = <&gic>;
 52
 53	L2: l2-cache-controller@c4200000 {
 54		compatible = "arm,pl310-cache";
 55		reg = <0xc4200000 0x1000>;
 56		cache-unified;
 57		cache-level = <2>;
 58	};
 59
 60	gic: interrupt-controller@c4301000 {
 61		compatible = "arm,cortex-a9-gic";
 62		reg = <0xc4301000 0x1000>,
 63		      <0xc4300100 0x0100>;
 64		interrupt-controller;
 65		#interrupt-cells = <3>;
 66	};
 67
 68	timer@c1109940 {
 69		compatible = "amlogic,meson6-timer";
 70		reg = <0xc1109940 0x18>;
 71		interrupts = <0 10 1>;
 72	};
 73
 74	soc {
 75		compatible = "simple-bus";
 76		#address-cells = <1>;
 77		#size-cells = <1>;
 78		ranges;
 79
 80		wdt: watchdog@c1109900 {
 81			compatible = "amlogic,meson6-wdt";
 82			reg = <0xc1109900 0x8>;
 83			interrupts = <0 0 1>;
 84		};
 85
 86		uart_AO: serial@c81004c0 {
 87			compatible = "amlogic,meson-uart";
 88			reg = <0xc81004c0 0x18>;
 89			interrupts = <0 90 1>;
 90			clocks = <&clk81>;
 91			status = "disabled";
 92		};
 93
 94		uart_A: serial@c11084c0 {
 95			compatible = "amlogic,meson-uart";
 96			reg = <0xc11084c0 0x18>;
 97			interrupts = <0 26 1>;
 98			clocks = <&clk81>;
 99			status = "disabled";
100		};
101
102		uart_B: serial@c11084dc {
103			compatible = "amlogic,meson-uart";
104			reg = <0xc11084dc 0x18>;
105			interrupts = <0 75 1>;
106			clocks = <&clk81>;
107			status = "disabled";
108		};
109
110		uart_C: serial@c1108700 {
111			compatible = "amlogic,meson-uart";
112			reg = <0xc1108700 0x18>;
113			interrupts = <0 93 1>;
114			clocks = <&clk81>;
115			status = "disabled";
116		};
117
118		i2c_AO: i2c@c8100500 {
119			compatible = "amlogic,meson6-i2c";
120			reg = <0xc8100500 0x20>;
121			interrupts = <0 92 1>;
122			clocks = <&clk81>;
123			#address-cells = <1>;
124			#size-cells = <0>;
125			status = "disabled";
126		};
127
128		i2c_A: i2c@c1108500 {
129			compatible = "amlogic,meson6-i2c";
130			reg = <0xc1108500 0x20>;
131			interrupts = <0 21 1>;
132			clocks = <&clk81>;
133			#address-cells = <1>;
134			#size-cells = <0>;
135			status = "disabled";
136		};
137
138		i2c_B: i2c@c11087c0 {
139			compatible = "amlogic,meson6-i2c";
140			reg = <0xc11087c0 0x20>;
141			interrupts = <0 128 1>;
142			clocks = <&clk81>;
143			#address-cells = <1>;
144			#size-cells = <0>;
145			status = "disabled";
146		};
147
148		ir_receiver: ir-receiver@c8100480 {
149			compatible= "amlogic,meson6-ir";
150			reg = <0xc8100480 0x20>;
151			interrupts = <0 15 1>;
152			status = "disabled";
153		};
154
155		spifc: spi@c1108c80 {
156			compatible = "amlogic,meson6-spifc";
157			reg = <0xc1108c80 0x80>;
158			#address-cells = <1>;
159			#size-cells = <0>;
160			clocks = <&clk81>;
161			status = "disabled";
162		};
163
164		ethmac: ethernet@c9410000 {
165			compatible = "amlogic,meson6-dwmac", "snps,dwmac";
166			reg = <0xc9410000 0x10000
167			       0xc1108108 0x4>;
168			interrupts = <0 8 1>;
169			interrupt-names = "macirq";
170			clocks = <&clk81>;
171			clock-names = "stmmaceth";
172			status = "disabled";
173		};
174	};
175}; /* end of / */