Linux Audio

Check our new training course

Loading...
v6.13.7
 1// SPDX-License-Identifier: GPL-2.0-or-later
 2/*
 3 *  Copyright 2011-2012 Calxeda, Inc.
 4 *  Copyright (C) 2012-2013 Altera Corporation <www.altera.com>
 5 *
 
 
 
 
 
 
 
 
 
 
 6 * Based from clk-highbank.c
 
 
 
 7 */
 8#include <linux/of.h>
 9
10#include "clk.h"
11
12CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init);
13CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init);
14CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init);
15CLK_OF_DECLARE(socfpga_a10_pll_clk, "altr,socfpga-a10-pll-clock",
16	       socfpga_a10_pll_init);
17CLK_OF_DECLARE(socfpga_a10_perip_clk, "altr,socfpga-a10-perip-clk",
18	       socfpga_a10_periph_init);
19CLK_OF_DECLARE(socfpga_a10_gate_clk, "altr,socfpga-a10-gate-clk",
20	       socfpga_a10_gate_init);
v4.6
 
 1/*
 2 *  Copyright 2011-2012 Calxeda, Inc.
 3 *  Copyright (C) 2012-2013 Altera Corporation <www.altera.com>
 4 *
 5 * This program is free software; you can redistribute it and/or modify
 6 * it under the terms of the GNU General Public License as published by
 7 * the Free Software Foundation; either version 2 of the License, or
 8 * (at your option) any later version.
 9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
13 * GNU General Public License for more details.
14 *
15 * Based from clk-highbank.c
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
19 */
20#include <linux/of.h>
21
22#include "clk.h"
23
24CLK_OF_DECLARE(socfpga_pll_clk, "altr,socfpga-pll-clock", socfpga_pll_init);
25CLK_OF_DECLARE(socfpga_perip_clk, "altr,socfpga-perip-clk", socfpga_periph_init);
26CLK_OF_DECLARE(socfpga_gate_clk, "altr,socfpga-gate-clk", socfpga_gate_init);
27CLK_OF_DECLARE(socfpga_a10_pll_clk, "altr,socfpga-a10-pll-clock",
28	       socfpga_a10_pll_init);
29CLK_OF_DECLARE(socfpga_a10_perip_clk, "altr,socfpga-a10-perip-clk",
30	       socfpga_a10_periph_init);
31CLK_OF_DECLARE(socfpga_a10_gate_clk, "altr,socfpga-a10-gate-clk",
32	       socfpga_a10_gate_init);