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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * pci_irq.c - ACPI PCI Interrupt Routing ($Revision: 11 $)
4 *
5 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
6 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
7 * Copyright (C) 2002 Dominik Brodowski <devel@brodo.de>
8 * (c) Copyright 2008 Hewlett-Packard Development Company, L.P.
9 * Bjorn Helgaas <bjorn.helgaas@hp.com>
10 */
11
12#define pr_fmt(fmt) "ACPI: PCI: " fmt
13
14#include <linux/dmi.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/init.h>
18#include <linux/types.h>
19#include <linux/spinlock.h>
20#include <linux/pm.h>
21#include <linux/pci.h>
22#include <linux/acpi.h>
23#include <linux/slab.h>
24#include <linux/interrupt.h>
25
26struct acpi_prt_entry {
27 struct acpi_pci_id id;
28 u8 pin;
29 acpi_handle link;
30 u32 index; /* GSI, or link _CRS index */
31};
32
33static inline char pin_name(int pin)
34{
35 return 'A' + pin - 1;
36}
37
38/* --------------------------------------------------------------------------
39 PCI IRQ Routing Table (PRT) Support
40 -------------------------------------------------------------------------- */
41
42/* http://bugzilla.kernel.org/show_bug.cgi?id=4773 */
43static const struct dmi_system_id medion_md9580[] = {
44 {
45 .ident = "Medion MD9580-F laptop",
46 .matches = {
47 DMI_MATCH(DMI_SYS_VENDOR, "MEDIONNB"),
48 DMI_MATCH(DMI_PRODUCT_NAME, "A555"),
49 },
50 },
51 { }
52};
53
54/* http://bugzilla.kernel.org/show_bug.cgi?id=5044 */
55static const struct dmi_system_id dell_optiplex[] = {
56 {
57 .ident = "Dell Optiplex GX1",
58 .matches = {
59 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
60 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex GX1 600S+"),
61 },
62 },
63 { }
64};
65
66/* http://bugzilla.kernel.org/show_bug.cgi?id=10138 */
67static const struct dmi_system_id hp_t5710[] = {
68 {
69 .ident = "HP t5710",
70 .matches = {
71 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
72 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5000 series"),
73 DMI_MATCH(DMI_BOARD_NAME, "098Ch"),
74 },
75 },
76 { }
77};
78
79struct prt_quirk {
80 const struct dmi_system_id *system;
81 unsigned int segment;
82 unsigned int bus;
83 unsigned int device;
84 unsigned char pin;
85 const char *source; /* according to BIOS */
86 const char *actual_source;
87};
88
89#define PCI_INTX_PIN(c) (c - 'A' + 1)
90
91/*
92 * These systems have incorrect _PRT entries. The BIOS claims the PCI
93 * interrupt at the listed segment/bus/device/pin is connected to the first
94 * link device, but it is actually connected to the second.
95 */
96static const struct prt_quirk prt_quirks[] = {
97 { medion_md9580, 0, 0, 9, PCI_INTX_PIN('A'),
98 "\\_SB_.PCI0.ISA_.LNKA",
99 "\\_SB_.PCI0.ISA_.LNKB"},
100 { dell_optiplex, 0, 0, 0xd, PCI_INTX_PIN('A'),
101 "\\_SB_.LNKB",
102 "\\_SB_.LNKA"},
103 { hp_t5710, 0, 0, 1, PCI_INTX_PIN('A'),
104 "\\_SB_.PCI0.LNK1",
105 "\\_SB_.PCI0.LNK3"},
106};
107
108static void do_prt_fixups(struct acpi_prt_entry *entry,
109 struct acpi_pci_routing_table *prt)
110{
111 int i;
112 const struct prt_quirk *quirk;
113
114 for (i = 0; i < ARRAY_SIZE(prt_quirks); i++) {
115 quirk = &prt_quirks[i];
116
117 /* All current quirks involve link devices, not GSIs */
118 if (dmi_check_system(quirk->system) &&
119 entry->id.segment == quirk->segment &&
120 entry->id.bus == quirk->bus &&
121 entry->id.device == quirk->device &&
122 entry->pin == quirk->pin &&
123 !strcmp(prt->source, quirk->source) &&
124 strlen(prt->source) >= strlen(quirk->actual_source)) {
125 pr_warn("Firmware reports "
126 "%04x:%02x:%02x PCI INT %c connected to %s; "
127 "changing to %s\n",
128 entry->id.segment, entry->id.bus,
129 entry->id.device, pin_name(entry->pin),
130 prt->source, quirk->actual_source);
131 strcpy(prt->source, quirk->actual_source);
132 }
133 }
134}
135
136static int acpi_pci_irq_check_entry(acpi_handle handle, struct pci_dev *dev,
137 int pin, struct acpi_pci_routing_table *prt,
138 struct acpi_prt_entry **entry_ptr)
139{
140 int segment = pci_domain_nr(dev->bus);
141 int bus = dev->bus->number;
142 int device = pci_ari_enabled(dev->bus) ? 0 : PCI_SLOT(dev->devfn);
143 struct acpi_prt_entry *entry;
144
145 if (((prt->address >> 16) & 0xffff) != device ||
146 prt->pin + 1 != pin)
147 return -ENODEV;
148
149 entry = kzalloc(sizeof(struct acpi_prt_entry), GFP_KERNEL);
150 if (!entry)
151 return -ENOMEM;
152
153 /*
154 * Note that the _PRT uses 0=INTA, 1=INTB, etc, while PCI uses
155 * 1=INTA, 2=INTB. We use the PCI encoding throughout, so convert
156 * it here.
157 */
158 entry->id.segment = segment;
159 entry->id.bus = bus;
160 entry->id.device = (prt->address >> 16) & 0xFFFF;
161 entry->pin = prt->pin + 1;
162
163 do_prt_fixups(entry, prt);
164
165 entry->index = prt->source_index;
166
167 /*
168 * Type 1: Dynamic
169 * ---------------
170 * The 'source' field specifies the PCI interrupt link device used to
171 * configure the IRQ assigned to this slot|dev|pin. The 'source_index'
172 * indicates which resource descriptor in the resource template (of
173 * the link device) this interrupt is allocated from.
174 *
175 * NOTE: Don't query the Link Device for IRQ information at this time
176 * because Link Device enumeration may not have occurred yet
177 * (e.g. exists somewhere 'below' this _PRT entry in the ACPI
178 * namespace).
179 */
180 if (prt->source[0])
181 acpi_get_handle(handle, prt->source, &entry->link);
182
183 /*
184 * Type 2: Static
185 * --------------
186 * The 'source' field is NULL, and the 'source_index' field specifies
187 * the IRQ value, which is hardwired to specific interrupt inputs on
188 * the interrupt controller.
189 */
190 pr_debug("%04x:%02x:%02x[%c] -> %s[%d]\n",
191 entry->id.segment, entry->id.bus, entry->id.device,
192 pin_name(entry->pin), prt->source, entry->index);
193
194 *entry_ptr = entry;
195
196 return 0;
197}
198
199static int acpi_pci_irq_find_prt_entry(struct pci_dev *dev,
200 int pin, struct acpi_prt_entry **entry_ptr)
201{
202 acpi_status status;
203 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
204 struct acpi_pci_routing_table *entry;
205 acpi_handle handle = NULL;
206
207 if (dev->bus->bridge)
208 handle = ACPI_HANDLE(dev->bus->bridge);
209
210 if (!handle)
211 return -ENODEV;
212
213 /* 'handle' is the _PRT's parent (root bridge or PCI-PCI bridge) */
214 status = acpi_get_irq_routing_table(handle, &buffer);
215 if (ACPI_FAILURE(status)) {
216 kfree(buffer.pointer);
217 return -ENODEV;
218 }
219
220 entry = buffer.pointer;
221 while (entry && (entry->length > 0)) {
222 if (!acpi_pci_irq_check_entry(handle, dev, pin,
223 entry, entry_ptr))
224 break;
225 entry = (struct acpi_pci_routing_table *)
226 ((unsigned long)entry + entry->length);
227 }
228
229 kfree(buffer.pointer);
230 return 0;
231}
232
233/* --------------------------------------------------------------------------
234 PCI Interrupt Routing Support
235 -------------------------------------------------------------------------- */
236#ifdef CONFIG_X86_IO_APIC
237extern int noioapicquirk;
238extern int noioapicreroute;
239
240static int bridge_has_boot_interrupt_variant(struct pci_bus *bus)
241{
242 struct pci_bus *bus_it;
243
244 for (bus_it = bus ; bus_it ; bus_it = bus_it->parent) {
245 if (!bus_it->self)
246 return 0;
247 if (bus_it->self->irq_reroute_variant)
248 return bus_it->self->irq_reroute_variant;
249 }
250 return 0;
251}
252
253/*
254 * Some chipsets (e.g. Intel 6700PXH) generate a legacy INTx when the IRQ
255 * entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel does
256 * during interrupt handling). When this INTx generation cannot be disabled,
257 * we reroute these interrupts to their legacy equivalent to get rid of
258 * spurious interrupts.
259 */
260static int acpi_reroute_boot_interrupt(struct pci_dev *dev,
261 struct acpi_prt_entry *entry)
262{
263 if (noioapicquirk || noioapicreroute) {
264 return 0;
265 } else {
266 switch (bridge_has_boot_interrupt_variant(dev->bus)) {
267 case 0:
268 /* no rerouting necessary */
269 return 0;
270 case INTEL_IRQ_REROUTE_VARIANT:
271 /*
272 * Remap according to INTx routing table in 6700PXH
273 * specs, intel order number 302628-002, section
274 * 2.15.2. Other chipsets (80332, ...) have the same
275 * mapping and are handled here as well.
276 */
277 dev_info(&dev->dev, "PCI IRQ %d -> rerouted to legacy "
278 "IRQ %d\n", entry->index,
279 (entry->index % 4) + 16);
280 entry->index = (entry->index % 4) + 16;
281 return 1;
282 default:
283 dev_warn(&dev->dev, "Cannot reroute IRQ %d to legacy "
284 "IRQ: unknown mapping\n", entry->index);
285 return -1;
286 }
287 }
288}
289#endif /* CONFIG_X86_IO_APIC */
290
291struct acpi_prt_entry *acpi_pci_irq_lookup(struct pci_dev *dev, int pin)
292{
293 struct acpi_prt_entry *entry = NULL;
294 struct pci_dev *bridge;
295 u8 bridge_pin, orig_pin = pin;
296 int ret;
297
298 ret = acpi_pci_irq_find_prt_entry(dev, pin, &entry);
299 if (!ret && entry) {
300#ifdef CONFIG_X86_IO_APIC
301 acpi_reroute_boot_interrupt(dev, entry);
302#endif /* CONFIG_X86_IO_APIC */
303 dev_dbg(&dev->dev, "Found [%c] _PRT entry\n", pin_name(pin));
304 return entry;
305 }
306
307 /*
308 * Attempt to derive an IRQ for this device from a parent bridge's
309 * PCI interrupt routing entry (eg. yenta bridge and add-in card bridge).
310 */
311 bridge = dev->bus->self;
312 while (bridge) {
313 pin = pci_swizzle_interrupt_pin(dev, pin);
314
315 if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) {
316 /* PC card has the same IRQ as its cardbridge */
317 bridge_pin = bridge->pin;
318 if (!bridge_pin) {
319 dev_dbg(&bridge->dev, "No interrupt pin configured\n");
320 return NULL;
321 }
322 pin = bridge_pin;
323 }
324
325 ret = acpi_pci_irq_find_prt_entry(bridge, pin, &entry);
326 if (!ret && entry) {
327 dev_dbg(&dev->dev, "Derived GSI INT %c from %s\n",
328 pin_name(orig_pin), pci_name(bridge));
329 return entry;
330 }
331
332 dev = bridge;
333 bridge = dev->bus->self;
334 }
335
336 dev_warn(&dev->dev, "can't derive routing for PCI INT %c\n",
337 pin_name(orig_pin));
338 return NULL;
339}
340
341#if IS_ENABLED(CONFIG_ISA) || IS_ENABLED(CONFIG_EISA)
342static int acpi_isa_register_gsi(struct pci_dev *dev)
343{
344 u32 dev_gsi;
345
346 /* Interrupt Line values above 0xF are forbidden */
347 if (dev->irq > 0 && (dev->irq <= 0xF) &&
348 acpi_isa_irq_available(dev->irq) &&
349 (acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) {
350 dev_warn(&dev->dev, "PCI INT %c: no GSI - using ISA IRQ %d\n",
351 pin_name(dev->pin), dev->irq);
352 acpi_register_gsi(&dev->dev, dev_gsi,
353 ACPI_LEVEL_SENSITIVE,
354 ACPI_ACTIVE_LOW);
355 return 0;
356 }
357 return -EINVAL;
358}
359#else
360static inline int acpi_isa_register_gsi(struct pci_dev *dev)
361{
362 return -ENODEV;
363}
364#endif
365
366static inline bool acpi_pci_irq_valid(struct pci_dev *dev, u8 pin)
367{
368#ifdef CONFIG_X86
369 /*
370 * On x86 irq line 0xff means "unknown" or "no connection"
371 * (PCI 3.0, Section 6.2.4, footnote on page 223).
372 */
373 if (dev->irq == 0xff) {
374 dev->irq = IRQ_NOTCONNECTED;
375 dev_warn(&dev->dev, "PCI INT %c: not connected\n",
376 pin_name(pin));
377 return false;
378 }
379#endif
380 return true;
381}
382
383int acpi_pci_irq_enable(struct pci_dev *dev)
384{
385 struct acpi_prt_entry *entry;
386 int gsi;
387 u8 pin;
388 int triggering = ACPI_LEVEL_SENSITIVE;
389 /*
390 * On ARM systems with the GIC interrupt model, or LoongArch
391 * systems with the LPIC interrupt model, level interrupts
392 * are always polarity high by specification; PCI legacy
393 * IRQs lines are inverted before reaching the interrupt
394 * controller and must therefore be considered active high
395 * as default.
396 */
397 int polarity = acpi_irq_model == ACPI_IRQ_MODEL_GIC ||
398 acpi_irq_model == ACPI_IRQ_MODEL_LPIC ?
399 ACPI_ACTIVE_HIGH : ACPI_ACTIVE_LOW;
400 char *link = NULL;
401 char link_desc[16];
402 int rc;
403
404 pin = dev->pin;
405 if (!pin) {
406 dev_dbg(&dev->dev, "No interrupt pin configured\n");
407 return 0;
408 }
409
410 if (dev->irq_managed && dev->irq > 0)
411 return 0;
412
413 entry = acpi_pci_irq_lookup(dev, pin);
414 if (!entry) {
415 /*
416 * IDE legacy mode controller IRQs are magic. Why do compat
417 * extensions always make such a nasty mess.
418 */
419 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE &&
420 (dev->class & 0x05) == 0)
421 return 0;
422 }
423
424 if (entry) {
425 if (entry->link)
426 gsi = acpi_pci_link_allocate_irq(entry->link,
427 entry->index,
428 &triggering, &polarity,
429 &link);
430 else
431 gsi = entry->index;
432 } else
433 gsi = -1;
434
435 if (gsi < 0) {
436 /*
437 * No IRQ known to the ACPI subsystem - maybe the BIOS /
438 * driver reported one, then use it. Exit in any case.
439 */
440 if (!acpi_pci_irq_valid(dev, pin)) {
441 kfree(entry);
442 return 0;
443 }
444
445 if (acpi_isa_register_gsi(dev))
446 dev_warn(&dev->dev, "PCI INT %c: no GSI\n",
447 pin_name(pin));
448
449 kfree(entry);
450 return 0;
451 }
452
453 rc = acpi_register_gsi(&dev->dev, gsi, triggering, polarity);
454 if (rc < 0) {
455 dev_warn(&dev->dev, "PCI INT %c: failed to register GSI\n",
456 pin_name(pin));
457 kfree(entry);
458 return rc;
459 }
460 dev->irq = rc;
461 dev->irq_managed = 1;
462
463 if (link)
464 snprintf(link_desc, sizeof(link_desc), " -> Link[%s]", link);
465 else
466 link_desc[0] = '\0';
467
468 dev_dbg(&dev->dev, "PCI INT %c%s -> GSI %u (%s, %s) -> IRQ %d\n",
469 pin_name(pin), link_desc, gsi,
470 (triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge",
471 (polarity == ACPI_ACTIVE_LOW) ? "low" : "high", dev->irq);
472
473 kfree(entry);
474 return 0;
475}
476
477void acpi_pci_irq_disable(struct pci_dev *dev)
478{
479 struct acpi_prt_entry *entry;
480 int gsi;
481 u8 pin;
482
483 pin = dev->pin;
484 if (!pin || !dev->irq_managed || dev->irq <= 0)
485 return;
486
487 /* Keep IOAPIC pin configuration when suspending */
488 if (dev->dev.power.is_prepared)
489 return;
490#ifdef CONFIG_PM
491 if (dev->dev.power.runtime_status == RPM_SUSPENDING)
492 return;
493#endif
494
495 entry = acpi_pci_irq_lookup(dev, pin);
496 if (!entry)
497 return;
498
499 if (entry->link)
500 gsi = acpi_pci_link_free_irq(entry->link);
501 else
502 gsi = entry->index;
503
504 kfree(entry);
505
506 /*
507 * TBD: It might be worth clearing dev->irq by magic constant
508 * (e.g. PCI_UNDEFINED_IRQ).
509 */
510
511 dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
512 if (gsi >= 0) {
513 acpi_unregister_gsi(gsi);
514 dev->irq_managed = 0;
515 }
516}
1/*
2 * pci_irq.c - ACPI PCI Interrupt Routing ($Revision: 11 $)
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 Dominik Brodowski <devel@brodo.de>
7 * (c) Copyright 2008 Hewlett-Packard Development Company, L.P.
8 * Bjorn Helgaas <bjorn.helgaas@hp.com>
9 *
10 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License as published by
14 * the Free Software Foundation; either version 2 of the License, or (at
15 * your option) any later version.
16 *
17 * This program is distributed in the hope that it will be useful, but
18 * WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 * General Public License for more details.
21 *
22 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
23 */
24
25
26#include <linux/dmi.h>
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/init.h>
30#include <linux/types.h>
31#include <linux/spinlock.h>
32#include <linux/pm.h>
33#include <linux/pci.h>
34#include <linux/acpi.h>
35#include <linux/slab.h>
36#include <linux/interrupt.h>
37
38#define PREFIX "ACPI: "
39
40#define _COMPONENT ACPI_PCI_COMPONENT
41ACPI_MODULE_NAME("pci_irq");
42
43struct acpi_prt_entry {
44 struct acpi_pci_id id;
45 u8 pin;
46 acpi_handle link;
47 u32 index; /* GSI, or link _CRS index */
48};
49
50static inline char pin_name(int pin)
51{
52 return 'A' + pin - 1;
53}
54
55/* --------------------------------------------------------------------------
56 PCI IRQ Routing Table (PRT) Support
57 -------------------------------------------------------------------------- */
58
59/* http://bugzilla.kernel.org/show_bug.cgi?id=4773 */
60static const struct dmi_system_id medion_md9580[] = {
61 {
62 .ident = "Medion MD9580-F laptop",
63 .matches = {
64 DMI_MATCH(DMI_SYS_VENDOR, "MEDIONNB"),
65 DMI_MATCH(DMI_PRODUCT_NAME, "A555"),
66 },
67 },
68 { }
69};
70
71/* http://bugzilla.kernel.org/show_bug.cgi?id=5044 */
72static const struct dmi_system_id dell_optiplex[] = {
73 {
74 .ident = "Dell Optiplex GX1",
75 .matches = {
76 DMI_MATCH(DMI_SYS_VENDOR, "Dell Computer Corporation"),
77 DMI_MATCH(DMI_PRODUCT_NAME, "OptiPlex GX1 600S+"),
78 },
79 },
80 { }
81};
82
83/* http://bugzilla.kernel.org/show_bug.cgi?id=10138 */
84static const struct dmi_system_id hp_t5710[] = {
85 {
86 .ident = "HP t5710",
87 .matches = {
88 DMI_MATCH(DMI_SYS_VENDOR, "Hewlett-Packard"),
89 DMI_MATCH(DMI_PRODUCT_NAME, "hp t5000 series"),
90 DMI_MATCH(DMI_BOARD_NAME, "098Ch"),
91 },
92 },
93 { }
94};
95
96struct prt_quirk {
97 const struct dmi_system_id *system;
98 unsigned int segment;
99 unsigned int bus;
100 unsigned int device;
101 unsigned char pin;
102 const char *source; /* according to BIOS */
103 const char *actual_source;
104};
105
106#define PCI_INTX_PIN(c) (c - 'A' + 1)
107
108/*
109 * These systems have incorrect _PRT entries. The BIOS claims the PCI
110 * interrupt at the listed segment/bus/device/pin is connected to the first
111 * link device, but it is actually connected to the second.
112 */
113static const struct prt_quirk prt_quirks[] = {
114 { medion_md9580, 0, 0, 9, PCI_INTX_PIN('A'),
115 "\\_SB_.PCI0.ISA_.LNKA",
116 "\\_SB_.PCI0.ISA_.LNKB"},
117 { dell_optiplex, 0, 0, 0xd, PCI_INTX_PIN('A'),
118 "\\_SB_.LNKB",
119 "\\_SB_.LNKA"},
120 { hp_t5710, 0, 0, 1, PCI_INTX_PIN('A'),
121 "\\_SB_.PCI0.LNK1",
122 "\\_SB_.PCI0.LNK3"},
123};
124
125static void do_prt_fixups(struct acpi_prt_entry *entry,
126 struct acpi_pci_routing_table *prt)
127{
128 int i;
129 const struct prt_quirk *quirk;
130
131 for (i = 0; i < ARRAY_SIZE(prt_quirks); i++) {
132 quirk = &prt_quirks[i];
133
134 /* All current quirks involve link devices, not GSIs */
135 if (dmi_check_system(quirk->system) &&
136 entry->id.segment == quirk->segment &&
137 entry->id.bus == quirk->bus &&
138 entry->id.device == quirk->device &&
139 entry->pin == quirk->pin &&
140 !strcmp(prt->source, quirk->source) &&
141 strlen(prt->source) >= strlen(quirk->actual_source)) {
142 printk(KERN_WARNING PREFIX "firmware reports "
143 "%04x:%02x:%02x PCI INT %c connected to %s; "
144 "changing to %s\n",
145 entry->id.segment, entry->id.bus,
146 entry->id.device, pin_name(entry->pin),
147 prt->source, quirk->actual_source);
148 strcpy(prt->source, quirk->actual_source);
149 }
150 }
151}
152
153static int acpi_pci_irq_check_entry(acpi_handle handle, struct pci_dev *dev,
154 int pin, struct acpi_pci_routing_table *prt,
155 struct acpi_prt_entry **entry_ptr)
156{
157 int segment = pci_domain_nr(dev->bus);
158 int bus = dev->bus->number;
159 int device = pci_ari_enabled(dev->bus) ? 0 : PCI_SLOT(dev->devfn);
160 struct acpi_prt_entry *entry;
161
162 if (((prt->address >> 16) & 0xffff) != device ||
163 prt->pin + 1 != pin)
164 return -ENODEV;
165
166 entry = kzalloc(sizeof(struct acpi_prt_entry), GFP_KERNEL);
167 if (!entry)
168 return -ENOMEM;
169
170 /*
171 * Note that the _PRT uses 0=INTA, 1=INTB, etc, while PCI uses
172 * 1=INTA, 2=INTB. We use the PCI encoding throughout, so convert
173 * it here.
174 */
175 entry->id.segment = segment;
176 entry->id.bus = bus;
177 entry->id.device = (prt->address >> 16) & 0xFFFF;
178 entry->pin = prt->pin + 1;
179
180 do_prt_fixups(entry, prt);
181
182 entry->index = prt->source_index;
183
184 /*
185 * Type 1: Dynamic
186 * ---------------
187 * The 'source' field specifies the PCI interrupt link device used to
188 * configure the IRQ assigned to this slot|dev|pin. The 'source_index'
189 * indicates which resource descriptor in the resource template (of
190 * the link device) this interrupt is allocated from.
191 *
192 * NOTE: Don't query the Link Device for IRQ information at this time
193 * because Link Device enumeration may not have occurred yet
194 * (e.g. exists somewhere 'below' this _PRT entry in the ACPI
195 * namespace).
196 */
197 if (prt->source[0])
198 acpi_get_handle(handle, prt->source, &entry->link);
199
200 /*
201 * Type 2: Static
202 * --------------
203 * The 'source' field is NULL, and the 'source_index' field specifies
204 * the IRQ value, which is hardwired to specific interrupt inputs on
205 * the interrupt controller.
206 */
207
208 ACPI_DEBUG_PRINT_RAW((ACPI_DB_INFO,
209 " %04x:%02x:%02x[%c] -> %s[%d]\n",
210 entry->id.segment, entry->id.bus,
211 entry->id.device, pin_name(entry->pin),
212 prt->source, entry->index));
213
214 *entry_ptr = entry;
215
216 return 0;
217}
218
219static int acpi_pci_irq_find_prt_entry(struct pci_dev *dev,
220 int pin, struct acpi_prt_entry **entry_ptr)
221{
222 acpi_status status;
223 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
224 struct acpi_pci_routing_table *entry;
225 acpi_handle handle = NULL;
226
227 if (dev->bus->bridge)
228 handle = ACPI_HANDLE(dev->bus->bridge);
229
230 if (!handle)
231 return -ENODEV;
232
233 /* 'handle' is the _PRT's parent (root bridge or PCI-PCI bridge) */
234 status = acpi_get_irq_routing_table(handle, &buffer);
235 if (ACPI_FAILURE(status)) {
236 kfree(buffer.pointer);
237 return -ENODEV;
238 }
239
240 entry = buffer.pointer;
241 while (entry && (entry->length > 0)) {
242 if (!acpi_pci_irq_check_entry(handle, dev, pin,
243 entry, entry_ptr))
244 break;
245 entry = (struct acpi_pci_routing_table *)
246 ((unsigned long)entry + entry->length);
247 }
248
249 kfree(buffer.pointer);
250 return 0;
251}
252
253/* --------------------------------------------------------------------------
254 PCI Interrupt Routing Support
255 -------------------------------------------------------------------------- */
256#ifdef CONFIG_X86_IO_APIC
257extern int noioapicquirk;
258extern int noioapicreroute;
259
260static int bridge_has_boot_interrupt_variant(struct pci_bus *bus)
261{
262 struct pci_bus *bus_it;
263
264 for (bus_it = bus ; bus_it ; bus_it = bus_it->parent) {
265 if (!bus_it->self)
266 return 0;
267 if (bus_it->self->irq_reroute_variant)
268 return bus_it->self->irq_reroute_variant;
269 }
270 return 0;
271}
272
273/*
274 * Some chipsets (e.g. Intel 6700PXH) generate a legacy INTx when the IRQ
275 * entry in the chipset's IO-APIC is masked (as, e.g. the RT kernel does
276 * during interrupt handling). When this INTx generation cannot be disabled,
277 * we reroute these interrupts to their legacy equivalent to get rid of
278 * spurious interrupts.
279 */
280static int acpi_reroute_boot_interrupt(struct pci_dev *dev,
281 struct acpi_prt_entry *entry)
282{
283 if (noioapicquirk || noioapicreroute) {
284 return 0;
285 } else {
286 switch (bridge_has_boot_interrupt_variant(dev->bus)) {
287 case 0:
288 /* no rerouting necessary */
289 return 0;
290 case INTEL_IRQ_REROUTE_VARIANT:
291 /*
292 * Remap according to INTx routing table in 6700PXH
293 * specs, intel order number 302628-002, section
294 * 2.15.2. Other chipsets (80332, ...) have the same
295 * mapping and are handled here as well.
296 */
297 dev_info(&dev->dev, "PCI IRQ %d -> rerouted to legacy "
298 "IRQ %d\n", entry->index,
299 (entry->index % 4) + 16);
300 entry->index = (entry->index % 4) + 16;
301 return 1;
302 default:
303 dev_warn(&dev->dev, "Cannot reroute IRQ %d to legacy "
304 "IRQ: unknown mapping\n", entry->index);
305 return -1;
306 }
307 }
308}
309#endif /* CONFIG_X86_IO_APIC */
310
311static struct acpi_prt_entry *acpi_pci_irq_lookup(struct pci_dev *dev, int pin)
312{
313 struct acpi_prt_entry *entry = NULL;
314 struct pci_dev *bridge;
315 u8 bridge_pin, orig_pin = pin;
316 int ret;
317
318 ret = acpi_pci_irq_find_prt_entry(dev, pin, &entry);
319 if (!ret && entry) {
320#ifdef CONFIG_X86_IO_APIC
321 acpi_reroute_boot_interrupt(dev, entry);
322#endif /* CONFIG_X86_IO_APIC */
323 ACPI_DEBUG_PRINT((ACPI_DB_INFO, "Found %s[%c] _PRT entry\n",
324 pci_name(dev), pin_name(pin)));
325 return entry;
326 }
327
328 /*
329 * Attempt to derive an IRQ for this device from a parent bridge's
330 * PCI interrupt routing entry (eg. yenta bridge and add-in card bridge).
331 */
332 bridge = dev->bus->self;
333 while (bridge) {
334 pin = pci_swizzle_interrupt_pin(dev, pin);
335
336 if ((bridge->class >> 8) == PCI_CLASS_BRIDGE_CARDBUS) {
337 /* PC card has the same IRQ as its cardbridge */
338 bridge_pin = bridge->pin;
339 if (!bridge_pin) {
340 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
341 "No interrupt pin configured for device %s\n",
342 pci_name(bridge)));
343 return NULL;
344 }
345 pin = bridge_pin;
346 }
347
348 ret = acpi_pci_irq_find_prt_entry(bridge, pin, &entry);
349 if (!ret && entry) {
350 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
351 "Derived GSI for %s INT %c from %s\n",
352 pci_name(dev), pin_name(orig_pin),
353 pci_name(bridge)));
354 return entry;
355 }
356
357 dev = bridge;
358 bridge = dev->bus->self;
359 }
360
361 dev_warn(&dev->dev, "can't derive routing for PCI INT %c\n",
362 pin_name(orig_pin));
363 return NULL;
364}
365
366#if IS_ENABLED(CONFIG_ISA) || IS_ENABLED(CONFIG_EISA)
367static int acpi_isa_register_gsi(struct pci_dev *dev)
368{
369 u32 dev_gsi;
370
371 /* Interrupt Line values above 0xF are forbidden */
372 if (dev->irq > 0 && (dev->irq <= 0xF) &&
373 acpi_isa_irq_available(dev->irq) &&
374 (acpi_isa_irq_to_gsi(dev->irq, &dev_gsi) == 0)) {
375 dev_warn(&dev->dev, "PCI INT %c: no GSI - using ISA IRQ %d\n",
376 pin_name(dev->pin), dev->irq);
377 acpi_register_gsi(&dev->dev, dev_gsi,
378 ACPI_LEVEL_SENSITIVE,
379 ACPI_ACTIVE_LOW);
380 return 0;
381 }
382 return -EINVAL;
383}
384#else
385static inline int acpi_isa_register_gsi(struct pci_dev *dev)
386{
387 return -ENODEV;
388}
389#endif
390
391static inline bool acpi_pci_irq_valid(struct pci_dev *dev, u8 pin)
392{
393#ifdef CONFIG_X86
394 /*
395 * On x86 irq line 0xff means "unknown" or "no connection"
396 * (PCI 3.0, Section 6.2.4, footnote on page 223).
397 */
398 if (dev->irq == 0xff) {
399 dev->irq = IRQ_NOTCONNECTED;
400 dev_warn(&dev->dev, "PCI INT %c: not connected\n",
401 pin_name(pin));
402 return false;
403 }
404#endif
405 return true;
406}
407
408int acpi_pci_irq_enable(struct pci_dev *dev)
409{
410 struct acpi_prt_entry *entry;
411 int gsi;
412 u8 pin;
413 int triggering = ACPI_LEVEL_SENSITIVE;
414 int polarity = ACPI_ACTIVE_LOW;
415 char *link = NULL;
416 char link_desc[16];
417 int rc;
418
419 pin = dev->pin;
420 if (!pin) {
421 ACPI_DEBUG_PRINT((ACPI_DB_INFO,
422 "No interrupt pin configured for device %s\n",
423 pci_name(dev)));
424 return 0;
425 }
426
427 if (dev->irq_managed && dev->irq > 0)
428 return 0;
429
430 entry = acpi_pci_irq_lookup(dev, pin);
431 if (!entry) {
432 /*
433 * IDE legacy mode controller IRQs are magic. Why do compat
434 * extensions always make such a nasty mess.
435 */
436 if (dev->class >> 8 == PCI_CLASS_STORAGE_IDE &&
437 (dev->class & 0x05) == 0)
438 return 0;
439 }
440
441 if (entry) {
442 if (entry->link)
443 gsi = acpi_pci_link_allocate_irq(entry->link,
444 entry->index,
445 &triggering, &polarity,
446 &link);
447 else
448 gsi = entry->index;
449 } else
450 gsi = -1;
451
452 if (gsi < 0) {
453 /*
454 * No IRQ known to the ACPI subsystem - maybe the BIOS /
455 * driver reported one, then use it. Exit in any case.
456 */
457 if (!acpi_pci_irq_valid(dev, pin))
458 return 0;
459
460 if (acpi_isa_register_gsi(dev))
461 dev_warn(&dev->dev, "PCI INT %c: no GSI\n",
462 pin_name(pin));
463
464 kfree(entry);
465 return 0;
466 }
467
468 rc = acpi_register_gsi(&dev->dev, gsi, triggering, polarity);
469 if (rc < 0) {
470 dev_warn(&dev->dev, "PCI INT %c: failed to register GSI\n",
471 pin_name(pin));
472 kfree(entry);
473 return rc;
474 }
475 dev->irq = rc;
476 dev->irq_managed = 1;
477
478 if (link)
479 snprintf(link_desc, sizeof(link_desc), " -> Link[%s]", link);
480 else
481 link_desc[0] = '\0';
482
483 dev_dbg(&dev->dev, "PCI INT %c%s -> GSI %u (%s, %s) -> IRQ %d\n",
484 pin_name(pin), link_desc, gsi,
485 (triggering == ACPI_LEVEL_SENSITIVE) ? "level" : "edge",
486 (polarity == ACPI_ACTIVE_LOW) ? "low" : "high", dev->irq);
487
488 kfree(entry);
489 return 0;
490}
491
492void acpi_pci_irq_disable(struct pci_dev *dev)
493{
494 struct acpi_prt_entry *entry;
495 int gsi;
496 u8 pin;
497
498 pin = dev->pin;
499 if (!pin || !dev->irq_managed || dev->irq <= 0)
500 return;
501
502 /* Keep IOAPIC pin configuration when suspending */
503 if (dev->dev.power.is_prepared)
504 return;
505#ifdef CONFIG_PM
506 if (dev->dev.power.runtime_status == RPM_SUSPENDING)
507 return;
508#endif
509
510 entry = acpi_pci_irq_lookup(dev, pin);
511 if (!entry)
512 return;
513
514 if (entry->link)
515 gsi = acpi_pci_link_free_irq(entry->link);
516 else
517 gsi = entry->index;
518
519 kfree(entry);
520
521 /*
522 * TBD: It might be worth clearing dev->irq by magic constant
523 * (e.g. PCI_UNDEFINED_IRQ).
524 */
525
526 dev_dbg(&dev->dev, "PCI INT %c disabled\n", pin_name(pin));
527 if (gsi >= 0) {
528 acpi_unregister_gsi(gsi);
529 dev->irq_managed = 0;
530 }
531}