Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * irq_comm.c: Common API for in kernel interrupt controller
4 * Copyright (c) 2007, Intel Corporation.
5 *
6 * Authors:
7 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
8 *
9 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
10 */
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
13#include <linux/kvm_host.h>
14#include <linux/slab.h>
15#include <linux/export.h>
16#include <linux/rculist.h>
17
18#include <trace/events/kvm.h>
19
20#include "irq.h"
21
22#include "ioapic.h"
23
24#include "lapic.h"
25
26#include "hyperv.h"
27#include "x86.h"
28#include "xen.h"
29
30static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
31 struct kvm *kvm, int irq_source_id, int level,
32 bool line_status)
33{
34 struct kvm_pic *pic = kvm->arch.vpic;
35 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
36}
37
38static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
39 struct kvm *kvm, int irq_source_id, int level,
40 bool line_status)
41{
42 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
43 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
44 line_status);
45}
46
47int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
48 struct kvm_lapic_irq *irq, struct dest_map *dest_map)
49{
50 int r = -1;
51 struct kvm_vcpu *vcpu, *lowest = NULL;
52 unsigned long i, dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
53 unsigned int dest_vcpus = 0;
54
55 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
56 return r;
57
58 if (irq->dest_mode == APIC_DEST_PHYSICAL &&
59 irq->dest_id == 0xff && kvm_lowest_prio_delivery(irq)) {
60 pr_info("apic: phys broadcast and lowest prio\n");
61 irq->delivery_mode = APIC_DM_FIXED;
62 }
63
64 memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
65
66 kvm_for_each_vcpu(i, vcpu, kvm) {
67 if (!kvm_apic_present(vcpu))
68 continue;
69
70 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
71 irq->dest_id, irq->dest_mode))
72 continue;
73
74 if (!kvm_lowest_prio_delivery(irq)) {
75 if (r < 0)
76 r = 0;
77 r += kvm_apic_set_irq(vcpu, irq, dest_map);
78 } else if (kvm_apic_sw_enabled(vcpu->arch.apic)) {
79 if (!kvm_vector_hashing_enabled()) {
80 if (!lowest)
81 lowest = vcpu;
82 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
83 lowest = vcpu;
84 } else {
85 __set_bit(i, dest_vcpu_bitmap);
86 dest_vcpus++;
87 }
88 }
89 }
90
91 if (dest_vcpus != 0) {
92 int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
93 dest_vcpu_bitmap, KVM_MAX_VCPUS);
94
95 lowest = kvm_get_vcpu(kvm, idx);
96 }
97
98 if (lowest)
99 r = kvm_apic_set_irq(lowest, irq, dest_map);
100
101 return r;
102}
103
104void kvm_set_msi_irq(struct kvm *kvm, struct kvm_kernel_irq_routing_entry *e,
105 struct kvm_lapic_irq *irq)
106{
107 struct msi_msg msg = { .address_lo = e->msi.address_lo,
108 .address_hi = e->msi.address_hi,
109 .data = e->msi.data };
110
111 trace_kvm_msi_set_irq(msg.address_lo | (kvm->arch.x2apic_format ?
112 (u64)msg.address_hi << 32 : 0), msg.data);
113
114 irq->dest_id = x86_msi_msg_get_destid(&msg, kvm->arch.x2apic_format);
115 irq->vector = msg.arch_data.vector;
116 irq->dest_mode = kvm_lapic_irq_dest_mode(msg.arch_addr_lo.dest_mode_logical);
117 irq->trig_mode = msg.arch_data.is_level;
118 irq->delivery_mode = msg.arch_data.delivery_mode << 8;
119 irq->msi_redir_hint = msg.arch_addr_lo.redirect_hint;
120 irq->level = 1;
121 irq->shorthand = APIC_DEST_NOSHORT;
122}
123EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
124
125static inline bool kvm_msi_route_invalid(struct kvm *kvm,
126 struct kvm_kernel_irq_routing_entry *e)
127{
128 return kvm->arch.x2apic_format && (e->msi.address_hi & 0xff);
129}
130
131int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
132 struct kvm *kvm, int irq_source_id, int level, bool line_status)
133{
134 struct kvm_lapic_irq irq;
135
136 if (kvm_msi_route_invalid(kvm, e))
137 return -EINVAL;
138
139 if (!level)
140 return -1;
141
142 kvm_set_msi_irq(kvm, e, &irq);
143
144 return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
145}
146
147#ifdef CONFIG_KVM_HYPERV
148static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
149 struct kvm *kvm, int irq_source_id, int level,
150 bool line_status)
151{
152 if (!level)
153 return -1;
154
155 return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
156}
157#endif
158
159int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
160 struct kvm *kvm, int irq_source_id, int level,
161 bool line_status)
162{
163 struct kvm_lapic_irq irq;
164 int r;
165
166 switch (e->type) {
167#ifdef CONFIG_KVM_HYPERV
168 case KVM_IRQ_ROUTING_HV_SINT:
169 return kvm_hv_set_sint(e, kvm, irq_source_id, level,
170 line_status);
171#endif
172
173 case KVM_IRQ_ROUTING_MSI:
174 if (kvm_msi_route_invalid(kvm, e))
175 return -EINVAL;
176
177 kvm_set_msi_irq(kvm, e, &irq);
178
179 if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
180 return r;
181 break;
182
183#ifdef CONFIG_KVM_XEN
184 case KVM_IRQ_ROUTING_XEN_EVTCHN:
185 if (!level)
186 return -1;
187
188 return kvm_xen_set_evtchn_fast(&e->xen_evtchn, kvm);
189#endif
190 default:
191 break;
192 }
193
194 return -EWOULDBLOCK;
195}
196
197int kvm_request_irq_source_id(struct kvm *kvm)
198{
199 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
200 int irq_source_id;
201
202 mutex_lock(&kvm->irq_lock);
203 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
204
205 if (irq_source_id >= BITS_PER_LONG) {
206 pr_warn("exhausted allocatable IRQ sources!\n");
207 irq_source_id = -EFAULT;
208 goto unlock;
209 }
210
211 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
212 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
213 set_bit(irq_source_id, bitmap);
214unlock:
215 mutex_unlock(&kvm->irq_lock);
216
217 return irq_source_id;
218}
219
220void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
221{
222 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
223 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
224
225 mutex_lock(&kvm->irq_lock);
226 if (irq_source_id < 0 ||
227 irq_source_id >= BITS_PER_LONG) {
228 pr_err("IRQ source ID out of range!\n");
229 goto unlock;
230 }
231 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
232 if (!irqchip_kernel(kvm))
233 goto unlock;
234
235 kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
236 kvm_pic_clear_all(kvm->arch.vpic, irq_source_id);
237unlock:
238 mutex_unlock(&kvm->irq_lock);
239}
240
241void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
242 struct kvm_irq_mask_notifier *kimn)
243{
244 mutex_lock(&kvm->irq_lock);
245 kimn->irq = irq;
246 hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
247 mutex_unlock(&kvm->irq_lock);
248}
249
250void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
251 struct kvm_irq_mask_notifier *kimn)
252{
253 mutex_lock(&kvm->irq_lock);
254 hlist_del_rcu(&kimn->link);
255 mutex_unlock(&kvm->irq_lock);
256 synchronize_srcu(&kvm->irq_srcu);
257}
258
259void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
260 bool mask)
261{
262 struct kvm_irq_mask_notifier *kimn;
263 int idx, gsi;
264
265 idx = srcu_read_lock(&kvm->irq_srcu);
266 gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
267 if (gsi != -1)
268 hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
269 if (kimn->irq == gsi)
270 kimn->func(kimn, mask);
271 srcu_read_unlock(&kvm->irq_srcu, idx);
272}
273
274bool kvm_arch_can_set_irq_routing(struct kvm *kvm)
275{
276 return irqchip_in_kernel(kvm);
277}
278
279int kvm_set_routing_entry(struct kvm *kvm,
280 struct kvm_kernel_irq_routing_entry *e,
281 const struct kvm_irq_routing_entry *ue)
282{
283 /* We can't check irqchip_in_kernel() here as some callers are
284 * currently initializing the irqchip. Other callers should therefore
285 * check kvm_arch_can_set_irq_routing() before calling this function.
286 */
287 switch (ue->type) {
288 case KVM_IRQ_ROUTING_IRQCHIP:
289 if (irqchip_split(kvm))
290 return -EINVAL;
291 e->irqchip.pin = ue->u.irqchip.pin;
292 switch (ue->u.irqchip.irqchip) {
293 case KVM_IRQCHIP_PIC_SLAVE:
294 e->irqchip.pin += PIC_NUM_PINS / 2;
295 fallthrough;
296 case KVM_IRQCHIP_PIC_MASTER:
297 if (ue->u.irqchip.pin >= PIC_NUM_PINS / 2)
298 return -EINVAL;
299 e->set = kvm_set_pic_irq;
300 break;
301 case KVM_IRQCHIP_IOAPIC:
302 if (ue->u.irqchip.pin >= KVM_IOAPIC_NUM_PINS)
303 return -EINVAL;
304 e->set = kvm_set_ioapic_irq;
305 break;
306 default:
307 return -EINVAL;
308 }
309 e->irqchip.irqchip = ue->u.irqchip.irqchip;
310 break;
311 case KVM_IRQ_ROUTING_MSI:
312 e->set = kvm_set_msi;
313 e->msi.address_lo = ue->u.msi.address_lo;
314 e->msi.address_hi = ue->u.msi.address_hi;
315 e->msi.data = ue->u.msi.data;
316
317 if (kvm_msi_route_invalid(kvm, e))
318 return -EINVAL;
319 break;
320#ifdef CONFIG_KVM_HYPERV
321 case KVM_IRQ_ROUTING_HV_SINT:
322 e->set = kvm_hv_set_sint;
323 e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
324 e->hv_sint.sint = ue->u.hv_sint.sint;
325 break;
326#endif
327#ifdef CONFIG_KVM_XEN
328 case KVM_IRQ_ROUTING_XEN_EVTCHN:
329 return kvm_xen_setup_evtchn(kvm, e, ue);
330#endif
331 default:
332 return -EINVAL;
333 }
334
335 return 0;
336}
337
338bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
339 struct kvm_vcpu **dest_vcpu)
340{
341 int r = 0;
342 unsigned long i;
343 struct kvm_vcpu *vcpu;
344
345 if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
346 return true;
347
348 kvm_for_each_vcpu(i, vcpu, kvm) {
349 if (!kvm_apic_present(vcpu))
350 continue;
351
352 if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
353 irq->dest_id, irq->dest_mode))
354 continue;
355
356 if (++r == 2)
357 return false;
358
359 *dest_vcpu = vcpu;
360 }
361
362 return r == 1;
363}
364EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
365
366#define IOAPIC_ROUTING_ENTRY(irq) \
367 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
368 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
369#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
370
371#define PIC_ROUTING_ENTRY(irq) \
372 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
373 .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
374#define ROUTING_ENTRY2(irq) \
375 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
376
377static const struct kvm_irq_routing_entry default_routing[] = {
378 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
379 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
380 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
381 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
382 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
383 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
384 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
385 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
386 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
387 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
388 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
389 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
390};
391
392int kvm_setup_default_irq_routing(struct kvm *kvm)
393{
394 return kvm_set_irq_routing(kvm, default_routing,
395 ARRAY_SIZE(default_routing), 0);
396}
397
398void kvm_arch_post_irq_routing_update(struct kvm *kvm)
399{
400 if (!irqchip_split(kvm))
401 return;
402 kvm_make_scan_ioapic_request(kvm);
403}
404
405void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
406 ulong *ioapic_handled_vectors)
407{
408 struct kvm *kvm = vcpu->kvm;
409 struct kvm_kernel_irq_routing_entry *entry;
410 struct kvm_irq_routing_table *table;
411 u32 i, nr_ioapic_pins;
412 int idx;
413
414 idx = srcu_read_lock(&kvm->irq_srcu);
415 table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
416 nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
417 kvm->arch.nr_reserved_ioapic_pins);
418 for (i = 0; i < nr_ioapic_pins; ++i) {
419 hlist_for_each_entry(entry, &table->map[i], link) {
420 struct kvm_lapic_irq irq;
421
422 if (entry->type != KVM_IRQ_ROUTING_MSI)
423 continue;
424
425 kvm_set_msi_irq(vcpu->kvm, entry, &irq);
426
427 if (irq.trig_mode &&
428 (kvm_apic_match_dest(vcpu, NULL, APIC_DEST_NOSHORT,
429 irq.dest_id, irq.dest_mode) ||
430 kvm_apic_pending_eoi(vcpu, irq.vector)))
431 __set_bit(irq.vector, ioapic_handled_vectors);
432 }
433 }
434 srcu_read_unlock(&kvm->irq_srcu, idx);
435}
436
437void kvm_arch_irq_routing_update(struct kvm *kvm)
438{
439#ifdef CONFIG_KVM_HYPERV
440 kvm_hv_irq_routing_update(kvm);
441#endif
442}
1/*
2 * irq_comm.c: Common API for in kernel interrupt controller
3 * Copyright (c) 2007, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 * You should have received a copy of the GNU General Public License along with
15 * this program; if not, write to the Free Software Foundation, Inc., 59 Temple
16 * Place - Suite 330, Boston, MA 02111-1307 USA.
17 * Authors:
18 * Yaozu (Eddie) Dong <Eddie.dong@intel.com>
19 *
20 * Copyright 2010 Red Hat, Inc. and/or its affiliates.
21 */
22
23#include <linux/kvm_host.h>
24#include <linux/slab.h>
25#include <linux/export.h>
26#include <trace/events/kvm.h>
27
28#include <asm/msidef.h>
29
30#include "irq.h"
31
32#include "ioapic.h"
33
34#include "lapic.h"
35
36#include "hyperv.h"
37#include "x86.h"
38
39static int kvm_set_pic_irq(struct kvm_kernel_irq_routing_entry *e,
40 struct kvm *kvm, int irq_source_id, int level,
41 bool line_status)
42{
43 struct kvm_pic *pic = pic_irqchip(kvm);
44 return kvm_pic_set_irq(pic, e->irqchip.pin, irq_source_id, level);
45}
46
47static int kvm_set_ioapic_irq(struct kvm_kernel_irq_routing_entry *e,
48 struct kvm *kvm, int irq_source_id, int level,
49 bool line_status)
50{
51 struct kvm_ioapic *ioapic = kvm->arch.vioapic;
52 return kvm_ioapic_set_irq(ioapic, e->irqchip.pin, irq_source_id, level,
53 line_status);
54}
55
56int kvm_irq_delivery_to_apic(struct kvm *kvm, struct kvm_lapic *src,
57 struct kvm_lapic_irq *irq, struct dest_map *dest_map)
58{
59 int i, r = -1;
60 struct kvm_vcpu *vcpu, *lowest = NULL;
61 unsigned long dest_vcpu_bitmap[BITS_TO_LONGS(KVM_MAX_VCPUS)];
62 unsigned int dest_vcpus = 0;
63
64 if (irq->dest_mode == 0 && irq->dest_id == 0xff &&
65 kvm_lowest_prio_delivery(irq)) {
66 printk(KERN_INFO "kvm: apic: phys broadcast and lowest prio\n");
67 irq->delivery_mode = APIC_DM_FIXED;
68 }
69
70 if (kvm_irq_delivery_to_apic_fast(kvm, src, irq, &r, dest_map))
71 return r;
72
73 memset(dest_vcpu_bitmap, 0, sizeof(dest_vcpu_bitmap));
74
75 kvm_for_each_vcpu(i, vcpu, kvm) {
76 if (!kvm_apic_present(vcpu))
77 continue;
78
79 if (!kvm_apic_match_dest(vcpu, src, irq->shorthand,
80 irq->dest_id, irq->dest_mode))
81 continue;
82
83 if (!kvm_lowest_prio_delivery(irq)) {
84 if (r < 0)
85 r = 0;
86 r += kvm_apic_set_irq(vcpu, irq, dest_map);
87 } else if (kvm_lapic_enabled(vcpu)) {
88 if (!kvm_vector_hashing_enabled()) {
89 if (!lowest)
90 lowest = vcpu;
91 else if (kvm_apic_compare_prio(vcpu, lowest) < 0)
92 lowest = vcpu;
93 } else {
94 __set_bit(i, dest_vcpu_bitmap);
95 dest_vcpus++;
96 }
97 }
98 }
99
100 if (dest_vcpus != 0) {
101 int idx = kvm_vector_to_index(irq->vector, dest_vcpus,
102 dest_vcpu_bitmap, KVM_MAX_VCPUS);
103
104 lowest = kvm_get_vcpu(kvm, idx);
105 }
106
107 if (lowest)
108 r = kvm_apic_set_irq(lowest, irq, dest_map);
109
110 return r;
111}
112
113void kvm_set_msi_irq(struct kvm_kernel_irq_routing_entry *e,
114 struct kvm_lapic_irq *irq)
115{
116 trace_kvm_msi_set_irq(e->msi.address_lo, e->msi.data);
117
118 irq->dest_id = (e->msi.address_lo &
119 MSI_ADDR_DEST_ID_MASK) >> MSI_ADDR_DEST_ID_SHIFT;
120 irq->vector = (e->msi.data &
121 MSI_DATA_VECTOR_MASK) >> MSI_DATA_VECTOR_SHIFT;
122 irq->dest_mode = (1 << MSI_ADDR_DEST_MODE_SHIFT) & e->msi.address_lo;
123 irq->trig_mode = (1 << MSI_DATA_TRIGGER_SHIFT) & e->msi.data;
124 irq->delivery_mode = e->msi.data & 0x700;
125 irq->msi_redir_hint = ((e->msi.address_lo
126 & MSI_ADDR_REDIRECTION_LOWPRI) > 0);
127 irq->level = 1;
128 irq->shorthand = 0;
129}
130EXPORT_SYMBOL_GPL(kvm_set_msi_irq);
131
132int kvm_set_msi(struct kvm_kernel_irq_routing_entry *e,
133 struct kvm *kvm, int irq_source_id, int level, bool line_status)
134{
135 struct kvm_lapic_irq irq;
136
137 if (!level)
138 return -1;
139
140 kvm_set_msi_irq(e, &irq);
141
142 return kvm_irq_delivery_to_apic(kvm, NULL, &irq, NULL);
143}
144
145
146int kvm_arch_set_irq_inatomic(struct kvm_kernel_irq_routing_entry *e,
147 struct kvm *kvm, int irq_source_id, int level,
148 bool line_status)
149{
150 struct kvm_lapic_irq irq;
151 int r;
152
153 if (unlikely(e->type != KVM_IRQ_ROUTING_MSI))
154 return -EWOULDBLOCK;
155
156 kvm_set_msi_irq(e, &irq);
157
158 if (kvm_irq_delivery_to_apic_fast(kvm, NULL, &irq, &r, NULL))
159 return r;
160 else
161 return -EWOULDBLOCK;
162}
163
164int kvm_request_irq_source_id(struct kvm *kvm)
165{
166 unsigned long *bitmap = &kvm->arch.irq_sources_bitmap;
167 int irq_source_id;
168
169 mutex_lock(&kvm->irq_lock);
170 irq_source_id = find_first_zero_bit(bitmap, BITS_PER_LONG);
171
172 if (irq_source_id >= BITS_PER_LONG) {
173 printk(KERN_WARNING "kvm: exhaust allocatable IRQ sources!\n");
174 irq_source_id = -EFAULT;
175 goto unlock;
176 }
177
178 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
179 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
180 set_bit(irq_source_id, bitmap);
181unlock:
182 mutex_unlock(&kvm->irq_lock);
183
184 return irq_source_id;
185}
186
187void kvm_free_irq_source_id(struct kvm *kvm, int irq_source_id)
188{
189 ASSERT(irq_source_id != KVM_USERSPACE_IRQ_SOURCE_ID);
190 ASSERT(irq_source_id != KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID);
191
192 mutex_lock(&kvm->irq_lock);
193 if (irq_source_id < 0 ||
194 irq_source_id >= BITS_PER_LONG) {
195 printk(KERN_ERR "kvm: IRQ source ID out of range!\n");
196 goto unlock;
197 }
198 clear_bit(irq_source_id, &kvm->arch.irq_sources_bitmap);
199 if (!ioapic_in_kernel(kvm))
200 goto unlock;
201
202 kvm_ioapic_clear_all(kvm->arch.vioapic, irq_source_id);
203 kvm_pic_clear_all(pic_irqchip(kvm), irq_source_id);
204unlock:
205 mutex_unlock(&kvm->irq_lock);
206}
207
208void kvm_register_irq_mask_notifier(struct kvm *kvm, int irq,
209 struct kvm_irq_mask_notifier *kimn)
210{
211 mutex_lock(&kvm->irq_lock);
212 kimn->irq = irq;
213 hlist_add_head_rcu(&kimn->link, &kvm->arch.mask_notifier_list);
214 mutex_unlock(&kvm->irq_lock);
215}
216
217void kvm_unregister_irq_mask_notifier(struct kvm *kvm, int irq,
218 struct kvm_irq_mask_notifier *kimn)
219{
220 mutex_lock(&kvm->irq_lock);
221 hlist_del_rcu(&kimn->link);
222 mutex_unlock(&kvm->irq_lock);
223 synchronize_srcu(&kvm->irq_srcu);
224}
225
226void kvm_fire_mask_notifiers(struct kvm *kvm, unsigned irqchip, unsigned pin,
227 bool mask)
228{
229 struct kvm_irq_mask_notifier *kimn;
230 int idx, gsi;
231
232 idx = srcu_read_lock(&kvm->irq_srcu);
233 gsi = kvm_irq_map_chip_pin(kvm, irqchip, pin);
234 if (gsi != -1)
235 hlist_for_each_entry_rcu(kimn, &kvm->arch.mask_notifier_list, link)
236 if (kimn->irq == gsi)
237 kimn->func(kimn, mask);
238 srcu_read_unlock(&kvm->irq_srcu, idx);
239}
240
241static int kvm_hv_set_sint(struct kvm_kernel_irq_routing_entry *e,
242 struct kvm *kvm, int irq_source_id, int level,
243 bool line_status)
244{
245 if (!level)
246 return -1;
247
248 return kvm_hv_synic_set_irq(kvm, e->hv_sint.vcpu, e->hv_sint.sint);
249}
250
251int kvm_set_routing_entry(struct kvm_kernel_irq_routing_entry *e,
252 const struct kvm_irq_routing_entry *ue)
253{
254 int r = -EINVAL;
255 int delta;
256 unsigned max_pin;
257
258 switch (ue->type) {
259 case KVM_IRQ_ROUTING_IRQCHIP:
260 delta = 0;
261 switch (ue->u.irqchip.irqchip) {
262 case KVM_IRQCHIP_PIC_MASTER:
263 e->set = kvm_set_pic_irq;
264 max_pin = PIC_NUM_PINS;
265 break;
266 case KVM_IRQCHIP_PIC_SLAVE:
267 e->set = kvm_set_pic_irq;
268 max_pin = PIC_NUM_PINS;
269 delta = 8;
270 break;
271 case KVM_IRQCHIP_IOAPIC:
272 max_pin = KVM_IOAPIC_NUM_PINS;
273 e->set = kvm_set_ioapic_irq;
274 break;
275 default:
276 goto out;
277 }
278 e->irqchip.irqchip = ue->u.irqchip.irqchip;
279 e->irqchip.pin = ue->u.irqchip.pin + delta;
280 if (e->irqchip.pin >= max_pin)
281 goto out;
282 break;
283 case KVM_IRQ_ROUTING_MSI:
284 e->set = kvm_set_msi;
285 e->msi.address_lo = ue->u.msi.address_lo;
286 e->msi.address_hi = ue->u.msi.address_hi;
287 e->msi.data = ue->u.msi.data;
288 break;
289 case KVM_IRQ_ROUTING_HV_SINT:
290 e->set = kvm_hv_set_sint;
291 e->hv_sint.vcpu = ue->u.hv_sint.vcpu;
292 e->hv_sint.sint = ue->u.hv_sint.sint;
293 break;
294 default:
295 goto out;
296 }
297
298 r = 0;
299out:
300 return r;
301}
302
303bool kvm_intr_is_single_vcpu(struct kvm *kvm, struct kvm_lapic_irq *irq,
304 struct kvm_vcpu **dest_vcpu)
305{
306 int i, r = 0;
307 struct kvm_vcpu *vcpu;
308
309 if (kvm_intr_is_single_vcpu_fast(kvm, irq, dest_vcpu))
310 return true;
311
312 kvm_for_each_vcpu(i, vcpu, kvm) {
313 if (!kvm_apic_present(vcpu))
314 continue;
315
316 if (!kvm_apic_match_dest(vcpu, NULL, irq->shorthand,
317 irq->dest_id, irq->dest_mode))
318 continue;
319
320 if (++r == 2)
321 return false;
322
323 *dest_vcpu = vcpu;
324 }
325
326 return r == 1;
327}
328EXPORT_SYMBOL_GPL(kvm_intr_is_single_vcpu);
329
330#define IOAPIC_ROUTING_ENTRY(irq) \
331 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
332 .u.irqchip = { .irqchip = KVM_IRQCHIP_IOAPIC, .pin = (irq) } }
333#define ROUTING_ENTRY1(irq) IOAPIC_ROUTING_ENTRY(irq)
334
335#define PIC_ROUTING_ENTRY(irq) \
336 { .gsi = irq, .type = KVM_IRQ_ROUTING_IRQCHIP, \
337 .u.irqchip = { .irqchip = SELECT_PIC(irq), .pin = (irq) % 8 } }
338#define ROUTING_ENTRY2(irq) \
339 IOAPIC_ROUTING_ENTRY(irq), PIC_ROUTING_ENTRY(irq)
340
341static const struct kvm_irq_routing_entry default_routing[] = {
342 ROUTING_ENTRY2(0), ROUTING_ENTRY2(1),
343 ROUTING_ENTRY2(2), ROUTING_ENTRY2(3),
344 ROUTING_ENTRY2(4), ROUTING_ENTRY2(5),
345 ROUTING_ENTRY2(6), ROUTING_ENTRY2(7),
346 ROUTING_ENTRY2(8), ROUTING_ENTRY2(9),
347 ROUTING_ENTRY2(10), ROUTING_ENTRY2(11),
348 ROUTING_ENTRY2(12), ROUTING_ENTRY2(13),
349 ROUTING_ENTRY2(14), ROUTING_ENTRY2(15),
350 ROUTING_ENTRY1(16), ROUTING_ENTRY1(17),
351 ROUTING_ENTRY1(18), ROUTING_ENTRY1(19),
352 ROUTING_ENTRY1(20), ROUTING_ENTRY1(21),
353 ROUTING_ENTRY1(22), ROUTING_ENTRY1(23),
354};
355
356int kvm_setup_default_irq_routing(struct kvm *kvm)
357{
358 return kvm_set_irq_routing(kvm, default_routing,
359 ARRAY_SIZE(default_routing), 0);
360}
361
362static const struct kvm_irq_routing_entry empty_routing[] = {};
363
364int kvm_setup_empty_irq_routing(struct kvm *kvm)
365{
366 return kvm_set_irq_routing(kvm, empty_routing, 0, 0);
367}
368
369void kvm_arch_post_irq_routing_update(struct kvm *kvm)
370{
371 if (ioapic_in_kernel(kvm) || !irqchip_in_kernel(kvm))
372 return;
373 kvm_make_scan_ioapic_request(kvm);
374}
375
376void kvm_scan_ioapic_routes(struct kvm_vcpu *vcpu,
377 ulong *ioapic_handled_vectors)
378{
379 struct kvm *kvm = vcpu->kvm;
380 struct kvm_kernel_irq_routing_entry *entry;
381 struct kvm_irq_routing_table *table;
382 u32 i, nr_ioapic_pins;
383 int idx;
384
385 /* kvm->irq_routing must be read after clearing
386 * KVM_SCAN_IOAPIC. */
387 smp_mb();
388 idx = srcu_read_lock(&kvm->irq_srcu);
389 table = srcu_dereference(kvm->irq_routing, &kvm->irq_srcu);
390 nr_ioapic_pins = min_t(u32, table->nr_rt_entries,
391 kvm->arch.nr_reserved_ioapic_pins);
392 for (i = 0; i < nr_ioapic_pins; ++i) {
393 hlist_for_each_entry(entry, &table->map[i], link) {
394 u32 dest_id, dest_mode;
395 bool level;
396
397 if (entry->type != KVM_IRQ_ROUTING_MSI)
398 continue;
399 dest_id = (entry->msi.address_lo >> 12) & 0xff;
400 dest_mode = (entry->msi.address_lo >> 2) & 0x1;
401 level = entry->msi.data & MSI_DATA_TRIGGER_LEVEL;
402 if (level && kvm_apic_match_dest(vcpu, NULL, 0,
403 dest_id, dest_mode)) {
404 u32 vector = entry->msi.data & 0xff;
405
406 __set_bit(vector,
407 ioapic_handled_vectors);
408 }
409 }
410 }
411 srcu_read_unlock(&kvm->irq_srcu, idx);
412}
413
414int kvm_arch_set_irq(struct kvm_kernel_irq_routing_entry *irq, struct kvm *kvm,
415 int irq_source_id, int level, bool line_status)
416{
417 switch (irq->type) {
418 case KVM_IRQ_ROUTING_HV_SINT:
419 return kvm_hv_set_sint(irq, kvm, irq_source_id, level,
420 line_status);
421 default:
422 return -EWOULDBLOCK;
423 }
424}
425
426void kvm_arch_irq_routing_update(struct kvm *kvm)
427{
428 kvm_hv_irq_routing_update(kvm);
429}