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1// SPDX-License-Identifier: GPL-2.0
2/*
3 * Machine check handler
4 *
5 * Copyright IBM Corp. 2000, 2009
6 * Author(s): Ingo Adlung <adlung@de.ibm.com>,
7 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
8 * Cornelia Huck <cornelia.huck@de.ibm.com>,
9 */
10
11#include <linux/kernel_stat.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14#include <linux/entry-common.h>
15#include <linux/hardirq.h>
16#include <linux/log2.h>
17#include <linux/kprobes.h>
18#include <linux/kmemleak.h>
19#include <linux/time.h>
20#include <linux/module.h>
21#include <linux/sched/signal.h>
22#include <linux/kvm_host.h>
23#include <linux/export.h>
24#include <asm/lowcore.h>
25#include <asm/ctlreg.h>
26#include <asm/fpu.h>
27#include <asm/smp.h>
28#include <asm/stp.h>
29#include <asm/cputime.h>
30#include <asm/nmi.h>
31#include <asm/crw.h>
32#include <asm/asm-offsets.h>
33#include <asm/pai.h>
34#include <asm/vtime.h>
35
36struct mcck_struct {
37 unsigned int kill_task : 1;
38 unsigned int channel_report : 1;
39 unsigned int warning : 1;
40 unsigned int stp_queue : 1;
41 unsigned long mcck_code;
42};
43
44static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
45
46static inline int nmi_needs_mcesa(void)
47{
48 return cpu_has_vx() || MACHINE_HAS_GS;
49}
50
51/*
52 * The initial machine check extended save area for the boot CPU.
53 * It will be replaced on the boot CPU reinit with an allocated
54 * structure. The structure is required for machine check happening
55 * early in the boot process.
56 */
57static struct mcesa boot_mcesa __aligned(MCESA_MAX_SIZE);
58
59void __init nmi_alloc_mcesa_early(u64 *mcesad)
60{
61 if (!nmi_needs_mcesa())
62 return;
63 *mcesad = __pa(&boot_mcesa);
64 if (MACHINE_HAS_GS)
65 *mcesad |= ilog2(MCESA_MAX_SIZE);
66}
67
68int nmi_alloc_mcesa(u64 *mcesad)
69{
70 unsigned long size;
71 void *origin;
72
73 *mcesad = 0;
74 if (!nmi_needs_mcesa())
75 return 0;
76 size = MACHINE_HAS_GS ? MCESA_MAX_SIZE : MCESA_MIN_SIZE;
77 origin = kmalloc(size, GFP_KERNEL);
78 if (!origin)
79 return -ENOMEM;
80 /* The pointer is stored with mcesa_bits ORed in */
81 kmemleak_not_leak(origin);
82 *mcesad = __pa(origin);
83 if (MACHINE_HAS_GS)
84 *mcesad |= ilog2(MCESA_MAX_SIZE);
85 return 0;
86}
87
88void nmi_free_mcesa(u64 *mcesad)
89{
90 if (!nmi_needs_mcesa())
91 return;
92 kfree(__va(*mcesad & MCESA_ORIGIN_MASK));
93}
94
95static __always_inline char *nmi_puts(char *dest, const char *src)
96{
97 while (*src)
98 *dest++ = *src++;
99 *dest = 0;
100 return dest;
101}
102
103static __always_inline char *u64_to_hex(char *dest, u64 val)
104{
105 int i, num;
106
107 for (i = 1; i <= 16; i++) {
108 num = (val >> (64 - 4 * i)) & 0xf;
109 if (num >= 10)
110 *dest++ = 'A' + num - 10;
111 else
112 *dest++ = '0' + num;
113 }
114 *dest = 0;
115 return dest;
116}
117
118static notrace void s390_handle_damage(void)
119{
120 struct lowcore *lc = get_lowcore();
121 union ctlreg0 cr0, cr0_new;
122 char message[100];
123 psw_t psw_save;
124 char *ptr;
125
126 smp_emergency_stop();
127 diag_amode31_ops.diag308_reset();
128 ptr = nmi_puts(message, "System stopped due to unrecoverable machine check, code: 0x");
129 u64_to_hex(ptr, lc->mcck_interruption_code);
130
131 /*
132 * Disable low address protection and make machine check new PSW a
133 * disabled wait PSW. Any additional machine check cannot be handled.
134 */
135 local_ctl_store(0, &cr0.reg);
136 cr0_new = cr0;
137 cr0_new.lap = 0;
138 local_ctl_load(0, &cr0_new.reg);
139 psw_save = lc->mcck_new_psw;
140 psw_bits(lc->mcck_new_psw).io = 0;
141 psw_bits(lc->mcck_new_psw).ext = 0;
142 psw_bits(lc->mcck_new_psw).wait = 1;
143 sclp_emergency_printk(message);
144
145 /*
146 * Restore machine check new PSW and control register 0 to original
147 * values. This makes possible system dump analysis easier.
148 */
149 lc->mcck_new_psw = psw_save;
150 local_ctl_load(0, &cr0.reg);
151 disabled_wait();
152 while (1);
153}
154NOKPROBE_SYMBOL(s390_handle_damage);
155
156/*
157 * Main machine check handler function. Will be called with interrupts disabled
158 * and machine checks enabled.
159 */
160void s390_handle_mcck(void)
161{
162 struct mcck_struct mcck;
163 unsigned long mflags;
164
165 /*
166 * Disable machine checks and get the current state of accumulated
167 * machine checks. Afterwards delete the old state and enable machine
168 * checks again.
169 */
170 local_mcck_save(mflags);
171 mcck = *this_cpu_ptr(&cpu_mcck);
172 memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck));
173 local_mcck_restore(mflags);
174
175 if (mcck.channel_report)
176 crw_handle_channel_report();
177 /*
178 * A warning may remain for a prolonged period on the bare iron.
179 * (actually until the machine is powered off, or the problem is gone)
180 * So we just stop listening for the WARNING MCH and avoid continuously
181 * being interrupted. One caveat is however, that we must do this per
182 * processor and cannot use the smp version of ctl_clear_bit().
183 * On VM we only get one interrupt per virtally presented machinecheck.
184 * Though one suffices, we may get one interrupt per (virtual) cpu.
185 */
186 if (mcck.warning) { /* WARNING pending ? */
187 static int mchchk_wng_posted = 0;
188
189 /* Use single cpu clear, as we cannot handle smp here. */
190 local_ctl_clear_bit(14, CR14_WARNING_SUBMASK_BIT);
191 if (xchg(&mchchk_wng_posted, 1) == 0)
192 kill_cad_pid(SIGPWR, 1);
193 }
194 if (mcck.stp_queue)
195 stp_queue_work();
196 if (mcck.kill_task) {
197 printk(KERN_EMERG "mcck: Terminating task because of machine "
198 "malfunction (code 0x%016lx).\n", mcck.mcck_code);
199 printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
200 current->comm, current->pid);
201 if (is_global_init(current))
202 panic("mcck: Attempting to kill init!\n");
203 do_send_sig_info(SIGKILL, SEND_SIG_PRIV, current, PIDTYPE_PID);
204 }
205}
206
207/**
208 * nmi_registers_valid - verify if registers are valid
209 * @mci: machine check interruption code
210 *
211 * Inspect a machine check interruption code and verify if all required
212 * registers are valid. For some registers the corresponding validity bit is
213 * ignored and the registers are set to the expected value.
214 * Returns true if all registers are valid, otherwise false.
215 */
216static bool notrace nmi_registers_valid(union mci mci)
217{
218 union ctlreg2 cr2;
219
220 /*
221 * The getcpu vdso syscall reads the CPU number from the programmable
222 * field of the TOD clock. Disregard the TOD programmable register
223 * validity bit and load the CPU number into the TOD programmable field
224 * unconditionally.
225 */
226 set_tod_programmable_field(raw_smp_processor_id());
227 /*
228 * Set the clock comparator register to the next expected value.
229 */
230 set_clock_comparator(get_lowcore()->clock_comparator);
231 if (!mci.gr || !mci.fp || !mci.fc)
232 return false;
233 /*
234 * The vector validity must only be checked if not running a
235 * KVM guest. For KVM guests the machine check is forwarded by
236 * KVM and it is the responsibility of the guest to take
237 * appropriate actions. The host vector or FPU values have been
238 * saved by KVM and will be restored by KVM.
239 */
240 if (!mci.vr && !test_cpu_flag(CIF_MCCK_GUEST))
241 return false;
242 if (!mci.ar)
243 return false;
244 /*
245 * Two cases for guarded storage registers:
246 * - machine check in kernel or userspace
247 * - machine check while running SIE (KVM guest)
248 * For kernel or userspace the userspace values of guarded storage
249 * control can not be recreated, the process must be terminated.
250 * For SIE the guest values of guarded storage can not be recreated.
251 * This is either due to a bug or due to GS being disabled in the
252 * guest. The guest will be notified by KVM code and the guests machine
253 * check handling must take care of this. The host values are saved by
254 * KVM and are not affected.
255 */
256 cr2.reg = get_lowcore()->cregs_save_area[2];
257 if (cr2.gse && !mci.gs && !test_cpu_flag(CIF_MCCK_GUEST))
258 return false;
259 if (!mci.ms || !mci.pm || !mci.ia)
260 return false;
261 return true;
262}
263NOKPROBE_SYMBOL(nmi_registers_valid);
264
265/*
266 * Backup the guest's machine check info to its description block
267 */
268static void notrace s390_backup_mcck_info(struct pt_regs *regs)
269{
270 struct mcck_volatile_info *mcck_backup;
271 struct sie_page *sie_page;
272
273 /* r14 contains the sie block, which was set in sie64a */
274 struct kvm_s390_sie_block *sie_block = phys_to_virt(regs->gprs[14]);
275
276 if (sie_block == NULL)
277 /* Something's seriously wrong, stop system. */
278 s390_handle_damage();
279
280 sie_page = container_of(sie_block, struct sie_page, sie_block);
281 mcck_backup = &sie_page->mcck_info;
282 mcck_backup->mcic = get_lowcore()->mcck_interruption_code &
283 ~(MCCK_CODE_CP | MCCK_CODE_EXT_DAMAGE);
284 mcck_backup->ext_damage_code = get_lowcore()->external_damage_code;
285 mcck_backup->failing_storage_address = get_lowcore()->failing_storage_address;
286}
287NOKPROBE_SYMBOL(s390_backup_mcck_info);
288
289#define MAX_IPD_COUNT 29
290#define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */
291
292#define ED_STP_ISLAND 6 /* External damage STP island check */
293#define ED_STP_SYNC 7 /* External damage STP sync check */
294
295#define MCCK_CODE_NO_GUEST (MCCK_CODE_CP | MCCK_CODE_EXT_DAMAGE)
296
297/*
298 * machine check handler.
299 */
300void notrace s390_do_machine_check(struct pt_regs *regs)
301{
302 static int ipd_count;
303 static DEFINE_SPINLOCK(ipd_lock);
304 static unsigned long long last_ipd;
305 struct lowcore *lc = get_lowcore();
306 struct mcck_struct *mcck;
307 unsigned long long tmp;
308 irqentry_state_t irq_state;
309 union mci mci;
310 unsigned long mcck_dam_code;
311 int mcck_pending = 0;
312
313 irq_state = irqentry_nmi_enter(regs);
314
315 if (user_mode(regs))
316 update_timer_mcck();
317 inc_irq_stat(NMI_NMI);
318 mci.val = lc->mcck_interruption_code;
319 mcck = this_cpu_ptr(&cpu_mcck);
320
321 /*
322 * Reinject the instruction processing damages' machine checks
323 * including Delayed Access Exception into the guest
324 * instead of damaging the host if they happen in the guest.
325 */
326 if (mci.pd && !test_cpu_flag(CIF_MCCK_GUEST)) {
327 if (mci.b) {
328 /* Processing backup -> verify if we can survive this */
329 u64 z_mcic, o_mcic, t_mcic;
330 z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
331 o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
332 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
333 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
334 1ULL<<16);
335 t_mcic = mci.val;
336
337 if (((t_mcic & z_mcic) != 0) ||
338 ((t_mcic & o_mcic) != o_mcic)) {
339 s390_handle_damage();
340 }
341
342 /*
343 * Nullifying exigent condition, therefore we might
344 * retry this instruction.
345 */
346 spin_lock(&ipd_lock);
347 tmp = get_tod_clock();
348 if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
349 ipd_count++;
350 else
351 ipd_count = 1;
352 last_ipd = tmp;
353 if (ipd_count == MAX_IPD_COUNT)
354 s390_handle_damage();
355 spin_unlock(&ipd_lock);
356 } else {
357 /* Processing damage -> stopping machine */
358 s390_handle_damage();
359 }
360 }
361 if (!nmi_registers_valid(mci)) {
362 if (!user_mode(regs))
363 s390_handle_damage();
364 /*
365 * Couldn't restore all register contents for the
366 * user space process -> mark task for termination.
367 */
368 mcck->kill_task = 1;
369 mcck->mcck_code = mci.val;
370 mcck_pending = 1;
371 }
372
373 /*
374 * Backup the machine check's info if it happens when the guest
375 * is running.
376 */
377 if (test_cpu_flag(CIF_MCCK_GUEST))
378 s390_backup_mcck_info(regs);
379
380 if (mci.cd) {
381 /* Timing facility damage */
382 s390_handle_damage();
383 }
384 if (mci.ed && mci.ec) {
385 /* External damage */
386 if (lc->external_damage_code & (1U << ED_STP_SYNC))
387 mcck->stp_queue |= stp_sync_check();
388 if (lc->external_damage_code & (1U << ED_STP_ISLAND))
389 mcck->stp_queue |= stp_island_check();
390 mcck_pending = 1;
391 }
392 /*
393 * Reinject storage related machine checks into the guest if they
394 * happen when the guest is running.
395 */
396 if (!test_cpu_flag(CIF_MCCK_GUEST)) {
397 /* Storage error uncorrected */
398 if (mci.se)
399 s390_handle_damage();
400 /* Storage key-error uncorrected */
401 if (mci.ke)
402 s390_handle_damage();
403 /* Storage degradation */
404 if (mci.ds && mci.fa)
405 s390_handle_damage();
406 }
407 if (mci.cp) {
408 /* Channel report word pending */
409 mcck->channel_report = 1;
410 mcck_pending = 1;
411 }
412 if (mci.w) {
413 /* Warning pending */
414 mcck->warning = 1;
415 mcck_pending = 1;
416 }
417
418 /*
419 * If there are only Channel Report Pending and External Damage
420 * machine checks, they will not be reinjected into the guest
421 * because they refer to host conditions only.
422 */
423 mcck_dam_code = (mci.val & MCIC_SUBCLASS_MASK);
424 if (test_cpu_flag(CIF_MCCK_GUEST) &&
425 (mcck_dam_code & MCCK_CODE_NO_GUEST) != mcck_dam_code) {
426 /* Set exit reason code for host's later handling */
427 *((long *)(regs->gprs[15] + __SF_SIE_REASON)) = -EINTR;
428 }
429 clear_cpu_flag(CIF_MCCK_GUEST);
430
431 if (mcck_pending)
432 schedule_mcck_handler();
433
434 irqentry_nmi_exit(regs, irq_state);
435}
436NOKPROBE_SYMBOL(s390_do_machine_check);
437
438static int __init machine_check_init(void)
439{
440 system_ctl_set_bit(14, CR14_EXTERNAL_DAMAGE_SUBMASK_BIT);
441 system_ctl_set_bit(14, CR14_RECOVERY_SUBMASK_BIT);
442 system_ctl_set_bit(14, CR14_WARNING_SUBMASK_BIT);
443 return 0;
444}
445early_initcall(machine_check_init);
1/*
2 * Machine check handler
3 *
4 * Copyright IBM Corp. 2000, 2009
5 * Author(s): Ingo Adlung <adlung@de.ibm.com>,
6 * Martin Schwidefsky <schwidefsky@de.ibm.com>,
7 * Cornelia Huck <cornelia.huck@de.ibm.com>,
8 * Heiko Carstens <heiko.carstens@de.ibm.com>,
9 */
10
11#include <linux/kernel_stat.h>
12#include <linux/init.h>
13#include <linux/errno.h>
14#include <linux/hardirq.h>
15#include <linux/time.h>
16#include <linux/module.h>
17#include <asm/lowcore.h>
18#include <asm/smp.h>
19#include <asm/etr.h>
20#include <asm/cputime.h>
21#include <asm/nmi.h>
22#include <asm/crw.h>
23#include <asm/switch_to.h>
24#include <asm/ctl_reg.h>
25
26struct mcck_struct {
27 unsigned int kill_task : 1;
28 unsigned int channel_report : 1;
29 unsigned int warning : 1;
30 unsigned int etr_queue : 1;
31 unsigned int stp_queue : 1;
32 unsigned long mcck_code;
33};
34
35static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
36
37static void s390_handle_damage(void)
38{
39 smp_send_stop();
40 disabled_wait((unsigned long) __builtin_return_address(0));
41 while (1);
42}
43
44/*
45 * Main machine check handler function. Will be called with interrupts enabled
46 * or disabled and machine checks enabled or disabled.
47 */
48void s390_handle_mcck(void)
49{
50 unsigned long flags;
51 struct mcck_struct mcck;
52
53 /*
54 * Disable machine checks and get the current state of accumulated
55 * machine checks. Afterwards delete the old state and enable machine
56 * checks again.
57 */
58 local_irq_save(flags);
59 local_mcck_disable();
60 mcck = *this_cpu_ptr(&cpu_mcck);
61 memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck));
62 clear_cpu_flag(CIF_MCCK_PENDING);
63 local_mcck_enable();
64 local_irq_restore(flags);
65
66 if (mcck.channel_report)
67 crw_handle_channel_report();
68 /*
69 * A warning may remain for a prolonged period on the bare iron.
70 * (actually until the machine is powered off, or the problem is gone)
71 * So we just stop listening for the WARNING MCH and avoid continuously
72 * being interrupted. One caveat is however, that we must do this per
73 * processor and cannot use the smp version of ctl_clear_bit().
74 * On VM we only get one interrupt per virtally presented machinecheck.
75 * Though one suffices, we may get one interrupt per (virtual) cpu.
76 */
77 if (mcck.warning) { /* WARNING pending ? */
78 static int mchchk_wng_posted = 0;
79
80 /* Use single cpu clear, as we cannot handle smp here. */
81 __ctl_clear_bit(14, 24); /* Disable WARNING MCH */
82 if (xchg(&mchchk_wng_posted, 1) == 0)
83 kill_cad_pid(SIGPWR, 1);
84 }
85 if (mcck.etr_queue)
86 etr_queue_work();
87 if (mcck.stp_queue)
88 stp_queue_work();
89 if (mcck.kill_task) {
90 local_irq_enable();
91 printk(KERN_EMERG "mcck: Terminating task because of machine "
92 "malfunction (code 0x%016lx).\n", mcck.mcck_code);
93 printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
94 current->comm, current->pid);
95 do_exit(SIGSEGV);
96 }
97}
98EXPORT_SYMBOL_GPL(s390_handle_mcck);
99
100/*
101 * returns 0 if all registers could be validated
102 * returns 1 otherwise
103 */
104static int notrace s390_validate_registers(union mci mci)
105{
106 int kill_task;
107 u64 zero;
108 void *fpt_save_area, *fpt_creg_save_area;
109
110 kill_task = 0;
111 zero = 0;
112
113 if (!mci.gr) {
114 /*
115 * General purpose registers couldn't be restored and have
116 * unknown contents. Process needs to be terminated.
117 */
118 kill_task = 1;
119 }
120 if (!mci.fp) {
121 /*
122 * Floating point registers can't be restored and
123 * therefore the process needs to be terminated.
124 */
125 kill_task = 1;
126 }
127 fpt_save_area = &S390_lowcore.floating_pt_save_area;
128 fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area;
129 if (!mci.fc) {
130 /*
131 * Floating point control register can't be restored.
132 * Task will be terminated.
133 */
134 asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero));
135 kill_task = 1;
136 } else
137 asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area));
138
139 if (!MACHINE_HAS_VX) {
140 /* Validate floating point registers */
141 asm volatile(
142 " ld 0,0(%0)\n"
143 " ld 1,8(%0)\n"
144 " ld 2,16(%0)\n"
145 " ld 3,24(%0)\n"
146 " ld 4,32(%0)\n"
147 " ld 5,40(%0)\n"
148 " ld 6,48(%0)\n"
149 " ld 7,56(%0)\n"
150 " ld 8,64(%0)\n"
151 " ld 9,72(%0)\n"
152 " ld 10,80(%0)\n"
153 " ld 11,88(%0)\n"
154 " ld 12,96(%0)\n"
155 " ld 13,104(%0)\n"
156 " ld 14,112(%0)\n"
157 " ld 15,120(%0)\n"
158 : : "a" (fpt_save_area));
159 } else {
160 /* Validate vector registers */
161 union ctlreg0 cr0;
162
163 if (!mci.vr) {
164 /*
165 * Vector registers can't be restored and therefore
166 * the process needs to be terminated.
167 */
168 kill_task = 1;
169 }
170 cr0.val = S390_lowcore.cregs_save_area[0];
171 cr0.afp = cr0.vx = 1;
172 __ctl_load(cr0.val, 0, 0);
173 asm volatile(
174 " la 1,%0\n"
175 " .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */
176 " .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */
177 : : "Q" (*(struct vx_array *)
178 &S390_lowcore.vector_save_area) : "1");
179 __ctl_load(S390_lowcore.cregs_save_area[0], 0, 0);
180 }
181 /* Validate access registers */
182 asm volatile(
183 " lam 0,15,0(%0)"
184 : : "a" (&S390_lowcore.access_regs_save_area));
185 if (!mci.ar) {
186 /*
187 * Access registers have unknown contents.
188 * Terminating task.
189 */
190 kill_task = 1;
191 }
192 /* Validate control registers */
193 if (!mci.cr) {
194 /*
195 * Control registers have unknown contents.
196 * Can't recover and therefore stopping machine.
197 */
198 s390_handle_damage();
199 } else {
200 asm volatile(
201 " lctlg 0,15,0(%0)"
202 : : "a" (&S390_lowcore.cregs_save_area));
203 }
204 /*
205 * We don't even try to validate the TOD register, since we simply
206 * can't write something sensible into that register.
207 */
208 /*
209 * See if we can validate the TOD programmable register with its
210 * old contents (should be zero) otherwise set it to zero.
211 */
212 if (!mci.pr)
213 asm volatile(
214 " sr 0,0\n"
215 " sckpf"
216 : : : "0", "cc");
217 else
218 asm volatile(
219 " l 0,0(%0)\n"
220 " sckpf"
221 : : "a" (&S390_lowcore.tod_progreg_save_area)
222 : "0", "cc");
223 /* Validate clock comparator register */
224 set_clock_comparator(S390_lowcore.clock_comparator);
225 /* Check if old PSW is valid */
226 if (!mci.wp)
227 /*
228 * Can't tell if we come from user or kernel mode
229 * -> stopping machine.
230 */
231 s390_handle_damage();
232
233 if (!mci.ms || !mci.pm || !mci.ia)
234 kill_task = 1;
235
236 return kill_task;
237}
238
239#define MAX_IPD_COUNT 29
240#define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */
241
242#define ED_STP_ISLAND 6 /* External damage STP island check */
243#define ED_STP_SYNC 7 /* External damage STP sync check */
244#define ED_ETR_SYNC 12 /* External damage ETR sync check */
245#define ED_ETR_SWITCH 13 /* External damage ETR switch to local */
246
247/*
248 * machine check handler.
249 */
250void notrace s390_do_machine_check(struct pt_regs *regs)
251{
252 static int ipd_count;
253 static DEFINE_SPINLOCK(ipd_lock);
254 static unsigned long long last_ipd;
255 struct mcck_struct *mcck;
256 unsigned long long tmp;
257 union mci mci;
258 int umode;
259
260 nmi_enter();
261 inc_irq_stat(NMI_NMI);
262 mci.val = S390_lowcore.mcck_interruption_code;
263 mcck = this_cpu_ptr(&cpu_mcck);
264 umode = user_mode(regs);
265
266 if (mci.sd) {
267 /* System damage -> stopping machine */
268 s390_handle_damage();
269 }
270 if (mci.pd) {
271 if (mci.b) {
272 /* Processing backup -> verify if we can survive this */
273 u64 z_mcic, o_mcic, t_mcic;
274 z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
275 o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
276 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
277 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
278 1ULL<<16);
279 t_mcic = mci.val;
280
281 if (((t_mcic & z_mcic) != 0) ||
282 ((t_mcic & o_mcic) != o_mcic)) {
283 s390_handle_damage();
284 }
285
286 /*
287 * Nullifying exigent condition, therefore we might
288 * retry this instruction.
289 */
290 spin_lock(&ipd_lock);
291 tmp = get_tod_clock();
292 if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
293 ipd_count++;
294 else
295 ipd_count = 1;
296 last_ipd = tmp;
297 if (ipd_count == MAX_IPD_COUNT)
298 s390_handle_damage();
299 spin_unlock(&ipd_lock);
300 } else {
301 /* Processing damage -> stopping machine */
302 s390_handle_damage();
303 }
304 }
305 if (s390_validate_registers(mci)) {
306 if (umode) {
307 /*
308 * Couldn't restore all register contents while in
309 * user mode -> mark task for termination.
310 */
311 mcck->kill_task = 1;
312 mcck->mcck_code = mci.val;
313 set_cpu_flag(CIF_MCCK_PENDING);
314 } else {
315 /*
316 * Couldn't restore all register contents while in
317 * kernel mode -> stopping machine.
318 */
319 s390_handle_damage();
320 }
321 }
322 if (mci.cd) {
323 /* Timing facility damage */
324 s390_handle_damage();
325 }
326 if (mci.ed && mci.ec) {
327 /* External damage */
328 if (S390_lowcore.external_damage_code & (1U << ED_ETR_SYNC))
329 mcck->etr_queue |= etr_sync_check();
330 if (S390_lowcore.external_damage_code & (1U << ED_ETR_SWITCH))
331 mcck->etr_queue |= etr_switch_to_local();
332 if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
333 mcck->stp_queue |= stp_sync_check();
334 if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
335 mcck->stp_queue |= stp_island_check();
336 if (mcck->etr_queue || mcck->stp_queue)
337 set_cpu_flag(CIF_MCCK_PENDING);
338 }
339 if (mci.se)
340 /* Storage error uncorrected */
341 s390_handle_damage();
342 if (mci.ke)
343 /* Storage key-error uncorrected */
344 s390_handle_damage();
345 if (mci.ds && mci.fa)
346 /* Storage degradation */
347 s390_handle_damage();
348 if (mci.cp) {
349 /* Channel report word pending */
350 mcck->channel_report = 1;
351 set_cpu_flag(CIF_MCCK_PENDING);
352 }
353 if (mci.w) {
354 /* Warning pending */
355 mcck->warning = 1;
356 set_cpu_flag(CIF_MCCK_PENDING);
357 }
358 nmi_exit();
359}
360
361static int __init machine_check_init(void)
362{
363 ctl_set_bit(14, 25); /* enable external damage MCH */
364 ctl_set_bit(14, 27); /* enable system recovery MCH */
365 ctl_set_bit(14, 24); /* enable warning MCH */
366 return 0;
367}
368early_initcall(machine_check_init);