Loading...
1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
4 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
5 * Jaroslav Kysela <perex@perex.cz>,
6 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
7 * Abramo Bagnara <abramo@alsa-project.org>,
8 * Markus Gruber <gruber@eikon.tum.de>
9 *
10 * Rewritten from sonicvibes.c source.
11 *
12 * TODO:
13 * Rewrite better spinlocks
14 */
15
16/*
17 NOTES:
18 - Capture data is written unaligned starting from dma_base + 1 so I need to
19 disable mmap and to add a copy callback.
20 - After several cycle of the following:
21 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
22 a "playback write error (DMA or IRQ trouble?)" may happen.
23 This is due to playback interrupts not generated.
24 I suspect a timing issue.
25 - Sometimes the interrupt handler is invoked wrongly during playback.
26 This generates some harmless "Unexpected hw_pointer: wrong interrupt
27 acknowledge".
28 I've seen that using small period sizes.
29 Reproducible with:
30 mpg123 test.mp3 &
31 hdparm -t -T /dev/hda
32*/
33
34
35#include <linux/init.h>
36#include <linux/interrupt.h>
37#include <linux/pci.h>
38#include <linux/slab.h>
39#include <linux/gameport.h>
40#include <linux/module.h>
41#include <linux/delay.h>
42#include <linux/dma-mapping.h>
43#include <linux/io.h>
44#include <sound/core.h>
45#include <sound/control.h>
46#include <sound/pcm.h>
47#include <sound/opl3.h>
48#include <sound/mpu401.h>
49#include <sound/initval.h>
50#include <sound/tlv.h>
51
52MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
53MODULE_DESCRIPTION("ESS Solo-1");
54MODULE_LICENSE("GPL");
55
56#if IS_REACHABLE(CONFIG_GAMEPORT)
57#define SUPPORT_JOYSTICK 1
58#endif
59
60static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
61static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
62static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
63
64module_param_array(index, int, NULL, 0444);
65MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
66module_param_array(id, charp, NULL, 0444);
67MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
68module_param_array(enable, bool, NULL, 0444);
69MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
70
71#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
72
73#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
74
75#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
76
77#define SL_PCI_LEGACYCONTROL 0x40
78#define SL_PCI_CONFIG 0x50
79#define SL_PCI_DDMACONTROL 0x60
80
81#define ESSIO_REG_AUDIO2DMAADDR 0
82#define ESSIO_REG_AUDIO2DMACOUNT 4
83#define ESSIO_REG_AUDIO2MODE 6
84#define ESSIO_REG_IRQCONTROL 7
85
86#define ESSDM_REG_DMAADDR 0x00
87#define ESSDM_REG_DMACOUNT 0x04
88#define ESSDM_REG_DMACOMMAND 0x08
89#define ESSDM_REG_DMASTATUS 0x08
90#define ESSDM_REG_DMAMODE 0x0b
91#define ESSDM_REG_DMACLEAR 0x0d
92#define ESSDM_REG_DMAMASK 0x0f
93
94#define ESSSB_REG_FMLOWADDR 0x00
95#define ESSSB_REG_FMHIGHADDR 0x02
96#define ESSSB_REG_MIXERADDR 0x04
97#define ESSSB_REG_MIXERDATA 0x05
98
99#define ESSSB_IREG_AUDIO1 0x14
100#define ESSSB_IREG_MICMIX 0x1a
101#define ESSSB_IREG_RECSRC 0x1c
102#define ESSSB_IREG_MASTER 0x32
103#define ESSSB_IREG_FM 0x36
104#define ESSSB_IREG_AUXACD 0x38
105#define ESSSB_IREG_AUXB 0x3a
106#define ESSSB_IREG_PCSPEAKER 0x3c
107#define ESSSB_IREG_LINE 0x3e
108#define ESSSB_IREG_SPATCONTROL 0x50
109#define ESSSB_IREG_SPATLEVEL 0x52
110#define ESSSB_IREG_MASTER_LEFT 0x60
111#define ESSSB_IREG_MASTER_RIGHT 0x62
112#define ESSSB_IREG_MPU401CONTROL 0x64
113#define ESSSB_IREG_MICMIXRECORD 0x68
114#define ESSSB_IREG_AUDIO2RECORD 0x69
115#define ESSSB_IREG_AUXACDRECORD 0x6a
116#define ESSSB_IREG_FMRECORD 0x6b
117#define ESSSB_IREG_AUXBRECORD 0x6c
118#define ESSSB_IREG_MONO 0x6d
119#define ESSSB_IREG_LINERECORD 0x6e
120#define ESSSB_IREG_MONORECORD 0x6f
121#define ESSSB_IREG_AUDIO2SAMPLE 0x70
122#define ESSSB_IREG_AUDIO2MODE 0x71
123#define ESSSB_IREG_AUDIO2FILTER 0x72
124#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
125#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
126#define ESSSB_IREG_AUDIO2CONTROL1 0x78
127#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
128#define ESSSB_IREG_AUDIO2 0x7c
129
130#define ESSSB_REG_RESET 0x06
131
132#define ESSSB_REG_READDATA 0x0a
133#define ESSSB_REG_WRITEDATA 0x0c
134#define ESSSB_REG_READSTATUS 0x0c
135
136#define ESSSB_REG_STATUS 0x0e
137
138#define ESS_CMD_EXTSAMPLERATE 0xa1
139#define ESS_CMD_FILTERDIV 0xa2
140#define ESS_CMD_DMACNTRELOADL 0xa4
141#define ESS_CMD_DMACNTRELOADH 0xa5
142#define ESS_CMD_ANALOGCONTROL 0xa8
143#define ESS_CMD_IRQCONTROL 0xb1
144#define ESS_CMD_DRQCONTROL 0xb2
145#define ESS_CMD_RECLEVEL 0xb4
146#define ESS_CMD_SETFORMAT 0xb6
147#define ESS_CMD_SETFORMAT2 0xb7
148#define ESS_CMD_DMACONTROL 0xb8
149#define ESS_CMD_DMATYPE 0xb9
150#define ESS_CMD_OFFSETLEFT 0xba
151#define ESS_CMD_OFFSETRIGHT 0xbb
152#define ESS_CMD_READREG 0xc0
153#define ESS_CMD_ENABLEEXT 0xc6
154#define ESS_CMD_PAUSEDMA 0xd0
155#define ESS_CMD_ENABLEAUDIO1 0xd1
156#define ESS_CMD_STOPAUDIO1 0xd3
157#define ESS_CMD_AUDIO1STATUS 0xd8
158#define ESS_CMD_CONTDMA 0xd4
159#define ESS_CMD_TESTIRQ 0xf2
160
161#define ESS_RECSRC_MIC 0
162#define ESS_RECSRC_AUXACD 2
163#define ESS_RECSRC_AUXB 5
164#define ESS_RECSRC_LINE 6
165#define ESS_RECSRC_NONE 7
166
167#define DAC1 0x01
168#define ADC1 0x02
169#define DAC2 0x04
170
171/*
172
173 */
174
175#define SAVED_REG_SIZE 32 /* max. number of registers to save */
176
177struct es1938 {
178 int irq;
179
180 unsigned long io_port;
181 unsigned long sb_port;
182 unsigned long vc_port;
183 unsigned long mpu_port;
184 unsigned long game_port;
185 unsigned long ddma_port;
186
187 unsigned char irqmask;
188 unsigned char revision;
189
190 struct snd_kcontrol *hw_volume;
191 struct snd_kcontrol *hw_switch;
192 struct snd_kcontrol *master_volume;
193 struct snd_kcontrol *master_switch;
194
195 struct pci_dev *pci;
196 struct snd_card *card;
197 struct snd_pcm *pcm;
198 struct snd_pcm_substream *capture_substream;
199 struct snd_pcm_substream *playback1_substream;
200 struct snd_pcm_substream *playback2_substream;
201 struct snd_rawmidi *rmidi;
202
203 unsigned int dma1_size;
204 unsigned int dma2_size;
205 unsigned int dma1_start;
206 unsigned int dma2_start;
207 unsigned int dma1_shift;
208 unsigned int dma2_shift;
209 unsigned int last_capture_dmaaddr;
210 unsigned int active;
211
212 spinlock_t reg_lock;
213 spinlock_t mixer_lock;
214 struct snd_info_entry *proc_entry;
215
216#ifdef SUPPORT_JOYSTICK
217 struct gameport *gameport;
218#endif
219 unsigned char saved_regs[SAVED_REG_SIZE];
220};
221
222static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
223
224static const struct pci_device_id snd_es1938_ids[] = {
225 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
226 { 0, }
227};
228
229MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
230
231#define RESET_LOOP_TIMEOUT 0x10000
232#define WRITE_LOOP_TIMEOUT 0x10000
233#define GET_LOOP_TIMEOUT 0x01000
234
235/* -----------------------------------------------------------------
236 * Write to a mixer register
237 * -----------------------------------------------------------------*/
238static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
239{
240 unsigned long flags;
241 spin_lock_irqsave(&chip->mixer_lock, flags);
242 outb(reg, SLSB_REG(chip, MIXERADDR));
243 outb(val, SLSB_REG(chip, MIXERDATA));
244 spin_unlock_irqrestore(&chip->mixer_lock, flags);
245 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
246}
247
248/* -----------------------------------------------------------------
249 * Read from a mixer register
250 * -----------------------------------------------------------------*/
251static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
252{
253 int data;
254 unsigned long flags;
255 spin_lock_irqsave(&chip->mixer_lock, flags);
256 outb(reg, SLSB_REG(chip, MIXERADDR));
257 data = inb(SLSB_REG(chip, MIXERDATA));
258 spin_unlock_irqrestore(&chip->mixer_lock, flags);
259 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
260 return data;
261}
262
263/* -----------------------------------------------------------------
264 * Write to some bits of a mixer register (return old value)
265 * -----------------------------------------------------------------*/
266static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
267 unsigned char mask, unsigned char val)
268{
269 unsigned long flags;
270 unsigned char old, new, oval;
271 spin_lock_irqsave(&chip->mixer_lock, flags);
272 outb(reg, SLSB_REG(chip, MIXERADDR));
273 old = inb(SLSB_REG(chip, MIXERDATA));
274 oval = old & mask;
275 if (val != oval) {
276 new = (old & ~mask) | (val & mask);
277 outb(new, SLSB_REG(chip, MIXERDATA));
278 dev_dbg(chip->card->dev,
279 "Mixer reg %02x was %02x, set to %02x\n",
280 reg, old, new);
281 }
282 spin_unlock_irqrestore(&chip->mixer_lock, flags);
283 return oval;
284}
285
286/* -----------------------------------------------------------------
287 * Write command to Controller Registers
288 * -----------------------------------------------------------------*/
289static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
290{
291 int i;
292 unsigned char v;
293 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
294 v = inb(SLSB_REG(chip, READSTATUS));
295 if (!(v & 0x80)) {
296 outb(cmd, SLSB_REG(chip, WRITEDATA));
297 return;
298 }
299 }
300 dev_err(chip->card->dev,
301 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
302}
303
304/* -----------------------------------------------------------------
305 * Read the Read Data Buffer
306 * -----------------------------------------------------------------*/
307static int snd_es1938_get_byte(struct es1938 *chip)
308{
309 int i;
310 unsigned char v;
311 for (i = GET_LOOP_TIMEOUT; i; i--) {
312 v = inb(SLSB_REG(chip, STATUS));
313 if (v & 0x80)
314 return inb(SLSB_REG(chip, READDATA));
315 }
316 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
317 return -ENODEV;
318}
319
320/* -----------------------------------------------------------------
321 * Write value cmd register
322 * -----------------------------------------------------------------*/
323static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
324{
325 unsigned long flags;
326 spin_lock_irqsave(&chip->reg_lock, flags);
327 snd_es1938_write_cmd(chip, reg);
328 snd_es1938_write_cmd(chip, val);
329 spin_unlock_irqrestore(&chip->reg_lock, flags);
330 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
331}
332
333/* -----------------------------------------------------------------
334 * Read data from cmd register and return it
335 * -----------------------------------------------------------------*/
336static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
337{
338 unsigned char val;
339 unsigned long flags;
340 spin_lock_irqsave(&chip->reg_lock, flags);
341 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
342 snd_es1938_write_cmd(chip, reg);
343 val = snd_es1938_get_byte(chip);
344 spin_unlock_irqrestore(&chip->reg_lock, flags);
345 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
346 return val;
347}
348
349/* -----------------------------------------------------------------
350 * Write data to cmd register and return old value
351 * -----------------------------------------------------------------*/
352static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
353 unsigned char val)
354{
355 unsigned long flags;
356 unsigned char old, new, oval;
357 spin_lock_irqsave(&chip->reg_lock, flags);
358 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
359 snd_es1938_write_cmd(chip, reg);
360 old = snd_es1938_get_byte(chip);
361 oval = old & mask;
362 if (val != oval) {
363 snd_es1938_write_cmd(chip, reg);
364 new = (old & ~mask) | (val & mask);
365 snd_es1938_write_cmd(chip, new);
366 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
367 reg, old, new);
368 }
369 spin_unlock_irqrestore(&chip->reg_lock, flags);
370 return oval;
371}
372
373/* --------------------------------------------------------------------
374 * Reset the chip
375 * --------------------------------------------------------------------*/
376static void snd_es1938_reset(struct es1938 *chip)
377{
378 int i;
379
380 outb(3, SLSB_REG(chip, RESET));
381 inb(SLSB_REG(chip, RESET));
382 outb(0, SLSB_REG(chip, RESET));
383 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
384 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
385 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
386 goto __next;
387 }
388 }
389 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
390
391 __next:
392 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
393
394 /* Demand transfer DMA: 4 bytes per DMA request */
395 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
396
397 /* Change behaviour of register A1
398 4x oversampling
399 2nd channel DAC asynchronous */
400 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
401 /* enable/select DMA channel and IRQ channel */
402 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
403 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
404 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
405 /* Set spatializer parameters to recommended values */
406 snd_es1938_mixer_write(chip, 0x54, 0x8f);
407 snd_es1938_mixer_write(chip, 0x56, 0x95);
408 snd_es1938_mixer_write(chip, 0x58, 0x94);
409 snd_es1938_mixer_write(chip, 0x5a, 0x80);
410}
411
412/* --------------------------------------------------------------------
413 * Reset the FIFOs
414 * --------------------------------------------------------------------*/
415static void snd_es1938_reset_fifo(struct es1938 *chip)
416{
417 outb(2, SLSB_REG(chip, RESET));
418 outb(0, SLSB_REG(chip, RESET));
419}
420
421static const struct snd_ratnum clocks[2] = {
422 {
423 .num = 793800,
424 .den_min = 1,
425 .den_max = 128,
426 .den_step = 1,
427 },
428 {
429 .num = 768000,
430 .den_min = 1,
431 .den_max = 128,
432 .den_step = 1,
433 }
434};
435
436static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
437 .nrats = 2,
438 .rats = clocks,
439};
440
441
442static void snd_es1938_rate_set(struct es1938 *chip,
443 struct snd_pcm_substream *substream,
444 int mode)
445{
446 unsigned int bits, div0;
447 struct snd_pcm_runtime *runtime = substream->runtime;
448 if (runtime->rate_num == clocks[0].num)
449 bits = 128 - runtime->rate_den;
450 else
451 bits = 256 - runtime->rate_den;
452
453 /* set filter register */
454 div0 = 256 - 7160000*20/(8*82*runtime->rate);
455
456 if (mode == DAC2) {
457 snd_es1938_mixer_write(chip, 0x70, bits);
458 snd_es1938_mixer_write(chip, 0x72, div0);
459 } else {
460 snd_es1938_write(chip, 0xA1, bits);
461 snd_es1938_write(chip, 0xA2, div0);
462 }
463}
464
465/* --------------------------------------------------------------------
466 * Configure Solo1 builtin DMA Controller
467 * --------------------------------------------------------------------*/
468
469static void snd_es1938_playback1_setdma(struct es1938 *chip)
470{
471 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
472 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
473 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
474 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
475}
476
477static void snd_es1938_playback2_setdma(struct es1938 *chip)
478{
479 /* Enable DMA controller */
480 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
481 /* 1. Master reset */
482 outb(0, SLDM_REG(chip, DMACLEAR));
483 /* 2. Mask DMA */
484 outb(1, SLDM_REG(chip, DMAMASK));
485 outb(0x18, SLDM_REG(chip, DMAMODE));
486 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
487 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
488 /* 3. Unmask DMA */
489 outb(0, SLDM_REG(chip, DMAMASK));
490}
491
492static void snd_es1938_capture_setdma(struct es1938 *chip)
493{
494 /* Enable DMA controller */
495 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
496 /* 1. Master reset */
497 outb(0, SLDM_REG(chip, DMACLEAR));
498 /* 2. Mask DMA */
499 outb(1, SLDM_REG(chip, DMAMASK));
500 outb(0x14, SLDM_REG(chip, DMAMODE));
501 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
502 chip->last_capture_dmaaddr = chip->dma1_start;
503 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
504 /* 3. Unmask DMA */
505 outb(0, SLDM_REG(chip, DMAMASK));
506}
507
508/* ----------------------------------------------------------------------
509 *
510 * *** PCM part ***
511 */
512
513static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
514 int cmd)
515{
516 struct es1938 *chip = snd_pcm_substream_chip(substream);
517 int val;
518 switch (cmd) {
519 case SNDRV_PCM_TRIGGER_START:
520 case SNDRV_PCM_TRIGGER_RESUME:
521 val = 0x0f;
522 chip->active |= ADC1;
523 break;
524 case SNDRV_PCM_TRIGGER_STOP:
525 case SNDRV_PCM_TRIGGER_SUSPEND:
526 val = 0x00;
527 chip->active &= ~ADC1;
528 break;
529 default:
530 return -EINVAL;
531 }
532 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
533 return 0;
534}
535
536static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
537 int cmd)
538{
539 struct es1938 *chip = snd_pcm_substream_chip(substream);
540 switch (cmd) {
541 case SNDRV_PCM_TRIGGER_START:
542 case SNDRV_PCM_TRIGGER_RESUME:
543 /* According to the documentation this should be:
544 0x13 but that value may randomly swap stereo channels */
545 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
546 udelay(10);
547 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
548 /* This two stage init gives the FIFO -> DAC connection time to
549 * settle before first data from DMA flows in. This should ensure
550 * no swapping of stereo channels. Report a bug if otherwise :-) */
551 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
552 chip->active |= DAC2;
553 break;
554 case SNDRV_PCM_TRIGGER_STOP:
555 case SNDRV_PCM_TRIGGER_SUSPEND:
556 outb(0, SLIO_REG(chip, AUDIO2MODE));
557 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
558 chip->active &= ~DAC2;
559 break;
560 default:
561 return -EINVAL;
562 }
563 return 0;
564}
565
566static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
567 int cmd)
568{
569 struct es1938 *chip = snd_pcm_substream_chip(substream);
570 int val;
571 switch (cmd) {
572 case SNDRV_PCM_TRIGGER_START:
573 case SNDRV_PCM_TRIGGER_RESUME:
574 val = 5;
575 chip->active |= DAC1;
576 break;
577 case SNDRV_PCM_TRIGGER_STOP:
578 case SNDRV_PCM_TRIGGER_SUSPEND:
579 val = 0;
580 chip->active &= ~DAC1;
581 break;
582 default:
583 return -EINVAL;
584 }
585 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
586 return 0;
587}
588
589static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
590 int cmd)
591{
592 switch (substream->number) {
593 case 0:
594 return snd_es1938_playback1_trigger(substream, cmd);
595 case 1:
596 return snd_es1938_playback2_trigger(substream, cmd);
597 }
598 snd_BUG();
599 return -EINVAL;
600}
601
602/* --------------------------------------------------------------------
603 * First channel for Extended Mode Audio 1 ADC Operation
604 * --------------------------------------------------------------------*/
605static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
606{
607 struct es1938 *chip = snd_pcm_substream_chip(substream);
608 struct snd_pcm_runtime *runtime = substream->runtime;
609 int u, is8, mono;
610 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
611 unsigned int count = snd_pcm_lib_period_bytes(substream);
612
613 chip->dma1_size = size;
614 chip->dma1_start = runtime->dma_addr;
615
616 mono = (runtime->channels > 1) ? 0 : 1;
617 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
618 u = snd_pcm_format_unsigned(runtime->format);
619
620 chip->dma1_shift = 2 - mono - is8;
621
622 snd_es1938_reset_fifo(chip);
623
624 /* program type */
625 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
626
627 /* set clock and counters */
628 snd_es1938_rate_set(chip, substream, ADC1);
629
630 count = 0x10000 - count;
631 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
632 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
633
634 /* initialize and configure ADC */
635 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
636 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
637 (u ? 0x00 : 0x20) |
638 (is8 ? 0x00 : 0x04) |
639 (mono ? 0x40 : 0x08));
640
641 // snd_es1938_reset_fifo(chip);
642
643 /* 11. configure system interrupt controller and DMA controller */
644 snd_es1938_capture_setdma(chip);
645
646 return 0;
647}
648
649
650/* ------------------------------------------------------------------------------
651 * Second Audio channel DAC Operation
652 * ------------------------------------------------------------------------------*/
653static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
654{
655 struct es1938 *chip = snd_pcm_substream_chip(substream);
656 struct snd_pcm_runtime *runtime = substream->runtime;
657 int u, is8, mono;
658 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
659 unsigned int count = snd_pcm_lib_period_bytes(substream);
660
661 chip->dma2_size = size;
662 chip->dma2_start = runtime->dma_addr;
663
664 mono = (runtime->channels > 1) ? 0 : 1;
665 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
666 u = snd_pcm_format_unsigned(runtime->format);
667
668 chip->dma2_shift = 2 - mono - is8;
669
670 snd_es1938_reset_fifo(chip);
671
672 /* set clock and counters */
673 snd_es1938_rate_set(chip, substream, DAC2);
674
675 count >>= 1;
676 count = 0x10000 - count;
677 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
678 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
679
680 /* initialize and configure Audio 2 DAC */
681 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
682 (mono ? 0 : 2) | (is8 ? 0 : 1));
683
684 /* program DMA */
685 snd_es1938_playback1_setdma(chip);
686
687 return 0;
688}
689
690static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
691{
692 struct es1938 *chip = snd_pcm_substream_chip(substream);
693 struct snd_pcm_runtime *runtime = substream->runtime;
694 int u, is8, mono;
695 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
696 unsigned int count = snd_pcm_lib_period_bytes(substream);
697
698 chip->dma1_size = size;
699 chip->dma1_start = runtime->dma_addr;
700
701 mono = (runtime->channels > 1) ? 0 : 1;
702 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
703 u = snd_pcm_format_unsigned(runtime->format);
704
705 chip->dma1_shift = 2 - mono - is8;
706
707 count = 0x10000 - count;
708
709 /* reset */
710 snd_es1938_reset_fifo(chip);
711
712 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
713
714 /* set clock and counters */
715 snd_es1938_rate_set(chip, substream, DAC1);
716 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
717 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
718
719 /* initialized and configure DAC */
720 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
721 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
722 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
723 0x90 | (mono ? 0x40 : 0x08) |
724 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
725
726 /* program DMA */
727 snd_es1938_playback2_setdma(chip);
728
729 return 0;
730}
731
732static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
733{
734 switch (substream->number) {
735 case 0:
736 return snd_es1938_playback1_prepare(substream);
737 case 1:
738 return snd_es1938_playback2_prepare(substream);
739 }
740 snd_BUG();
741 return -EINVAL;
742}
743
744/* during the incrementing of dma counters the DMA register reads sometimes
745 returns garbage. To ensure a valid hw pointer, the following checks which
746 should be very unlikely to fail are used:
747 - is the current DMA address in the valid DMA range ?
748 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
749 One can argue this could differ by one byte depending on which register is
750 updated first, so the implementation below allows for that.
751*/
752static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
753{
754 struct es1938 *chip = snd_pcm_substream_chip(substream);
755 size_t ptr;
756#if 0
757 size_t old, new;
758 /* This stuff is *needed*, don't ask why - AB */
759 old = inw(SLDM_REG(chip, DMACOUNT));
760 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
761 old = new;
762 ptr = chip->dma1_size - 1 - new;
763#else
764 size_t count;
765 unsigned int diff;
766
767 ptr = inl(SLDM_REG(chip, DMAADDR));
768 count = inw(SLDM_REG(chip, DMACOUNT));
769 diff = chip->dma1_start + chip->dma1_size - ptr - count;
770
771 if (diff > 3 || ptr < chip->dma1_start
772 || ptr >= chip->dma1_start+chip->dma1_size)
773 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
774 else
775 chip->last_capture_dmaaddr = ptr; /* good, remember it */
776
777 ptr -= chip->dma1_start;
778#endif
779 return ptr >> chip->dma1_shift;
780}
781
782static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
783{
784 struct es1938 *chip = snd_pcm_substream_chip(substream);
785 size_t ptr;
786#if 1
787 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
788#else
789 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
790#endif
791 return ptr >> chip->dma2_shift;
792}
793
794static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
795{
796 struct es1938 *chip = snd_pcm_substream_chip(substream);
797 size_t ptr;
798 size_t old, new;
799#if 1
800 /* This stuff is *needed*, don't ask why - AB */
801 old = inw(SLDM_REG(chip, DMACOUNT));
802 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
803 old = new;
804 ptr = chip->dma1_size - 1 - new;
805#else
806 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
807#endif
808 return ptr >> chip->dma1_shift;
809}
810
811static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
812{
813 switch (substream->number) {
814 case 0:
815 return snd_es1938_playback1_pointer(substream);
816 case 1:
817 return snd_es1938_playback2_pointer(substream);
818 }
819 snd_BUG();
820 return -EINVAL;
821}
822
823static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
824 int channel, unsigned long pos,
825 struct iov_iter *dst, unsigned long count)
826{
827 struct snd_pcm_runtime *runtime = substream->runtime;
828 struct es1938 *chip = snd_pcm_substream_chip(substream);
829
830 if (snd_BUG_ON(pos + count > chip->dma1_size))
831 return -EINVAL;
832 if (pos + count < chip->dma1_size) {
833 if (copy_to_iter(runtime->dma_area + pos + 1, count, dst) != count)
834 return -EFAULT;
835 } else {
836 if (copy_to_iter(runtime->dma_area + pos + 1, count - 1, dst) != count - 1)
837 return -EFAULT;
838 if (copy_to_iter(runtime->dma_area, 1, dst) != 1)
839 return -EFAULT;
840 }
841 return 0;
842}
843
844/* ----------------------------------------------------------------------
845 * Audio1 Capture (ADC)
846 * ----------------------------------------------------------------------*/
847static const struct snd_pcm_hardware snd_es1938_capture =
848{
849 .info = (SNDRV_PCM_INFO_INTERLEAVED |
850 SNDRV_PCM_INFO_BLOCK_TRANSFER),
851 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
852 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
853 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
854 .rate_min = 6000,
855 .rate_max = 48000,
856 .channels_min = 1,
857 .channels_max = 2,
858 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
859 .period_bytes_min = 64,
860 .period_bytes_max = 0x8000,
861 .periods_min = 1,
862 .periods_max = 1024,
863 .fifo_size = 256,
864};
865
866/* -----------------------------------------------------------------------
867 * Audio2 Playback (DAC)
868 * -----------------------------------------------------------------------*/
869static const struct snd_pcm_hardware snd_es1938_playback =
870{
871 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
872 SNDRV_PCM_INFO_BLOCK_TRANSFER |
873 SNDRV_PCM_INFO_MMAP_VALID),
874 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
875 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
876 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
877 .rate_min = 6000,
878 .rate_max = 48000,
879 .channels_min = 1,
880 .channels_max = 2,
881 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
882 .period_bytes_min = 64,
883 .period_bytes_max = 0x8000,
884 .periods_min = 1,
885 .periods_max = 1024,
886 .fifo_size = 256,
887};
888
889static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
890{
891 struct es1938 *chip = snd_pcm_substream_chip(substream);
892 struct snd_pcm_runtime *runtime = substream->runtime;
893
894 if (chip->playback2_substream)
895 return -EAGAIN;
896 chip->capture_substream = substream;
897 runtime->hw = snd_es1938_capture;
898 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
899 &hw_constraints_clocks);
900 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
901 return 0;
902}
903
904static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
905{
906 struct es1938 *chip = snd_pcm_substream_chip(substream);
907 struct snd_pcm_runtime *runtime = substream->runtime;
908
909 switch (substream->number) {
910 case 0:
911 chip->playback1_substream = substream;
912 break;
913 case 1:
914 if (chip->capture_substream)
915 return -EAGAIN;
916 chip->playback2_substream = substream;
917 break;
918 default:
919 snd_BUG();
920 return -EINVAL;
921 }
922 runtime->hw = snd_es1938_playback;
923 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
924 &hw_constraints_clocks);
925 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
926 return 0;
927}
928
929static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
930{
931 struct es1938 *chip = snd_pcm_substream_chip(substream);
932
933 chip->capture_substream = NULL;
934 return 0;
935}
936
937static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
938{
939 struct es1938 *chip = snd_pcm_substream_chip(substream);
940
941 switch (substream->number) {
942 case 0:
943 chip->playback1_substream = NULL;
944 break;
945 case 1:
946 chip->playback2_substream = NULL;
947 break;
948 default:
949 snd_BUG();
950 return -EINVAL;
951 }
952 return 0;
953}
954
955static const struct snd_pcm_ops snd_es1938_playback_ops = {
956 .open = snd_es1938_playback_open,
957 .close = snd_es1938_playback_close,
958 .prepare = snd_es1938_playback_prepare,
959 .trigger = snd_es1938_playback_trigger,
960 .pointer = snd_es1938_playback_pointer,
961};
962
963static const struct snd_pcm_ops snd_es1938_capture_ops = {
964 .open = snd_es1938_capture_open,
965 .close = snd_es1938_capture_close,
966 .prepare = snd_es1938_capture_prepare,
967 .trigger = snd_es1938_capture_trigger,
968 .pointer = snd_es1938_capture_pointer,
969 .copy = snd_es1938_capture_copy,
970};
971
972static int snd_es1938_new_pcm(struct es1938 *chip, int device)
973{
974 struct snd_pcm *pcm;
975 int err;
976
977 err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm);
978 if (err < 0)
979 return err;
980 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
981 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
982
983 pcm->private_data = chip;
984 pcm->info_flags = 0;
985 strcpy(pcm->name, "ESS Solo-1");
986
987 snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
988 &chip->pci->dev, 64*1024, 64*1024);
989
990 chip->pcm = pcm;
991 return 0;
992}
993
994/* -------------------------------------------------------------------
995 *
996 * *** Mixer part ***
997 */
998
999static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1000 struct snd_ctl_elem_info *uinfo)
1001{
1002 static const char * const texts[8] = {
1003 "Mic", "Mic Master", "CD", "AOUT",
1004 "Mic1", "Mix", "Line", "Master"
1005 };
1006
1007 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1008}
1009
1010static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1011 struct snd_ctl_elem_value *ucontrol)
1012{
1013 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1014 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1015 return 0;
1016}
1017
1018static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1019 struct snd_ctl_elem_value *ucontrol)
1020{
1021 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1022 unsigned char val = ucontrol->value.enumerated.item[0];
1023
1024 if (val > 7)
1025 return -EINVAL;
1026 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1027}
1028
1029#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1030
1031static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1032 struct snd_ctl_elem_value *ucontrol)
1033{
1034 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1035 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1036 ucontrol->value.integer.value[0] = !!(val & 8);
1037 return 0;
1038}
1039
1040static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1041 struct snd_ctl_elem_value *ucontrol)
1042{
1043 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1044 unsigned char oval, nval;
1045 int change;
1046 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1047 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1048 change = nval != oval;
1049 if (change) {
1050 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1051 snd_es1938_mixer_write(chip, 0x50, nval);
1052 }
1053 return change;
1054}
1055
1056static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1057 struct snd_ctl_elem_info *uinfo)
1058{
1059 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1060 uinfo->count = 2;
1061 uinfo->value.integer.min = 0;
1062 uinfo->value.integer.max = 63;
1063 return 0;
1064}
1065
1066static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1067 struct snd_ctl_elem_value *ucontrol)
1068{
1069 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1070 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1071 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1072 return 0;
1073}
1074
1075#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1076
1077static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1078 struct snd_ctl_elem_value *ucontrol)
1079{
1080 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1081 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1082 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1083 return 0;
1084}
1085
1086static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1087{
1088 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1089 chip->master_volume = NULL;
1090 chip->master_switch = NULL;
1091 chip->hw_volume = NULL;
1092 chip->hw_switch = NULL;
1093}
1094
1095static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1096 unsigned char mask, unsigned char val)
1097{
1098 if (reg < 0xa0)
1099 return snd_es1938_mixer_bits(chip, reg, mask, val);
1100 else
1101 return snd_es1938_bits(chip, reg, mask, val);
1102}
1103
1104static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1105{
1106 if (reg < 0xa0)
1107 return snd_es1938_mixer_read(chip, reg);
1108 else
1109 return snd_es1938_read(chip, reg);
1110}
1111
1112#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1113{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1114 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1115 .name = xname, .index = xindex, \
1116 .info = snd_es1938_info_single, \
1117 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1118 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1119 .tlv = { .p = xtlv } }
1120#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1121{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1122 .info = snd_es1938_info_single, \
1123 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1124 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1125
1126static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1127 struct snd_ctl_elem_info *uinfo)
1128{
1129 int mask = (kcontrol->private_value >> 16) & 0xff;
1130
1131 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1132 uinfo->count = 1;
1133 uinfo->value.integer.min = 0;
1134 uinfo->value.integer.max = mask;
1135 return 0;
1136}
1137
1138static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1139 struct snd_ctl_elem_value *ucontrol)
1140{
1141 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1142 int reg = kcontrol->private_value & 0xff;
1143 int shift = (kcontrol->private_value >> 8) & 0xff;
1144 int mask = (kcontrol->private_value >> 16) & 0xff;
1145 int invert = (kcontrol->private_value >> 24) & 0xff;
1146 int val;
1147
1148 val = snd_es1938_reg_read(chip, reg);
1149 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1150 if (invert)
1151 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1152 return 0;
1153}
1154
1155static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1156 struct snd_ctl_elem_value *ucontrol)
1157{
1158 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1159 int reg = kcontrol->private_value & 0xff;
1160 int shift = (kcontrol->private_value >> 8) & 0xff;
1161 int mask = (kcontrol->private_value >> 16) & 0xff;
1162 int invert = (kcontrol->private_value >> 24) & 0xff;
1163 unsigned char val;
1164
1165 val = (ucontrol->value.integer.value[0] & mask);
1166 if (invert)
1167 val = mask - val;
1168 mask <<= shift;
1169 val <<= shift;
1170 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1171}
1172
1173#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1174{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1175 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1176 .name = xname, .index = xindex, \
1177 .info = snd_es1938_info_double, \
1178 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1179 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1180 .tlv = { .p = xtlv } }
1181#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1182{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1183 .info = snd_es1938_info_double, \
1184 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1185 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1186
1187static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1188 struct snd_ctl_elem_info *uinfo)
1189{
1190 int mask = (kcontrol->private_value >> 24) & 0xff;
1191
1192 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1193 uinfo->count = 2;
1194 uinfo->value.integer.min = 0;
1195 uinfo->value.integer.max = mask;
1196 return 0;
1197}
1198
1199static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1200 struct snd_ctl_elem_value *ucontrol)
1201{
1202 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1203 int left_reg = kcontrol->private_value & 0xff;
1204 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1205 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1206 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1207 int mask = (kcontrol->private_value >> 24) & 0xff;
1208 int invert = (kcontrol->private_value >> 22) & 1;
1209 unsigned char left, right;
1210
1211 left = snd_es1938_reg_read(chip, left_reg);
1212 if (left_reg != right_reg)
1213 right = snd_es1938_reg_read(chip, right_reg);
1214 else
1215 right = left;
1216 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1217 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1218 if (invert) {
1219 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1220 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1221 }
1222 return 0;
1223}
1224
1225static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1226 struct snd_ctl_elem_value *ucontrol)
1227{
1228 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1229 int left_reg = kcontrol->private_value & 0xff;
1230 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1231 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1232 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1233 int mask = (kcontrol->private_value >> 24) & 0xff;
1234 int invert = (kcontrol->private_value >> 22) & 1;
1235 int change;
1236 unsigned char val1, val2, mask1, mask2;
1237
1238 val1 = ucontrol->value.integer.value[0] & mask;
1239 val2 = ucontrol->value.integer.value[1] & mask;
1240 if (invert) {
1241 val1 = mask - val1;
1242 val2 = mask - val2;
1243 }
1244 val1 <<= shift_left;
1245 val2 <<= shift_right;
1246 mask1 = mask << shift_left;
1247 mask2 = mask << shift_right;
1248 if (left_reg != right_reg) {
1249 change = 0;
1250 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1251 change = 1;
1252 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1253 change = 1;
1254 } else {
1255 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1256 val1 | val2) != (val1 | val2));
1257 }
1258 return change;
1259}
1260
1261static const DECLARE_TLV_DB_RANGE(db_scale_master,
1262 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1263 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1264);
1265
1266static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1267 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1268 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1269);
1270
1271static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1272 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1273 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1274);
1275
1276static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1277 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1278 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1279);
1280
1281static const DECLARE_TLV_DB_RANGE(db_scale_line,
1282 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1283 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1284);
1285
1286static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1287
1288static const struct snd_kcontrol_new snd_es1938_controls[] = {
1289ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1290 db_scale_master),
1291ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1292{
1293 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1294 .name = "Hardware Master Playback Volume",
1295 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1296 .info = snd_es1938_info_hw_volume,
1297 .get = snd_es1938_get_hw_volume,
1298},
1299{
1300 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1301 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1302 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1303 .name = "Hardware Master Playback Switch",
1304 .info = snd_es1938_info_hw_switch,
1305 .get = snd_es1938_get_hw_switch,
1306 .tlv = { .p = db_scale_master },
1307},
1308ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1309ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1310 db_scale_line),
1311ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1312ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1313 db_scale_mic),
1314ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1315 db_scale_line),
1316ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1317 db_scale_mic),
1318ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1319 db_scale_line),
1320ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1321 db_scale_capture),
1322ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1323ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1324ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1325{
1326 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1327 .name = "Capture Source",
1328 .info = snd_es1938_info_mux,
1329 .get = snd_es1938_get_mux,
1330 .put = snd_es1938_put_mux,
1331},
1332ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1333 db_scale_line),
1334ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1335 db_scale_audio2),
1336ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1337 db_scale_mic),
1338ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1339 db_scale_line),
1340ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1341 db_scale_mic),
1342ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1343 db_scale_line),
1344ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1345 db_scale_line),
1346ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1347 db_scale_line),
1348ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1349 db_scale_audio2),
1350ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1351 db_scale_audio1),
1352ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1353{
1354 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1355 .name = "3D Control - Switch",
1356 .info = snd_es1938_info_spatializer_enable,
1357 .get = snd_es1938_get_spatializer_enable,
1358 .put = snd_es1938_put_spatializer_enable,
1359},
1360ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1361};
1362
1363
1364/* ---------------------------------------------------------------------------- */
1365/* ---------------------------------------------------------------------------- */
1366
1367/*
1368 * initialize the chip - used by resume callback, too
1369 */
1370static void snd_es1938_chip_init(struct es1938 *chip)
1371{
1372 /* reset chip */
1373 snd_es1938_reset(chip);
1374
1375 /* configure native mode */
1376
1377 /* enable bus master */
1378 pci_set_master(chip->pci);
1379
1380 /* disable legacy audio */
1381 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1382
1383 /* set DDMA base */
1384 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1385
1386 /* set DMA/IRQ policy */
1387 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1388
1389 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1390 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1391
1392 /* reset DMA */
1393 outb(0, SLDM_REG(chip, DMACLEAR));
1394}
1395
1396/*
1397 * PM support
1398 */
1399
1400static const unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1401 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1402 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1403 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1404 0xa8, 0xb4,
1405};
1406
1407
1408static int es1938_suspend(struct device *dev)
1409{
1410 struct snd_card *card = dev_get_drvdata(dev);
1411 struct es1938 *chip = card->private_data;
1412 const unsigned char *s;
1413 unsigned char *d;
1414
1415 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1416
1417 /* save mixer-related registers */
1418 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1419 *d = snd_es1938_reg_read(chip, *s);
1420
1421 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1422 if (chip->irq >= 0) {
1423 free_irq(chip->irq, chip);
1424 chip->irq = -1;
1425 card->sync_irq = -1;
1426 }
1427 return 0;
1428}
1429
1430static int es1938_resume(struct device *dev)
1431{
1432 struct pci_dev *pci = to_pci_dev(dev);
1433 struct snd_card *card = dev_get_drvdata(dev);
1434 struct es1938 *chip = card->private_data;
1435 const unsigned char *s;
1436 unsigned char *d;
1437
1438 if (request_irq(pci->irq, snd_es1938_interrupt,
1439 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1440 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1441 pci->irq);
1442 snd_card_disconnect(card);
1443 return -EIO;
1444 }
1445 chip->irq = pci->irq;
1446 card->sync_irq = chip->irq;
1447 snd_es1938_chip_init(chip);
1448
1449 /* restore mixer-related registers */
1450 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1451 if (*s < 0xa0)
1452 snd_es1938_mixer_write(chip, *s, *d);
1453 else
1454 snd_es1938_write(chip, *s, *d);
1455 }
1456
1457 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1458 return 0;
1459}
1460
1461static DEFINE_SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1462
1463#ifdef SUPPORT_JOYSTICK
1464static int snd_es1938_create_gameport(struct es1938 *chip)
1465{
1466 struct gameport *gp;
1467
1468 chip->gameport = gp = gameport_allocate_port();
1469 if (!gp) {
1470 dev_err(chip->card->dev,
1471 "cannot allocate memory for gameport\n");
1472 return -ENOMEM;
1473 }
1474
1475 gameport_set_name(gp, "ES1938");
1476 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1477 gameport_set_dev_parent(gp, &chip->pci->dev);
1478 gp->io = chip->game_port;
1479
1480 gameport_register_port(gp);
1481
1482 return 0;
1483}
1484
1485static void snd_es1938_free_gameport(struct es1938 *chip)
1486{
1487 if (chip->gameport) {
1488 gameport_unregister_port(chip->gameport);
1489 chip->gameport = NULL;
1490 }
1491}
1492#else
1493static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1494static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1495#endif /* SUPPORT_JOYSTICK */
1496
1497static void snd_es1938_free(struct snd_card *card)
1498{
1499 struct es1938 *chip = card->private_data;
1500
1501 /* disable irqs */
1502 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1503 if (chip->rmidi)
1504 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1505
1506 snd_es1938_free_gameport(chip);
1507
1508 if (chip->irq >= 0)
1509 free_irq(chip->irq, chip);
1510}
1511
1512static int snd_es1938_create(struct snd_card *card,
1513 struct pci_dev *pci)
1514{
1515 struct es1938 *chip = card->private_data;
1516 int err;
1517
1518 /* enable PCI device */
1519 err = pcim_enable_device(pci);
1520 if (err < 0)
1521 return err;
1522 /* check, if we can restrict PCI DMA transfers to 24 bits */
1523 if (dma_set_mask_and_coherent(&pci->dev, DMA_BIT_MASK(24))) {
1524 dev_err(card->dev,
1525 "architecture does not support 24bit PCI busmaster DMA\n");
1526 return -ENXIO;
1527 }
1528
1529 spin_lock_init(&chip->reg_lock);
1530 spin_lock_init(&chip->mixer_lock);
1531 chip->card = card;
1532 chip->pci = pci;
1533 chip->irq = -1;
1534 err = pci_request_regions(pci, "ESS Solo-1");
1535 if (err < 0)
1536 return err;
1537 chip->io_port = pci_resource_start(pci, 0);
1538 chip->sb_port = pci_resource_start(pci, 1);
1539 chip->vc_port = pci_resource_start(pci, 2);
1540 chip->mpu_port = pci_resource_start(pci, 3);
1541 chip->game_port = pci_resource_start(pci, 4);
1542 /* still use non-managed irq handler as it's re-acquired at PM resume */
1543 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1544 KBUILD_MODNAME, chip)) {
1545 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1546 return -EBUSY;
1547 }
1548 chip->irq = pci->irq;
1549 card->sync_irq = chip->irq;
1550 card->private_free = snd_es1938_free;
1551 dev_dbg(card->dev,
1552 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1553 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1554
1555 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1556
1557 snd_es1938_chip_init(chip);
1558 return 0;
1559}
1560
1561/* --------------------------------------------------------------------
1562 * Interrupt handler
1563 * -------------------------------------------------------------------- */
1564static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1565{
1566 struct es1938 *chip = dev_id;
1567 unsigned char status;
1568 __always_unused unsigned char audiostatus;
1569 int handled = 0;
1570
1571 status = inb(SLIO_REG(chip, IRQCONTROL));
1572#if 0
1573 dev_dbg(chip->card->dev,
1574 "Es1938debug - interrupt status: =0x%x\n", status);
1575#endif
1576
1577 /* AUDIO 1 */
1578 if (status & 0x10) {
1579#if 0
1580 dev_dbg(chip->card->dev,
1581 "Es1938debug - AUDIO channel 1 interrupt\n");
1582 dev_dbg(chip->card->dev,
1583 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1584 inw(SLDM_REG(chip, DMACOUNT)));
1585 dev_dbg(chip->card->dev,
1586 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1587 inl(SLDM_REG(chip, DMAADDR)));
1588 dev_dbg(chip->card->dev,
1589 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1590 inl(SLDM_REG(chip, DMASTATUS)));
1591#endif
1592 /* clear irq */
1593 handled = 1;
1594 audiostatus = inb(SLSB_REG(chip, STATUS));
1595 if (chip->active & ADC1)
1596 snd_pcm_period_elapsed(chip->capture_substream);
1597 else if (chip->active & DAC1)
1598 snd_pcm_period_elapsed(chip->playback2_substream);
1599 }
1600
1601 /* AUDIO 2 */
1602 if (status & 0x20) {
1603#if 0
1604 dev_dbg(chip->card->dev,
1605 "Es1938debug - AUDIO channel 2 interrupt\n");
1606 dev_dbg(chip->card->dev,
1607 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1608 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1609 dev_dbg(chip->card->dev,
1610 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1611 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1612
1613#endif
1614 /* clear irq */
1615 handled = 1;
1616 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1617 if (chip->active & DAC2)
1618 snd_pcm_period_elapsed(chip->playback1_substream);
1619 }
1620
1621 /* Hardware volume */
1622 if (status & 0x40) {
1623 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1624 handled = 1;
1625 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1626 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1627 if (!split) {
1628 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1629 &chip->master_switch->id);
1630 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1631 &chip->master_volume->id);
1632 }
1633 /* ack interrupt */
1634 snd_es1938_mixer_write(chip, 0x66, 0x00);
1635 }
1636
1637 /* MPU401 */
1638 if (status & 0x80) {
1639 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1640 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1641 // andreas@flying-snail.de
1642 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1643 if (chip->rmidi) {
1644 handled = 1;
1645 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1646 }
1647 }
1648 return IRQ_RETVAL(handled);
1649}
1650
1651#define ES1938_DMA_SIZE 64
1652
1653static int snd_es1938_mixer(struct es1938 *chip)
1654{
1655 struct snd_card *card;
1656 unsigned int idx;
1657 int err;
1658
1659 card = chip->card;
1660
1661 strcpy(card->mixername, "ESS Solo-1");
1662
1663 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1664 struct snd_kcontrol *kctl;
1665 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1666 switch (idx) {
1667 case 0:
1668 chip->master_volume = kctl;
1669 kctl->private_free = snd_es1938_hwv_free;
1670 break;
1671 case 1:
1672 chip->master_switch = kctl;
1673 kctl->private_free = snd_es1938_hwv_free;
1674 break;
1675 case 2:
1676 chip->hw_volume = kctl;
1677 kctl->private_free = snd_es1938_hwv_free;
1678 break;
1679 case 3:
1680 chip->hw_switch = kctl;
1681 kctl->private_free = snd_es1938_hwv_free;
1682 break;
1683 }
1684 err = snd_ctl_add(card, kctl);
1685 if (err < 0)
1686 return err;
1687 }
1688 return 0;
1689}
1690
1691
1692static int __snd_es1938_probe(struct pci_dev *pci,
1693 const struct pci_device_id *pci_id)
1694{
1695 static int dev;
1696 struct snd_card *card;
1697 struct es1938 *chip;
1698 struct snd_opl3 *opl3;
1699 int idx, err;
1700
1701 if (dev >= SNDRV_CARDS)
1702 return -ENODEV;
1703 if (!enable[dev]) {
1704 dev++;
1705 return -ENOENT;
1706 }
1707
1708 err = snd_devm_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1709 sizeof(*chip), &card);
1710 if (err < 0)
1711 return err;
1712 chip = card->private_data;
1713
1714 for (idx = 0; idx < 5; idx++)
1715 if (pci_resource_start(pci, idx) == 0 ||
1716 !(pci_resource_flags(pci, idx) & IORESOURCE_IO))
1717 return -ENODEV;
1718
1719 err = snd_es1938_create(card, pci);
1720 if (err < 0)
1721 return err;
1722
1723 strcpy(card->driver, "ES1938");
1724 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1725 sprintf(card->longname, "%s rev %i, irq %i",
1726 card->shortname,
1727 chip->revision,
1728 chip->irq);
1729
1730 err = snd_es1938_new_pcm(chip, 0);
1731 if (err < 0)
1732 return err;
1733 err = snd_es1938_mixer(chip);
1734 if (err < 0)
1735 return err;
1736 if (snd_opl3_create(card,
1737 SLSB_REG(chip, FMLOWADDR),
1738 SLSB_REG(chip, FMHIGHADDR),
1739 OPL3_HW_OPL3, 1, &opl3) < 0) {
1740 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1741 SLSB_REG(chip, FMLOWADDR));
1742 } else {
1743 err = snd_opl3_timer_new(opl3, 0, 1);
1744 if (err < 0)
1745 return err;
1746 err = snd_opl3_hwdep_new(opl3, 0, 1, NULL);
1747 if (err < 0)
1748 return err;
1749 }
1750 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1751 chip->mpu_port,
1752 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1753 -1, &chip->rmidi) < 0) {
1754 dev_err(card->dev, "unable to initialize MPU-401\n");
1755 } else {
1756 // this line is vital for MIDI interrupt handling on ess-solo1
1757 // andreas@flying-snail.de
1758 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1759 }
1760
1761 snd_es1938_create_gameport(chip);
1762
1763 err = snd_card_register(card);
1764 if (err < 0)
1765 return err;
1766
1767 pci_set_drvdata(pci, card);
1768 dev++;
1769 return 0;
1770}
1771
1772static int snd_es1938_probe(struct pci_dev *pci,
1773 const struct pci_device_id *pci_id)
1774{
1775 return snd_card_free_on_error(&pci->dev, __snd_es1938_probe(pci, pci_id));
1776}
1777
1778static struct pci_driver es1938_driver = {
1779 .name = KBUILD_MODNAME,
1780 .id_table = snd_es1938_ids,
1781 .probe = snd_es1938_probe,
1782 .driver = {
1783 .pm = &es1938_pm,
1784 },
1785};
1786
1787module_pci_driver(es1938_driver);
1/*
2 * Driver for ESS Solo-1 (ES1938, ES1946, ES1969) soundcard
3 * Copyright (c) by Jaromir Koutek <miri@punknet.cz>,
4 * Jaroslav Kysela <perex@perex.cz>,
5 * Thomas Sailer <sailer@ife.ee.ethz.ch>,
6 * Abramo Bagnara <abramo@alsa-project.org>,
7 * Markus Gruber <gruber@eikon.tum.de>
8 *
9 * Rewritten from sonicvibes.c source.
10 *
11 * TODO:
12 * Rewrite better spinlocks
13 *
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31/*
32 NOTES:
33 - Capture data is written unaligned starting from dma_base + 1 so I need to
34 disable mmap and to add a copy callback.
35 - After several cycle of the following:
36 while : ; do arecord -d1 -f cd -t raw | aplay -f cd ; done
37 a "playback write error (DMA or IRQ trouble?)" may happen.
38 This is due to playback interrupts not generated.
39 I suspect a timing issue.
40 - Sometimes the interrupt handler is invoked wrongly during playback.
41 This generates some harmless "Unexpected hw_pointer: wrong interrupt
42 acknowledge".
43 I've seen that using small period sizes.
44 Reproducible with:
45 mpg123 test.mp3 &
46 hdparm -t -T /dev/hda
47*/
48
49
50#include <linux/init.h>
51#include <linux/interrupt.h>
52#include <linux/pci.h>
53#include <linux/slab.h>
54#include <linux/gameport.h>
55#include <linux/module.h>
56#include <linux/delay.h>
57#include <linux/dma-mapping.h>
58#include <linux/io.h>
59#include <sound/core.h>
60#include <sound/control.h>
61#include <sound/pcm.h>
62#include <sound/opl3.h>
63#include <sound/mpu401.h>
64#include <sound/initval.h>
65#include <sound/tlv.h>
66
67MODULE_AUTHOR("Jaromir Koutek <miri@punknet.cz>");
68MODULE_DESCRIPTION("ESS Solo-1");
69MODULE_LICENSE("GPL");
70MODULE_SUPPORTED_DEVICE("{{ESS,ES1938},"
71 "{ESS,ES1946},"
72 "{ESS,ES1969},"
73 "{TerraTec,128i PCI}}");
74
75#if IS_REACHABLE(CONFIG_GAMEPORT)
76#define SUPPORT_JOYSTICK 1
77#endif
78
79static int index[SNDRV_CARDS] = SNDRV_DEFAULT_IDX; /* Index 0-MAX */
80static char *id[SNDRV_CARDS] = SNDRV_DEFAULT_STR; /* ID for this card */
81static bool enable[SNDRV_CARDS] = SNDRV_DEFAULT_ENABLE_PNP; /* Enable this card */
82
83module_param_array(index, int, NULL, 0444);
84MODULE_PARM_DESC(index, "Index value for ESS Solo-1 soundcard.");
85module_param_array(id, charp, NULL, 0444);
86MODULE_PARM_DESC(id, "ID string for ESS Solo-1 soundcard.");
87module_param_array(enable, bool, NULL, 0444);
88MODULE_PARM_DESC(enable, "Enable ESS Solo-1 soundcard.");
89
90#define SLIO_REG(chip, x) ((chip)->io_port + ESSIO_REG_##x)
91
92#define SLDM_REG(chip, x) ((chip)->ddma_port + ESSDM_REG_##x)
93
94#define SLSB_REG(chip, x) ((chip)->sb_port + ESSSB_REG_##x)
95
96#define SL_PCI_LEGACYCONTROL 0x40
97#define SL_PCI_CONFIG 0x50
98#define SL_PCI_DDMACONTROL 0x60
99
100#define ESSIO_REG_AUDIO2DMAADDR 0
101#define ESSIO_REG_AUDIO2DMACOUNT 4
102#define ESSIO_REG_AUDIO2MODE 6
103#define ESSIO_REG_IRQCONTROL 7
104
105#define ESSDM_REG_DMAADDR 0x00
106#define ESSDM_REG_DMACOUNT 0x04
107#define ESSDM_REG_DMACOMMAND 0x08
108#define ESSDM_REG_DMASTATUS 0x08
109#define ESSDM_REG_DMAMODE 0x0b
110#define ESSDM_REG_DMACLEAR 0x0d
111#define ESSDM_REG_DMAMASK 0x0f
112
113#define ESSSB_REG_FMLOWADDR 0x00
114#define ESSSB_REG_FMHIGHADDR 0x02
115#define ESSSB_REG_MIXERADDR 0x04
116#define ESSSB_REG_MIXERDATA 0x05
117
118#define ESSSB_IREG_AUDIO1 0x14
119#define ESSSB_IREG_MICMIX 0x1a
120#define ESSSB_IREG_RECSRC 0x1c
121#define ESSSB_IREG_MASTER 0x32
122#define ESSSB_IREG_FM 0x36
123#define ESSSB_IREG_AUXACD 0x38
124#define ESSSB_IREG_AUXB 0x3a
125#define ESSSB_IREG_PCSPEAKER 0x3c
126#define ESSSB_IREG_LINE 0x3e
127#define ESSSB_IREG_SPATCONTROL 0x50
128#define ESSSB_IREG_SPATLEVEL 0x52
129#define ESSSB_IREG_MASTER_LEFT 0x60
130#define ESSSB_IREG_MASTER_RIGHT 0x62
131#define ESSSB_IREG_MPU401CONTROL 0x64
132#define ESSSB_IREG_MICMIXRECORD 0x68
133#define ESSSB_IREG_AUDIO2RECORD 0x69
134#define ESSSB_IREG_AUXACDRECORD 0x6a
135#define ESSSB_IREG_FMRECORD 0x6b
136#define ESSSB_IREG_AUXBRECORD 0x6c
137#define ESSSB_IREG_MONO 0x6d
138#define ESSSB_IREG_LINERECORD 0x6e
139#define ESSSB_IREG_MONORECORD 0x6f
140#define ESSSB_IREG_AUDIO2SAMPLE 0x70
141#define ESSSB_IREG_AUDIO2MODE 0x71
142#define ESSSB_IREG_AUDIO2FILTER 0x72
143#define ESSSB_IREG_AUDIO2TCOUNTL 0x74
144#define ESSSB_IREG_AUDIO2TCOUNTH 0x76
145#define ESSSB_IREG_AUDIO2CONTROL1 0x78
146#define ESSSB_IREG_AUDIO2CONTROL2 0x7a
147#define ESSSB_IREG_AUDIO2 0x7c
148
149#define ESSSB_REG_RESET 0x06
150
151#define ESSSB_REG_READDATA 0x0a
152#define ESSSB_REG_WRITEDATA 0x0c
153#define ESSSB_REG_READSTATUS 0x0c
154
155#define ESSSB_REG_STATUS 0x0e
156
157#define ESS_CMD_EXTSAMPLERATE 0xa1
158#define ESS_CMD_FILTERDIV 0xa2
159#define ESS_CMD_DMACNTRELOADL 0xa4
160#define ESS_CMD_DMACNTRELOADH 0xa5
161#define ESS_CMD_ANALOGCONTROL 0xa8
162#define ESS_CMD_IRQCONTROL 0xb1
163#define ESS_CMD_DRQCONTROL 0xb2
164#define ESS_CMD_RECLEVEL 0xb4
165#define ESS_CMD_SETFORMAT 0xb6
166#define ESS_CMD_SETFORMAT2 0xb7
167#define ESS_CMD_DMACONTROL 0xb8
168#define ESS_CMD_DMATYPE 0xb9
169#define ESS_CMD_OFFSETLEFT 0xba
170#define ESS_CMD_OFFSETRIGHT 0xbb
171#define ESS_CMD_READREG 0xc0
172#define ESS_CMD_ENABLEEXT 0xc6
173#define ESS_CMD_PAUSEDMA 0xd0
174#define ESS_CMD_ENABLEAUDIO1 0xd1
175#define ESS_CMD_STOPAUDIO1 0xd3
176#define ESS_CMD_AUDIO1STATUS 0xd8
177#define ESS_CMD_CONTDMA 0xd4
178#define ESS_CMD_TESTIRQ 0xf2
179
180#define ESS_RECSRC_MIC 0
181#define ESS_RECSRC_AUXACD 2
182#define ESS_RECSRC_AUXB 5
183#define ESS_RECSRC_LINE 6
184#define ESS_RECSRC_NONE 7
185
186#define DAC1 0x01
187#define ADC1 0x02
188#define DAC2 0x04
189
190/*
191
192 */
193
194#define SAVED_REG_SIZE 32 /* max. number of registers to save */
195
196struct es1938 {
197 int irq;
198
199 unsigned long io_port;
200 unsigned long sb_port;
201 unsigned long vc_port;
202 unsigned long mpu_port;
203 unsigned long game_port;
204 unsigned long ddma_port;
205
206 unsigned char irqmask;
207 unsigned char revision;
208
209 struct snd_kcontrol *hw_volume;
210 struct snd_kcontrol *hw_switch;
211 struct snd_kcontrol *master_volume;
212 struct snd_kcontrol *master_switch;
213
214 struct pci_dev *pci;
215 struct snd_card *card;
216 struct snd_pcm *pcm;
217 struct snd_pcm_substream *capture_substream;
218 struct snd_pcm_substream *playback1_substream;
219 struct snd_pcm_substream *playback2_substream;
220 struct snd_rawmidi *rmidi;
221
222 unsigned int dma1_size;
223 unsigned int dma2_size;
224 unsigned int dma1_start;
225 unsigned int dma2_start;
226 unsigned int dma1_shift;
227 unsigned int dma2_shift;
228 unsigned int last_capture_dmaaddr;
229 unsigned int active;
230
231 spinlock_t reg_lock;
232 spinlock_t mixer_lock;
233 struct snd_info_entry *proc_entry;
234
235#ifdef SUPPORT_JOYSTICK
236 struct gameport *gameport;
237#endif
238#ifdef CONFIG_PM_SLEEP
239 unsigned char saved_regs[SAVED_REG_SIZE];
240#endif
241};
242
243static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id);
244
245static const struct pci_device_id snd_es1938_ids[] = {
246 { PCI_VDEVICE(ESS, 0x1969), 0, }, /* Solo-1 */
247 { 0, }
248};
249
250MODULE_DEVICE_TABLE(pci, snd_es1938_ids);
251
252#define RESET_LOOP_TIMEOUT 0x10000
253#define WRITE_LOOP_TIMEOUT 0x10000
254#define GET_LOOP_TIMEOUT 0x01000
255
256/* -----------------------------------------------------------------
257 * Write to a mixer register
258 * -----------------------------------------------------------------*/
259static void snd_es1938_mixer_write(struct es1938 *chip, unsigned char reg, unsigned char val)
260{
261 unsigned long flags;
262 spin_lock_irqsave(&chip->mixer_lock, flags);
263 outb(reg, SLSB_REG(chip, MIXERADDR));
264 outb(val, SLSB_REG(chip, MIXERDATA));
265 spin_unlock_irqrestore(&chip->mixer_lock, flags);
266 dev_dbg(chip->card->dev, "Mixer reg %02x set to %02x\n", reg, val);
267}
268
269/* -----------------------------------------------------------------
270 * Read from a mixer register
271 * -----------------------------------------------------------------*/
272static int snd_es1938_mixer_read(struct es1938 *chip, unsigned char reg)
273{
274 int data;
275 unsigned long flags;
276 spin_lock_irqsave(&chip->mixer_lock, flags);
277 outb(reg, SLSB_REG(chip, MIXERADDR));
278 data = inb(SLSB_REG(chip, MIXERDATA));
279 spin_unlock_irqrestore(&chip->mixer_lock, flags);
280 dev_dbg(chip->card->dev, "Mixer reg %02x now is %02x\n", reg, data);
281 return data;
282}
283
284/* -----------------------------------------------------------------
285 * Write to some bits of a mixer register (return old value)
286 * -----------------------------------------------------------------*/
287static int snd_es1938_mixer_bits(struct es1938 *chip, unsigned char reg,
288 unsigned char mask, unsigned char val)
289{
290 unsigned long flags;
291 unsigned char old, new, oval;
292 spin_lock_irqsave(&chip->mixer_lock, flags);
293 outb(reg, SLSB_REG(chip, MIXERADDR));
294 old = inb(SLSB_REG(chip, MIXERDATA));
295 oval = old & mask;
296 if (val != oval) {
297 new = (old & ~mask) | (val & mask);
298 outb(new, SLSB_REG(chip, MIXERDATA));
299 dev_dbg(chip->card->dev,
300 "Mixer reg %02x was %02x, set to %02x\n",
301 reg, old, new);
302 }
303 spin_unlock_irqrestore(&chip->mixer_lock, flags);
304 return oval;
305}
306
307/* -----------------------------------------------------------------
308 * Write command to Controller Registers
309 * -----------------------------------------------------------------*/
310static void snd_es1938_write_cmd(struct es1938 *chip, unsigned char cmd)
311{
312 int i;
313 unsigned char v;
314 for (i = 0; i < WRITE_LOOP_TIMEOUT; i++) {
315 if (!(v = inb(SLSB_REG(chip, READSTATUS)) & 0x80)) {
316 outb(cmd, SLSB_REG(chip, WRITEDATA));
317 return;
318 }
319 }
320 dev_err(chip->card->dev,
321 "snd_es1938_write_cmd timeout (0x02%x/0x02%x)\n", cmd, v);
322}
323
324/* -----------------------------------------------------------------
325 * Read the Read Data Buffer
326 * -----------------------------------------------------------------*/
327static int snd_es1938_get_byte(struct es1938 *chip)
328{
329 int i;
330 unsigned char v;
331 for (i = GET_LOOP_TIMEOUT; i; i--)
332 if ((v = inb(SLSB_REG(chip, STATUS))) & 0x80)
333 return inb(SLSB_REG(chip, READDATA));
334 dev_err(chip->card->dev, "get_byte timeout: status 0x02%x\n", v);
335 return -ENODEV;
336}
337
338/* -----------------------------------------------------------------
339 * Write value cmd register
340 * -----------------------------------------------------------------*/
341static void snd_es1938_write(struct es1938 *chip, unsigned char reg, unsigned char val)
342{
343 unsigned long flags;
344 spin_lock_irqsave(&chip->reg_lock, flags);
345 snd_es1938_write_cmd(chip, reg);
346 snd_es1938_write_cmd(chip, val);
347 spin_unlock_irqrestore(&chip->reg_lock, flags);
348 dev_dbg(chip->card->dev, "Reg %02x set to %02x\n", reg, val);
349}
350
351/* -----------------------------------------------------------------
352 * Read data from cmd register and return it
353 * -----------------------------------------------------------------*/
354static unsigned char snd_es1938_read(struct es1938 *chip, unsigned char reg)
355{
356 unsigned char val;
357 unsigned long flags;
358 spin_lock_irqsave(&chip->reg_lock, flags);
359 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
360 snd_es1938_write_cmd(chip, reg);
361 val = snd_es1938_get_byte(chip);
362 spin_unlock_irqrestore(&chip->reg_lock, flags);
363 dev_dbg(chip->card->dev, "Reg %02x now is %02x\n", reg, val);
364 return val;
365}
366
367/* -----------------------------------------------------------------
368 * Write data to cmd register and return old value
369 * -----------------------------------------------------------------*/
370static int snd_es1938_bits(struct es1938 *chip, unsigned char reg, unsigned char mask,
371 unsigned char val)
372{
373 unsigned long flags;
374 unsigned char old, new, oval;
375 spin_lock_irqsave(&chip->reg_lock, flags);
376 snd_es1938_write_cmd(chip, ESS_CMD_READREG);
377 snd_es1938_write_cmd(chip, reg);
378 old = snd_es1938_get_byte(chip);
379 oval = old & mask;
380 if (val != oval) {
381 snd_es1938_write_cmd(chip, reg);
382 new = (old & ~mask) | (val & mask);
383 snd_es1938_write_cmd(chip, new);
384 dev_dbg(chip->card->dev, "Reg %02x was %02x, set to %02x\n",
385 reg, old, new);
386 }
387 spin_unlock_irqrestore(&chip->reg_lock, flags);
388 return oval;
389}
390
391/* --------------------------------------------------------------------
392 * Reset the chip
393 * --------------------------------------------------------------------*/
394static void snd_es1938_reset(struct es1938 *chip)
395{
396 int i;
397
398 outb(3, SLSB_REG(chip, RESET));
399 inb(SLSB_REG(chip, RESET));
400 outb(0, SLSB_REG(chip, RESET));
401 for (i = 0; i < RESET_LOOP_TIMEOUT; i++) {
402 if (inb(SLSB_REG(chip, STATUS)) & 0x80) {
403 if (inb(SLSB_REG(chip, READDATA)) == 0xaa)
404 goto __next;
405 }
406 }
407 dev_err(chip->card->dev, "ESS Solo-1 reset failed\n");
408
409 __next:
410 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEEXT);
411
412 /* Demand transfer DMA: 4 bytes per DMA request */
413 snd_es1938_write(chip, ESS_CMD_DMATYPE, 2);
414
415 /* Change behaviour of register A1
416 4x oversampling
417 2nd channel DAC asynchronous */
418 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2MODE, 0x32);
419 /* enable/select DMA channel and IRQ channel */
420 snd_es1938_bits(chip, ESS_CMD_IRQCONTROL, 0xf0, 0x50);
421 snd_es1938_bits(chip, ESS_CMD_DRQCONTROL, 0xf0, 0x50);
422 snd_es1938_write_cmd(chip, ESS_CMD_ENABLEAUDIO1);
423 /* Set spatializer parameters to recommended values */
424 snd_es1938_mixer_write(chip, 0x54, 0x8f);
425 snd_es1938_mixer_write(chip, 0x56, 0x95);
426 snd_es1938_mixer_write(chip, 0x58, 0x94);
427 snd_es1938_mixer_write(chip, 0x5a, 0x80);
428}
429
430/* --------------------------------------------------------------------
431 * Reset the FIFOs
432 * --------------------------------------------------------------------*/
433static void snd_es1938_reset_fifo(struct es1938 *chip)
434{
435 outb(2, SLSB_REG(chip, RESET));
436 outb(0, SLSB_REG(chip, RESET));
437}
438
439static const struct snd_ratnum clocks[2] = {
440 {
441 .num = 793800,
442 .den_min = 1,
443 .den_max = 128,
444 .den_step = 1,
445 },
446 {
447 .num = 768000,
448 .den_min = 1,
449 .den_max = 128,
450 .den_step = 1,
451 }
452};
453
454static const struct snd_pcm_hw_constraint_ratnums hw_constraints_clocks = {
455 .nrats = 2,
456 .rats = clocks,
457};
458
459
460static void snd_es1938_rate_set(struct es1938 *chip,
461 struct snd_pcm_substream *substream,
462 int mode)
463{
464 unsigned int bits, div0;
465 struct snd_pcm_runtime *runtime = substream->runtime;
466 if (runtime->rate_num == clocks[0].num)
467 bits = 128 - runtime->rate_den;
468 else
469 bits = 256 - runtime->rate_den;
470
471 /* set filter register */
472 div0 = 256 - 7160000*20/(8*82*runtime->rate);
473
474 if (mode == DAC2) {
475 snd_es1938_mixer_write(chip, 0x70, bits);
476 snd_es1938_mixer_write(chip, 0x72, div0);
477 } else {
478 snd_es1938_write(chip, 0xA1, bits);
479 snd_es1938_write(chip, 0xA2, div0);
480 }
481}
482
483/* --------------------------------------------------------------------
484 * Configure Solo1 builtin DMA Controller
485 * --------------------------------------------------------------------*/
486
487static void snd_es1938_playback1_setdma(struct es1938 *chip)
488{
489 outb(0x00, SLIO_REG(chip, AUDIO2MODE));
490 outl(chip->dma2_start, SLIO_REG(chip, AUDIO2DMAADDR));
491 outw(0, SLIO_REG(chip, AUDIO2DMACOUNT));
492 outw(chip->dma2_size, SLIO_REG(chip, AUDIO2DMACOUNT));
493}
494
495static void snd_es1938_playback2_setdma(struct es1938 *chip)
496{
497 /* Enable DMA controller */
498 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
499 /* 1. Master reset */
500 outb(0, SLDM_REG(chip, DMACLEAR));
501 /* 2. Mask DMA */
502 outb(1, SLDM_REG(chip, DMAMASK));
503 outb(0x18, SLDM_REG(chip, DMAMODE));
504 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
505 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
506 /* 3. Unmask DMA */
507 outb(0, SLDM_REG(chip, DMAMASK));
508}
509
510static void snd_es1938_capture_setdma(struct es1938 *chip)
511{
512 /* Enable DMA controller */
513 outb(0xc4, SLDM_REG(chip, DMACOMMAND));
514 /* 1. Master reset */
515 outb(0, SLDM_REG(chip, DMACLEAR));
516 /* 2. Mask DMA */
517 outb(1, SLDM_REG(chip, DMAMASK));
518 outb(0x14, SLDM_REG(chip, DMAMODE));
519 outl(chip->dma1_start, SLDM_REG(chip, DMAADDR));
520 chip->last_capture_dmaaddr = chip->dma1_start;
521 outw(chip->dma1_size - 1, SLDM_REG(chip, DMACOUNT));
522 /* 3. Unmask DMA */
523 outb(0, SLDM_REG(chip, DMAMASK));
524}
525
526/* ----------------------------------------------------------------------
527 *
528 * *** PCM part ***
529 */
530
531static int snd_es1938_capture_trigger(struct snd_pcm_substream *substream,
532 int cmd)
533{
534 struct es1938 *chip = snd_pcm_substream_chip(substream);
535 int val;
536 switch (cmd) {
537 case SNDRV_PCM_TRIGGER_START:
538 case SNDRV_PCM_TRIGGER_RESUME:
539 val = 0x0f;
540 chip->active |= ADC1;
541 break;
542 case SNDRV_PCM_TRIGGER_STOP:
543 case SNDRV_PCM_TRIGGER_SUSPEND:
544 val = 0x00;
545 chip->active &= ~ADC1;
546 break;
547 default:
548 return -EINVAL;
549 }
550 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
551 return 0;
552}
553
554static int snd_es1938_playback1_trigger(struct snd_pcm_substream *substream,
555 int cmd)
556{
557 struct es1938 *chip = snd_pcm_substream_chip(substream);
558 switch (cmd) {
559 case SNDRV_PCM_TRIGGER_START:
560 case SNDRV_PCM_TRIGGER_RESUME:
561 /* According to the documentation this should be:
562 0x13 but that value may randomly swap stereo channels */
563 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x92);
564 udelay(10);
565 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0x93);
566 /* This two stage init gives the FIFO -> DAC connection time to
567 * settle before first data from DMA flows in. This should ensure
568 * no swapping of stereo channels. Report a bug if otherwise :-) */
569 outb(0x0a, SLIO_REG(chip, AUDIO2MODE));
570 chip->active |= DAC2;
571 break;
572 case SNDRV_PCM_TRIGGER_STOP:
573 case SNDRV_PCM_TRIGGER_SUSPEND:
574 outb(0, SLIO_REG(chip, AUDIO2MODE));
575 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL1, 0);
576 chip->active &= ~DAC2;
577 break;
578 default:
579 return -EINVAL;
580 }
581 return 0;
582}
583
584static int snd_es1938_playback2_trigger(struct snd_pcm_substream *substream,
585 int cmd)
586{
587 struct es1938 *chip = snd_pcm_substream_chip(substream);
588 int val;
589 switch (cmd) {
590 case SNDRV_PCM_TRIGGER_START:
591 case SNDRV_PCM_TRIGGER_RESUME:
592 val = 5;
593 chip->active |= DAC1;
594 break;
595 case SNDRV_PCM_TRIGGER_STOP:
596 case SNDRV_PCM_TRIGGER_SUSPEND:
597 val = 0;
598 chip->active &= ~DAC1;
599 break;
600 default:
601 return -EINVAL;
602 }
603 snd_es1938_write(chip, ESS_CMD_DMACONTROL, val);
604 return 0;
605}
606
607static int snd_es1938_playback_trigger(struct snd_pcm_substream *substream,
608 int cmd)
609{
610 switch (substream->number) {
611 case 0:
612 return snd_es1938_playback1_trigger(substream, cmd);
613 case 1:
614 return snd_es1938_playback2_trigger(substream, cmd);
615 }
616 snd_BUG();
617 return -EINVAL;
618}
619
620/* --------------------------------------------------------------------
621 * First channel for Extended Mode Audio 1 ADC Operation
622 * --------------------------------------------------------------------*/
623static int snd_es1938_capture_prepare(struct snd_pcm_substream *substream)
624{
625 struct es1938 *chip = snd_pcm_substream_chip(substream);
626 struct snd_pcm_runtime *runtime = substream->runtime;
627 int u, is8, mono;
628 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
629 unsigned int count = snd_pcm_lib_period_bytes(substream);
630
631 chip->dma1_size = size;
632 chip->dma1_start = runtime->dma_addr;
633
634 mono = (runtime->channels > 1) ? 0 : 1;
635 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
636 u = snd_pcm_format_unsigned(runtime->format);
637
638 chip->dma1_shift = 2 - mono - is8;
639
640 snd_es1938_reset_fifo(chip);
641
642 /* program type */
643 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
644
645 /* set clock and counters */
646 snd_es1938_rate_set(chip, substream, ADC1);
647
648 count = 0x10000 - count;
649 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
650 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
651
652 /* initialize and configure ADC */
653 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, u ? 0x51 : 0x71);
654 snd_es1938_write(chip, ESS_CMD_SETFORMAT2, 0x90 |
655 (u ? 0x00 : 0x20) |
656 (is8 ? 0x00 : 0x04) |
657 (mono ? 0x40 : 0x08));
658
659 // snd_es1938_reset_fifo(chip);
660
661 /* 11. configure system interrupt controller and DMA controller */
662 snd_es1938_capture_setdma(chip);
663
664 return 0;
665}
666
667
668/* ------------------------------------------------------------------------------
669 * Second Audio channel DAC Operation
670 * ------------------------------------------------------------------------------*/
671static int snd_es1938_playback1_prepare(struct snd_pcm_substream *substream)
672{
673 struct es1938 *chip = snd_pcm_substream_chip(substream);
674 struct snd_pcm_runtime *runtime = substream->runtime;
675 int u, is8, mono;
676 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
677 unsigned int count = snd_pcm_lib_period_bytes(substream);
678
679 chip->dma2_size = size;
680 chip->dma2_start = runtime->dma_addr;
681
682 mono = (runtime->channels > 1) ? 0 : 1;
683 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
684 u = snd_pcm_format_unsigned(runtime->format);
685
686 chip->dma2_shift = 2 - mono - is8;
687
688 snd_es1938_reset_fifo(chip);
689
690 /* set clock and counters */
691 snd_es1938_rate_set(chip, substream, DAC2);
692
693 count >>= 1;
694 count = 0x10000 - count;
695 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTL, count & 0xff);
696 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2TCOUNTH, count >> 8);
697
698 /* initialize and configure Audio 2 DAC */
699 snd_es1938_mixer_write(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x40 | (u ? 0 : 4) |
700 (mono ? 0 : 2) | (is8 ? 0 : 1));
701
702 /* program DMA */
703 snd_es1938_playback1_setdma(chip);
704
705 return 0;
706}
707
708static int snd_es1938_playback2_prepare(struct snd_pcm_substream *substream)
709{
710 struct es1938 *chip = snd_pcm_substream_chip(substream);
711 struct snd_pcm_runtime *runtime = substream->runtime;
712 int u, is8, mono;
713 unsigned int size = snd_pcm_lib_buffer_bytes(substream);
714 unsigned int count = snd_pcm_lib_period_bytes(substream);
715
716 chip->dma1_size = size;
717 chip->dma1_start = runtime->dma_addr;
718
719 mono = (runtime->channels > 1) ? 0 : 1;
720 is8 = snd_pcm_format_width(runtime->format) == 16 ? 0 : 1;
721 u = snd_pcm_format_unsigned(runtime->format);
722
723 chip->dma1_shift = 2 - mono - is8;
724
725 count = 0x10000 - count;
726
727 /* reset */
728 snd_es1938_reset_fifo(chip);
729
730 snd_es1938_bits(chip, ESS_CMD_ANALOGCONTROL, 0x03, (mono ? 2 : 1));
731
732 /* set clock and counters */
733 snd_es1938_rate_set(chip, substream, DAC1);
734 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADL, count & 0xff);
735 snd_es1938_write(chip, ESS_CMD_DMACNTRELOADH, count >> 8);
736
737 /* initialized and configure DAC */
738 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x80 : 0x00);
739 snd_es1938_write(chip, ESS_CMD_SETFORMAT, u ? 0x51 : 0x71);
740 snd_es1938_write(chip, ESS_CMD_SETFORMAT2,
741 0x90 | (mono ? 0x40 : 0x08) |
742 (is8 ? 0x00 : 0x04) | (u ? 0x00 : 0x20));
743
744 /* program DMA */
745 snd_es1938_playback2_setdma(chip);
746
747 return 0;
748}
749
750static int snd_es1938_playback_prepare(struct snd_pcm_substream *substream)
751{
752 switch (substream->number) {
753 case 0:
754 return snd_es1938_playback1_prepare(substream);
755 case 1:
756 return snd_es1938_playback2_prepare(substream);
757 }
758 snd_BUG();
759 return -EINVAL;
760}
761
762/* during the incrementing of dma counters the DMA register reads sometimes
763 returns garbage. To ensure a valid hw pointer, the following checks which
764 should be very unlikely to fail are used:
765 - is the current DMA address in the valid DMA range ?
766 - is the sum of DMA address and DMA counter pointing to the last DMA byte ?
767 One can argue this could differ by one byte depending on which register is
768 updated first, so the implementation below allows for that.
769*/
770static snd_pcm_uframes_t snd_es1938_capture_pointer(struct snd_pcm_substream *substream)
771{
772 struct es1938 *chip = snd_pcm_substream_chip(substream);
773 size_t ptr;
774#if 0
775 size_t old, new;
776 /* This stuff is *needed*, don't ask why - AB */
777 old = inw(SLDM_REG(chip, DMACOUNT));
778 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
779 old = new;
780 ptr = chip->dma1_size - 1 - new;
781#else
782 size_t count;
783 unsigned int diff;
784
785 ptr = inl(SLDM_REG(chip, DMAADDR));
786 count = inw(SLDM_REG(chip, DMACOUNT));
787 diff = chip->dma1_start + chip->dma1_size - ptr - count;
788
789 if (diff > 3 || ptr < chip->dma1_start
790 || ptr >= chip->dma1_start+chip->dma1_size)
791 ptr = chip->last_capture_dmaaddr; /* bad, use last saved */
792 else
793 chip->last_capture_dmaaddr = ptr; /* good, remember it */
794
795 ptr -= chip->dma1_start;
796#endif
797 return ptr >> chip->dma1_shift;
798}
799
800static snd_pcm_uframes_t snd_es1938_playback1_pointer(struct snd_pcm_substream *substream)
801{
802 struct es1938 *chip = snd_pcm_substream_chip(substream);
803 size_t ptr;
804#if 1
805 ptr = chip->dma2_size - inw(SLIO_REG(chip, AUDIO2DMACOUNT));
806#else
807 ptr = inl(SLIO_REG(chip, AUDIO2DMAADDR)) - chip->dma2_start;
808#endif
809 return ptr >> chip->dma2_shift;
810}
811
812static snd_pcm_uframes_t snd_es1938_playback2_pointer(struct snd_pcm_substream *substream)
813{
814 struct es1938 *chip = snd_pcm_substream_chip(substream);
815 size_t ptr;
816 size_t old, new;
817#if 1
818 /* This stuff is *needed*, don't ask why - AB */
819 old = inw(SLDM_REG(chip, DMACOUNT));
820 while ((new = inw(SLDM_REG(chip, DMACOUNT))) != old)
821 old = new;
822 ptr = chip->dma1_size - 1 - new;
823#else
824 ptr = inl(SLDM_REG(chip, DMAADDR)) - chip->dma1_start;
825#endif
826 return ptr >> chip->dma1_shift;
827}
828
829static snd_pcm_uframes_t snd_es1938_playback_pointer(struct snd_pcm_substream *substream)
830{
831 switch (substream->number) {
832 case 0:
833 return snd_es1938_playback1_pointer(substream);
834 case 1:
835 return snd_es1938_playback2_pointer(substream);
836 }
837 snd_BUG();
838 return -EINVAL;
839}
840
841static int snd_es1938_capture_copy(struct snd_pcm_substream *substream,
842 int channel, unsigned long pos,
843 void __user *dst, unsigned long count)
844{
845 struct snd_pcm_runtime *runtime = substream->runtime;
846 struct es1938 *chip = snd_pcm_substream_chip(substream);
847
848 if (snd_BUG_ON(pos + count > chip->dma1_size))
849 return -EINVAL;
850 if (pos + count < chip->dma1_size) {
851 if (copy_to_user(dst, runtime->dma_area + pos + 1, count))
852 return -EFAULT;
853 } else {
854 if (copy_to_user(dst, runtime->dma_area + pos + 1, count - 1))
855 return -EFAULT;
856 if (put_user(runtime->dma_area[0],
857 ((unsigned char __user *)dst) + count - 1))
858 return -EFAULT;
859 }
860 return 0;
861}
862
863static int snd_es1938_capture_copy_kernel(struct snd_pcm_substream *substream,
864 int channel, unsigned long pos,
865 void *dst, unsigned long count)
866{
867 struct snd_pcm_runtime *runtime = substream->runtime;
868 struct es1938 *chip = snd_pcm_substream_chip(substream);
869
870 if (snd_BUG_ON(pos + count > chip->dma1_size))
871 return -EINVAL;
872 if (pos + count < chip->dma1_size) {
873 memcpy(dst, runtime->dma_area + pos + 1, count);
874 } else {
875 memcpy(dst, runtime->dma_area + pos + 1, count - 1);
876 runtime->dma_area[0] = *((unsigned char *)dst + count - 1);
877 }
878 return 0;
879}
880
881/*
882 * buffer management
883 */
884static int snd_es1938_pcm_hw_params(struct snd_pcm_substream *substream,
885 struct snd_pcm_hw_params *hw_params)
886
887{
888 int err;
889
890 if ((err = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(hw_params))) < 0)
891 return err;
892 return 0;
893}
894
895static int snd_es1938_pcm_hw_free(struct snd_pcm_substream *substream)
896{
897 return snd_pcm_lib_free_pages(substream);
898}
899
900/* ----------------------------------------------------------------------
901 * Audio1 Capture (ADC)
902 * ----------------------------------------------------------------------*/
903static const struct snd_pcm_hardware snd_es1938_capture =
904{
905 .info = (SNDRV_PCM_INFO_INTERLEAVED |
906 SNDRV_PCM_INFO_BLOCK_TRANSFER),
907 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
908 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
909 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
910 .rate_min = 6000,
911 .rate_max = 48000,
912 .channels_min = 1,
913 .channels_max = 2,
914 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
915 .period_bytes_min = 64,
916 .period_bytes_max = 0x8000,
917 .periods_min = 1,
918 .periods_max = 1024,
919 .fifo_size = 256,
920};
921
922/* -----------------------------------------------------------------------
923 * Audio2 Playback (DAC)
924 * -----------------------------------------------------------------------*/
925static const struct snd_pcm_hardware snd_es1938_playback =
926{
927 .info = (SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED |
928 SNDRV_PCM_INFO_BLOCK_TRANSFER |
929 SNDRV_PCM_INFO_MMAP_VALID),
930 .formats = (SNDRV_PCM_FMTBIT_U8 | SNDRV_PCM_FMTBIT_S16_LE |
931 SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U16_LE),
932 .rates = SNDRV_PCM_RATE_CONTINUOUS | SNDRV_PCM_RATE_8000_48000,
933 .rate_min = 6000,
934 .rate_max = 48000,
935 .channels_min = 1,
936 .channels_max = 2,
937 .buffer_bytes_max = 0x8000, /* DMA controller screws on higher values */
938 .period_bytes_min = 64,
939 .period_bytes_max = 0x8000,
940 .periods_min = 1,
941 .periods_max = 1024,
942 .fifo_size = 256,
943};
944
945static int snd_es1938_capture_open(struct snd_pcm_substream *substream)
946{
947 struct es1938 *chip = snd_pcm_substream_chip(substream);
948 struct snd_pcm_runtime *runtime = substream->runtime;
949
950 if (chip->playback2_substream)
951 return -EAGAIN;
952 chip->capture_substream = substream;
953 runtime->hw = snd_es1938_capture;
954 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
955 &hw_constraints_clocks);
956 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
957 return 0;
958}
959
960static int snd_es1938_playback_open(struct snd_pcm_substream *substream)
961{
962 struct es1938 *chip = snd_pcm_substream_chip(substream);
963 struct snd_pcm_runtime *runtime = substream->runtime;
964
965 switch (substream->number) {
966 case 0:
967 chip->playback1_substream = substream;
968 break;
969 case 1:
970 if (chip->capture_substream)
971 return -EAGAIN;
972 chip->playback2_substream = substream;
973 break;
974 default:
975 snd_BUG();
976 return -EINVAL;
977 }
978 runtime->hw = snd_es1938_playback;
979 snd_pcm_hw_constraint_ratnums(runtime, 0, SNDRV_PCM_HW_PARAM_RATE,
980 &hw_constraints_clocks);
981 snd_pcm_hw_constraint_minmax(runtime, SNDRV_PCM_HW_PARAM_BUFFER_BYTES, 0, 0xff00);
982 return 0;
983}
984
985static int snd_es1938_capture_close(struct snd_pcm_substream *substream)
986{
987 struct es1938 *chip = snd_pcm_substream_chip(substream);
988
989 chip->capture_substream = NULL;
990 return 0;
991}
992
993static int snd_es1938_playback_close(struct snd_pcm_substream *substream)
994{
995 struct es1938 *chip = snd_pcm_substream_chip(substream);
996
997 switch (substream->number) {
998 case 0:
999 chip->playback1_substream = NULL;
1000 break;
1001 case 1:
1002 chip->playback2_substream = NULL;
1003 break;
1004 default:
1005 snd_BUG();
1006 return -EINVAL;
1007 }
1008 return 0;
1009}
1010
1011static const struct snd_pcm_ops snd_es1938_playback_ops = {
1012 .open = snd_es1938_playback_open,
1013 .close = snd_es1938_playback_close,
1014 .ioctl = snd_pcm_lib_ioctl,
1015 .hw_params = snd_es1938_pcm_hw_params,
1016 .hw_free = snd_es1938_pcm_hw_free,
1017 .prepare = snd_es1938_playback_prepare,
1018 .trigger = snd_es1938_playback_trigger,
1019 .pointer = snd_es1938_playback_pointer,
1020};
1021
1022static const struct snd_pcm_ops snd_es1938_capture_ops = {
1023 .open = snd_es1938_capture_open,
1024 .close = snd_es1938_capture_close,
1025 .ioctl = snd_pcm_lib_ioctl,
1026 .hw_params = snd_es1938_pcm_hw_params,
1027 .hw_free = snd_es1938_pcm_hw_free,
1028 .prepare = snd_es1938_capture_prepare,
1029 .trigger = snd_es1938_capture_trigger,
1030 .pointer = snd_es1938_capture_pointer,
1031 .copy_user = snd_es1938_capture_copy,
1032 .copy_kernel = snd_es1938_capture_copy_kernel,
1033};
1034
1035static int snd_es1938_new_pcm(struct es1938 *chip, int device)
1036{
1037 struct snd_pcm *pcm;
1038 int err;
1039
1040 if ((err = snd_pcm_new(chip->card, "es-1938-1946", device, 2, 1, &pcm)) < 0)
1041 return err;
1042 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_PLAYBACK, &snd_es1938_playback_ops);
1043 snd_pcm_set_ops(pcm, SNDRV_PCM_STREAM_CAPTURE, &snd_es1938_capture_ops);
1044
1045 pcm->private_data = chip;
1046 pcm->info_flags = 0;
1047 strcpy(pcm->name, "ESS Solo-1");
1048
1049 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
1050 snd_dma_pci_data(chip->pci), 64*1024, 64*1024);
1051
1052 chip->pcm = pcm;
1053 return 0;
1054}
1055
1056/* -------------------------------------------------------------------
1057 *
1058 * *** Mixer part ***
1059 */
1060
1061static int snd_es1938_info_mux(struct snd_kcontrol *kcontrol,
1062 struct snd_ctl_elem_info *uinfo)
1063{
1064 static const char * const texts[8] = {
1065 "Mic", "Mic Master", "CD", "AOUT",
1066 "Mic1", "Mix", "Line", "Master"
1067 };
1068
1069 return snd_ctl_enum_info(uinfo, 1, 8, texts);
1070}
1071
1072static int snd_es1938_get_mux(struct snd_kcontrol *kcontrol,
1073 struct snd_ctl_elem_value *ucontrol)
1074{
1075 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1076 ucontrol->value.enumerated.item[0] = snd_es1938_mixer_read(chip, 0x1c) & 0x07;
1077 return 0;
1078}
1079
1080static int snd_es1938_put_mux(struct snd_kcontrol *kcontrol,
1081 struct snd_ctl_elem_value *ucontrol)
1082{
1083 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1084 unsigned char val = ucontrol->value.enumerated.item[0];
1085
1086 if (val > 7)
1087 return -EINVAL;
1088 return snd_es1938_mixer_bits(chip, 0x1c, 0x07, val) != val;
1089}
1090
1091#define snd_es1938_info_spatializer_enable snd_ctl_boolean_mono_info
1092
1093static int snd_es1938_get_spatializer_enable(struct snd_kcontrol *kcontrol,
1094 struct snd_ctl_elem_value *ucontrol)
1095{
1096 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1097 unsigned char val = snd_es1938_mixer_read(chip, 0x50);
1098 ucontrol->value.integer.value[0] = !!(val & 8);
1099 return 0;
1100}
1101
1102static int snd_es1938_put_spatializer_enable(struct snd_kcontrol *kcontrol,
1103 struct snd_ctl_elem_value *ucontrol)
1104{
1105 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1106 unsigned char oval, nval;
1107 int change;
1108 nval = ucontrol->value.integer.value[0] ? 0x0c : 0x04;
1109 oval = snd_es1938_mixer_read(chip, 0x50) & 0x0c;
1110 change = nval != oval;
1111 if (change) {
1112 snd_es1938_mixer_write(chip, 0x50, nval & ~0x04);
1113 snd_es1938_mixer_write(chip, 0x50, nval);
1114 }
1115 return change;
1116}
1117
1118static int snd_es1938_info_hw_volume(struct snd_kcontrol *kcontrol,
1119 struct snd_ctl_elem_info *uinfo)
1120{
1121 uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
1122 uinfo->count = 2;
1123 uinfo->value.integer.min = 0;
1124 uinfo->value.integer.max = 63;
1125 return 0;
1126}
1127
1128static int snd_es1938_get_hw_volume(struct snd_kcontrol *kcontrol,
1129 struct snd_ctl_elem_value *ucontrol)
1130{
1131 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1132 ucontrol->value.integer.value[0] = snd_es1938_mixer_read(chip, 0x61) & 0x3f;
1133 ucontrol->value.integer.value[1] = snd_es1938_mixer_read(chip, 0x63) & 0x3f;
1134 return 0;
1135}
1136
1137#define snd_es1938_info_hw_switch snd_ctl_boolean_stereo_info
1138
1139static int snd_es1938_get_hw_switch(struct snd_kcontrol *kcontrol,
1140 struct snd_ctl_elem_value *ucontrol)
1141{
1142 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1143 ucontrol->value.integer.value[0] = !(snd_es1938_mixer_read(chip, 0x61) & 0x40);
1144 ucontrol->value.integer.value[1] = !(snd_es1938_mixer_read(chip, 0x63) & 0x40);
1145 return 0;
1146}
1147
1148static void snd_es1938_hwv_free(struct snd_kcontrol *kcontrol)
1149{
1150 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1151 chip->master_volume = NULL;
1152 chip->master_switch = NULL;
1153 chip->hw_volume = NULL;
1154 chip->hw_switch = NULL;
1155}
1156
1157static int snd_es1938_reg_bits(struct es1938 *chip, unsigned char reg,
1158 unsigned char mask, unsigned char val)
1159{
1160 if (reg < 0xa0)
1161 return snd_es1938_mixer_bits(chip, reg, mask, val);
1162 else
1163 return snd_es1938_bits(chip, reg, mask, val);
1164}
1165
1166static int snd_es1938_reg_read(struct es1938 *chip, unsigned char reg)
1167{
1168 if (reg < 0xa0)
1169 return snd_es1938_mixer_read(chip, reg);
1170 else
1171 return snd_es1938_read(chip, reg);
1172}
1173
1174#define ES1938_SINGLE_TLV(xname, xindex, reg, shift, mask, invert, xtlv) \
1175{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1176 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1177 .name = xname, .index = xindex, \
1178 .info = snd_es1938_info_single, \
1179 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1180 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24), \
1181 .tlv = { .p = xtlv } }
1182#define ES1938_SINGLE(xname, xindex, reg, shift, mask, invert) \
1183{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1184 .info = snd_es1938_info_single, \
1185 .get = snd_es1938_get_single, .put = snd_es1938_put_single, \
1186 .private_value = reg | (shift << 8) | (mask << 16) | (invert << 24) }
1187
1188static int snd_es1938_info_single(struct snd_kcontrol *kcontrol,
1189 struct snd_ctl_elem_info *uinfo)
1190{
1191 int mask = (kcontrol->private_value >> 16) & 0xff;
1192
1193 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1194 uinfo->count = 1;
1195 uinfo->value.integer.min = 0;
1196 uinfo->value.integer.max = mask;
1197 return 0;
1198}
1199
1200static int snd_es1938_get_single(struct snd_kcontrol *kcontrol,
1201 struct snd_ctl_elem_value *ucontrol)
1202{
1203 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1204 int reg = kcontrol->private_value & 0xff;
1205 int shift = (kcontrol->private_value >> 8) & 0xff;
1206 int mask = (kcontrol->private_value >> 16) & 0xff;
1207 int invert = (kcontrol->private_value >> 24) & 0xff;
1208 int val;
1209
1210 val = snd_es1938_reg_read(chip, reg);
1211 ucontrol->value.integer.value[0] = (val >> shift) & mask;
1212 if (invert)
1213 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1214 return 0;
1215}
1216
1217static int snd_es1938_put_single(struct snd_kcontrol *kcontrol,
1218 struct snd_ctl_elem_value *ucontrol)
1219{
1220 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1221 int reg = kcontrol->private_value & 0xff;
1222 int shift = (kcontrol->private_value >> 8) & 0xff;
1223 int mask = (kcontrol->private_value >> 16) & 0xff;
1224 int invert = (kcontrol->private_value >> 24) & 0xff;
1225 unsigned char val;
1226
1227 val = (ucontrol->value.integer.value[0] & mask);
1228 if (invert)
1229 val = mask - val;
1230 mask <<= shift;
1231 val <<= shift;
1232 return snd_es1938_reg_bits(chip, reg, mask, val) != val;
1233}
1234
1235#define ES1938_DOUBLE_TLV(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert, xtlv) \
1236{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
1237 .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | SNDRV_CTL_ELEM_ACCESS_TLV_READ,\
1238 .name = xname, .index = xindex, \
1239 .info = snd_es1938_info_double, \
1240 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1241 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22), \
1242 .tlv = { .p = xtlv } }
1243#define ES1938_DOUBLE(xname, xindex, left_reg, right_reg, shift_left, shift_right, mask, invert) \
1244{ .iface = SNDRV_CTL_ELEM_IFACE_MIXER, .name = xname, .index = xindex, \
1245 .info = snd_es1938_info_double, \
1246 .get = snd_es1938_get_double, .put = snd_es1938_put_double, \
1247 .private_value = left_reg | (right_reg << 8) | (shift_left << 16) | (shift_right << 19) | (mask << 24) | (invert << 22) }
1248
1249static int snd_es1938_info_double(struct snd_kcontrol *kcontrol,
1250 struct snd_ctl_elem_info *uinfo)
1251{
1252 int mask = (kcontrol->private_value >> 24) & 0xff;
1253
1254 uinfo->type = mask == 1 ? SNDRV_CTL_ELEM_TYPE_BOOLEAN : SNDRV_CTL_ELEM_TYPE_INTEGER;
1255 uinfo->count = 2;
1256 uinfo->value.integer.min = 0;
1257 uinfo->value.integer.max = mask;
1258 return 0;
1259}
1260
1261static int snd_es1938_get_double(struct snd_kcontrol *kcontrol,
1262 struct snd_ctl_elem_value *ucontrol)
1263{
1264 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1265 int left_reg = kcontrol->private_value & 0xff;
1266 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1267 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1268 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1269 int mask = (kcontrol->private_value >> 24) & 0xff;
1270 int invert = (kcontrol->private_value >> 22) & 1;
1271 unsigned char left, right;
1272
1273 left = snd_es1938_reg_read(chip, left_reg);
1274 if (left_reg != right_reg)
1275 right = snd_es1938_reg_read(chip, right_reg);
1276 else
1277 right = left;
1278 ucontrol->value.integer.value[0] = (left >> shift_left) & mask;
1279 ucontrol->value.integer.value[1] = (right >> shift_right) & mask;
1280 if (invert) {
1281 ucontrol->value.integer.value[0] = mask - ucontrol->value.integer.value[0];
1282 ucontrol->value.integer.value[1] = mask - ucontrol->value.integer.value[1];
1283 }
1284 return 0;
1285}
1286
1287static int snd_es1938_put_double(struct snd_kcontrol *kcontrol,
1288 struct snd_ctl_elem_value *ucontrol)
1289{
1290 struct es1938 *chip = snd_kcontrol_chip(kcontrol);
1291 int left_reg = kcontrol->private_value & 0xff;
1292 int right_reg = (kcontrol->private_value >> 8) & 0xff;
1293 int shift_left = (kcontrol->private_value >> 16) & 0x07;
1294 int shift_right = (kcontrol->private_value >> 19) & 0x07;
1295 int mask = (kcontrol->private_value >> 24) & 0xff;
1296 int invert = (kcontrol->private_value >> 22) & 1;
1297 int change;
1298 unsigned char val1, val2, mask1, mask2;
1299
1300 val1 = ucontrol->value.integer.value[0] & mask;
1301 val2 = ucontrol->value.integer.value[1] & mask;
1302 if (invert) {
1303 val1 = mask - val1;
1304 val2 = mask - val2;
1305 }
1306 val1 <<= shift_left;
1307 val2 <<= shift_right;
1308 mask1 = mask << shift_left;
1309 mask2 = mask << shift_right;
1310 if (left_reg != right_reg) {
1311 change = 0;
1312 if (snd_es1938_reg_bits(chip, left_reg, mask1, val1) != val1)
1313 change = 1;
1314 if (snd_es1938_reg_bits(chip, right_reg, mask2, val2) != val2)
1315 change = 1;
1316 } else {
1317 change = (snd_es1938_reg_bits(chip, left_reg, mask1 | mask2,
1318 val1 | val2) != (val1 | val2));
1319 }
1320 return change;
1321}
1322
1323static const DECLARE_TLV_DB_RANGE(db_scale_master,
1324 0, 54, TLV_DB_SCALE_ITEM(-3600, 50, 1),
1325 54, 63, TLV_DB_SCALE_ITEM(-900, 100, 0),
1326);
1327
1328static const DECLARE_TLV_DB_RANGE(db_scale_audio1,
1329 0, 8, TLV_DB_SCALE_ITEM(-3300, 300, 1),
1330 8, 15, TLV_DB_SCALE_ITEM(-900, 150, 0),
1331);
1332
1333static const DECLARE_TLV_DB_RANGE(db_scale_audio2,
1334 0, 8, TLV_DB_SCALE_ITEM(-3450, 300, 1),
1335 8, 15, TLV_DB_SCALE_ITEM(-1050, 150, 0),
1336);
1337
1338static const DECLARE_TLV_DB_RANGE(db_scale_mic,
1339 0, 8, TLV_DB_SCALE_ITEM(-2400, 300, 1),
1340 8, 15, TLV_DB_SCALE_ITEM(0, 150, 0),
1341);
1342
1343static const DECLARE_TLV_DB_RANGE(db_scale_line,
1344 0, 8, TLV_DB_SCALE_ITEM(-3150, 300, 1),
1345 8, 15, TLV_DB_SCALE_ITEM(-750, 150, 0),
1346);
1347
1348static const DECLARE_TLV_DB_SCALE(db_scale_capture, 0, 150, 0);
1349
1350static struct snd_kcontrol_new snd_es1938_controls[] = {
1351ES1938_DOUBLE_TLV("Master Playback Volume", 0, 0x60, 0x62, 0, 0, 63, 0,
1352 db_scale_master),
1353ES1938_DOUBLE("Master Playback Switch", 0, 0x60, 0x62, 6, 6, 1, 1),
1354{
1355 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1356 .name = "Hardware Master Playback Volume",
1357 .access = SNDRV_CTL_ELEM_ACCESS_READ,
1358 .info = snd_es1938_info_hw_volume,
1359 .get = snd_es1938_get_hw_volume,
1360},
1361{
1362 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1363 .access = (SNDRV_CTL_ELEM_ACCESS_READ |
1364 SNDRV_CTL_ELEM_ACCESS_TLV_READ),
1365 .name = "Hardware Master Playback Switch",
1366 .info = snd_es1938_info_hw_switch,
1367 .get = snd_es1938_get_hw_switch,
1368 .tlv = { .p = db_scale_master },
1369},
1370ES1938_SINGLE("Hardware Volume Split", 0, 0x64, 7, 1, 0),
1371ES1938_DOUBLE_TLV("Line Playback Volume", 0, 0x3e, 0x3e, 4, 0, 15, 0,
1372 db_scale_line),
1373ES1938_DOUBLE("CD Playback Volume", 0, 0x38, 0x38, 4, 0, 15, 0),
1374ES1938_DOUBLE_TLV("FM Playback Volume", 0, 0x36, 0x36, 4, 0, 15, 0,
1375 db_scale_mic),
1376ES1938_DOUBLE_TLV("Mono Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1377 db_scale_line),
1378ES1938_DOUBLE_TLV("Mic Playback Volume", 0, 0x1a, 0x1a, 4, 0, 15, 0,
1379 db_scale_mic),
1380ES1938_DOUBLE_TLV("Aux Playback Volume", 0, 0x3a, 0x3a, 4, 0, 15, 0,
1381 db_scale_line),
1382ES1938_DOUBLE_TLV("Capture Volume", 0, 0xb4, 0xb4, 4, 0, 15, 0,
1383 db_scale_capture),
1384ES1938_SINGLE("Beep Volume", 0, 0x3c, 0, 7, 0),
1385ES1938_SINGLE("Record Monitor", 0, 0xa8, 3, 1, 0),
1386ES1938_SINGLE("Capture Switch", 0, 0x1c, 4, 1, 1),
1387{
1388 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1389 .name = "Capture Source",
1390 .info = snd_es1938_info_mux,
1391 .get = snd_es1938_get_mux,
1392 .put = snd_es1938_put_mux,
1393},
1394ES1938_DOUBLE_TLV("Mono Input Playback Volume", 0, 0x6d, 0x6d, 4, 0, 15, 0,
1395 db_scale_line),
1396ES1938_DOUBLE_TLV("PCM Capture Volume", 0, 0x69, 0x69, 4, 0, 15, 0,
1397 db_scale_audio2),
1398ES1938_DOUBLE_TLV("Mic Capture Volume", 0, 0x68, 0x68, 4, 0, 15, 0,
1399 db_scale_mic),
1400ES1938_DOUBLE_TLV("Line Capture Volume", 0, 0x6e, 0x6e, 4, 0, 15, 0,
1401 db_scale_line),
1402ES1938_DOUBLE_TLV("FM Capture Volume", 0, 0x6b, 0x6b, 4, 0, 15, 0,
1403 db_scale_mic),
1404ES1938_DOUBLE_TLV("Mono Capture Volume", 0, 0x6f, 0x6f, 4, 0, 15, 0,
1405 db_scale_line),
1406ES1938_DOUBLE_TLV("CD Capture Volume", 0, 0x6a, 0x6a, 4, 0, 15, 0,
1407 db_scale_line),
1408ES1938_DOUBLE_TLV("Aux Capture Volume", 0, 0x6c, 0x6c, 4, 0, 15, 0,
1409 db_scale_line),
1410ES1938_DOUBLE_TLV("PCM Playback Volume", 0, 0x7c, 0x7c, 4, 0, 15, 0,
1411 db_scale_audio2),
1412ES1938_DOUBLE_TLV("PCM Playback Volume", 1, 0x14, 0x14, 4, 0, 15, 0,
1413 db_scale_audio1),
1414ES1938_SINGLE("3D Control - Level", 0, 0x52, 0, 63, 0),
1415{
1416 .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
1417 .name = "3D Control - Switch",
1418 .info = snd_es1938_info_spatializer_enable,
1419 .get = snd_es1938_get_spatializer_enable,
1420 .put = snd_es1938_put_spatializer_enable,
1421},
1422ES1938_SINGLE("Mic Boost (+26dB)", 0, 0x7d, 3, 1, 0)
1423};
1424
1425
1426/* ---------------------------------------------------------------------------- */
1427/* ---------------------------------------------------------------------------- */
1428
1429/*
1430 * initialize the chip - used by resume callback, too
1431 */
1432static void snd_es1938_chip_init(struct es1938 *chip)
1433{
1434 /* reset chip */
1435 snd_es1938_reset(chip);
1436
1437 /* configure native mode */
1438
1439 /* enable bus master */
1440 pci_set_master(chip->pci);
1441
1442 /* disable legacy audio */
1443 pci_write_config_word(chip->pci, SL_PCI_LEGACYCONTROL, 0x805f);
1444
1445 /* set DDMA base */
1446 pci_write_config_word(chip->pci, SL_PCI_DDMACONTROL, chip->ddma_port | 1);
1447
1448 /* set DMA/IRQ policy */
1449 pci_write_config_dword(chip->pci, SL_PCI_CONFIG, 0);
1450
1451 /* enable Audio 1, Audio 2, MPU401 IRQ and HW volume IRQ*/
1452 outb(0xf0, SLIO_REG(chip, IRQCONTROL));
1453
1454 /* reset DMA */
1455 outb(0, SLDM_REG(chip, DMACLEAR));
1456}
1457
1458#ifdef CONFIG_PM_SLEEP
1459/*
1460 * PM support
1461 */
1462
1463static unsigned char saved_regs[SAVED_REG_SIZE+1] = {
1464 0x14, 0x1a, 0x1c, 0x3a, 0x3c, 0x3e, 0x36, 0x38,
1465 0x50, 0x52, 0x60, 0x61, 0x62, 0x63, 0x64, 0x68,
1466 0x69, 0x6a, 0x6b, 0x6d, 0x6e, 0x6f, 0x7c, 0x7d,
1467 0xa8, 0xb4,
1468};
1469
1470
1471static int es1938_suspend(struct device *dev)
1472{
1473 struct snd_card *card = dev_get_drvdata(dev);
1474 struct es1938 *chip = card->private_data;
1475 unsigned char *s, *d;
1476
1477 snd_power_change_state(card, SNDRV_CTL_POWER_D3hot);
1478 snd_pcm_suspend_all(chip->pcm);
1479
1480 /* save mixer-related registers */
1481 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++)
1482 *d = snd_es1938_reg_read(chip, *s);
1483
1484 outb(0x00, SLIO_REG(chip, IRQCONTROL)); /* disable irqs */
1485 if (chip->irq >= 0) {
1486 free_irq(chip->irq, chip);
1487 chip->irq = -1;
1488 }
1489 return 0;
1490}
1491
1492static int es1938_resume(struct device *dev)
1493{
1494 struct pci_dev *pci = to_pci_dev(dev);
1495 struct snd_card *card = dev_get_drvdata(dev);
1496 struct es1938 *chip = card->private_data;
1497 unsigned char *s, *d;
1498
1499 if (request_irq(pci->irq, snd_es1938_interrupt,
1500 IRQF_SHARED, KBUILD_MODNAME, chip)) {
1501 dev_err(dev, "unable to grab IRQ %d, disabling device\n",
1502 pci->irq);
1503 snd_card_disconnect(card);
1504 return -EIO;
1505 }
1506 chip->irq = pci->irq;
1507 snd_es1938_chip_init(chip);
1508
1509 /* restore mixer-related registers */
1510 for (s = saved_regs, d = chip->saved_regs; *s; s++, d++) {
1511 if (*s < 0xa0)
1512 snd_es1938_mixer_write(chip, *s, *d);
1513 else
1514 snd_es1938_write(chip, *s, *d);
1515 }
1516
1517 snd_power_change_state(card, SNDRV_CTL_POWER_D0);
1518 return 0;
1519}
1520
1521static SIMPLE_DEV_PM_OPS(es1938_pm, es1938_suspend, es1938_resume);
1522#define ES1938_PM_OPS &es1938_pm
1523#else
1524#define ES1938_PM_OPS NULL
1525#endif /* CONFIG_PM_SLEEP */
1526
1527#ifdef SUPPORT_JOYSTICK
1528static int snd_es1938_create_gameport(struct es1938 *chip)
1529{
1530 struct gameport *gp;
1531
1532 chip->gameport = gp = gameport_allocate_port();
1533 if (!gp) {
1534 dev_err(chip->card->dev,
1535 "cannot allocate memory for gameport\n");
1536 return -ENOMEM;
1537 }
1538
1539 gameport_set_name(gp, "ES1938");
1540 gameport_set_phys(gp, "pci%s/gameport0", pci_name(chip->pci));
1541 gameport_set_dev_parent(gp, &chip->pci->dev);
1542 gp->io = chip->game_port;
1543
1544 gameport_register_port(gp);
1545
1546 return 0;
1547}
1548
1549static void snd_es1938_free_gameport(struct es1938 *chip)
1550{
1551 if (chip->gameport) {
1552 gameport_unregister_port(chip->gameport);
1553 chip->gameport = NULL;
1554 }
1555}
1556#else
1557static inline int snd_es1938_create_gameport(struct es1938 *chip) { return -ENOSYS; }
1558static inline void snd_es1938_free_gameport(struct es1938 *chip) { }
1559#endif /* SUPPORT_JOYSTICK */
1560
1561static int snd_es1938_free(struct es1938 *chip)
1562{
1563 /* disable irqs */
1564 outb(0x00, SLIO_REG(chip, IRQCONTROL));
1565 if (chip->rmidi)
1566 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0);
1567
1568 snd_es1938_free_gameport(chip);
1569
1570 if (chip->irq >= 0)
1571 free_irq(chip->irq, chip);
1572 pci_release_regions(chip->pci);
1573 pci_disable_device(chip->pci);
1574 kfree(chip);
1575 return 0;
1576}
1577
1578static int snd_es1938_dev_free(struct snd_device *device)
1579{
1580 struct es1938 *chip = device->device_data;
1581 return snd_es1938_free(chip);
1582}
1583
1584static int snd_es1938_create(struct snd_card *card,
1585 struct pci_dev *pci,
1586 struct es1938 **rchip)
1587{
1588 struct es1938 *chip;
1589 int err;
1590 static struct snd_device_ops ops = {
1591 .dev_free = snd_es1938_dev_free,
1592 };
1593
1594 *rchip = NULL;
1595
1596 /* enable PCI device */
1597 if ((err = pci_enable_device(pci)) < 0)
1598 return err;
1599 /* check, if we can restrict PCI DMA transfers to 24 bits */
1600 if (dma_set_mask(&pci->dev, DMA_BIT_MASK(24)) < 0 ||
1601 dma_set_coherent_mask(&pci->dev, DMA_BIT_MASK(24)) < 0) {
1602 dev_err(card->dev,
1603 "architecture does not support 24bit PCI busmaster DMA\n");
1604 pci_disable_device(pci);
1605 return -ENXIO;
1606 }
1607
1608 chip = kzalloc(sizeof(*chip), GFP_KERNEL);
1609 if (chip == NULL) {
1610 pci_disable_device(pci);
1611 return -ENOMEM;
1612 }
1613 spin_lock_init(&chip->reg_lock);
1614 spin_lock_init(&chip->mixer_lock);
1615 chip->card = card;
1616 chip->pci = pci;
1617 chip->irq = -1;
1618 if ((err = pci_request_regions(pci, "ESS Solo-1")) < 0) {
1619 kfree(chip);
1620 pci_disable_device(pci);
1621 return err;
1622 }
1623 chip->io_port = pci_resource_start(pci, 0);
1624 chip->sb_port = pci_resource_start(pci, 1);
1625 chip->vc_port = pci_resource_start(pci, 2);
1626 chip->mpu_port = pci_resource_start(pci, 3);
1627 chip->game_port = pci_resource_start(pci, 4);
1628 if (request_irq(pci->irq, snd_es1938_interrupt, IRQF_SHARED,
1629 KBUILD_MODNAME, chip)) {
1630 dev_err(card->dev, "unable to grab IRQ %d\n", pci->irq);
1631 snd_es1938_free(chip);
1632 return -EBUSY;
1633 }
1634 chip->irq = pci->irq;
1635 dev_dbg(card->dev,
1636 "create: io: 0x%lx, sb: 0x%lx, vc: 0x%lx, mpu: 0x%lx, game: 0x%lx\n",
1637 chip->io_port, chip->sb_port, chip->vc_port, chip->mpu_port, chip->game_port);
1638
1639 chip->ddma_port = chip->vc_port + 0x00; /* fix from Thomas Sailer */
1640
1641 snd_es1938_chip_init(chip);
1642
1643 if ((err = snd_device_new(card, SNDRV_DEV_LOWLEVEL, chip, &ops)) < 0) {
1644 snd_es1938_free(chip);
1645 return err;
1646 }
1647
1648 *rchip = chip;
1649 return 0;
1650}
1651
1652/* --------------------------------------------------------------------
1653 * Interrupt handler
1654 * -------------------------------------------------------------------- */
1655static irqreturn_t snd_es1938_interrupt(int irq, void *dev_id)
1656{
1657 struct es1938 *chip = dev_id;
1658 unsigned char status, audiostatus;
1659 int handled = 0;
1660
1661 status = inb(SLIO_REG(chip, IRQCONTROL));
1662#if 0
1663 dev_dbg(chip->card->dev,
1664 "Es1938debug - interrupt status: =0x%x\n", status);
1665#endif
1666
1667 /* AUDIO 1 */
1668 if (status & 0x10) {
1669#if 0
1670 dev_dbg(chip->card->dev,
1671 "Es1938debug - AUDIO channel 1 interrupt\n");
1672 dev_dbg(chip->card->dev,
1673 "Es1938debug - AUDIO channel 1 DMAC DMA count: %u\n",
1674 inw(SLDM_REG(chip, DMACOUNT)));
1675 dev_dbg(chip->card->dev,
1676 "Es1938debug - AUDIO channel 1 DMAC DMA base: %u\n",
1677 inl(SLDM_REG(chip, DMAADDR)));
1678 dev_dbg(chip->card->dev,
1679 "Es1938debug - AUDIO channel 1 DMAC DMA status: 0x%x\n",
1680 inl(SLDM_REG(chip, DMASTATUS)));
1681#endif
1682 /* clear irq */
1683 handled = 1;
1684 audiostatus = inb(SLSB_REG(chip, STATUS));
1685 if (chip->active & ADC1)
1686 snd_pcm_period_elapsed(chip->capture_substream);
1687 else if (chip->active & DAC1)
1688 snd_pcm_period_elapsed(chip->playback2_substream);
1689 }
1690
1691 /* AUDIO 2 */
1692 if (status & 0x20) {
1693#if 0
1694 dev_dbg(chip->card->dev,
1695 "Es1938debug - AUDIO channel 2 interrupt\n");
1696 dev_dbg(chip->card->dev,
1697 "Es1938debug - AUDIO channel 2 DMAC DMA count: %u\n",
1698 inw(SLIO_REG(chip, AUDIO2DMACOUNT)));
1699 dev_dbg(chip->card->dev,
1700 "Es1938debug - AUDIO channel 2 DMAC DMA base: %u\n",
1701 inl(SLIO_REG(chip, AUDIO2DMAADDR)));
1702
1703#endif
1704 /* clear irq */
1705 handled = 1;
1706 snd_es1938_mixer_bits(chip, ESSSB_IREG_AUDIO2CONTROL2, 0x80, 0);
1707 if (chip->active & DAC2)
1708 snd_pcm_period_elapsed(chip->playback1_substream);
1709 }
1710
1711 /* Hardware volume */
1712 if (status & 0x40) {
1713 int split = snd_es1938_mixer_read(chip, 0x64) & 0x80;
1714 handled = 1;
1715 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_switch->id);
1716 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE, &chip->hw_volume->id);
1717 if (!split) {
1718 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1719 &chip->master_switch->id);
1720 snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
1721 &chip->master_volume->id);
1722 }
1723 /* ack interrupt */
1724 snd_es1938_mixer_write(chip, 0x66, 0x00);
1725 }
1726
1727 /* MPU401 */
1728 if (status & 0x80) {
1729 // the following line is evil! It switches off MIDI interrupt handling after the first interrupt received.
1730 // replacing the last 0 by 0x40 works for ESS-Solo1, but just doing nothing works as well!
1731 // andreas@flying-snail.de
1732 // snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0); /* ack? */
1733 if (chip->rmidi) {
1734 handled = 1;
1735 snd_mpu401_uart_interrupt(irq, chip->rmidi->private_data);
1736 }
1737 }
1738 return IRQ_RETVAL(handled);
1739}
1740
1741#define ES1938_DMA_SIZE 64
1742
1743static int snd_es1938_mixer(struct es1938 *chip)
1744{
1745 struct snd_card *card;
1746 unsigned int idx;
1747 int err;
1748
1749 card = chip->card;
1750
1751 strcpy(card->mixername, "ESS Solo-1");
1752
1753 for (idx = 0; idx < ARRAY_SIZE(snd_es1938_controls); idx++) {
1754 struct snd_kcontrol *kctl;
1755 kctl = snd_ctl_new1(&snd_es1938_controls[idx], chip);
1756 switch (idx) {
1757 case 0:
1758 chip->master_volume = kctl;
1759 kctl->private_free = snd_es1938_hwv_free;
1760 break;
1761 case 1:
1762 chip->master_switch = kctl;
1763 kctl->private_free = snd_es1938_hwv_free;
1764 break;
1765 case 2:
1766 chip->hw_volume = kctl;
1767 kctl->private_free = snd_es1938_hwv_free;
1768 break;
1769 case 3:
1770 chip->hw_switch = kctl;
1771 kctl->private_free = snd_es1938_hwv_free;
1772 break;
1773 }
1774 if ((err = snd_ctl_add(card, kctl)) < 0)
1775 return err;
1776 }
1777 return 0;
1778}
1779
1780
1781static int snd_es1938_probe(struct pci_dev *pci,
1782 const struct pci_device_id *pci_id)
1783{
1784 static int dev;
1785 struct snd_card *card;
1786 struct es1938 *chip;
1787 struct snd_opl3 *opl3;
1788 int idx, err;
1789
1790 if (dev >= SNDRV_CARDS)
1791 return -ENODEV;
1792 if (!enable[dev]) {
1793 dev++;
1794 return -ENOENT;
1795 }
1796
1797 err = snd_card_new(&pci->dev, index[dev], id[dev], THIS_MODULE,
1798 0, &card);
1799 if (err < 0)
1800 return err;
1801 for (idx = 0; idx < 5; idx++) {
1802 if (pci_resource_start(pci, idx) == 0 ||
1803 !(pci_resource_flags(pci, idx) & IORESOURCE_IO)) {
1804 snd_card_free(card);
1805 return -ENODEV;
1806 }
1807 }
1808 if ((err = snd_es1938_create(card, pci, &chip)) < 0) {
1809 snd_card_free(card);
1810 return err;
1811 }
1812 card->private_data = chip;
1813
1814 strcpy(card->driver, "ES1938");
1815 strcpy(card->shortname, "ESS ES1938 (Solo-1)");
1816 sprintf(card->longname, "%s rev %i, irq %i",
1817 card->shortname,
1818 chip->revision,
1819 chip->irq);
1820
1821 if ((err = snd_es1938_new_pcm(chip, 0)) < 0) {
1822 snd_card_free(card);
1823 return err;
1824 }
1825 if ((err = snd_es1938_mixer(chip)) < 0) {
1826 snd_card_free(card);
1827 return err;
1828 }
1829 if (snd_opl3_create(card,
1830 SLSB_REG(chip, FMLOWADDR),
1831 SLSB_REG(chip, FMHIGHADDR),
1832 OPL3_HW_OPL3, 1, &opl3) < 0) {
1833 dev_err(card->dev, "OPL3 not detected at 0x%lx\n",
1834 SLSB_REG(chip, FMLOWADDR));
1835 } else {
1836 if ((err = snd_opl3_timer_new(opl3, 0, 1)) < 0) {
1837 snd_card_free(card);
1838 return err;
1839 }
1840 if ((err = snd_opl3_hwdep_new(opl3, 0, 1, NULL)) < 0) {
1841 snd_card_free(card);
1842 return err;
1843 }
1844 }
1845 if (snd_mpu401_uart_new(card, 0, MPU401_HW_MPU401,
1846 chip->mpu_port,
1847 MPU401_INFO_INTEGRATED | MPU401_INFO_IRQ_HOOK,
1848 -1, &chip->rmidi) < 0) {
1849 dev_err(card->dev, "unable to initialize MPU-401\n");
1850 } else {
1851 // this line is vital for MIDI interrupt handling on ess-solo1
1852 // andreas@flying-snail.de
1853 snd_es1938_mixer_bits(chip, ESSSB_IREG_MPU401CONTROL, 0x40, 0x40);
1854 }
1855
1856 snd_es1938_create_gameport(chip);
1857
1858 if ((err = snd_card_register(card)) < 0) {
1859 snd_card_free(card);
1860 return err;
1861 }
1862
1863 pci_set_drvdata(pci, card);
1864 dev++;
1865 return 0;
1866}
1867
1868static void snd_es1938_remove(struct pci_dev *pci)
1869{
1870 snd_card_free(pci_get_drvdata(pci));
1871}
1872
1873static struct pci_driver es1938_driver = {
1874 .name = KBUILD_MODNAME,
1875 .id_table = snd_es1938_ids,
1876 .probe = snd_es1938_probe,
1877 .remove = snd_es1938_remove,
1878 .driver = {
1879 .pm = ES1938_PM_OPS,
1880 },
1881};
1882
1883module_pci_driver(es1938_driver);