1/* SPDX-License-Identifier: GPL-2.0-only */
 2/*
 3 * Copyright (C) 2014 NVIDIA Corporation
 
 
 
 
 4 */
 5
 6#ifndef __SOC_TEGRA_PM_H__
 7#define __SOC_TEGRA_PM_H__
 8
 9#include <linux/errno.h>
10
11enum tegra_suspend_mode {
12	TEGRA_SUSPEND_NONE = 0,
13	TEGRA_SUSPEND_LP2, /* CPU voltage off */
14	TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
15	TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
16	TEGRA_MAX_SUSPEND_MODE,
17	TEGRA_SUSPEND_NOT_READY,
18};
19
20#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM) && defined(CONFIG_ARCH_TEGRA)
21enum tegra_suspend_mode
22tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
23
24/* low-level resume entry point */
25void tegra_resume(void);
26
27int tegra30_pm_secondary_cpu_suspend(unsigned long arg);
28void tegra_pm_clear_cpu_in_lp2(void);
29void tegra_pm_set_cpu_in_lp2(void);
30int tegra_pm_enter_lp2(void);
31int tegra_pm_park_secondary_cpu(unsigned long cpu);
32void tegra_pm_init_suspend(void);
33#else
34static inline enum tegra_suspend_mode
35tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
36{
37	return TEGRA_SUSPEND_NONE;
38}
39
40static inline void tegra_resume(void)
41{
42}
43
44static inline int tegra30_pm_secondary_cpu_suspend(unsigned long arg)
45{
46	return -ENOTSUPP;
47}
48
49static inline void tegra_pm_clear_cpu_in_lp2(void)
50{
51}
52
53static inline void tegra_pm_set_cpu_in_lp2(void)
54{
55}
56
57static inline int tegra_pm_enter_lp2(void)
58{
59	return -ENOTSUPP;
60}
61
62static inline int tegra_pm_park_secondary_cpu(unsigned long cpu)
63{
64	return -ENOTSUPP;
65}
66
67static inline void tegra_pm_init_suspend(void)
68{
69}
70#endif /* CONFIG_PM_SLEEP */
71
72#endif /* __SOC_TEGRA_PM_H__ */

 
 1/*
 2 * Copyright (C) 2014 NVIDIA Corporation
 3 *
 4 * This program is free software; you can redistribute it and/or modify
 5 * it under the terms of the GNU General Public License version 2 as
 6 * published by the Free Software Foundation.
 7 */
 8
 9#ifndef __SOC_TEGRA_PM_H__
10#define __SOC_TEGRA_PM_H__
11
 
 
12enum tegra_suspend_mode {
13	TEGRA_SUSPEND_NONE = 0,
14	TEGRA_SUSPEND_LP2, /* CPU voltage off */
15	TEGRA_SUSPEND_LP1, /* CPU voltage off, DRAM self-refresh */
16	TEGRA_SUSPEND_LP0, /* CPU + core voltage off, DRAM self-refresh */
17	TEGRA_MAX_SUSPEND_MODE,
 
18};
19
20#if defined(CONFIG_PM_SLEEP) && defined(CONFIG_ARM)
21enum tegra_suspend_mode
22tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode);
23
24/* low-level resume entry point */
25void tegra_resume(void);
 
 
 
 
 
 
 
26#else
27static inline enum tegra_suspend_mode
28tegra_pm_validate_suspend_mode(enum tegra_suspend_mode mode)
29{
30	return TEGRA_SUSPEND_NONE;
31}
32
33static inline void tegra_resume(void)
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
34{
35}
36#endif /* CONFIG_PM_SLEEP */
37
38#endif /* __SOC_TEGRA_PM_H__ */