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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
4 *
5 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
6 * Copyright (C) 2006 David Brownell (convert to new framework)
7 */
8
9/*
10 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
11 * That defined the register interface now provided by all PCs, some
12 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
13 * integrate an MC146818 clone in their southbridge, and boards use
14 * that instead of discrete clones like the DS12887 or M48T86. There
15 * are also clones that connect using the LPC bus.
16 *
17 * That register API is also used directly by various other drivers
18 * (notably for integrated NVRAM), infrastructure (x86 has code to
19 * bypass the RTC framework, directly reading the RTC during boot
20 * and updating minutes/seconds for systems using NTP synch) and
21 * utilities (like userspace 'hwclock', if no /dev node exists).
22 *
23 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
24 * interrupts disabled, holding the global rtc_lock, to exclude those
25 * other drivers and utilities on correctly configured systems.
26 */
27
28#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
29
30#include <linux/kernel.h>
31#include <linux/module.h>
32#include <linux/init.h>
33#include <linux/interrupt.h>
34#include <linux/spinlock.h>
35#include <linux/platform_device.h>
36#include <linux/log2.h>
37#include <linux/pm.h>
38#include <linux/of.h>
39#include <linux/of_platform.h>
40#ifdef CONFIG_X86
41#include <asm/i8259.h>
42#include <asm/processor.h>
43#include <linux/dmi.h>
44#endif
45
46/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
47#include <linux/mc146818rtc.h>
48
49#ifdef CONFIG_ACPI
50/*
51 * Use ACPI SCI to replace HPET interrupt for RTC Alarm event
52 *
53 * If cleared, ACPI SCI is only used to wake up the system from suspend
54 *
55 * If set, ACPI SCI is used to handle UIE/AIE and system wakeup
56 */
57
58static bool use_acpi_alarm;
59module_param(use_acpi_alarm, bool, 0444);
60
61static inline int cmos_use_acpi_alarm(void)
62{
63 return use_acpi_alarm;
64}
65#else /* !CONFIG_ACPI */
66
67static inline int cmos_use_acpi_alarm(void)
68{
69 return 0;
70}
71#endif
72
73struct cmos_rtc {
74 struct rtc_device *rtc;
75 struct device *dev;
76 int irq;
77 struct resource *iomem;
78 time64_t alarm_expires;
79
80 void (*wake_on)(struct device *);
81 void (*wake_off)(struct device *);
82
83 u8 enabled_wake;
84 u8 suspend_ctrl;
85
86 /* newer hardware extends the original register set */
87 u8 day_alrm;
88 u8 mon_alrm;
89 u8 century;
90
91 struct rtc_wkalrm saved_wkalrm;
92};
93
94/* both platform and pnp busses use negative numbers for invalid irqs */
95#define is_valid_irq(n) ((n) > 0)
96
97static const char driver_name[] = "rtc_cmos";
98
99/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
100 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
101 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
102 */
103#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
104
105static inline int is_intr(u8 rtc_intr)
106{
107 if (!(rtc_intr & RTC_IRQF))
108 return 0;
109 return rtc_intr & RTC_IRQMASK;
110}
111
112/*----------------------------------------------------------------*/
113
114/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
115 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
116 * used in a broken "legacy replacement" mode. The breakage includes
117 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
118 * other (better) use.
119 *
120 * When that broken mode is in use, platform glue provides a partial
121 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
122 * want to use HPET for anything except those IRQs though...
123 */
124#ifdef CONFIG_HPET_EMULATE_RTC
125#include <asm/hpet.h>
126#else
127
128static inline int is_hpet_enabled(void)
129{
130 return 0;
131}
132
133static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
134{
135 return 0;
136}
137
138static inline int hpet_set_rtc_irq_bit(unsigned long mask)
139{
140 return 0;
141}
142
143static inline int
144hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
145{
146 return 0;
147}
148
149static inline int hpet_set_periodic_freq(unsigned long freq)
150{
151 return 0;
152}
153
154static inline int hpet_rtc_dropped_irq(void)
155{
156 return 0;
157}
158
159static inline int hpet_rtc_timer_init(void)
160{
161 return 0;
162}
163
164extern irq_handler_t hpet_rtc_interrupt;
165
166static inline int hpet_register_irq_handler(irq_handler_t handler)
167{
168 return 0;
169}
170
171static inline int hpet_unregister_irq_handler(irq_handler_t handler)
172{
173 return 0;
174}
175
176#endif
177
178/* Don't use HPET for RTC Alarm event if ACPI Fixed event is used */
179static inline int use_hpet_alarm(void)
180{
181 return is_hpet_enabled() && !cmos_use_acpi_alarm();
182}
183
184/*----------------------------------------------------------------*/
185
186#ifdef RTC_PORT
187
188/* Most newer x86 systems have two register banks, the first used
189 * for RTC and NVRAM and the second only for NVRAM. Caller must
190 * own rtc_lock ... and we won't worry about access during NMI.
191 */
192#define can_bank2 true
193
194static inline unsigned char cmos_read_bank2(unsigned char addr)
195{
196 outb(addr, RTC_PORT(2));
197 return inb(RTC_PORT(3));
198}
199
200static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
201{
202 outb(addr, RTC_PORT(2));
203 outb(val, RTC_PORT(3));
204}
205
206#else
207
208#define can_bank2 false
209
210static inline unsigned char cmos_read_bank2(unsigned char addr)
211{
212 return 0;
213}
214
215static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
216{
217}
218
219#endif
220
221/*----------------------------------------------------------------*/
222
223static int cmos_read_time(struct device *dev, struct rtc_time *t)
224{
225 int ret;
226
227 /*
228 * If pm_trace abused the RTC for storage, set the timespec to 0,
229 * which tells the caller that this RTC value is unusable.
230 */
231 if (!pm_trace_rtc_valid())
232 return -EIO;
233
234 ret = mc146818_get_time(t, 1000);
235 if (ret < 0) {
236 dev_err_ratelimited(dev, "unable to read current time\n");
237 return ret;
238 }
239
240 return 0;
241}
242
243static int cmos_set_time(struct device *dev, struct rtc_time *t)
244{
245 /* NOTE: this ignores the issue whereby updating the seconds
246 * takes effect exactly 500ms after we write the register.
247 * (Also queueing and other delays before we get this far.)
248 */
249 return mc146818_set_time(t);
250}
251
252struct cmos_read_alarm_callback_param {
253 struct cmos_rtc *cmos;
254 struct rtc_time *time;
255 unsigned char rtc_control;
256};
257
258static void cmos_read_alarm_callback(unsigned char __always_unused seconds,
259 void *param_in)
260{
261 struct cmos_read_alarm_callback_param *p =
262 (struct cmos_read_alarm_callback_param *)param_in;
263 struct rtc_time *time = p->time;
264
265 time->tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
266 time->tm_min = CMOS_READ(RTC_MINUTES_ALARM);
267 time->tm_hour = CMOS_READ(RTC_HOURS_ALARM);
268
269 if (p->cmos->day_alrm) {
270 /* ignore upper bits on readback per ACPI spec */
271 time->tm_mday = CMOS_READ(p->cmos->day_alrm) & 0x3f;
272 if (!time->tm_mday)
273 time->tm_mday = -1;
274
275 if (p->cmos->mon_alrm) {
276 time->tm_mon = CMOS_READ(p->cmos->mon_alrm);
277 if (!time->tm_mon)
278 time->tm_mon = -1;
279 }
280 }
281
282 p->rtc_control = CMOS_READ(RTC_CONTROL);
283}
284
285static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
286{
287 struct cmos_rtc *cmos = dev_get_drvdata(dev);
288 struct cmos_read_alarm_callback_param p = {
289 .cmos = cmos,
290 .time = &t->time,
291 };
292
293 /* This not only a rtc_op, but also called directly */
294 if (!is_valid_irq(cmos->irq))
295 return -ETIMEDOUT;
296
297 /* Basic alarms only support hour, minute, and seconds fields.
298 * Some also support day and month, for alarms up to a year in
299 * the future.
300 */
301
302 /* Some Intel chipsets disconnect the alarm registers when the clock
303 * update is in progress - during this time reads return bogus values
304 * and writes may fail silently. See for example "7th Generation Intel®
305 * Processor Family I/O for U/Y Platforms [...] Datasheet", section
306 * 27.7.1
307 *
308 * Use the mc146818_avoid_UIP() function to avoid this.
309 */
310 if (!mc146818_avoid_UIP(cmos_read_alarm_callback, 10, &p))
311 return -EIO;
312
313 if (!(p.rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
314 if (((unsigned)t->time.tm_sec) < 0x60)
315 t->time.tm_sec = bcd2bin(t->time.tm_sec);
316 else
317 t->time.tm_sec = -1;
318 if (((unsigned)t->time.tm_min) < 0x60)
319 t->time.tm_min = bcd2bin(t->time.tm_min);
320 else
321 t->time.tm_min = -1;
322 if (((unsigned)t->time.tm_hour) < 0x24)
323 t->time.tm_hour = bcd2bin(t->time.tm_hour);
324 else
325 t->time.tm_hour = -1;
326
327 if (cmos->day_alrm) {
328 if (((unsigned)t->time.tm_mday) <= 0x31)
329 t->time.tm_mday = bcd2bin(t->time.tm_mday);
330 else
331 t->time.tm_mday = -1;
332
333 if (cmos->mon_alrm) {
334 if (((unsigned)t->time.tm_mon) <= 0x12)
335 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
336 else
337 t->time.tm_mon = -1;
338 }
339 }
340 }
341
342 t->enabled = !!(p.rtc_control & RTC_AIE);
343 t->pending = 0;
344
345 return 0;
346}
347
348static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
349{
350 unsigned char rtc_intr;
351
352 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
353 * allegedly some older rtcs need that to handle irqs properly
354 */
355 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
356
357 if (use_hpet_alarm())
358 return;
359
360 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
361 if (is_intr(rtc_intr))
362 rtc_update_irq(cmos->rtc, 1, rtc_intr);
363}
364
365static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
366{
367 unsigned char rtc_control;
368
369 /* flush any pending IRQ status, notably for update irqs,
370 * before we enable new IRQs
371 */
372 rtc_control = CMOS_READ(RTC_CONTROL);
373 cmos_checkintr(cmos, rtc_control);
374
375 rtc_control |= mask;
376 CMOS_WRITE(rtc_control, RTC_CONTROL);
377 if (use_hpet_alarm())
378 hpet_set_rtc_irq_bit(mask);
379
380 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
381 if (cmos->wake_on)
382 cmos->wake_on(cmos->dev);
383 }
384
385 cmos_checkintr(cmos, rtc_control);
386}
387
388static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
389{
390 unsigned char rtc_control;
391
392 rtc_control = CMOS_READ(RTC_CONTROL);
393 rtc_control &= ~mask;
394 CMOS_WRITE(rtc_control, RTC_CONTROL);
395 if (use_hpet_alarm())
396 hpet_mask_rtc_irq_bit(mask);
397
398 if ((mask & RTC_AIE) && cmos_use_acpi_alarm()) {
399 if (cmos->wake_off)
400 cmos->wake_off(cmos->dev);
401 }
402
403 cmos_checkintr(cmos, rtc_control);
404}
405
406static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
407{
408 struct cmos_rtc *cmos = dev_get_drvdata(dev);
409 struct rtc_time now;
410
411 cmos_read_time(dev, &now);
412
413 if (!cmos->day_alrm) {
414 time64_t t_max_date;
415 time64_t t_alrm;
416
417 t_max_date = rtc_tm_to_time64(&now);
418 t_max_date += 24 * 60 * 60 - 1;
419 t_alrm = rtc_tm_to_time64(&t->time);
420 if (t_alrm > t_max_date) {
421 dev_err(dev,
422 "Alarms can be up to one day in the future\n");
423 return -EINVAL;
424 }
425 } else if (!cmos->mon_alrm) {
426 struct rtc_time max_date = now;
427 time64_t t_max_date;
428 time64_t t_alrm;
429 int max_mday;
430
431 if (max_date.tm_mon == 11) {
432 max_date.tm_mon = 0;
433 max_date.tm_year += 1;
434 } else {
435 max_date.tm_mon += 1;
436 }
437 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
438 if (max_date.tm_mday > max_mday)
439 max_date.tm_mday = max_mday;
440
441 t_max_date = rtc_tm_to_time64(&max_date);
442 t_max_date -= 1;
443 t_alrm = rtc_tm_to_time64(&t->time);
444 if (t_alrm > t_max_date) {
445 dev_err(dev,
446 "Alarms can be up to one month in the future\n");
447 return -EINVAL;
448 }
449 } else {
450 struct rtc_time max_date = now;
451 time64_t t_max_date;
452 time64_t t_alrm;
453 int max_mday;
454
455 max_date.tm_year += 1;
456 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
457 if (max_date.tm_mday > max_mday)
458 max_date.tm_mday = max_mday;
459
460 t_max_date = rtc_tm_to_time64(&max_date);
461 t_max_date -= 1;
462 t_alrm = rtc_tm_to_time64(&t->time);
463 if (t_alrm > t_max_date) {
464 dev_err(dev,
465 "Alarms can be up to one year in the future\n");
466 return -EINVAL;
467 }
468 }
469
470 return 0;
471}
472
473struct cmos_set_alarm_callback_param {
474 struct cmos_rtc *cmos;
475 unsigned char mon, mday, hrs, min, sec;
476 struct rtc_wkalrm *t;
477};
478
479/* Note: this function may be executed by mc146818_avoid_UIP() more then
480 * once
481 */
482static void cmos_set_alarm_callback(unsigned char __always_unused seconds,
483 void *param_in)
484{
485 struct cmos_set_alarm_callback_param *p =
486 (struct cmos_set_alarm_callback_param *)param_in;
487
488 /* next rtc irq must not be from previous alarm setting */
489 cmos_irq_disable(p->cmos, RTC_AIE);
490
491 /* update alarm */
492 CMOS_WRITE(p->hrs, RTC_HOURS_ALARM);
493 CMOS_WRITE(p->min, RTC_MINUTES_ALARM);
494 CMOS_WRITE(p->sec, RTC_SECONDS_ALARM);
495
496 /* the system may support an "enhanced" alarm */
497 if (p->cmos->day_alrm) {
498 CMOS_WRITE(p->mday, p->cmos->day_alrm);
499 if (p->cmos->mon_alrm)
500 CMOS_WRITE(p->mon, p->cmos->mon_alrm);
501 }
502
503 if (use_hpet_alarm()) {
504 /*
505 * FIXME the HPET alarm glue currently ignores day_alrm
506 * and mon_alrm ...
507 */
508 hpet_set_alarm_time(p->t->time.tm_hour, p->t->time.tm_min,
509 p->t->time.tm_sec);
510 }
511
512 if (p->t->enabled)
513 cmos_irq_enable(p->cmos, RTC_AIE);
514}
515
516static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
517{
518 struct cmos_rtc *cmos = dev_get_drvdata(dev);
519 struct cmos_set_alarm_callback_param p = {
520 .cmos = cmos,
521 .t = t
522 };
523 unsigned char rtc_control;
524 int ret;
525
526 /* This not only a rtc_op, but also called directly */
527 if (!is_valid_irq(cmos->irq))
528 return -EIO;
529
530 ret = cmos_validate_alarm(dev, t);
531 if (ret < 0)
532 return ret;
533
534 p.mon = t->time.tm_mon + 1;
535 p.mday = t->time.tm_mday;
536 p.hrs = t->time.tm_hour;
537 p.min = t->time.tm_min;
538 p.sec = t->time.tm_sec;
539
540 spin_lock_irq(&rtc_lock);
541 rtc_control = CMOS_READ(RTC_CONTROL);
542 spin_unlock_irq(&rtc_lock);
543
544 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
545 /* Writing 0xff means "don't care" or "match all". */
546 p.mon = (p.mon <= 12) ? bin2bcd(p.mon) : 0xff;
547 p.mday = (p.mday >= 1 && p.mday <= 31) ? bin2bcd(p.mday) : 0xff;
548 p.hrs = (p.hrs < 24) ? bin2bcd(p.hrs) : 0xff;
549 p.min = (p.min < 60) ? bin2bcd(p.min) : 0xff;
550 p.sec = (p.sec < 60) ? bin2bcd(p.sec) : 0xff;
551 }
552
553 /*
554 * Some Intel chipsets disconnect the alarm registers when the clock
555 * update is in progress - during this time writes fail silently.
556 *
557 * Use mc146818_avoid_UIP() to avoid this.
558 */
559 if (!mc146818_avoid_UIP(cmos_set_alarm_callback, 10, &p))
560 return -ETIMEDOUT;
561
562 cmos->alarm_expires = rtc_tm_to_time64(&t->time);
563
564 return 0;
565}
566
567static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
568{
569 struct cmos_rtc *cmos = dev_get_drvdata(dev);
570 unsigned long flags;
571
572 spin_lock_irqsave(&rtc_lock, flags);
573
574 if (enabled)
575 cmos_irq_enable(cmos, RTC_AIE);
576 else
577 cmos_irq_disable(cmos, RTC_AIE);
578
579 spin_unlock_irqrestore(&rtc_lock, flags);
580 return 0;
581}
582
583#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
584
585static int cmos_procfs(struct device *dev, struct seq_file *seq)
586{
587 struct cmos_rtc *cmos = dev_get_drvdata(dev);
588 unsigned char rtc_control, valid;
589
590 spin_lock_irq(&rtc_lock);
591 rtc_control = CMOS_READ(RTC_CONTROL);
592 valid = CMOS_READ(RTC_VALID);
593 spin_unlock_irq(&rtc_lock);
594
595 /* NOTE: at least ICH6 reports battery status using a different
596 * (non-RTC) bit; and SQWE is ignored on many current systems.
597 */
598 seq_printf(seq,
599 "periodic_IRQ\t: %s\n"
600 "update_IRQ\t: %s\n"
601 "HPET_emulated\t: %s\n"
602 // "square_wave\t: %s\n"
603 "BCD\t\t: %s\n"
604 "DST_enable\t: %s\n"
605 "periodic_freq\t: %d\n"
606 "batt_status\t: %s\n",
607 (rtc_control & RTC_PIE) ? "yes" : "no",
608 (rtc_control & RTC_UIE) ? "yes" : "no",
609 use_hpet_alarm() ? "yes" : "no",
610 // (rtc_control & RTC_SQWE) ? "yes" : "no",
611 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
612 (rtc_control & RTC_DST_EN) ? "yes" : "no",
613 cmos->rtc->irq_freq,
614 (valid & RTC_VRT) ? "okay" : "dead");
615
616 return 0;
617}
618
619#else
620#define cmos_procfs NULL
621#endif
622
623static const struct rtc_class_ops cmos_rtc_ops = {
624 .read_time = cmos_read_time,
625 .set_time = cmos_set_time,
626 .read_alarm = cmos_read_alarm,
627 .set_alarm = cmos_set_alarm,
628 .proc = cmos_procfs,
629 .alarm_irq_enable = cmos_alarm_irq_enable,
630};
631
632/*----------------------------------------------------------------*/
633
634/*
635 * All these chips have at least 64 bytes of address space, shared by
636 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
637 * by boot firmware. Modern chips have 128 or 256 bytes.
638 */
639
640#define NVRAM_OFFSET (RTC_REG_D + 1)
641
642static int cmos_nvram_read(void *priv, unsigned int off, void *val,
643 size_t count)
644{
645 unsigned char *buf = val;
646
647 off += NVRAM_OFFSET;
648 for (; count; count--, off++, buf++) {
649 guard(spinlock_irq)(&rtc_lock);
650 if (off < 128)
651 *buf = CMOS_READ(off);
652 else if (can_bank2)
653 *buf = cmos_read_bank2(off);
654 else
655 return -EIO;
656 }
657
658 return 0;
659}
660
661static int cmos_nvram_write(void *priv, unsigned int off, void *val,
662 size_t count)
663{
664 struct cmos_rtc *cmos = priv;
665 unsigned char *buf = val;
666
667 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
668 * checksum on part of the NVRAM data. That's currently ignored
669 * here. If userspace is smart enough to know what fields of
670 * NVRAM to update, updating checksums is also part of its job.
671 */
672 off += NVRAM_OFFSET;
673 for (; count; count--, off++, buf++) {
674 /* don't trash RTC registers */
675 if (off == cmos->day_alrm
676 || off == cmos->mon_alrm
677 || off == cmos->century)
678 continue;
679
680 guard(spinlock_irq)(&rtc_lock);
681 if (off < 128)
682 CMOS_WRITE(*buf, off);
683 else if (can_bank2)
684 cmos_write_bank2(*buf, off);
685 else
686 return -EIO;
687 }
688
689 return 0;
690}
691
692/*----------------------------------------------------------------*/
693
694static struct cmos_rtc cmos_rtc;
695
696static irqreturn_t cmos_interrupt(int irq, void *p)
697{
698 u8 irqstat;
699 u8 rtc_control;
700
701 spin_lock(&rtc_lock);
702
703 /* When the HPET interrupt handler calls us, the interrupt
704 * status is passed as arg1 instead of the irq number. But
705 * always clear irq status, even when HPET is in the way.
706 *
707 * Note that HPET and RTC are almost certainly out of phase,
708 * giving different IRQ status ...
709 */
710 irqstat = CMOS_READ(RTC_INTR_FLAGS);
711 rtc_control = CMOS_READ(RTC_CONTROL);
712 if (use_hpet_alarm())
713 irqstat = (unsigned long)irq & 0xF0;
714
715 /* If we were suspended, RTC_CONTROL may not be accurate since the
716 * bios may have cleared it.
717 */
718 if (!cmos_rtc.suspend_ctrl)
719 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
720 else
721 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
722
723 /* All Linux RTC alarms should be treated as if they were oneshot.
724 * Similar code may be needed in system wakeup paths, in case the
725 * alarm woke the system.
726 */
727 if (irqstat & RTC_AIE) {
728 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
729 rtc_control &= ~RTC_AIE;
730 CMOS_WRITE(rtc_control, RTC_CONTROL);
731 if (use_hpet_alarm())
732 hpet_mask_rtc_irq_bit(RTC_AIE);
733 CMOS_READ(RTC_INTR_FLAGS);
734 }
735 spin_unlock(&rtc_lock);
736
737 if (is_intr(irqstat)) {
738 rtc_update_irq(p, 1, irqstat);
739 return IRQ_HANDLED;
740 } else
741 return IRQ_NONE;
742}
743
744#ifdef CONFIG_ACPI
745
746#include <linux/acpi.h>
747
748static u32 rtc_handler(void *context)
749{
750 struct device *dev = context;
751 struct cmos_rtc *cmos = dev_get_drvdata(dev);
752 unsigned char rtc_control = 0;
753 unsigned char rtc_intr;
754 unsigned long flags;
755
756
757 /*
758 * Always update rtc irq when ACPI is used as RTC Alarm.
759 * Or else, ACPI SCI is enabled during suspend/resume only,
760 * update rtc irq in that case.
761 */
762 if (cmos_use_acpi_alarm())
763 cmos_interrupt(0, (void *)cmos->rtc);
764 else {
765 /* Fix me: can we use cmos_interrupt() here as well? */
766 spin_lock_irqsave(&rtc_lock, flags);
767 if (cmos_rtc.suspend_ctrl)
768 rtc_control = CMOS_READ(RTC_CONTROL);
769 if (rtc_control & RTC_AIE) {
770 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
771 CMOS_WRITE(rtc_control, RTC_CONTROL);
772 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
773 rtc_update_irq(cmos->rtc, 1, rtc_intr);
774 }
775 spin_unlock_irqrestore(&rtc_lock, flags);
776 }
777
778 pm_wakeup_hard_event(dev);
779 acpi_clear_event(ACPI_EVENT_RTC);
780 acpi_disable_event(ACPI_EVENT_RTC, 0);
781 return ACPI_INTERRUPT_HANDLED;
782}
783
784static void acpi_rtc_event_setup(struct device *dev)
785{
786 if (acpi_disabled)
787 return;
788
789 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
790 /*
791 * After the RTC handler is installed, the Fixed_RTC event should
792 * be disabled. Only when the RTC alarm is set will it be enabled.
793 */
794 acpi_clear_event(ACPI_EVENT_RTC);
795 acpi_disable_event(ACPI_EVENT_RTC, 0);
796}
797
798static void acpi_rtc_event_cleanup(void)
799{
800 if (acpi_disabled)
801 return;
802
803 acpi_remove_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler);
804}
805
806static void rtc_wake_on(struct device *dev)
807{
808 acpi_clear_event(ACPI_EVENT_RTC);
809 acpi_enable_event(ACPI_EVENT_RTC, 0);
810}
811
812static void rtc_wake_off(struct device *dev)
813{
814 acpi_disable_event(ACPI_EVENT_RTC, 0);
815}
816
817#ifdef CONFIG_X86
818static void use_acpi_alarm_quirks(void)
819{
820 switch (boot_cpu_data.x86_vendor) {
821 case X86_VENDOR_INTEL:
822 if (dmi_get_bios_year() < 2015)
823 return;
824 break;
825 case X86_VENDOR_AMD:
826 case X86_VENDOR_HYGON:
827 if (dmi_get_bios_year() < 2021)
828 return;
829 break;
830 default:
831 return;
832 }
833 if (!is_hpet_enabled())
834 return;
835
836 use_acpi_alarm = true;
837}
838#else
839static inline void use_acpi_alarm_quirks(void) { }
840#endif
841
842static void acpi_cmos_wake_setup(struct device *dev)
843{
844 if (acpi_disabled)
845 return;
846
847 use_acpi_alarm_quirks();
848
849 cmos_rtc.wake_on = rtc_wake_on;
850 cmos_rtc.wake_off = rtc_wake_off;
851
852 /* ACPI tables bug workaround. */
853 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
854 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
855 acpi_gbl_FADT.month_alarm);
856 acpi_gbl_FADT.month_alarm = 0;
857 }
858
859 cmos_rtc.day_alrm = acpi_gbl_FADT.day_alarm;
860 cmos_rtc.mon_alrm = acpi_gbl_FADT.month_alarm;
861 cmos_rtc.century = acpi_gbl_FADT.century;
862
863 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
864 dev_info(dev, "RTC can wake from S4\n");
865
866 /* RTC always wakes from S1/S2/S3, and often S4/STD */
867 device_init_wakeup(dev, 1);
868}
869
870static void cmos_check_acpi_rtc_status(struct device *dev,
871 unsigned char *rtc_control)
872{
873 struct cmos_rtc *cmos = dev_get_drvdata(dev);
874 acpi_event_status rtc_status;
875 acpi_status status;
876
877 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
878 return;
879
880 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
881 if (ACPI_FAILURE(status)) {
882 dev_err(dev, "Could not get RTC status\n");
883 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
884 unsigned char mask;
885 *rtc_control &= ~RTC_AIE;
886 CMOS_WRITE(*rtc_control, RTC_CONTROL);
887 mask = CMOS_READ(RTC_INTR_FLAGS);
888 rtc_update_irq(cmos->rtc, 1, mask);
889 }
890}
891
892#else /* !CONFIG_ACPI */
893
894static inline void acpi_rtc_event_setup(struct device *dev)
895{
896}
897
898static inline void acpi_rtc_event_cleanup(void)
899{
900}
901
902static inline void acpi_cmos_wake_setup(struct device *dev)
903{
904}
905
906static inline void cmos_check_acpi_rtc_status(struct device *dev,
907 unsigned char *rtc_control)
908{
909}
910#endif /* CONFIG_ACPI */
911
912#ifdef CONFIG_PNP
913#define INITSECTION
914
915#else
916#define INITSECTION __init
917#endif
918
919#define SECS_PER_DAY (24 * 60 * 60)
920#define SECS_PER_MONTH (28 * SECS_PER_DAY)
921#define SECS_PER_YEAR (365 * SECS_PER_DAY)
922
923static int INITSECTION
924cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
925{
926 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
927 int retval = 0;
928 unsigned char rtc_control;
929 unsigned address_space;
930 u32 flags = 0;
931 struct nvmem_config nvmem_cfg = {
932 .name = "cmos_nvram",
933 .word_size = 1,
934 .stride = 1,
935 .reg_read = cmos_nvram_read,
936 .reg_write = cmos_nvram_write,
937 .priv = &cmos_rtc,
938 };
939
940 /* there can be only one ... */
941 if (cmos_rtc.dev)
942 return -EBUSY;
943
944 if (!ports)
945 return -ENODEV;
946
947 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
948 *
949 * REVISIT non-x86 systems may instead use memory space resources
950 * (needing ioremap etc), not i/o space resources like this ...
951 */
952 if (RTC_IOMAPPED)
953 ports = request_region(ports->start, resource_size(ports),
954 driver_name);
955 else
956 ports = request_mem_region(ports->start, resource_size(ports),
957 driver_name);
958 if (!ports) {
959 dev_dbg(dev, "i/o registers already in use\n");
960 return -EBUSY;
961 }
962
963 cmos_rtc.irq = rtc_irq;
964 cmos_rtc.iomem = ports;
965
966 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
967 * driver did, but don't reject unknown configs. Old hardware
968 * won't address 128 bytes. Newer chips have multiple banks,
969 * though they may not be listed in one I/O resource.
970 */
971#if defined(CONFIG_ATARI)
972 address_space = 64;
973#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
974 || defined(__sparc__) || defined(__mips__) \
975 || defined(__powerpc__)
976 address_space = 128;
977#else
978#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
979 address_space = 128;
980#endif
981 if (can_bank2 && ports->end > (ports->start + 1))
982 address_space = 256;
983
984 /* For ACPI systems extension info comes from the FADT. On others,
985 * board specific setup provides it as appropriate. Systems where
986 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
987 * some almost-clones) can provide hooks to make that behave.
988 *
989 * Note that ACPI doesn't preclude putting these registers into
990 * "extended" areas of the chip, including some that we won't yet
991 * expect CMOS_READ and friends to handle.
992 */
993 if (info) {
994 if (info->flags)
995 flags = info->flags;
996 if (info->address_space)
997 address_space = info->address_space;
998
999 cmos_rtc.day_alrm = info->rtc_day_alarm;
1000 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
1001 cmos_rtc.century = info->rtc_century;
1002
1003 if (info->wake_on && info->wake_off) {
1004 cmos_rtc.wake_on = info->wake_on;
1005 cmos_rtc.wake_off = info->wake_off;
1006 }
1007 } else {
1008 acpi_cmos_wake_setup(dev);
1009 }
1010
1011 if (cmos_rtc.day_alrm >= 128)
1012 cmos_rtc.day_alrm = 0;
1013
1014 if (cmos_rtc.mon_alrm >= 128)
1015 cmos_rtc.mon_alrm = 0;
1016
1017 if (cmos_rtc.century >= 128)
1018 cmos_rtc.century = 0;
1019
1020 cmos_rtc.dev = dev;
1021 dev_set_drvdata(dev, &cmos_rtc);
1022
1023 cmos_rtc.rtc = devm_rtc_allocate_device(dev);
1024 if (IS_ERR(cmos_rtc.rtc)) {
1025 retval = PTR_ERR(cmos_rtc.rtc);
1026 goto cleanup0;
1027 }
1028
1029 if (cmos_rtc.mon_alrm)
1030 cmos_rtc.rtc->alarm_offset_max = SECS_PER_YEAR - 1;
1031 else if (cmos_rtc.day_alrm)
1032 cmos_rtc.rtc->alarm_offset_max = SECS_PER_MONTH - 1;
1033 else
1034 cmos_rtc.rtc->alarm_offset_max = SECS_PER_DAY - 1;
1035
1036 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
1037
1038 if (!mc146818_does_rtc_work()) {
1039 dev_warn(dev, "broken or not accessible\n");
1040 retval = -ENXIO;
1041 goto cleanup1;
1042 }
1043
1044 spin_lock_irq(&rtc_lock);
1045
1046 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
1047 /* force periodic irq to CMOS reset default of 1024Hz;
1048 *
1049 * REVISIT it's been reported that at least one x86_64 ALI
1050 * mobo doesn't use 32KHz here ... for portability we might
1051 * need to do something about other clock frequencies.
1052 */
1053 cmos_rtc.rtc->irq_freq = 1024;
1054 if (use_hpet_alarm())
1055 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
1056 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
1057 }
1058
1059 /* disable irqs */
1060 if (is_valid_irq(rtc_irq))
1061 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
1062
1063 rtc_control = CMOS_READ(RTC_CONTROL);
1064
1065 spin_unlock_irq(&rtc_lock);
1066
1067 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
1068 dev_warn(dev, "only 24-hr supported\n");
1069 retval = -ENXIO;
1070 goto cleanup1;
1071 }
1072
1073 if (use_hpet_alarm())
1074 hpet_rtc_timer_init();
1075
1076 if (is_valid_irq(rtc_irq)) {
1077 irq_handler_t rtc_cmos_int_handler;
1078
1079 if (use_hpet_alarm()) {
1080 rtc_cmos_int_handler = hpet_rtc_interrupt;
1081 retval = hpet_register_irq_handler(cmos_interrupt);
1082 if (retval) {
1083 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
1084 dev_warn(dev, "hpet_register_irq_handler "
1085 " failed in rtc_init().");
1086 goto cleanup1;
1087 }
1088 } else
1089 rtc_cmos_int_handler = cmos_interrupt;
1090
1091 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
1092 0, dev_name(&cmos_rtc.rtc->dev),
1093 cmos_rtc.rtc);
1094 if (retval < 0) {
1095 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
1096 goto cleanup1;
1097 }
1098 } else {
1099 clear_bit(RTC_FEATURE_ALARM, cmos_rtc.rtc->features);
1100 }
1101
1102 cmos_rtc.rtc->ops = &cmos_rtc_ops;
1103
1104 retval = devm_rtc_register_device(cmos_rtc.rtc);
1105 if (retval)
1106 goto cleanup2;
1107
1108 /* Set the sync offset for the periodic 11min update correct */
1109 cmos_rtc.rtc->set_offset_nsec = NSEC_PER_SEC / 2;
1110
1111 /* export at least the first block of NVRAM */
1112 nvmem_cfg.size = address_space - NVRAM_OFFSET;
1113 devm_rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg);
1114
1115 /*
1116 * Everything has gone well so far, so by default register a handler for
1117 * the ACPI RTC fixed event.
1118 */
1119 if (!info)
1120 acpi_rtc_event_setup(dev);
1121
1122 dev_info(dev, "%s%s, %d bytes nvram%s\n",
1123 !is_valid_irq(rtc_irq) ? "no alarms" :
1124 cmos_rtc.mon_alrm ? "alarms up to one year" :
1125 cmos_rtc.day_alrm ? "alarms up to one month" :
1126 "alarms up to one day",
1127 cmos_rtc.century ? ", y3k" : "",
1128 nvmem_cfg.size,
1129 use_hpet_alarm() ? ", hpet irqs" : "");
1130
1131 return 0;
1132
1133cleanup2:
1134 if (is_valid_irq(rtc_irq))
1135 free_irq(rtc_irq, cmos_rtc.rtc);
1136cleanup1:
1137 cmos_rtc.dev = NULL;
1138cleanup0:
1139 if (RTC_IOMAPPED)
1140 release_region(ports->start, resource_size(ports));
1141 else
1142 release_mem_region(ports->start, resource_size(ports));
1143 return retval;
1144}
1145
1146static void cmos_do_shutdown(int rtc_irq)
1147{
1148 spin_lock_irq(&rtc_lock);
1149 if (is_valid_irq(rtc_irq))
1150 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
1151 spin_unlock_irq(&rtc_lock);
1152}
1153
1154static void cmos_do_remove(struct device *dev)
1155{
1156 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1157 struct resource *ports;
1158
1159 cmos_do_shutdown(cmos->irq);
1160
1161 if (is_valid_irq(cmos->irq)) {
1162 free_irq(cmos->irq, cmos->rtc);
1163 if (use_hpet_alarm())
1164 hpet_unregister_irq_handler(cmos_interrupt);
1165 }
1166
1167 if (!dev_get_platdata(dev))
1168 acpi_rtc_event_cleanup();
1169
1170 cmos->rtc = NULL;
1171
1172 ports = cmos->iomem;
1173 if (RTC_IOMAPPED)
1174 release_region(ports->start, resource_size(ports));
1175 else
1176 release_mem_region(ports->start, resource_size(ports));
1177 cmos->iomem = NULL;
1178
1179 cmos->dev = NULL;
1180}
1181
1182static int cmos_aie_poweroff(struct device *dev)
1183{
1184 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1185 struct rtc_time now;
1186 time64_t t_now;
1187 int retval = 0;
1188 unsigned char rtc_control;
1189
1190 if (!cmos->alarm_expires)
1191 return -EINVAL;
1192
1193 spin_lock_irq(&rtc_lock);
1194 rtc_control = CMOS_READ(RTC_CONTROL);
1195 spin_unlock_irq(&rtc_lock);
1196
1197 /* We only care about the situation where AIE is disabled. */
1198 if (rtc_control & RTC_AIE)
1199 return -EBUSY;
1200
1201 cmos_read_time(dev, &now);
1202 t_now = rtc_tm_to_time64(&now);
1203
1204 /*
1205 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
1206 * automatically right after shutdown on some buggy boxes.
1207 * This automatic rebooting issue won't happen when the alarm
1208 * time is larger than now+1 seconds.
1209 *
1210 * If the alarm time is equal to now+1 seconds, the issue can be
1211 * prevented by cancelling the alarm.
1212 */
1213 if (cmos->alarm_expires == t_now + 1) {
1214 struct rtc_wkalrm alarm;
1215
1216 /* Cancel the AIE timer by configuring the past time. */
1217 rtc_time64_to_tm(t_now - 1, &alarm.time);
1218 alarm.enabled = 0;
1219 retval = cmos_set_alarm(dev, &alarm);
1220 } else if (cmos->alarm_expires > t_now + 1) {
1221 retval = -EBUSY;
1222 }
1223
1224 return retval;
1225}
1226
1227static int cmos_suspend(struct device *dev)
1228{
1229 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1230 unsigned char tmp;
1231
1232 /* only the alarm might be a wakeup event source */
1233 spin_lock_irq(&rtc_lock);
1234 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
1235 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
1236 unsigned char mask;
1237
1238 if (device_may_wakeup(dev))
1239 mask = RTC_IRQMASK & ~RTC_AIE;
1240 else
1241 mask = RTC_IRQMASK;
1242 tmp &= ~mask;
1243 CMOS_WRITE(tmp, RTC_CONTROL);
1244 if (use_hpet_alarm())
1245 hpet_mask_rtc_irq_bit(mask);
1246 cmos_checkintr(cmos, tmp);
1247 }
1248 spin_unlock_irq(&rtc_lock);
1249
1250 if ((tmp & RTC_AIE) && !cmos_use_acpi_alarm()) {
1251 cmos->enabled_wake = 1;
1252 if (cmos->wake_on)
1253 cmos->wake_on(dev);
1254 else
1255 enable_irq_wake(cmos->irq);
1256 }
1257
1258 memset(&cmos->saved_wkalrm, 0, sizeof(struct rtc_wkalrm));
1259 cmos_read_alarm(dev, &cmos->saved_wkalrm);
1260
1261 dev_dbg(dev, "suspend%s, ctrl %02x\n",
1262 (tmp & RTC_AIE) ? ", alarm may wake" : "",
1263 tmp);
1264
1265 return 0;
1266}
1267
1268/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
1269 * after a detour through G3 "mechanical off", although the ACPI spec
1270 * says wakeup should only work from G1/S4 "hibernate". To most users,
1271 * distinctions between S4 and S5 are pointless. So when the hardware
1272 * allows, don't draw that distinction.
1273 */
1274static inline int cmos_poweroff(struct device *dev)
1275{
1276 if (!IS_ENABLED(CONFIG_PM))
1277 return -ENOSYS;
1278
1279 return cmos_suspend(dev);
1280}
1281
1282static void cmos_check_wkalrm(struct device *dev)
1283{
1284 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1285 struct rtc_wkalrm current_alarm;
1286 time64_t t_now;
1287 time64_t t_current_expires;
1288 time64_t t_saved_expires;
1289 struct rtc_time now;
1290
1291 /* Check if we have RTC Alarm armed */
1292 if (!(cmos->suspend_ctrl & RTC_AIE))
1293 return;
1294
1295 cmos_read_time(dev, &now);
1296 t_now = rtc_tm_to_time64(&now);
1297
1298 /*
1299 * ACPI RTC wake event is cleared after resume from STR,
1300 * ACK the rtc irq here
1301 */
1302 if (t_now >= cmos->alarm_expires && cmos_use_acpi_alarm()) {
1303 local_irq_disable();
1304 cmos_interrupt(0, (void *)cmos->rtc);
1305 local_irq_enable();
1306 return;
1307 }
1308
1309 memset(¤t_alarm, 0, sizeof(struct rtc_wkalrm));
1310 cmos_read_alarm(dev, ¤t_alarm);
1311 t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
1312 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
1313 if (t_current_expires != t_saved_expires ||
1314 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
1315 cmos_set_alarm(dev, &cmos->saved_wkalrm);
1316 }
1317}
1318
1319static int __maybe_unused cmos_resume(struct device *dev)
1320{
1321 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1322 unsigned char tmp;
1323
1324 if (cmos->enabled_wake && !cmos_use_acpi_alarm()) {
1325 if (cmos->wake_off)
1326 cmos->wake_off(dev);
1327 else
1328 disable_irq_wake(cmos->irq);
1329 cmos->enabled_wake = 0;
1330 }
1331
1332 /* The BIOS might have changed the alarm, restore it */
1333 cmos_check_wkalrm(dev);
1334
1335 spin_lock_irq(&rtc_lock);
1336 tmp = cmos->suspend_ctrl;
1337 cmos->suspend_ctrl = 0;
1338 /* re-enable any irqs previously active */
1339 if (tmp & RTC_IRQMASK) {
1340 unsigned char mask;
1341
1342 if (device_may_wakeup(dev) && use_hpet_alarm())
1343 hpet_rtc_timer_init();
1344
1345 do {
1346 CMOS_WRITE(tmp, RTC_CONTROL);
1347 if (use_hpet_alarm())
1348 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1349
1350 mask = CMOS_READ(RTC_INTR_FLAGS);
1351 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1352 if (!use_hpet_alarm() || !is_intr(mask))
1353 break;
1354
1355 /* force one-shot behavior if HPET blocked
1356 * the wake alarm's irq
1357 */
1358 rtc_update_irq(cmos->rtc, 1, mask);
1359 tmp &= ~RTC_AIE;
1360 hpet_mask_rtc_irq_bit(RTC_AIE);
1361 } while (mask & RTC_AIE);
1362
1363 if (tmp & RTC_AIE)
1364 cmos_check_acpi_rtc_status(dev, &tmp);
1365 }
1366 spin_unlock_irq(&rtc_lock);
1367
1368 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1369
1370 return 0;
1371}
1372
1373static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1374
1375/*----------------------------------------------------------------*/
1376
1377/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1378 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1379 * probably list them in similar PNPBIOS tables; so PNP is more common.
1380 *
1381 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1382 * predate even PNPBIOS should set up platform_bus devices.
1383 */
1384
1385#ifdef CONFIG_PNP
1386
1387#include <linux/pnp.h>
1388
1389static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1390{
1391 int irq;
1392
1393 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1394 irq = 0;
1395#ifdef CONFIG_X86
1396 /* Some machines contain a PNP entry for the RTC, but
1397 * don't define the IRQ. It should always be safe to
1398 * hardcode it on systems with a legacy PIC.
1399 */
1400 if (nr_legacy_irqs())
1401 irq = RTC_IRQ;
1402#endif
1403 } else {
1404 irq = pnp_irq(pnp, 0);
1405 }
1406
1407 return cmos_do_probe(&pnp->dev, pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1408}
1409
1410static void cmos_pnp_remove(struct pnp_dev *pnp)
1411{
1412 cmos_do_remove(&pnp->dev);
1413}
1414
1415static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1416{
1417 struct device *dev = &pnp->dev;
1418 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1419
1420 if (system_state == SYSTEM_POWER_OFF) {
1421 int retval = cmos_poweroff(dev);
1422
1423 if (cmos_aie_poweroff(dev) < 0 && !retval)
1424 return;
1425 }
1426
1427 cmos_do_shutdown(cmos->irq);
1428}
1429
1430static const struct pnp_device_id rtc_ids[] = {
1431 { .id = "PNP0b00", },
1432 { .id = "PNP0b01", },
1433 { .id = "PNP0b02", },
1434 { },
1435};
1436MODULE_DEVICE_TABLE(pnp, rtc_ids);
1437
1438static struct pnp_driver cmos_pnp_driver = {
1439 .name = driver_name,
1440 .id_table = rtc_ids,
1441 .probe = cmos_pnp_probe,
1442 .remove = cmos_pnp_remove,
1443 .shutdown = cmos_pnp_shutdown,
1444
1445 /* flag ensures resume() gets called, and stops syslog spam */
1446 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1447 .driver = {
1448 .pm = &cmos_pm_ops,
1449 },
1450};
1451
1452#endif /* CONFIG_PNP */
1453
1454#ifdef CONFIG_OF
1455static const struct of_device_id of_cmos_match[] = {
1456 {
1457 .compatible = "motorola,mc146818",
1458 },
1459 { },
1460};
1461MODULE_DEVICE_TABLE(of, of_cmos_match);
1462
1463static __init void cmos_of_init(struct platform_device *pdev)
1464{
1465 struct device_node *node = pdev->dev.of_node;
1466 const __be32 *val;
1467
1468 if (!node)
1469 return;
1470
1471 val = of_get_property(node, "ctrl-reg", NULL);
1472 if (val)
1473 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1474
1475 val = of_get_property(node, "freq-reg", NULL);
1476 if (val)
1477 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1478}
1479#else
1480static inline void cmos_of_init(struct platform_device *pdev) {}
1481#endif
1482/*----------------------------------------------------------------*/
1483
1484/* Platform setup should have set up an RTC device, when PNP is
1485 * unavailable ... this could happen even on (older) PCs.
1486 */
1487
1488static int __init cmos_platform_probe(struct platform_device *pdev)
1489{
1490 struct resource *resource;
1491 int irq;
1492
1493 cmos_of_init(pdev);
1494
1495 if (RTC_IOMAPPED)
1496 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1497 else
1498 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1499 irq = platform_get_irq(pdev, 0);
1500 if (irq < 0)
1501 irq = -1;
1502
1503 return cmos_do_probe(&pdev->dev, resource, irq);
1504}
1505
1506static void cmos_platform_remove(struct platform_device *pdev)
1507{
1508 cmos_do_remove(&pdev->dev);
1509}
1510
1511static void cmos_platform_shutdown(struct platform_device *pdev)
1512{
1513 struct device *dev = &pdev->dev;
1514 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1515
1516 if (system_state == SYSTEM_POWER_OFF) {
1517 int retval = cmos_poweroff(dev);
1518
1519 if (cmos_aie_poweroff(dev) < 0 && !retval)
1520 return;
1521 }
1522
1523 cmos_do_shutdown(cmos->irq);
1524}
1525
1526/* work with hotplug and coldplug */
1527MODULE_ALIAS("platform:rtc_cmos");
1528
1529static struct platform_driver cmos_platform_driver = {
1530 .remove = cmos_platform_remove,
1531 .shutdown = cmos_platform_shutdown,
1532 .driver = {
1533 .name = driver_name,
1534 .pm = &cmos_pm_ops,
1535 .of_match_table = of_match_ptr(of_cmos_match),
1536 }
1537};
1538
1539#ifdef CONFIG_PNP
1540static bool pnp_driver_registered;
1541#endif
1542static bool platform_driver_registered;
1543
1544static int __init cmos_init(void)
1545{
1546 int retval = 0;
1547
1548#ifdef CONFIG_PNP
1549 retval = pnp_register_driver(&cmos_pnp_driver);
1550 if (retval == 0)
1551 pnp_driver_registered = true;
1552#endif
1553
1554 if (!cmos_rtc.dev) {
1555 retval = platform_driver_probe(&cmos_platform_driver,
1556 cmos_platform_probe);
1557 if (retval == 0)
1558 platform_driver_registered = true;
1559 }
1560
1561 if (retval == 0)
1562 return 0;
1563
1564#ifdef CONFIG_PNP
1565 if (pnp_driver_registered)
1566 pnp_unregister_driver(&cmos_pnp_driver);
1567#endif
1568 return retval;
1569}
1570module_init(cmos_init);
1571
1572static void __exit cmos_exit(void)
1573{
1574#ifdef CONFIG_PNP
1575 if (pnp_driver_registered)
1576 pnp_unregister_driver(&cmos_pnp_driver);
1577#endif
1578 if (platform_driver_registered)
1579 platform_driver_unregister(&cmos_platform_driver);
1580}
1581module_exit(cmos_exit);
1582
1583
1584MODULE_AUTHOR("David Brownell");
1585MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1586MODULE_LICENSE("GPL");
1/*
2 * RTC class driver for "CMOS RTC": PCs, ACPI, etc
3 *
4 * Copyright (C) 1996 Paul Gortmaker (drivers/char/rtc.c)
5 * Copyright (C) 2006 David Brownell (convert to new framework)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13/*
14 * The original "cmos clock" chip was an MC146818 chip, now obsolete.
15 * That defined the register interface now provided by all PCs, some
16 * non-PC systems, and incorporated into ACPI. Modern PC chipsets
17 * integrate an MC146818 clone in their southbridge, and boards use
18 * that instead of discrete clones like the DS12887 or M48T86. There
19 * are also clones that connect using the LPC bus.
20 *
21 * That register API is also used directly by various other drivers
22 * (notably for integrated NVRAM), infrastructure (x86 has code to
23 * bypass the RTC framework, directly reading the RTC during boot
24 * and updating minutes/seconds for systems using NTP synch) and
25 * utilities (like userspace 'hwclock', if no /dev node exists).
26 *
27 * So **ALL** calls to CMOS_READ and CMOS_WRITE must be done with
28 * interrupts disabled, holding the global rtc_lock, to exclude those
29 * other drivers and utilities on correctly configured systems.
30 */
31
32#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
33
34#include <linux/kernel.h>
35#include <linux/module.h>
36#include <linux/init.h>
37#include <linux/interrupt.h>
38#include <linux/spinlock.h>
39#include <linux/platform_device.h>
40#include <linux/log2.h>
41#include <linux/pm.h>
42#include <linux/of.h>
43#include <linux/of_platform.h>
44#ifdef CONFIG_X86
45#include <asm/i8259.h>
46#endif
47
48/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
49#include <linux/mc146818rtc.h>
50
51struct cmos_rtc {
52 struct rtc_device *rtc;
53 struct device *dev;
54 int irq;
55 struct resource *iomem;
56 time64_t alarm_expires;
57
58 void (*wake_on)(struct device *);
59 void (*wake_off)(struct device *);
60
61 u8 enabled_wake;
62 u8 suspend_ctrl;
63
64 /* newer hardware extends the original register set */
65 u8 day_alrm;
66 u8 mon_alrm;
67 u8 century;
68
69 struct rtc_wkalrm saved_wkalrm;
70};
71
72/* both platform and pnp busses use negative numbers for invalid irqs */
73#define is_valid_irq(n) ((n) > 0)
74
75static const char driver_name[] = "rtc_cmos";
76
77/* The RTC_INTR register may have e.g. RTC_PF set even if RTC_PIE is clear;
78 * always mask it against the irq enable bits in RTC_CONTROL. Bit values
79 * are the same: PF==PIE, AF=AIE, UF=UIE; so RTC_IRQMASK works with both.
80 */
81#define RTC_IRQMASK (RTC_PF | RTC_AF | RTC_UF)
82
83static inline int is_intr(u8 rtc_intr)
84{
85 if (!(rtc_intr & RTC_IRQF))
86 return 0;
87 return rtc_intr & RTC_IRQMASK;
88}
89
90/*----------------------------------------------------------------*/
91
92/* Much modern x86 hardware has HPETs (10+ MHz timers) which, because
93 * many BIOS programmers don't set up "sane mode" IRQ routing, are mostly
94 * used in a broken "legacy replacement" mode. The breakage includes
95 * HPET #1 hijacking the IRQ for this RTC, and being unavailable for
96 * other (better) use.
97 *
98 * When that broken mode is in use, platform glue provides a partial
99 * emulation of hardware RTC IRQ facilities using HPET #1. We don't
100 * want to use HPET for anything except those IRQs though...
101 */
102#ifdef CONFIG_HPET_EMULATE_RTC
103#include <asm/hpet.h>
104#else
105
106static inline int is_hpet_enabled(void)
107{
108 return 0;
109}
110
111static inline int hpet_mask_rtc_irq_bit(unsigned long mask)
112{
113 return 0;
114}
115
116static inline int hpet_set_rtc_irq_bit(unsigned long mask)
117{
118 return 0;
119}
120
121static inline int
122hpet_set_alarm_time(unsigned char hrs, unsigned char min, unsigned char sec)
123{
124 return 0;
125}
126
127static inline int hpet_set_periodic_freq(unsigned long freq)
128{
129 return 0;
130}
131
132static inline int hpet_rtc_dropped_irq(void)
133{
134 return 0;
135}
136
137static inline int hpet_rtc_timer_init(void)
138{
139 return 0;
140}
141
142extern irq_handler_t hpet_rtc_interrupt;
143
144static inline int hpet_register_irq_handler(irq_handler_t handler)
145{
146 return 0;
147}
148
149static inline int hpet_unregister_irq_handler(irq_handler_t handler)
150{
151 return 0;
152}
153
154#endif
155
156/*----------------------------------------------------------------*/
157
158#ifdef RTC_PORT
159
160/* Most newer x86 systems have two register banks, the first used
161 * for RTC and NVRAM and the second only for NVRAM. Caller must
162 * own rtc_lock ... and we won't worry about access during NMI.
163 */
164#define can_bank2 true
165
166static inline unsigned char cmos_read_bank2(unsigned char addr)
167{
168 outb(addr, RTC_PORT(2));
169 return inb(RTC_PORT(3));
170}
171
172static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
173{
174 outb(addr, RTC_PORT(2));
175 outb(val, RTC_PORT(3));
176}
177
178#else
179
180#define can_bank2 false
181
182static inline unsigned char cmos_read_bank2(unsigned char addr)
183{
184 return 0;
185}
186
187static inline void cmos_write_bank2(unsigned char val, unsigned char addr)
188{
189}
190
191#endif
192
193/*----------------------------------------------------------------*/
194
195static int cmos_read_time(struct device *dev, struct rtc_time *t)
196{
197 /*
198 * If pm_trace abused the RTC for storage, set the timespec to 0,
199 * which tells the caller that this RTC value is unusable.
200 */
201 if (!pm_trace_rtc_valid())
202 return -EIO;
203
204 /* REVISIT: if the clock has a "century" register, use
205 * that instead of the heuristic in mc146818_get_time().
206 * That'll make Y3K compatility (year > 2070) easy!
207 */
208 mc146818_get_time(t);
209 return 0;
210}
211
212static int cmos_set_time(struct device *dev, struct rtc_time *t)
213{
214 /* REVISIT: set the "century" register if available
215 *
216 * NOTE: this ignores the issue whereby updating the seconds
217 * takes effect exactly 500ms after we write the register.
218 * (Also queueing and other delays before we get this far.)
219 */
220 return mc146818_set_time(t);
221}
222
223static int cmos_read_alarm(struct device *dev, struct rtc_wkalrm *t)
224{
225 struct cmos_rtc *cmos = dev_get_drvdata(dev);
226 unsigned char rtc_control;
227
228 if (!is_valid_irq(cmos->irq))
229 return -EIO;
230
231 /* Basic alarms only support hour, minute, and seconds fields.
232 * Some also support day and month, for alarms up to a year in
233 * the future.
234 */
235
236 spin_lock_irq(&rtc_lock);
237 t->time.tm_sec = CMOS_READ(RTC_SECONDS_ALARM);
238 t->time.tm_min = CMOS_READ(RTC_MINUTES_ALARM);
239 t->time.tm_hour = CMOS_READ(RTC_HOURS_ALARM);
240
241 if (cmos->day_alrm) {
242 /* ignore upper bits on readback per ACPI spec */
243 t->time.tm_mday = CMOS_READ(cmos->day_alrm) & 0x3f;
244 if (!t->time.tm_mday)
245 t->time.tm_mday = -1;
246
247 if (cmos->mon_alrm) {
248 t->time.tm_mon = CMOS_READ(cmos->mon_alrm);
249 if (!t->time.tm_mon)
250 t->time.tm_mon = -1;
251 }
252 }
253
254 rtc_control = CMOS_READ(RTC_CONTROL);
255 spin_unlock_irq(&rtc_lock);
256
257 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
258 if (((unsigned)t->time.tm_sec) < 0x60)
259 t->time.tm_sec = bcd2bin(t->time.tm_sec);
260 else
261 t->time.tm_sec = -1;
262 if (((unsigned)t->time.tm_min) < 0x60)
263 t->time.tm_min = bcd2bin(t->time.tm_min);
264 else
265 t->time.tm_min = -1;
266 if (((unsigned)t->time.tm_hour) < 0x24)
267 t->time.tm_hour = bcd2bin(t->time.tm_hour);
268 else
269 t->time.tm_hour = -1;
270
271 if (cmos->day_alrm) {
272 if (((unsigned)t->time.tm_mday) <= 0x31)
273 t->time.tm_mday = bcd2bin(t->time.tm_mday);
274 else
275 t->time.tm_mday = -1;
276
277 if (cmos->mon_alrm) {
278 if (((unsigned)t->time.tm_mon) <= 0x12)
279 t->time.tm_mon = bcd2bin(t->time.tm_mon)-1;
280 else
281 t->time.tm_mon = -1;
282 }
283 }
284 }
285
286 t->enabled = !!(rtc_control & RTC_AIE);
287 t->pending = 0;
288
289 return 0;
290}
291
292static void cmos_checkintr(struct cmos_rtc *cmos, unsigned char rtc_control)
293{
294 unsigned char rtc_intr;
295
296 /* NOTE after changing RTC_xIE bits we always read INTR_FLAGS;
297 * allegedly some older rtcs need that to handle irqs properly
298 */
299 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
300
301 if (is_hpet_enabled())
302 return;
303
304 rtc_intr &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
305 if (is_intr(rtc_intr))
306 rtc_update_irq(cmos->rtc, 1, rtc_intr);
307}
308
309static void cmos_irq_enable(struct cmos_rtc *cmos, unsigned char mask)
310{
311 unsigned char rtc_control;
312
313 /* flush any pending IRQ status, notably for update irqs,
314 * before we enable new IRQs
315 */
316 rtc_control = CMOS_READ(RTC_CONTROL);
317 cmos_checkintr(cmos, rtc_control);
318
319 rtc_control |= mask;
320 CMOS_WRITE(rtc_control, RTC_CONTROL);
321 hpet_set_rtc_irq_bit(mask);
322
323 cmos_checkintr(cmos, rtc_control);
324}
325
326static void cmos_irq_disable(struct cmos_rtc *cmos, unsigned char mask)
327{
328 unsigned char rtc_control;
329
330 rtc_control = CMOS_READ(RTC_CONTROL);
331 rtc_control &= ~mask;
332 CMOS_WRITE(rtc_control, RTC_CONTROL);
333 hpet_mask_rtc_irq_bit(mask);
334
335 cmos_checkintr(cmos, rtc_control);
336}
337
338static int cmos_validate_alarm(struct device *dev, struct rtc_wkalrm *t)
339{
340 struct cmos_rtc *cmos = dev_get_drvdata(dev);
341 struct rtc_time now;
342
343 cmos_read_time(dev, &now);
344
345 if (!cmos->day_alrm) {
346 time64_t t_max_date;
347 time64_t t_alrm;
348
349 t_max_date = rtc_tm_to_time64(&now);
350 t_max_date += 24 * 60 * 60 - 1;
351 t_alrm = rtc_tm_to_time64(&t->time);
352 if (t_alrm > t_max_date) {
353 dev_err(dev,
354 "Alarms can be up to one day in the future\n");
355 return -EINVAL;
356 }
357 } else if (!cmos->mon_alrm) {
358 struct rtc_time max_date = now;
359 time64_t t_max_date;
360 time64_t t_alrm;
361 int max_mday;
362
363 if (max_date.tm_mon == 11) {
364 max_date.tm_mon = 0;
365 max_date.tm_year += 1;
366 } else {
367 max_date.tm_mon += 1;
368 }
369 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
370 if (max_date.tm_mday > max_mday)
371 max_date.tm_mday = max_mday;
372
373 t_max_date = rtc_tm_to_time64(&max_date);
374 t_max_date -= 1;
375 t_alrm = rtc_tm_to_time64(&t->time);
376 if (t_alrm > t_max_date) {
377 dev_err(dev,
378 "Alarms can be up to one month in the future\n");
379 return -EINVAL;
380 }
381 } else {
382 struct rtc_time max_date = now;
383 time64_t t_max_date;
384 time64_t t_alrm;
385 int max_mday;
386
387 max_date.tm_year += 1;
388 max_mday = rtc_month_days(max_date.tm_mon, max_date.tm_year);
389 if (max_date.tm_mday > max_mday)
390 max_date.tm_mday = max_mday;
391
392 t_max_date = rtc_tm_to_time64(&max_date);
393 t_max_date -= 1;
394 t_alrm = rtc_tm_to_time64(&t->time);
395 if (t_alrm > t_max_date) {
396 dev_err(dev,
397 "Alarms can be up to one year in the future\n");
398 return -EINVAL;
399 }
400 }
401
402 return 0;
403}
404
405static int cmos_set_alarm(struct device *dev, struct rtc_wkalrm *t)
406{
407 struct cmos_rtc *cmos = dev_get_drvdata(dev);
408 unsigned char mon, mday, hrs, min, sec, rtc_control;
409 int ret;
410
411 if (!is_valid_irq(cmos->irq))
412 return -EIO;
413
414 ret = cmos_validate_alarm(dev, t);
415 if (ret < 0)
416 return ret;
417
418 mon = t->time.tm_mon + 1;
419 mday = t->time.tm_mday;
420 hrs = t->time.tm_hour;
421 min = t->time.tm_min;
422 sec = t->time.tm_sec;
423
424 rtc_control = CMOS_READ(RTC_CONTROL);
425 if (!(rtc_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
426 /* Writing 0xff means "don't care" or "match all". */
427 mon = (mon <= 12) ? bin2bcd(mon) : 0xff;
428 mday = (mday >= 1 && mday <= 31) ? bin2bcd(mday) : 0xff;
429 hrs = (hrs < 24) ? bin2bcd(hrs) : 0xff;
430 min = (min < 60) ? bin2bcd(min) : 0xff;
431 sec = (sec < 60) ? bin2bcd(sec) : 0xff;
432 }
433
434 spin_lock_irq(&rtc_lock);
435
436 /* next rtc irq must not be from previous alarm setting */
437 cmos_irq_disable(cmos, RTC_AIE);
438
439 /* update alarm */
440 CMOS_WRITE(hrs, RTC_HOURS_ALARM);
441 CMOS_WRITE(min, RTC_MINUTES_ALARM);
442 CMOS_WRITE(sec, RTC_SECONDS_ALARM);
443
444 /* the system may support an "enhanced" alarm */
445 if (cmos->day_alrm) {
446 CMOS_WRITE(mday, cmos->day_alrm);
447 if (cmos->mon_alrm)
448 CMOS_WRITE(mon, cmos->mon_alrm);
449 }
450
451 /* FIXME the HPET alarm glue currently ignores day_alrm
452 * and mon_alrm ...
453 */
454 hpet_set_alarm_time(t->time.tm_hour, t->time.tm_min, t->time.tm_sec);
455
456 if (t->enabled)
457 cmos_irq_enable(cmos, RTC_AIE);
458
459 spin_unlock_irq(&rtc_lock);
460
461 cmos->alarm_expires = rtc_tm_to_time64(&t->time);
462
463 return 0;
464}
465
466static int cmos_alarm_irq_enable(struct device *dev, unsigned int enabled)
467{
468 struct cmos_rtc *cmos = dev_get_drvdata(dev);
469 unsigned long flags;
470
471 if (!is_valid_irq(cmos->irq))
472 return -EINVAL;
473
474 spin_lock_irqsave(&rtc_lock, flags);
475
476 if (enabled)
477 cmos_irq_enable(cmos, RTC_AIE);
478 else
479 cmos_irq_disable(cmos, RTC_AIE);
480
481 spin_unlock_irqrestore(&rtc_lock, flags);
482 return 0;
483}
484
485#if IS_ENABLED(CONFIG_RTC_INTF_PROC)
486
487static int cmos_procfs(struct device *dev, struct seq_file *seq)
488{
489 struct cmos_rtc *cmos = dev_get_drvdata(dev);
490 unsigned char rtc_control, valid;
491
492 spin_lock_irq(&rtc_lock);
493 rtc_control = CMOS_READ(RTC_CONTROL);
494 valid = CMOS_READ(RTC_VALID);
495 spin_unlock_irq(&rtc_lock);
496
497 /* NOTE: at least ICH6 reports battery status using a different
498 * (non-RTC) bit; and SQWE is ignored on many current systems.
499 */
500 seq_printf(seq,
501 "periodic_IRQ\t: %s\n"
502 "update_IRQ\t: %s\n"
503 "HPET_emulated\t: %s\n"
504 // "square_wave\t: %s\n"
505 "BCD\t\t: %s\n"
506 "DST_enable\t: %s\n"
507 "periodic_freq\t: %d\n"
508 "batt_status\t: %s\n",
509 (rtc_control & RTC_PIE) ? "yes" : "no",
510 (rtc_control & RTC_UIE) ? "yes" : "no",
511 is_hpet_enabled() ? "yes" : "no",
512 // (rtc_control & RTC_SQWE) ? "yes" : "no",
513 (rtc_control & RTC_DM_BINARY) ? "no" : "yes",
514 (rtc_control & RTC_DST_EN) ? "yes" : "no",
515 cmos->rtc->irq_freq,
516 (valid & RTC_VRT) ? "okay" : "dead");
517
518 return 0;
519}
520
521#else
522#define cmos_procfs NULL
523#endif
524
525static const struct rtc_class_ops cmos_rtc_ops = {
526 .read_time = cmos_read_time,
527 .set_time = cmos_set_time,
528 .read_alarm = cmos_read_alarm,
529 .set_alarm = cmos_set_alarm,
530 .proc = cmos_procfs,
531 .alarm_irq_enable = cmos_alarm_irq_enable,
532};
533
534/*----------------------------------------------------------------*/
535
536/*
537 * All these chips have at least 64 bytes of address space, shared by
538 * RTC registers and NVRAM. Most of those bytes of NVRAM are used
539 * by boot firmware. Modern chips have 128 or 256 bytes.
540 */
541
542#define NVRAM_OFFSET (RTC_REG_D + 1)
543
544static int cmos_nvram_read(void *priv, unsigned int off, void *val,
545 size_t count)
546{
547 unsigned char *buf = val;
548 int retval;
549
550 off += NVRAM_OFFSET;
551 spin_lock_irq(&rtc_lock);
552 for (retval = 0; count; count--, off++, retval++) {
553 if (off < 128)
554 *buf++ = CMOS_READ(off);
555 else if (can_bank2)
556 *buf++ = cmos_read_bank2(off);
557 else
558 break;
559 }
560 spin_unlock_irq(&rtc_lock);
561
562 return retval;
563}
564
565static int cmos_nvram_write(void *priv, unsigned int off, void *val,
566 size_t count)
567{
568 struct cmos_rtc *cmos = priv;
569 unsigned char *buf = val;
570 int retval;
571
572 /* NOTE: on at least PCs and Ataris, the boot firmware uses a
573 * checksum on part of the NVRAM data. That's currently ignored
574 * here. If userspace is smart enough to know what fields of
575 * NVRAM to update, updating checksums is also part of its job.
576 */
577 off += NVRAM_OFFSET;
578 spin_lock_irq(&rtc_lock);
579 for (retval = 0; count; count--, off++, retval++) {
580 /* don't trash RTC registers */
581 if (off == cmos->day_alrm
582 || off == cmos->mon_alrm
583 || off == cmos->century)
584 buf++;
585 else if (off < 128)
586 CMOS_WRITE(*buf++, off);
587 else if (can_bank2)
588 cmos_write_bank2(*buf++, off);
589 else
590 break;
591 }
592 spin_unlock_irq(&rtc_lock);
593
594 return retval;
595}
596
597/*----------------------------------------------------------------*/
598
599static struct cmos_rtc cmos_rtc;
600
601static irqreturn_t cmos_interrupt(int irq, void *p)
602{
603 u8 irqstat;
604 u8 rtc_control;
605
606 spin_lock(&rtc_lock);
607
608 /* When the HPET interrupt handler calls us, the interrupt
609 * status is passed as arg1 instead of the irq number. But
610 * always clear irq status, even when HPET is in the way.
611 *
612 * Note that HPET and RTC are almost certainly out of phase,
613 * giving different IRQ status ...
614 */
615 irqstat = CMOS_READ(RTC_INTR_FLAGS);
616 rtc_control = CMOS_READ(RTC_CONTROL);
617 if (is_hpet_enabled())
618 irqstat = (unsigned long)irq & 0xF0;
619
620 /* If we were suspended, RTC_CONTROL may not be accurate since the
621 * bios may have cleared it.
622 */
623 if (!cmos_rtc.suspend_ctrl)
624 irqstat &= (rtc_control & RTC_IRQMASK) | RTC_IRQF;
625 else
626 irqstat &= (cmos_rtc.suspend_ctrl & RTC_IRQMASK) | RTC_IRQF;
627
628 /* All Linux RTC alarms should be treated as if they were oneshot.
629 * Similar code may be needed in system wakeup paths, in case the
630 * alarm woke the system.
631 */
632 if (irqstat & RTC_AIE) {
633 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
634 rtc_control &= ~RTC_AIE;
635 CMOS_WRITE(rtc_control, RTC_CONTROL);
636 hpet_mask_rtc_irq_bit(RTC_AIE);
637 CMOS_READ(RTC_INTR_FLAGS);
638 }
639 spin_unlock(&rtc_lock);
640
641 if (is_intr(irqstat)) {
642 rtc_update_irq(p, 1, irqstat);
643 return IRQ_HANDLED;
644 } else
645 return IRQ_NONE;
646}
647
648#ifdef CONFIG_PNP
649#define INITSECTION
650
651#else
652#define INITSECTION __init
653#endif
654
655static int INITSECTION
656cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq)
657{
658 struct cmos_rtc_board_info *info = dev_get_platdata(dev);
659 int retval = 0;
660 unsigned char rtc_control;
661 unsigned address_space;
662 u32 flags = 0;
663 struct nvmem_config nvmem_cfg = {
664 .name = "cmos_nvram",
665 .word_size = 1,
666 .stride = 1,
667 .reg_read = cmos_nvram_read,
668 .reg_write = cmos_nvram_write,
669 .priv = &cmos_rtc,
670 };
671
672 /* there can be only one ... */
673 if (cmos_rtc.dev)
674 return -EBUSY;
675
676 if (!ports)
677 return -ENODEV;
678
679 /* Claim I/O ports ASAP, minimizing conflict with legacy driver.
680 *
681 * REVISIT non-x86 systems may instead use memory space resources
682 * (needing ioremap etc), not i/o space resources like this ...
683 */
684 if (RTC_IOMAPPED)
685 ports = request_region(ports->start, resource_size(ports),
686 driver_name);
687 else
688 ports = request_mem_region(ports->start, resource_size(ports),
689 driver_name);
690 if (!ports) {
691 dev_dbg(dev, "i/o registers already in use\n");
692 return -EBUSY;
693 }
694
695 cmos_rtc.irq = rtc_irq;
696 cmos_rtc.iomem = ports;
697
698 /* Heuristic to deduce NVRAM size ... do what the legacy NVRAM
699 * driver did, but don't reject unknown configs. Old hardware
700 * won't address 128 bytes. Newer chips have multiple banks,
701 * though they may not be listed in one I/O resource.
702 */
703#if defined(CONFIG_ATARI)
704 address_space = 64;
705#elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \
706 || defined(__sparc__) || defined(__mips__) \
707 || defined(__powerpc__)
708 address_space = 128;
709#else
710#warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes.
711 address_space = 128;
712#endif
713 if (can_bank2 && ports->end > (ports->start + 1))
714 address_space = 256;
715
716 /* For ACPI systems extension info comes from the FADT. On others,
717 * board specific setup provides it as appropriate. Systems where
718 * the alarm IRQ isn't automatically a wakeup IRQ (like ACPI, and
719 * some almost-clones) can provide hooks to make that behave.
720 *
721 * Note that ACPI doesn't preclude putting these registers into
722 * "extended" areas of the chip, including some that we won't yet
723 * expect CMOS_READ and friends to handle.
724 */
725 if (info) {
726 if (info->flags)
727 flags = info->flags;
728 if (info->address_space)
729 address_space = info->address_space;
730
731 if (info->rtc_day_alarm && info->rtc_day_alarm < 128)
732 cmos_rtc.day_alrm = info->rtc_day_alarm;
733 if (info->rtc_mon_alarm && info->rtc_mon_alarm < 128)
734 cmos_rtc.mon_alrm = info->rtc_mon_alarm;
735 if (info->rtc_century && info->rtc_century < 128)
736 cmos_rtc.century = info->rtc_century;
737
738 if (info->wake_on && info->wake_off) {
739 cmos_rtc.wake_on = info->wake_on;
740 cmos_rtc.wake_off = info->wake_off;
741 }
742 }
743
744 cmos_rtc.dev = dev;
745 dev_set_drvdata(dev, &cmos_rtc);
746
747 cmos_rtc.rtc = devm_rtc_allocate_device(dev);
748 if (IS_ERR(cmos_rtc.rtc)) {
749 retval = PTR_ERR(cmos_rtc.rtc);
750 goto cleanup0;
751 }
752
753 rename_region(ports, dev_name(&cmos_rtc.rtc->dev));
754
755 spin_lock_irq(&rtc_lock);
756
757 if (!(flags & CMOS_RTC_FLAGS_NOFREQ)) {
758 /* force periodic irq to CMOS reset default of 1024Hz;
759 *
760 * REVISIT it's been reported that at least one x86_64 ALI
761 * mobo doesn't use 32KHz here ... for portability we might
762 * need to do something about other clock frequencies.
763 */
764 cmos_rtc.rtc->irq_freq = 1024;
765 hpet_set_periodic_freq(cmos_rtc.rtc->irq_freq);
766 CMOS_WRITE(RTC_REF_CLCK_32KHZ | 0x06, RTC_FREQ_SELECT);
767 }
768
769 /* disable irqs */
770 if (is_valid_irq(rtc_irq))
771 cmos_irq_disable(&cmos_rtc, RTC_PIE | RTC_AIE | RTC_UIE);
772
773 rtc_control = CMOS_READ(RTC_CONTROL);
774
775 spin_unlock_irq(&rtc_lock);
776
777 if (is_valid_irq(rtc_irq) && !(rtc_control & RTC_24H)) {
778 dev_warn(dev, "only 24-hr supported\n");
779 retval = -ENXIO;
780 goto cleanup1;
781 }
782
783 hpet_rtc_timer_init();
784
785 if (is_valid_irq(rtc_irq)) {
786 irq_handler_t rtc_cmos_int_handler;
787
788 if (is_hpet_enabled()) {
789 rtc_cmos_int_handler = hpet_rtc_interrupt;
790 retval = hpet_register_irq_handler(cmos_interrupt);
791 if (retval) {
792 hpet_mask_rtc_irq_bit(RTC_IRQMASK);
793 dev_warn(dev, "hpet_register_irq_handler "
794 " failed in rtc_init().");
795 goto cleanup1;
796 }
797 } else
798 rtc_cmos_int_handler = cmos_interrupt;
799
800 retval = request_irq(rtc_irq, rtc_cmos_int_handler,
801 IRQF_SHARED, dev_name(&cmos_rtc.rtc->dev),
802 cmos_rtc.rtc);
803 if (retval < 0) {
804 dev_dbg(dev, "IRQ %d is already in use\n", rtc_irq);
805 goto cleanup1;
806 }
807 }
808
809 cmos_rtc.rtc->ops = &cmos_rtc_ops;
810 cmos_rtc.rtc->nvram_old_abi = true;
811 retval = rtc_register_device(cmos_rtc.rtc);
812 if (retval)
813 goto cleanup2;
814
815 /* export at least the first block of NVRAM */
816 nvmem_cfg.size = address_space - NVRAM_OFFSET;
817 if (rtc_nvmem_register(cmos_rtc.rtc, &nvmem_cfg))
818 dev_err(dev, "nvmem registration failed\n");
819
820 dev_info(dev, "%s%s, %d bytes nvram%s\n",
821 !is_valid_irq(rtc_irq) ? "no alarms" :
822 cmos_rtc.mon_alrm ? "alarms up to one year" :
823 cmos_rtc.day_alrm ? "alarms up to one month" :
824 "alarms up to one day",
825 cmos_rtc.century ? ", y3k" : "",
826 nvmem_cfg.size,
827 is_hpet_enabled() ? ", hpet irqs" : "");
828
829 return 0;
830
831cleanup2:
832 if (is_valid_irq(rtc_irq))
833 free_irq(rtc_irq, cmos_rtc.rtc);
834cleanup1:
835 cmos_rtc.dev = NULL;
836cleanup0:
837 if (RTC_IOMAPPED)
838 release_region(ports->start, resource_size(ports));
839 else
840 release_mem_region(ports->start, resource_size(ports));
841 return retval;
842}
843
844static void cmos_do_shutdown(int rtc_irq)
845{
846 spin_lock_irq(&rtc_lock);
847 if (is_valid_irq(rtc_irq))
848 cmos_irq_disable(&cmos_rtc, RTC_IRQMASK);
849 spin_unlock_irq(&rtc_lock);
850}
851
852static void cmos_do_remove(struct device *dev)
853{
854 struct cmos_rtc *cmos = dev_get_drvdata(dev);
855 struct resource *ports;
856
857 cmos_do_shutdown(cmos->irq);
858
859 if (is_valid_irq(cmos->irq)) {
860 free_irq(cmos->irq, cmos->rtc);
861 hpet_unregister_irq_handler(cmos_interrupt);
862 }
863
864 cmos->rtc = NULL;
865
866 ports = cmos->iomem;
867 if (RTC_IOMAPPED)
868 release_region(ports->start, resource_size(ports));
869 else
870 release_mem_region(ports->start, resource_size(ports));
871 cmos->iomem = NULL;
872
873 cmos->dev = NULL;
874}
875
876static int cmos_aie_poweroff(struct device *dev)
877{
878 struct cmos_rtc *cmos = dev_get_drvdata(dev);
879 struct rtc_time now;
880 time64_t t_now;
881 int retval = 0;
882 unsigned char rtc_control;
883
884 if (!cmos->alarm_expires)
885 return -EINVAL;
886
887 spin_lock_irq(&rtc_lock);
888 rtc_control = CMOS_READ(RTC_CONTROL);
889 spin_unlock_irq(&rtc_lock);
890
891 /* We only care about the situation where AIE is disabled. */
892 if (rtc_control & RTC_AIE)
893 return -EBUSY;
894
895 cmos_read_time(dev, &now);
896 t_now = rtc_tm_to_time64(&now);
897
898 /*
899 * When enabling "RTC wake-up" in BIOS setup, the machine reboots
900 * automatically right after shutdown on some buggy boxes.
901 * This automatic rebooting issue won't happen when the alarm
902 * time is larger than now+1 seconds.
903 *
904 * If the alarm time is equal to now+1 seconds, the issue can be
905 * prevented by cancelling the alarm.
906 */
907 if (cmos->alarm_expires == t_now + 1) {
908 struct rtc_wkalrm alarm;
909
910 /* Cancel the AIE timer by configuring the past time. */
911 rtc_time64_to_tm(t_now - 1, &alarm.time);
912 alarm.enabled = 0;
913 retval = cmos_set_alarm(dev, &alarm);
914 } else if (cmos->alarm_expires > t_now + 1) {
915 retval = -EBUSY;
916 }
917
918 return retval;
919}
920
921static int cmos_suspend(struct device *dev)
922{
923 struct cmos_rtc *cmos = dev_get_drvdata(dev);
924 unsigned char tmp;
925
926 /* only the alarm might be a wakeup event source */
927 spin_lock_irq(&rtc_lock);
928 cmos->suspend_ctrl = tmp = CMOS_READ(RTC_CONTROL);
929 if (tmp & (RTC_PIE|RTC_AIE|RTC_UIE)) {
930 unsigned char mask;
931
932 if (device_may_wakeup(dev))
933 mask = RTC_IRQMASK & ~RTC_AIE;
934 else
935 mask = RTC_IRQMASK;
936 tmp &= ~mask;
937 CMOS_WRITE(tmp, RTC_CONTROL);
938 hpet_mask_rtc_irq_bit(mask);
939
940 cmos_checkintr(cmos, tmp);
941 }
942 spin_unlock_irq(&rtc_lock);
943
944 if (tmp & RTC_AIE) {
945 cmos->enabled_wake = 1;
946 if (cmos->wake_on)
947 cmos->wake_on(dev);
948 else
949 enable_irq_wake(cmos->irq);
950 }
951
952 cmos_read_alarm(dev, &cmos->saved_wkalrm);
953
954 dev_dbg(dev, "suspend%s, ctrl %02x\n",
955 (tmp & RTC_AIE) ? ", alarm may wake" : "",
956 tmp);
957
958 return 0;
959}
960
961/* We want RTC alarms to wake us from e.g. ACPI G2/S5 "soft off", even
962 * after a detour through G3 "mechanical off", although the ACPI spec
963 * says wakeup should only work from G1/S4 "hibernate". To most users,
964 * distinctions between S4 and S5 are pointless. So when the hardware
965 * allows, don't draw that distinction.
966 */
967static inline int cmos_poweroff(struct device *dev)
968{
969 if (!IS_ENABLED(CONFIG_PM))
970 return -ENOSYS;
971
972 return cmos_suspend(dev);
973}
974
975static void cmos_check_wkalrm(struct device *dev)
976{
977 struct cmos_rtc *cmos = dev_get_drvdata(dev);
978 struct rtc_wkalrm current_alarm;
979 time64_t t_current_expires;
980 time64_t t_saved_expires;
981
982 cmos_read_alarm(dev, ¤t_alarm);
983 t_current_expires = rtc_tm_to_time64(¤t_alarm.time);
984 t_saved_expires = rtc_tm_to_time64(&cmos->saved_wkalrm.time);
985 if (t_current_expires != t_saved_expires ||
986 cmos->saved_wkalrm.enabled != current_alarm.enabled) {
987 cmos_set_alarm(dev, &cmos->saved_wkalrm);
988 }
989}
990
991static void cmos_check_acpi_rtc_status(struct device *dev,
992 unsigned char *rtc_control);
993
994static int __maybe_unused cmos_resume(struct device *dev)
995{
996 struct cmos_rtc *cmos = dev_get_drvdata(dev);
997 unsigned char tmp;
998
999 if (cmos->enabled_wake) {
1000 if (cmos->wake_off)
1001 cmos->wake_off(dev);
1002 else
1003 disable_irq_wake(cmos->irq);
1004 cmos->enabled_wake = 0;
1005 }
1006
1007 /* The BIOS might have changed the alarm, restore it */
1008 cmos_check_wkalrm(dev);
1009
1010 spin_lock_irq(&rtc_lock);
1011 tmp = cmos->suspend_ctrl;
1012 cmos->suspend_ctrl = 0;
1013 /* re-enable any irqs previously active */
1014 if (tmp & RTC_IRQMASK) {
1015 unsigned char mask;
1016
1017 if (device_may_wakeup(dev))
1018 hpet_rtc_timer_init();
1019
1020 do {
1021 CMOS_WRITE(tmp, RTC_CONTROL);
1022 hpet_set_rtc_irq_bit(tmp & RTC_IRQMASK);
1023
1024 mask = CMOS_READ(RTC_INTR_FLAGS);
1025 mask &= (tmp & RTC_IRQMASK) | RTC_IRQF;
1026 if (!is_hpet_enabled() || !is_intr(mask))
1027 break;
1028
1029 /* force one-shot behavior if HPET blocked
1030 * the wake alarm's irq
1031 */
1032 rtc_update_irq(cmos->rtc, 1, mask);
1033 tmp &= ~RTC_AIE;
1034 hpet_mask_rtc_irq_bit(RTC_AIE);
1035 } while (mask & RTC_AIE);
1036
1037 if (tmp & RTC_AIE)
1038 cmos_check_acpi_rtc_status(dev, &tmp);
1039 }
1040 spin_unlock_irq(&rtc_lock);
1041
1042 dev_dbg(dev, "resume, ctrl %02x\n", tmp);
1043
1044 return 0;
1045}
1046
1047static SIMPLE_DEV_PM_OPS(cmos_pm_ops, cmos_suspend, cmos_resume);
1048
1049/*----------------------------------------------------------------*/
1050
1051/* On non-x86 systems, a "CMOS" RTC lives most naturally on platform_bus.
1052 * ACPI systems always list these as PNPACPI devices, and pre-ACPI PCs
1053 * probably list them in similar PNPBIOS tables; so PNP is more common.
1054 *
1055 * We don't use legacy "poke at the hardware" probing. Ancient PCs that
1056 * predate even PNPBIOS should set up platform_bus devices.
1057 */
1058
1059#ifdef CONFIG_ACPI
1060
1061#include <linux/acpi.h>
1062
1063static u32 rtc_handler(void *context)
1064{
1065 struct device *dev = context;
1066 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1067 unsigned char rtc_control = 0;
1068 unsigned char rtc_intr;
1069 unsigned long flags;
1070
1071 spin_lock_irqsave(&rtc_lock, flags);
1072 if (cmos_rtc.suspend_ctrl)
1073 rtc_control = CMOS_READ(RTC_CONTROL);
1074 if (rtc_control & RTC_AIE) {
1075 cmos_rtc.suspend_ctrl &= ~RTC_AIE;
1076 CMOS_WRITE(rtc_control, RTC_CONTROL);
1077 rtc_intr = CMOS_READ(RTC_INTR_FLAGS);
1078 rtc_update_irq(cmos->rtc, 1, rtc_intr);
1079 }
1080 spin_unlock_irqrestore(&rtc_lock, flags);
1081
1082 pm_wakeup_hard_event(dev);
1083 acpi_clear_event(ACPI_EVENT_RTC);
1084 acpi_disable_event(ACPI_EVENT_RTC, 0);
1085 return ACPI_INTERRUPT_HANDLED;
1086}
1087
1088static inline void rtc_wake_setup(struct device *dev)
1089{
1090 acpi_install_fixed_event_handler(ACPI_EVENT_RTC, rtc_handler, dev);
1091 /*
1092 * After the RTC handler is installed, the Fixed_RTC event should
1093 * be disabled. Only when the RTC alarm is set will it be enabled.
1094 */
1095 acpi_clear_event(ACPI_EVENT_RTC);
1096 acpi_disable_event(ACPI_EVENT_RTC, 0);
1097}
1098
1099static void rtc_wake_on(struct device *dev)
1100{
1101 acpi_clear_event(ACPI_EVENT_RTC);
1102 acpi_enable_event(ACPI_EVENT_RTC, 0);
1103}
1104
1105static void rtc_wake_off(struct device *dev)
1106{
1107 acpi_disable_event(ACPI_EVENT_RTC, 0);
1108}
1109
1110/* Every ACPI platform has a mc146818 compatible "cmos rtc". Here we find
1111 * its device node and pass extra config data. This helps its driver use
1112 * capabilities that the now-obsolete mc146818 didn't have, and informs it
1113 * that this board's RTC is wakeup-capable (per ACPI spec).
1114 */
1115static struct cmos_rtc_board_info acpi_rtc_info;
1116
1117static void cmos_wake_setup(struct device *dev)
1118{
1119 if (acpi_disabled)
1120 return;
1121
1122 rtc_wake_setup(dev);
1123 acpi_rtc_info.wake_on = rtc_wake_on;
1124 acpi_rtc_info.wake_off = rtc_wake_off;
1125
1126 /* workaround bug in some ACPI tables */
1127 if (acpi_gbl_FADT.month_alarm && !acpi_gbl_FADT.day_alarm) {
1128 dev_dbg(dev, "bogus FADT month_alarm (%d)\n",
1129 acpi_gbl_FADT.month_alarm);
1130 acpi_gbl_FADT.month_alarm = 0;
1131 }
1132
1133 acpi_rtc_info.rtc_day_alarm = acpi_gbl_FADT.day_alarm;
1134 acpi_rtc_info.rtc_mon_alarm = acpi_gbl_FADT.month_alarm;
1135 acpi_rtc_info.rtc_century = acpi_gbl_FADT.century;
1136
1137 /* NOTE: S4_RTC_WAKE is NOT currently useful to Linux */
1138 if (acpi_gbl_FADT.flags & ACPI_FADT_S4_RTC_WAKE)
1139 dev_info(dev, "RTC can wake from S4\n");
1140
1141 dev->platform_data = &acpi_rtc_info;
1142
1143 /* RTC always wakes from S1/S2/S3, and often S4/STD */
1144 device_init_wakeup(dev, 1);
1145}
1146
1147static void cmos_check_acpi_rtc_status(struct device *dev,
1148 unsigned char *rtc_control)
1149{
1150 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1151 acpi_event_status rtc_status;
1152 acpi_status status;
1153
1154 if (acpi_gbl_FADT.flags & ACPI_FADT_FIXED_RTC)
1155 return;
1156
1157 status = acpi_get_event_status(ACPI_EVENT_RTC, &rtc_status);
1158 if (ACPI_FAILURE(status)) {
1159 dev_err(dev, "Could not get RTC status\n");
1160 } else if (rtc_status & ACPI_EVENT_FLAG_SET) {
1161 unsigned char mask;
1162 *rtc_control &= ~RTC_AIE;
1163 CMOS_WRITE(*rtc_control, RTC_CONTROL);
1164 mask = CMOS_READ(RTC_INTR_FLAGS);
1165 rtc_update_irq(cmos->rtc, 1, mask);
1166 }
1167}
1168
1169#else
1170
1171static void cmos_wake_setup(struct device *dev)
1172{
1173}
1174
1175static void cmos_check_acpi_rtc_status(struct device *dev,
1176 unsigned char *rtc_control)
1177{
1178}
1179
1180#endif
1181
1182#ifdef CONFIG_PNP
1183
1184#include <linux/pnp.h>
1185
1186static int cmos_pnp_probe(struct pnp_dev *pnp, const struct pnp_device_id *id)
1187{
1188 cmos_wake_setup(&pnp->dev);
1189
1190 if (pnp_port_start(pnp, 0) == 0x70 && !pnp_irq_valid(pnp, 0)) {
1191 unsigned int irq = 0;
1192#ifdef CONFIG_X86
1193 /* Some machines contain a PNP entry for the RTC, but
1194 * don't define the IRQ. It should always be safe to
1195 * hardcode it on systems with a legacy PIC.
1196 */
1197 if (nr_legacy_irqs())
1198 irq = 8;
1199#endif
1200 return cmos_do_probe(&pnp->dev,
1201 pnp_get_resource(pnp, IORESOURCE_IO, 0), irq);
1202 } else {
1203 return cmos_do_probe(&pnp->dev,
1204 pnp_get_resource(pnp, IORESOURCE_IO, 0),
1205 pnp_irq(pnp, 0));
1206 }
1207}
1208
1209static void cmos_pnp_remove(struct pnp_dev *pnp)
1210{
1211 cmos_do_remove(&pnp->dev);
1212}
1213
1214static void cmos_pnp_shutdown(struct pnp_dev *pnp)
1215{
1216 struct device *dev = &pnp->dev;
1217 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1218
1219 if (system_state == SYSTEM_POWER_OFF) {
1220 int retval = cmos_poweroff(dev);
1221
1222 if (cmos_aie_poweroff(dev) < 0 && !retval)
1223 return;
1224 }
1225
1226 cmos_do_shutdown(cmos->irq);
1227}
1228
1229static const struct pnp_device_id rtc_ids[] = {
1230 { .id = "PNP0b00", },
1231 { .id = "PNP0b01", },
1232 { .id = "PNP0b02", },
1233 { },
1234};
1235MODULE_DEVICE_TABLE(pnp, rtc_ids);
1236
1237static struct pnp_driver cmos_pnp_driver = {
1238 .name = (char *) driver_name,
1239 .id_table = rtc_ids,
1240 .probe = cmos_pnp_probe,
1241 .remove = cmos_pnp_remove,
1242 .shutdown = cmos_pnp_shutdown,
1243
1244 /* flag ensures resume() gets called, and stops syslog spam */
1245 .flags = PNP_DRIVER_RES_DO_NOT_CHANGE,
1246 .driver = {
1247 .pm = &cmos_pm_ops,
1248 },
1249};
1250
1251#endif /* CONFIG_PNP */
1252
1253#ifdef CONFIG_OF
1254static const struct of_device_id of_cmos_match[] = {
1255 {
1256 .compatible = "motorola,mc146818",
1257 },
1258 { },
1259};
1260MODULE_DEVICE_TABLE(of, of_cmos_match);
1261
1262static __init void cmos_of_init(struct platform_device *pdev)
1263{
1264 struct device_node *node = pdev->dev.of_node;
1265 const __be32 *val;
1266
1267 if (!node)
1268 return;
1269
1270 val = of_get_property(node, "ctrl-reg", NULL);
1271 if (val)
1272 CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
1273
1274 val = of_get_property(node, "freq-reg", NULL);
1275 if (val)
1276 CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
1277}
1278#else
1279static inline void cmos_of_init(struct platform_device *pdev) {}
1280#endif
1281/*----------------------------------------------------------------*/
1282
1283/* Platform setup should have set up an RTC device, when PNP is
1284 * unavailable ... this could happen even on (older) PCs.
1285 */
1286
1287static int __init cmos_platform_probe(struct platform_device *pdev)
1288{
1289 struct resource *resource;
1290 int irq;
1291
1292 cmos_of_init(pdev);
1293 cmos_wake_setup(&pdev->dev);
1294
1295 if (RTC_IOMAPPED)
1296 resource = platform_get_resource(pdev, IORESOURCE_IO, 0);
1297 else
1298 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1299 irq = platform_get_irq(pdev, 0);
1300 if (irq < 0)
1301 irq = -1;
1302
1303 return cmos_do_probe(&pdev->dev, resource, irq);
1304}
1305
1306static int cmos_platform_remove(struct platform_device *pdev)
1307{
1308 cmos_do_remove(&pdev->dev);
1309 return 0;
1310}
1311
1312static void cmos_platform_shutdown(struct platform_device *pdev)
1313{
1314 struct device *dev = &pdev->dev;
1315 struct cmos_rtc *cmos = dev_get_drvdata(dev);
1316
1317 if (system_state == SYSTEM_POWER_OFF) {
1318 int retval = cmos_poweroff(dev);
1319
1320 if (cmos_aie_poweroff(dev) < 0 && !retval)
1321 return;
1322 }
1323
1324 cmos_do_shutdown(cmos->irq);
1325}
1326
1327/* work with hotplug and coldplug */
1328MODULE_ALIAS("platform:rtc_cmos");
1329
1330static struct platform_driver cmos_platform_driver = {
1331 .remove = cmos_platform_remove,
1332 .shutdown = cmos_platform_shutdown,
1333 .driver = {
1334 .name = driver_name,
1335 .pm = &cmos_pm_ops,
1336 .of_match_table = of_match_ptr(of_cmos_match),
1337 }
1338};
1339
1340#ifdef CONFIG_PNP
1341static bool pnp_driver_registered;
1342#endif
1343static bool platform_driver_registered;
1344
1345static int __init cmos_init(void)
1346{
1347 int retval = 0;
1348
1349#ifdef CONFIG_PNP
1350 retval = pnp_register_driver(&cmos_pnp_driver);
1351 if (retval == 0)
1352 pnp_driver_registered = true;
1353#endif
1354
1355 if (!cmos_rtc.dev) {
1356 retval = platform_driver_probe(&cmos_platform_driver,
1357 cmos_platform_probe);
1358 if (retval == 0)
1359 platform_driver_registered = true;
1360 }
1361
1362 if (retval == 0)
1363 return 0;
1364
1365#ifdef CONFIG_PNP
1366 if (pnp_driver_registered)
1367 pnp_unregister_driver(&cmos_pnp_driver);
1368#endif
1369 return retval;
1370}
1371module_init(cmos_init);
1372
1373static void __exit cmos_exit(void)
1374{
1375#ifdef CONFIG_PNP
1376 if (pnp_driver_registered)
1377 pnp_unregister_driver(&cmos_pnp_driver);
1378#endif
1379 if (platform_driver_registered)
1380 platform_driver_unregister(&cmos_platform_driver);
1381}
1382module_exit(cmos_exit);
1383
1384
1385MODULE_AUTHOR("David Brownell");
1386MODULE_DESCRIPTION("Driver for PC-style 'CMOS' RTCs");
1387MODULE_LICENSE("GPL");