1/* SPDX-License-Identifier: GPL-2.0 */
 2/* Copyright(c) 1999 - 2018 Intel Corporation. */
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 3
 4#ifndef _IXGBE_FCOE_H
 5#define _IXGBE_FCOE_H
 6
 7#include <scsi/fc/fc_fs.h>
 8#include <scsi/fc/fc_fcoe.h>
 9
10/* shift bits within STAT fo FCSTAT */
11#define IXGBE_RXDADV_FCSTAT_SHIFT	4
12
13/* ddp user buffer */
14#define IXGBE_BUFFCNT_MAX	256	/* 8 bits bufcnt */
15#define IXGBE_FCPTR_ALIGN	16
16#define IXGBE_FCPTR_MAX	(IXGBE_BUFFCNT_MAX * sizeof(dma_addr_t))
17#define IXGBE_FCBUFF_4KB	0x0
18#define IXGBE_FCBUFF_8KB	0x1
19#define IXGBE_FCBUFF_16KB	0x2
20#define IXGBE_FCBUFF_64KB	0x3
21#define IXGBE_FCBUFF_MAX	65536	/* 64KB max */
22#define IXGBE_FCBUFF_MIN	4096	/* 4KB min */
23#define IXGBE_FCOE_DDP_MAX	512	/* 9 bits xid */
24#define IXGBE_FCOE_DDP_MAX_X550	2048	/* 11 bits xid */
25
26/* Default traffic class to use for FCoE */
27#define IXGBE_FCOE_DEFTC	3
28
29/* fcerr */
30#define IXGBE_FCERR_BADCRC       0x00100000
31
32/* FCoE DDP for target mode */
33#define __IXGBE_FCOE_TARGET	1
34
35struct ixgbe_fcoe_ddp {
36	int len;
37	u32 err;
38	unsigned int sgc;
39	struct scatterlist *sgl;
40	dma_addr_t udp;
41	u64 *udl;
42	struct dma_pool *pool;
43};
44
45/* per cpu variables */
46struct ixgbe_fcoe_ddp_pool {
47	struct dma_pool *pool;
48	u64 noddp;
49	u64 noddp_ext_buff;
50};
51
52struct ixgbe_fcoe {
53	struct ixgbe_fcoe_ddp_pool __percpu *ddp_pool;
54	atomic_t refcnt;
55	spinlock_t lock;
56	struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX_X550];
57	void *extra_ddp_buffer;
58	dma_addr_t extra_ddp_buffer_dma;
59	unsigned long mode;
60	u8 up;
61};
62
63#endif /* _IXGBE_FCOE_H */

 1/* SPDX-License-Identifier: GPL-2.0 */
 2/*******************************************************************************
 3
 4  Intel 10 Gigabit PCI Express Linux driver
 5  Copyright(c) 1999 - 2013 Intel Corporation.
 6
 7  This program is free software; you can redistribute it and/or modify it
 8  under the terms and conditions of the GNU General Public License,
 9  version 2, as published by the Free Software Foundation.
10
11  This program is distributed in the hope it will be useful, but WITHOUT
12  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
14  more details.
15
16  You should have received a copy of the GNU General Public License along with
17  this program; if not, write to the Free Software Foundation, Inc.,
18  51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
19
20  The full GNU General Public License is included in this distribution in
21  the file called "COPYING".
22
23  Contact Information:
24  Linux NICS <linux.nics@intel.com>
25  e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
26  Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
27
28*******************************************************************************/
29
30#ifndef _IXGBE_FCOE_H
31#define _IXGBE_FCOE_H
32
33#include <scsi/fc/fc_fs.h>
34#include <scsi/fc/fc_fcoe.h>
35
36/* shift bits within STAT fo FCSTAT */
37#define IXGBE_RXDADV_FCSTAT_SHIFT	4
38
39/* ddp user buffer */
40#define IXGBE_BUFFCNT_MAX	256	/* 8 bits bufcnt */
41#define IXGBE_FCPTR_ALIGN	16
42#define IXGBE_FCPTR_MAX	(IXGBE_BUFFCNT_MAX * sizeof(dma_addr_t))
43#define IXGBE_FCBUFF_4KB	0x0
44#define IXGBE_FCBUFF_8KB	0x1
45#define IXGBE_FCBUFF_16KB	0x2
46#define IXGBE_FCBUFF_64KB	0x3
47#define IXGBE_FCBUFF_MAX	65536	/* 64KB max */
48#define IXGBE_FCBUFF_MIN	4096	/* 4KB min */
49#define IXGBE_FCOE_DDP_MAX	512	/* 9 bits xid */
50#define IXGBE_FCOE_DDP_MAX_X550	2048	/* 11 bits xid */
51
52/* Default traffic class to use for FCoE */
53#define IXGBE_FCOE_DEFTC	3
54
55/* fcerr */
56#define IXGBE_FCERR_BADCRC       0x00100000
57
58/* FCoE DDP for target mode */
59#define __IXGBE_FCOE_TARGET	1
60
61struct ixgbe_fcoe_ddp {
62	int len;
63	u32 err;
64	unsigned int sgc;
65	struct scatterlist *sgl;
66	dma_addr_t udp;
67	u64 *udl;
68	struct dma_pool *pool;
69};
70
71/* per cpu variables */
72struct ixgbe_fcoe_ddp_pool {
73	struct dma_pool *pool;
74	u64 noddp;
75	u64 noddp_ext_buff;
76};
77
78struct ixgbe_fcoe {
79	struct ixgbe_fcoe_ddp_pool __percpu *ddp_pool;
80	atomic_t refcnt;
81	spinlock_t lock;
82	struct ixgbe_fcoe_ddp ddp[IXGBE_FCOE_DDP_MAX_X550];
83	void *extra_ddp_buffer;
84	dma_addr_t extra_ddp_buffer_dma;
85	unsigned long mode;
86	u8 up;
87};
88
89#endif /* _IXGBE_FCOE_H */