1/* SPDX-License-Identifier: GPL-2.0 */
  2/*******************************************************************************
  3 *
  4 * Intel Ethernet Controller XL710 Family Linux Virtual Function Driver
  5 * Copyright(c) 2013 - 2014 Intel Corporation.
  6 *
  7 * This program is free software; you can redistribute it and/or modify it
  8 * under the terms and conditions of the GNU General Public License,
  9 * version 2, as published by the Free Software Foundation.
 10 *
 11 * This program is distributed in the hope it will be useful, but WITHOUT
 12 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 13 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 14 * more details.
 15 *
 16 * You should have received a copy of the GNU General Public License along
 17 * with this program.  If not, see <http://www.gnu.org/licenses/>.
 18 *
 19 * The full GNU General Public License is included in this distribution in
 20 * the file called "COPYING".
 21 *
 22 * Contact Information:
 23 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
 24 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
 25 *
 26 ******************************************************************************/
 27
 28#ifndef _I40E_LAN_HMC_H_
 29#define _I40E_LAN_HMC_H_
 30
 31/* forward-declare the HW struct for the compiler */
 32struct i40e_hw;
 33
 34/* HMC element context information */
 35
 36/* Rx queue context data
 37 *
 38 * The sizes of the variables may be larger than needed due to crossing byte
 39 * boundaries. If we do not have the width of the variable set to the correct
 40 * size then we could end up shifting bits off the top of the variable when the
 41 * variable is at the top of a byte and crosses over into the next byte.
 42 */
 43struct i40e_hmc_obj_rxq {
 44	u16 head;
 45	u16 cpuid; /* bigger than needed, see above for reason */
 46	u64 base;
 47	u16 qlen;
 48#define I40E_RXQ_CTX_DBUFF_SHIFT 7
 49	u16 dbuff; /* bigger than needed, see above for reason */
 50#define I40E_RXQ_CTX_HBUFF_SHIFT 6
 51	u16 hbuff; /* bigger than needed, see above for reason */
 52	u8  dtype;
 53	u8  dsize;
 54	u8  crcstrip;
 55	u8  fc_ena;
 56	u8  l2tsel;
 57	u8  hsplit_0;
 58	u8  hsplit_1;
 59	u8  showiv;
 60	u32 rxmax; /* bigger than needed, see above for reason */
 61	u8  tphrdesc_ena;
 62	u8  tphwdesc_ena;
 63	u8  tphdata_ena;
 64	u8  tphhead_ena;
 65	u16 lrxqthresh; /* bigger than needed, see above for reason */
 66	u8  prefena;	/* NOTE: normally must be set to 1 at init */
 67};
 68
 69/* Tx queue context data
 70*
 71* The sizes of the variables may be larger than needed due to crossing byte
 72* boundaries. If we do not have the width of the variable set to the correct
 73* size then we could end up shifting bits off the top of the variable when the
 74* variable is at the top of a byte and crosses over into the next byte.
 75*/
 76struct i40e_hmc_obj_txq {
 77	u16 head;
 78	u8  new_context;
 79	u64 base;
 80	u8  fc_ena;
 81	u8  timesync_ena;
 82	u8  fd_ena;
 83	u8  alt_vlan_ena;
 84	u16 thead_wb;
 85	u8  cpuid;
 86	u8  head_wb_ena;
 87	u16 qlen;
 88	u8  tphrdesc_ena;
 89	u8  tphrpacket_ena;
 90	u8  tphwdesc_ena;
 91	u64 head_wb_addr;
 92	u32 crc;
 93	u16 rdylist;
 94	u8  rdylist_act;
 95};
 96
 97/* for hsplit_0 field of Rx HMC context */
 98enum i40e_hmc_obj_rx_hsplit_0 {
 99	I40E_HMC_OBJ_RX_HSPLIT_0_NO_SPLIT      = 0,
100	I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_L2      = 1,
101	I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_IP      = 2,
102	I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_TCP_UDP = 4,
103	I40E_HMC_OBJ_RX_HSPLIT_0_SPLIT_SCTP    = 8,
104};
105
106/* fcoe_cntx and fcoe_filt are for debugging purpose only */
107struct i40e_hmc_obj_fcoe_cntx {
108	u32 rsv[32];
109};
110
111struct i40e_hmc_obj_fcoe_filt {
112	u32 rsv[8];
113};
114
115/* Context sizes for LAN objects */
116enum i40e_hmc_lan_object_size {
117	I40E_HMC_LAN_OBJ_SZ_8   = 0x3,
118	I40E_HMC_LAN_OBJ_SZ_16  = 0x4,
119	I40E_HMC_LAN_OBJ_SZ_32  = 0x5,
120	I40E_HMC_LAN_OBJ_SZ_64  = 0x6,
121	I40E_HMC_LAN_OBJ_SZ_128 = 0x7,
122	I40E_HMC_LAN_OBJ_SZ_256 = 0x8,
123	I40E_HMC_LAN_OBJ_SZ_512 = 0x9,
124};
125
126#define I40E_HMC_L2OBJ_BASE_ALIGNMENT 512
127#define I40E_HMC_OBJ_SIZE_TXQ         128
128#define I40E_HMC_OBJ_SIZE_RXQ         32
129#define I40E_HMC_OBJ_SIZE_FCOE_CNTX   128
130#define I40E_HMC_OBJ_SIZE_FCOE_FILT   64
131
132enum i40e_hmc_lan_rsrc_type {
133	I40E_HMC_LAN_FULL  = 0,
134	I40E_HMC_LAN_TX    = 1,
135	I40E_HMC_LAN_RX    = 2,
136	I40E_HMC_FCOE_CTX  = 3,
137	I40E_HMC_FCOE_FILT = 4,
138	I40E_HMC_LAN_MAX   = 5
139};
140
141enum i40e_hmc_model {
142	I40E_HMC_MODEL_DIRECT_PREFERRED = 0,
143	I40E_HMC_MODEL_DIRECT_ONLY      = 1,
144	I40E_HMC_MODEL_PAGED_ONLY       = 2,
145	I40E_HMC_MODEL_UNKNOWN,
146};
147
148struct i40e_hmc_lan_create_obj_info {
149	struct i40e_hmc_info *hmc_info;
150	u32 rsrc_type;
151	u32 start_idx;
152	u32 count;
153	enum i40e_sd_entry_type entry_type;
154	u64 direct_mode_sz;
155};
156
157struct i40e_hmc_lan_delete_obj_info {
158	struct i40e_hmc_info *hmc_info;
159	u32 rsrc_type;
160	u32 start_idx;
161	u32 count;
162};
163
164i40e_status i40e_init_lan_hmc(struct i40e_hw *hw, u32 txq_num,
165					u32 rxq_num, u32 fcoe_cntx_num,
166					u32 fcoe_filt_num);
167i40e_status i40e_configure_lan_hmc(struct i40e_hw *hw,
168					     enum i40e_hmc_model model);
169i40e_status i40e_shutdown_lan_hmc(struct i40e_hw *hw);
170
171i40e_status i40e_clear_lan_tx_queue_context(struct i40e_hw *hw,
172						      u16 queue);
173i40e_status i40e_set_lan_tx_queue_context(struct i40e_hw *hw,
174						    u16 queue,
175						    struct i40e_hmc_obj_txq *s);
176i40e_status i40e_clear_lan_rx_queue_context(struct i40e_hw *hw,
177						      u16 queue);
178i40e_status i40e_set_lan_rx_queue_context(struct i40e_hw *hw,
179						    u16 queue,
180						    struct i40e_hmc_obj_rxq *s);
181
182#endif /* _I40E_LAN_HMC_H_ */