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1// SPDX-License-Identifier: GPL-2.0-or-later
2/*
3 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
4 * monitoring
5 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
6 *
7 * Based on the lm83 driver. The LM90 is a sensor chip made by National
8 * Semiconductor. It reports up to two temperatures (its own plus up to
9 * one external one) with a 0.125 deg resolution (1 deg for local
10 * temperature) and a 3-4 deg accuracy.
11 *
12 * This driver also supports the LM89 and LM99, two other sensor chips
13 * made by National Semiconductor. Both have an increased remote
14 * temperature measurement accuracy (1 degree), and the LM99
15 * additionally shifts remote temperatures (measured and limits) by 16
16 * degrees, which allows for higher temperatures measurement.
17 * Note that there is no way to differentiate between both chips.
18 * When device is auto-detected, the driver will assume an LM99.
19 *
20 * This driver also supports the LM86, another sensor chip made by
21 * National Semiconductor. It is exactly similar to the LM90 except it
22 * has a higher accuracy.
23 *
24 * This driver also supports the ADM1032, a sensor chip made by Analog
25 * Devices. That chip is similar to the LM90, with a few differences
26 * that are not handled by this driver. Among others, it has a higher
27 * accuracy than the LM90, much like the LM86 does.
28 *
29 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
30 * chips made by Maxim. These chips are similar to the LM86.
31 * Note that there is no easy way to differentiate between the three
32 * variants. We use the device address to detect MAX6659, which will result
33 * in a detection as max6657 if it is on address 0x4c. The extra address
34 * and features of the MAX6659 are only supported if the chip is configured
35 * explicitly as max6659, or if its address is not 0x4c.
36 * These chips lack the remote temperature offset feature.
37 *
38 * This driver also supports the MAX6654 chip made by Maxim. This chip can be
39 * at 9 different addresses, similar to MAX6680/MAX6681. The MAX6654 is similar
40 * to MAX6657/MAX6658/MAX6659, but does not support critical temperature
41 * limits. Extended range is available by setting the configuration register
42 * accordingly, and is done during initialization. Extended precision is only
43 * available at conversion rates of 1 Hz and slower. Note that extended
44 * precision is not enabled by default, as this driver initializes all chips
45 * to 2 Hz by design. The driver also supports MAX6690, which is practically
46 * identical to MAX6654.
47 *
48 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
49 * MAX6692 chips made by Maxim. These are again similar to the LM86,
50 * but they use unsigned temperature values and can report temperatures
51 * from 0 to 145 degrees.
52 *
53 * This driver also supports the MAX6680 and MAX6681, two other sensor
54 * chips made by Maxim. These are quite similar to the other Maxim
55 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
56 * be treated identically.
57 *
58 * This driver also supports the MAX6695 and MAX6696, two other sensor
59 * chips made by Maxim. These are also quite similar to other Maxim
60 * chips, but support three temperature sensors instead of two. MAX6695
61 * and MAX6696 only differ in the pinout so they can be treated identically.
62 *
63 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
64 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
65 * and extended mode. They are mostly compatible with LM90 except for a data
66 * format difference for the temperature value registers.
67 *
68 * This driver also supports ADT7481, ADT7482, and ADT7483 from Analog Devices
69 * / ON Semiconductor. The chips are similar to ADT7461 but support two external
70 * temperature sensors.
71 *
72 * This driver also supports NCT72, NCT214, and NCT218 from ON Semiconductor.
73 * The chips are similar to ADT7461/ADT7461A but have full PEC support
74 * (undocumented).
75 *
76 * This driver also supports the SA56004 from Philips. This device is
77 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
78 *
79 * This driver also supports the G781 from GMT. This device is compatible
80 * with the ADM1032.
81 *
82 * This driver also supports TMP451 and TMP461 from Texas Instruments.
83 * Those devices are supported in both compatibility and extended mode.
84 * They are mostly compatible with ADT7461 except for local temperature
85 * low byte register and max conversion rate.
86 *
87 * This driver also supports MAX1617 and various clones such as G767
88 * and NE1617. Such clones will be detected as MAX1617.
89 *
90 * This driver also supports NE1618 from Philips. It is similar to NE1617
91 * but supports 11 bit external temperature values.
92 *
93 * Since the LM90 was the first chipset supported by this driver, most
94 * comments will refer to this chipset, but are actually general and
95 * concern all supported chipsets, unless mentioned otherwise.
96 */
97
98#include <linux/bits.h>
99#include <linux/device.h>
100#include <linux/err.h>
101#include <linux/i2c.h>
102#include <linux/init.h>
103#include <linux/interrupt.h>
104#include <linux/jiffies.h>
105#include <linux/hwmon.h>
106#include <linux/kstrtox.h>
107#include <linux/module.h>
108#include <linux/mutex.h>
109#include <linux/of.h>
110#include <linux/regulator/consumer.h>
111#include <linux/slab.h>
112#include <linux/workqueue.h>
113
114/* The maximum number of channels currently supported */
115#define MAX_CHANNELS 3
116
117/*
118 * Addresses to scan
119 * Address is fully defined internally and cannot be changed except for
120 * MAX6659, MAX6680 and MAX6681.
121 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
122 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
123 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
124 * have address 0x4d.
125 * MAX6647 has address 0x4e.
126 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
127 * MAX6654, MAX6680, and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29,
128 * 0x2a, 0x2b, 0x4c, 0x4d or 0x4e.
129 * SA56004 can have address 0x48 through 0x4F.
130 */
131
132static const unsigned short normal_i2c[] = {
133 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
134 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
135
136enum chips { adm1023, adm1032, adt7461, adt7461a, adt7481,
137 g781, lm84, lm90, lm99,
138 max1617, max6642, max6646, max6648, max6654, max6657, max6659, max6680, max6696,
139 nct210, nct72, ne1618, sa56004, tmp451, tmp461, w83l771,
140};
141
142/*
143 * The LM90 registers
144 */
145
146#define LM90_REG_MAN_ID 0xFE
147#define LM90_REG_CHIP_ID 0xFF
148#define LM90_REG_CONFIG1 0x03
149#define LM90_REG_CONFIG2 0xBF
150#define LM90_REG_CONVRATE 0x04
151#define LM90_REG_STATUS 0x02
152#define LM90_REG_LOCAL_TEMP 0x00
153#define LM90_REG_LOCAL_HIGH 0x05
154#define LM90_REG_LOCAL_LOW 0x06
155#define LM90_REG_LOCAL_CRIT 0x20
156#define LM90_REG_REMOTE_TEMPH 0x01
157#define LM90_REG_REMOTE_TEMPL 0x10
158#define LM90_REG_REMOTE_OFFSH 0x11
159#define LM90_REG_REMOTE_OFFSL 0x12
160#define LM90_REG_REMOTE_HIGHH 0x07
161#define LM90_REG_REMOTE_HIGHL 0x13
162#define LM90_REG_REMOTE_LOWH 0x08
163#define LM90_REG_REMOTE_LOWL 0x14
164#define LM90_REG_REMOTE_CRIT 0x19
165#define LM90_REG_TCRIT_HYST 0x21
166
167/* MAX6646/6647/6649/6654/6657/6658/6659/6695/6696 registers */
168
169#define MAX6657_REG_LOCAL_TEMPL 0x11
170#define MAX6696_REG_STATUS2 0x12
171#define MAX6659_REG_REMOTE_EMERG 0x16
172#define MAX6659_REG_LOCAL_EMERG 0x17
173
174/* SA56004 registers */
175
176#define SA56004_REG_LOCAL_TEMPL 0x22
177
178#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
179
180/* TMP451/TMP461 registers */
181#define TMP451_REG_LOCAL_TEMPL 0x15
182#define TMP451_REG_CONALERT 0x22
183
184#define TMP461_REG_CHEN 0x16
185#define TMP461_REG_DFC 0x24
186
187/* ADT7481 registers */
188#define ADT7481_REG_STATUS2 0x23
189#define ADT7481_REG_CONFIG2 0x24
190
191#define ADT7481_REG_MAN_ID 0x3e
192#define ADT7481_REG_CHIP_ID 0x3d
193
194/* Device features */
195#define LM90_HAVE_EXTENDED_TEMP BIT(0) /* extended temperature support */
196#define LM90_HAVE_OFFSET BIT(1) /* temperature offset register */
197#define LM90_HAVE_UNSIGNED_TEMP BIT(2) /* temperatures are unsigned */
198#define LM90_HAVE_REM_LIMIT_EXT BIT(3) /* extended remote limit */
199#define LM90_HAVE_EMERGENCY BIT(4) /* 3rd upper (emergency) limit */
200#define LM90_HAVE_EMERGENCY_ALARM BIT(5)/* emergency alarm */
201#define LM90_HAVE_TEMP3 BIT(6) /* 3rd temperature sensor */
202#define LM90_HAVE_BROKEN_ALERT BIT(7) /* Broken alert */
203#define LM90_PAUSE_FOR_CONFIG BIT(8) /* Pause conversion for config */
204#define LM90_HAVE_CRIT BIT(9) /* Chip supports CRIT/OVERT register */
205#define LM90_HAVE_CRIT_ALRM_SWP BIT(10) /* critical alarm bits swapped */
206#define LM90_HAVE_PEC BIT(11) /* Chip supports PEC */
207#define LM90_HAVE_PARTIAL_PEC BIT(12) /* Partial PEC support (adm1032)*/
208#define LM90_HAVE_ALARMS BIT(13) /* Create 'alarms' attribute */
209#define LM90_HAVE_EXT_UNSIGNED BIT(14) /* extended unsigned temperature*/
210#define LM90_HAVE_LOW BIT(15) /* low limits */
211#define LM90_HAVE_CONVRATE BIT(16) /* conversion rate */
212#define LM90_HAVE_REMOTE_EXT BIT(17) /* extended remote temperature */
213#define LM90_HAVE_FAULTQUEUE BIT(18) /* configurable samples count */
214
215/* LM90 status */
216#define LM90_STATUS_LTHRM BIT(0) /* local THERM limit tripped */
217#define LM90_STATUS_RTHRM BIT(1) /* remote THERM limit tripped */
218#define LM90_STATUS_ROPEN BIT(2) /* remote is an open circuit */
219#define LM90_STATUS_RLOW BIT(3) /* remote low temp limit tripped */
220#define LM90_STATUS_RHIGH BIT(4) /* remote high temp limit tripped */
221#define LM90_STATUS_LLOW BIT(5) /* local low temp limit tripped */
222#define LM90_STATUS_LHIGH BIT(6) /* local high temp limit tripped */
223#define LM90_STATUS_BUSY BIT(7) /* conversion is ongoing */
224
225/* MAX6695/6696 and ADT7481 2nd status register */
226#define MAX6696_STATUS2_R2THRM BIT(1) /* remote2 THERM limit tripped */
227#define MAX6696_STATUS2_R2OPEN BIT(2) /* remote2 is an open circuit */
228#define MAX6696_STATUS2_R2LOW BIT(3) /* remote2 low temp limit tripped */
229#define MAX6696_STATUS2_R2HIGH BIT(4) /* remote2 high temp limit tripped */
230#define MAX6696_STATUS2_ROT2 BIT(5) /* remote emergency limit tripped */
231#define MAX6696_STATUS2_R2OT2 BIT(6) /* remote2 emergency limit tripped */
232#define MAX6696_STATUS2_LOT2 BIT(7) /* local emergency limit tripped */
233
234/*
235 * Driver data (common to all clients)
236 */
237
238static const struct i2c_device_id lm90_id[] = {
239 { "adm1020", max1617 },
240 { "adm1021", max1617 },
241 { "adm1023", adm1023 },
242 { "adm1032", adm1032 },
243 { "adt7421", adt7461a },
244 { "adt7461", adt7461 },
245 { "adt7461a", adt7461a },
246 { "adt7481", adt7481 },
247 { "adt7482", adt7481 },
248 { "adt7483a", adt7481 },
249 { "g781", g781 },
250 { "gl523sm", max1617 },
251 { "lm84", lm84 },
252 { "lm86", lm90 },
253 { "lm89", lm90 },
254 { "lm90", lm90 },
255 { "lm99", lm99 },
256 { "max1617", max1617 },
257 { "max6642", max6642 },
258 { "max6646", max6646 },
259 { "max6647", max6646 },
260 { "max6648", max6648 },
261 { "max6649", max6646 },
262 { "max6654", max6654 },
263 { "max6657", max6657 },
264 { "max6658", max6657 },
265 { "max6659", max6659 },
266 { "max6680", max6680 },
267 { "max6681", max6680 },
268 { "max6690", max6654 },
269 { "max6692", max6648 },
270 { "max6695", max6696 },
271 { "max6696", max6696 },
272 { "mc1066", max1617 },
273 { "nct1008", adt7461a },
274 { "nct210", nct210 },
275 { "nct214", nct72 },
276 { "nct218", nct72 },
277 { "nct72", nct72 },
278 { "ne1618", ne1618 },
279 { "w83l771", w83l771 },
280 { "sa56004", sa56004 },
281 { "thmc10", max1617 },
282 { "tmp451", tmp451 },
283 { "tmp461", tmp461 },
284 { }
285};
286MODULE_DEVICE_TABLE(i2c, lm90_id);
287
288static const struct of_device_id __maybe_unused lm90_of_match[] = {
289 {
290 .compatible = "adi,adm1032",
291 .data = (void *)adm1032
292 },
293 {
294 .compatible = "adi,adt7461",
295 .data = (void *)adt7461
296 },
297 {
298 .compatible = "adi,adt7461a",
299 .data = (void *)adt7461a
300 },
301 {
302 .compatible = "adi,adt7481",
303 .data = (void *)adt7481
304 },
305 {
306 .compatible = "gmt,g781",
307 .data = (void *)g781
308 },
309 {
310 .compatible = "national,lm90",
311 .data = (void *)lm90
312 },
313 {
314 .compatible = "national,lm86",
315 .data = (void *)lm90
316 },
317 {
318 .compatible = "national,lm89",
319 .data = (void *)lm90
320 },
321 {
322 .compatible = "national,lm99",
323 .data = (void *)lm99
324 },
325 {
326 .compatible = "dallas,max6646",
327 .data = (void *)max6646
328 },
329 {
330 .compatible = "dallas,max6647",
331 .data = (void *)max6646
332 },
333 {
334 .compatible = "dallas,max6649",
335 .data = (void *)max6646
336 },
337 {
338 .compatible = "dallas,max6654",
339 .data = (void *)max6654
340 },
341 {
342 .compatible = "dallas,max6657",
343 .data = (void *)max6657
344 },
345 {
346 .compatible = "dallas,max6658",
347 .data = (void *)max6657
348 },
349 {
350 .compatible = "dallas,max6659",
351 .data = (void *)max6659
352 },
353 {
354 .compatible = "dallas,max6680",
355 .data = (void *)max6680
356 },
357 {
358 .compatible = "dallas,max6681",
359 .data = (void *)max6680
360 },
361 {
362 .compatible = "dallas,max6695",
363 .data = (void *)max6696
364 },
365 {
366 .compatible = "dallas,max6696",
367 .data = (void *)max6696
368 },
369 {
370 .compatible = "onnn,nct1008",
371 .data = (void *)adt7461a
372 },
373 {
374 .compatible = "onnn,nct214",
375 .data = (void *)nct72
376 },
377 {
378 .compatible = "onnn,nct218",
379 .data = (void *)nct72
380 },
381 {
382 .compatible = "onnn,nct72",
383 .data = (void *)nct72
384 },
385 {
386 .compatible = "winbond,w83l771",
387 .data = (void *)w83l771
388 },
389 {
390 .compatible = "nxp,sa56004",
391 .data = (void *)sa56004
392 },
393 {
394 .compatible = "ti,tmp451",
395 .data = (void *)tmp451
396 },
397 {
398 .compatible = "ti,tmp461",
399 .data = (void *)tmp461
400 },
401 { },
402};
403MODULE_DEVICE_TABLE(of, lm90_of_match);
404
405/*
406 * chip type specific parameters
407 */
408struct lm90_params {
409 u32 flags; /* Capabilities */
410 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
411 /* Upper 8 bits for max6695/96 */
412 u8 max_convrate; /* Maximum conversion rate register value */
413 u8 resolution; /* 16-bit resolution (default 11 bit) */
414 u8 reg_status2; /* 2nd status register (optional) */
415 u8 reg_local_ext; /* Extended local temp register (optional) */
416 u8 faultqueue_mask; /* fault queue bit mask */
417 u8 faultqueue_depth; /* fault queue depth if mask is used */
418};
419
420static const struct lm90_params lm90_params[] = {
421 [adm1023] = {
422 .flags = LM90_HAVE_ALARMS | LM90_HAVE_OFFSET | LM90_HAVE_BROKEN_ALERT
423 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
424 | LM90_HAVE_REMOTE_EXT,
425 .alert_alarms = 0x7c,
426 .resolution = 8,
427 .max_convrate = 7,
428 },
429 [adm1032] = {
430 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
431 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
432 | LM90_HAVE_PARTIAL_PEC | LM90_HAVE_ALARMS
433 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
434 | LM90_HAVE_FAULTQUEUE,
435 .alert_alarms = 0x7c,
436 .max_convrate = 10,
437 },
438 [adt7461] = {
439 /*
440 * Standard temperature range is supposed to be unsigned,
441 * but that does not match reality. Negative temperatures
442 * are always reported.
443 */
444 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
445 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
446 | LM90_HAVE_CRIT | LM90_HAVE_PARTIAL_PEC
447 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
448 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
449 .alert_alarms = 0x7c,
450 .max_convrate = 10,
451 .resolution = 10,
452 },
453 [adt7461a] = {
454 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
455 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
456 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_ALARMS
457 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
458 | LM90_HAVE_FAULTQUEUE,
459 .alert_alarms = 0x7c,
460 .max_convrate = 10,
461 },
462 [adt7481] = {
463 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
464 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
465 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_PEC
466 | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT | LM90_HAVE_LOW
467 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
468 | LM90_HAVE_FAULTQUEUE,
469 .alert_alarms = 0x1c7c,
470 .max_convrate = 11,
471 .resolution = 10,
472 .reg_status2 = ADT7481_REG_STATUS2,
473 },
474 [g781] = {
475 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
476 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_CRIT
477 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
478 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
479 .alert_alarms = 0x7c,
480 .max_convrate = 7,
481 },
482 [lm84] = {
483 .flags = LM90_HAVE_ALARMS,
484 .resolution = 8,
485 },
486 [lm90] = {
487 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
488 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
489 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
490 | LM90_HAVE_FAULTQUEUE,
491 .alert_alarms = 0x7b,
492 .max_convrate = 9,
493 .faultqueue_mask = BIT(0),
494 .faultqueue_depth = 3,
495 },
496 [lm99] = {
497 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
498 | LM90_HAVE_CRIT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
499 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
500 | LM90_HAVE_FAULTQUEUE,
501 .alert_alarms = 0x7b,
502 .max_convrate = 9,
503 .faultqueue_mask = BIT(0),
504 .faultqueue_depth = 3,
505 },
506 [max1617] = {
507 .flags = LM90_HAVE_CONVRATE | LM90_HAVE_BROKEN_ALERT |
508 LM90_HAVE_LOW | LM90_HAVE_ALARMS,
509 .alert_alarms = 0x78,
510 .resolution = 8,
511 .max_convrate = 7,
512 },
513 [max6642] = {
514 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXT_UNSIGNED
515 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
516 .alert_alarms = 0x50,
517 .resolution = 10,
518 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
519 .faultqueue_mask = BIT(4),
520 .faultqueue_depth = 2,
521 },
522 [max6646] = {
523 .flags = LM90_HAVE_CRIT | LM90_HAVE_BROKEN_ALERT
524 | LM90_HAVE_EXT_UNSIGNED | LM90_HAVE_ALARMS | LM90_HAVE_LOW
525 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
526 .alert_alarms = 0x7c,
527 .max_convrate = 6,
528 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
529 },
530 [max6648] = {
531 .flags = LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_CRIT
532 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_LOW
533 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
534 .alert_alarms = 0x7c,
535 .max_convrate = 6,
536 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
537 },
538 [max6654] = {
539 .flags = LM90_HAVE_BROKEN_ALERT | LM90_HAVE_ALARMS | LM90_HAVE_LOW
540 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
541 .alert_alarms = 0x7c,
542 .max_convrate = 7,
543 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
544 },
545 [max6657] = {
546 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_CRIT
547 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
548 | LM90_HAVE_REMOTE_EXT,
549 .alert_alarms = 0x7c,
550 .max_convrate = 8,
551 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
552 },
553 [max6659] = {
554 .flags = LM90_HAVE_EMERGENCY | LM90_HAVE_CRIT
555 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
556 | LM90_HAVE_REMOTE_EXT,
557 .alert_alarms = 0x7c,
558 .max_convrate = 8,
559 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
560 },
561 [max6680] = {
562 /*
563 * Apparent temperatures of 128 degrees C or higher are reported
564 * and treated as negative temperatures (meaning min_alarm will
565 * be set).
566 */
567 .flags = LM90_HAVE_OFFSET | LM90_HAVE_CRIT
568 | LM90_HAVE_CRIT_ALRM_SWP | LM90_HAVE_BROKEN_ALERT
569 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
570 | LM90_HAVE_REMOTE_EXT,
571 .alert_alarms = 0x7c,
572 .max_convrate = 7,
573 },
574 [max6696] = {
575 .flags = LM90_HAVE_EMERGENCY
576 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3 | LM90_HAVE_CRIT
577 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
578 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
579 .alert_alarms = 0x1c7c,
580 .max_convrate = 6,
581 .reg_status2 = MAX6696_REG_STATUS2,
582 .reg_local_ext = MAX6657_REG_LOCAL_TEMPL,
583 .faultqueue_mask = BIT(5),
584 .faultqueue_depth = 4,
585 },
586 [nct72] = {
587 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
588 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP
589 | LM90_HAVE_CRIT | LM90_HAVE_PEC | LM90_HAVE_UNSIGNED_TEMP
590 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT
591 | LM90_HAVE_FAULTQUEUE,
592 .alert_alarms = 0x7c,
593 .max_convrate = 10,
594 .resolution = 10,
595 },
596 [nct210] = {
597 .flags = LM90_HAVE_ALARMS | LM90_HAVE_BROKEN_ALERT
598 | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
599 | LM90_HAVE_REMOTE_EXT,
600 .alert_alarms = 0x7c,
601 .resolution = 11,
602 .max_convrate = 7,
603 },
604 [ne1618] = {
605 .flags = LM90_PAUSE_FOR_CONFIG | LM90_HAVE_BROKEN_ALERT
606 | LM90_HAVE_LOW | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT,
607 .alert_alarms = 0x7c,
608 .resolution = 11,
609 .max_convrate = 7,
610 },
611 [w83l771] = {
612 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
613 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
614 | LM90_HAVE_REMOTE_EXT,
615 .alert_alarms = 0x7c,
616 .max_convrate = 8,
617 },
618 [sa56004] = {
619 /*
620 * Apparent temperatures of 128 degrees C or higher are reported
621 * and treated as negative temperatures (meaning min_alarm will
622 * be set).
623 */
624 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT | LM90_HAVE_CRIT
625 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
626 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
627 .alert_alarms = 0x7b,
628 .max_convrate = 9,
629 .reg_local_ext = SA56004_REG_LOCAL_TEMPL,
630 .faultqueue_mask = BIT(0),
631 .faultqueue_depth = 3,
632 },
633 [tmp451] = {
634 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
635 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
636 | LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_ALARMS | LM90_HAVE_LOW
637 | LM90_HAVE_CONVRATE | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
638 .alert_alarms = 0x7c,
639 .max_convrate = 9,
640 .resolution = 12,
641 .reg_local_ext = TMP451_REG_LOCAL_TEMPL,
642 },
643 [tmp461] = {
644 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
645 | LM90_HAVE_BROKEN_ALERT | LM90_HAVE_EXTENDED_TEMP | LM90_HAVE_CRIT
646 | LM90_HAVE_ALARMS | LM90_HAVE_LOW | LM90_HAVE_CONVRATE
647 | LM90_HAVE_REMOTE_EXT | LM90_HAVE_FAULTQUEUE,
648 .alert_alarms = 0x7c,
649 .max_convrate = 9,
650 .resolution = 12,
651 .reg_local_ext = TMP451_REG_LOCAL_TEMPL,
652 },
653};
654
655/*
656 * temperature register index
657 */
658enum lm90_temp_reg_index {
659 LOCAL_LOW = 0,
660 LOCAL_HIGH,
661 LOCAL_CRIT,
662 REMOTE_CRIT,
663 LOCAL_EMERG, /* max6659 and max6695/96 */
664 REMOTE_EMERG, /* max6659 and max6695/96 */
665 REMOTE2_CRIT, /* max6695/96 only */
666 REMOTE2_EMERG, /* max6695/96 only */
667
668 REMOTE_TEMP,
669 REMOTE_LOW,
670 REMOTE_HIGH,
671 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
672 LOCAL_TEMP,
673 REMOTE2_TEMP, /* max6695/96 only */
674 REMOTE2_LOW, /* max6695/96 only */
675 REMOTE2_HIGH, /* max6695/96 only */
676 REMOTE2_OFFSET,
677
678 TEMP_REG_NUM
679};
680
681/*
682 * Client data (each client gets its own)
683 */
684
685struct lm90_data {
686 struct i2c_client *client;
687 struct device *hwmon_dev;
688 u32 chip_config[2];
689 u32 channel_config[MAX_CHANNELS + 1];
690 const char *channel_label[MAX_CHANNELS];
691 struct hwmon_channel_info chip_info;
692 struct hwmon_channel_info temp_info;
693 const struct hwmon_channel_info *info[3];
694 struct hwmon_chip_info chip;
695 struct mutex update_lock;
696 struct delayed_work alert_work;
697 struct work_struct report_work;
698 bool valid; /* true if register values are valid */
699 bool alarms_valid; /* true if status register values are valid */
700 unsigned long last_updated; /* in jiffies */
701 unsigned long alarms_updated; /* in jiffies */
702 int kind;
703 u32 flags;
704
705 unsigned int update_interval; /* in milliseconds */
706
707 u8 config; /* Current configuration register value */
708 u8 config_orig; /* Original configuration register value */
709 u8 convrate_orig; /* Original conversion rate register value */
710 u8 resolution; /* temperature resolution in bit */
711 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
712 /* Upper 8 bits for max6695/96 */
713 u8 max_convrate; /* Maximum conversion rate */
714 u8 reg_status2; /* 2nd status register (optional) */
715 u8 reg_local_ext; /* local extension register offset */
716 u8 reg_remote_ext; /* remote temperature low byte */
717 u8 faultqueue_mask; /* fault queue mask */
718 u8 faultqueue_depth; /* fault queue mask */
719
720 /* registers values */
721 u16 temp[TEMP_REG_NUM];
722 u8 temp_hyst;
723 u8 conalert;
724 u16 reported_alarms; /* alarms reported as sysfs/udev events */
725 u16 current_alarms; /* current alarms, reported by chip */
726 u16 alarms; /* alarms not yet reported to user */
727};
728
729/*
730 * Support functions
731 */
732
733/*
734 * If the chip supports PEC but not on write byte transactions, we need
735 * to explicitly ask for a transaction without PEC.
736 */
737static inline s32 lm90_write_no_pec(struct i2c_client *client, u8 value)
738{
739 return i2c_smbus_xfer(client->adapter, client->addr,
740 client->flags & ~I2C_CLIENT_PEC,
741 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
742}
743
744/*
745 * It is assumed that client->update_lock is held (unless we are in
746 * detection or initialization steps). This matters when PEC is enabled
747 * for chips with partial PEC support, because we don't want the address
748 * pointer to change between the write byte and the read byte transactions.
749 */
750static int lm90_read_reg(struct i2c_client *client, u8 reg)
751{
752 struct lm90_data *data = i2c_get_clientdata(client);
753 bool partial_pec = (client->flags & I2C_CLIENT_PEC) &&
754 (data->flags & LM90_HAVE_PARTIAL_PEC);
755 int err;
756
757 if (partial_pec) {
758 err = lm90_write_no_pec(client, reg);
759 if (err)
760 return err;
761 return i2c_smbus_read_byte(client);
762 }
763 return i2c_smbus_read_byte_data(client, reg);
764}
765
766/*
767 * Return register write address
768 *
769 * The write address for registers 0x03 .. 0x08 is the read address plus 6.
770 * For other registers the write address matches the read address.
771 */
772static u8 lm90_write_reg_addr(u8 reg)
773{
774 if (reg >= LM90_REG_CONFIG1 && reg <= LM90_REG_REMOTE_LOWH)
775 return reg + 6;
776 return reg;
777}
778
779/*
780 * Write into LM90 register.
781 * Convert register address to write address if needed, then execute the
782 * operation.
783 */
784static int lm90_write_reg(struct i2c_client *client, u8 reg, u8 val)
785{
786 return i2c_smbus_write_byte_data(client, lm90_write_reg_addr(reg), val);
787}
788
789/*
790 * Write into 16-bit LM90 register.
791 * Convert register addresses to write address if needed, then execute the
792 * operation.
793 */
794static int lm90_write16(struct i2c_client *client, u8 regh, u8 regl, u16 val)
795{
796 int ret;
797
798 ret = lm90_write_reg(client, regh, val >> 8);
799 if (ret < 0 || !regl)
800 return ret;
801 return lm90_write_reg(client, regl, val & 0xff);
802}
803
804static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl,
805 bool is_volatile)
806{
807 int oldh, newh, l;
808
809 oldh = lm90_read_reg(client, regh);
810 if (oldh < 0)
811 return oldh;
812
813 if (!regl)
814 return oldh << 8;
815
816 l = lm90_read_reg(client, regl);
817 if (l < 0)
818 return l;
819
820 if (!is_volatile)
821 return (oldh << 8) | l;
822
823 /*
824 * For volatile registers we have to use a trick.
825 * We have to read two registers to have the sensor temperature,
826 * but we have to beware a conversion could occur between the
827 * readings. The datasheet says we should either use
828 * the one-shot conversion register, which we don't want to do
829 * (disables hardware monitoring) or monitor the busy bit, which is
830 * impossible (we can't read the values and monitor that bit at the
831 * exact same time). So the solution used here is to read the high
832 * the high byte again. If the new high byte matches the old one,
833 * then we have a valid reading. Otherwise we have to read the low
834 * byte again, and now we believe we have a correct reading.
835 */
836 newh = lm90_read_reg(client, regh);
837 if (newh < 0)
838 return newh;
839 if (oldh != newh) {
840 l = lm90_read_reg(client, regl);
841 if (l < 0)
842 return l;
843 }
844 return (newh << 8) | l;
845}
846
847static int lm90_update_confreg(struct lm90_data *data, u8 config)
848{
849 if (data->config != config) {
850 int err;
851
852 err = lm90_write_reg(data->client, LM90_REG_CONFIG1, config);
853 if (err)
854 return err;
855 data->config = config;
856 }
857 return 0;
858}
859
860/*
861 * client->update_lock must be held when calling this function (unless we are
862 * in detection or initialization steps), and while a remote channel other
863 * than channel 0 is selected. Also, calling code must make sure to re-select
864 * external channel 0 before releasing the lock. This is necessary because
865 * various registers have different meanings as a result of selecting a
866 * non-default remote channel.
867 */
868static int lm90_select_remote_channel(struct lm90_data *data, bool second)
869{
870 u8 config = data->config & ~0x08;
871
872 if (second)
873 config |= 0x08;
874
875 return lm90_update_confreg(data, config);
876}
877
878static int lm90_write_convrate(struct lm90_data *data, int val)
879{
880 u8 config = data->config;
881 int err;
882
883 /* Save config and pause conversion */
884 if (data->flags & LM90_PAUSE_FOR_CONFIG) {
885 err = lm90_update_confreg(data, config | 0x40);
886 if (err < 0)
887 return err;
888 }
889
890 /* Set conv rate */
891 err = lm90_write_reg(data->client, LM90_REG_CONVRATE, val);
892
893 /* Revert change to config */
894 lm90_update_confreg(data, config);
895
896 return err;
897}
898
899/*
900 * Set conversion rate.
901 * client->update_lock must be held when calling this function (unless we are
902 * in detection or initialization steps).
903 */
904static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
905 unsigned int interval)
906{
907 unsigned int update_interval;
908 int i, err;
909
910 /* Shift calculations to avoid rounding errors */
911 interval <<= 6;
912
913 /* find the nearest update rate */
914 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
915 i < data->max_convrate; i++, update_interval >>= 1)
916 if (interval >= update_interval * 3 / 4)
917 break;
918
919 err = lm90_write_convrate(data, i);
920 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
921 return err;
922}
923
924static int lm90_set_faultqueue(struct i2c_client *client,
925 struct lm90_data *data, int val)
926{
927 int err;
928
929 if (data->faultqueue_mask) {
930 err = lm90_update_confreg(data, val <= data->faultqueue_depth / 2 ?
931 data->config & ~data->faultqueue_mask :
932 data->config | data->faultqueue_mask);
933 } else {
934 static const u8 values[4] = {0, 2, 6, 0x0e};
935
936 data->conalert = (data->conalert & 0xf1) | values[val - 1];
937 err = lm90_write_reg(data->client, TMP451_REG_CONALERT,
938 data->conalert);
939 }
940
941 return err;
942}
943
944static int lm90_update_limits(struct device *dev)
945{
946 struct lm90_data *data = dev_get_drvdata(dev);
947 struct i2c_client *client = data->client;
948 int val;
949
950 if (data->flags & LM90_HAVE_CRIT) {
951 val = lm90_read_reg(client, LM90_REG_LOCAL_CRIT);
952 if (val < 0)
953 return val;
954 data->temp[LOCAL_CRIT] = val << 8;
955
956 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
957 if (val < 0)
958 return val;
959 data->temp[REMOTE_CRIT] = val << 8;
960
961 val = lm90_read_reg(client, LM90_REG_TCRIT_HYST);
962 if (val < 0)
963 return val;
964 data->temp_hyst = val;
965 }
966 if ((data->flags & LM90_HAVE_FAULTQUEUE) && !data->faultqueue_mask) {
967 val = lm90_read_reg(client, TMP451_REG_CONALERT);
968 if (val < 0)
969 return val;
970 data->conalert = val;
971 }
972
973 val = lm90_read16(client, LM90_REG_REMOTE_LOWH,
974 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_LOWL : 0,
975 false);
976 if (val < 0)
977 return val;
978 data->temp[REMOTE_LOW] = val;
979
980 val = lm90_read16(client, LM90_REG_REMOTE_HIGHH,
981 (data->flags & LM90_HAVE_REM_LIMIT_EXT) ? LM90_REG_REMOTE_HIGHL : 0,
982 false);
983 if (val < 0)
984 return val;
985 data->temp[REMOTE_HIGH] = val;
986
987 if (data->flags & LM90_HAVE_OFFSET) {
988 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
989 LM90_REG_REMOTE_OFFSL, false);
990 if (val < 0)
991 return val;
992 data->temp[REMOTE_OFFSET] = val;
993 }
994
995 if (data->flags & LM90_HAVE_EMERGENCY) {
996 val = lm90_read_reg(client, MAX6659_REG_LOCAL_EMERG);
997 if (val < 0)
998 return val;
999 data->temp[LOCAL_EMERG] = val << 8;
1000
1001 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1002 if (val < 0)
1003 return val;
1004 data->temp[REMOTE_EMERG] = val << 8;
1005 }
1006
1007 if (data->flags & LM90_HAVE_TEMP3) {
1008 val = lm90_select_remote_channel(data, true);
1009 if (val < 0)
1010 return val;
1011
1012 val = lm90_read_reg(client, LM90_REG_REMOTE_CRIT);
1013 if (val < 0)
1014 return val;
1015 data->temp[REMOTE2_CRIT] = val << 8;
1016
1017 if (data->flags & LM90_HAVE_EMERGENCY) {
1018 val = lm90_read_reg(client, MAX6659_REG_REMOTE_EMERG);
1019 if (val < 0)
1020 return val;
1021 data->temp[REMOTE2_EMERG] = val << 8;
1022 }
1023
1024 val = lm90_read_reg(client, LM90_REG_REMOTE_LOWH);
1025 if (val < 0)
1026 return val;
1027 data->temp[REMOTE2_LOW] = val << 8;
1028
1029 val = lm90_read_reg(client, LM90_REG_REMOTE_HIGHH);
1030 if (val < 0)
1031 return val;
1032 data->temp[REMOTE2_HIGH] = val << 8;
1033
1034 if (data->flags & LM90_HAVE_OFFSET) {
1035 val = lm90_read16(client, LM90_REG_REMOTE_OFFSH,
1036 LM90_REG_REMOTE_OFFSL, false);
1037 if (val < 0)
1038 return val;
1039 data->temp[REMOTE2_OFFSET] = val;
1040 }
1041
1042 lm90_select_remote_channel(data, false);
1043 }
1044
1045 return 0;
1046}
1047
1048static void lm90_report_alarms(struct work_struct *work)
1049{
1050 struct lm90_data *data = container_of(work, struct lm90_data, report_work);
1051 u16 cleared_alarms, new_alarms, current_alarms;
1052 struct device *hwmon_dev = data->hwmon_dev;
1053 struct device *dev = &data->client->dev;
1054 int st, st2;
1055
1056 current_alarms = data->current_alarms;
1057 cleared_alarms = data->reported_alarms & ~current_alarms;
1058 new_alarms = current_alarms & ~data->reported_alarms;
1059
1060 if (!cleared_alarms && !new_alarms)
1061 return;
1062
1063 st = new_alarms & 0xff;
1064 st2 = new_alarms >> 8;
1065
1066 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1067 (st2 & MAX6696_STATUS2_LOT2))
1068 dev_dbg(dev, "temp%d out of range, please check!\n", 1);
1069 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1070 (st2 & MAX6696_STATUS2_ROT2))
1071 dev_dbg(dev, "temp%d out of range, please check!\n", 2);
1072 if (st & LM90_STATUS_ROPEN)
1073 dev_dbg(dev, "temp%d diode open, please check!\n", 2);
1074 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1075 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1076 dev_dbg(dev, "temp%d out of range, please check!\n", 3);
1077 if (st2 & MAX6696_STATUS2_R2OPEN)
1078 dev_dbg(dev, "temp%d diode open, please check!\n", 3);
1079
1080 st |= cleared_alarms & 0xff;
1081 st2 |= cleared_alarms >> 8;
1082
1083 if (st & LM90_STATUS_LLOW)
1084 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 0);
1085 if (st & LM90_STATUS_RLOW)
1086 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 1);
1087 if (st2 & MAX6696_STATUS2_R2LOW)
1088 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_min_alarm, 2);
1089
1090 if (st & LM90_STATUS_LHIGH)
1091 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 0);
1092 if (st & LM90_STATUS_RHIGH)
1093 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 1);
1094 if (st2 & MAX6696_STATUS2_R2HIGH)
1095 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_max_alarm, 2);
1096
1097 if (st & LM90_STATUS_LTHRM)
1098 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 0);
1099 if (st & LM90_STATUS_RTHRM)
1100 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 1);
1101 if (st2 & MAX6696_STATUS2_R2THRM)
1102 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_crit_alarm, 2);
1103
1104 if (st2 & MAX6696_STATUS2_LOT2)
1105 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 0);
1106 if (st2 & MAX6696_STATUS2_ROT2)
1107 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 1);
1108 if (st2 & MAX6696_STATUS2_R2OT2)
1109 hwmon_notify_event(hwmon_dev, hwmon_temp, hwmon_temp_emergency_alarm, 2);
1110
1111 data->reported_alarms = current_alarms;
1112}
1113
1114static int lm90_update_alarms_locked(struct lm90_data *data, bool force)
1115{
1116 if (force || !data->alarms_valid ||
1117 time_after(jiffies, data->alarms_updated + msecs_to_jiffies(data->update_interval))) {
1118 struct i2c_client *client = data->client;
1119 bool check_enable;
1120 u16 alarms;
1121 int val;
1122
1123 data->alarms_valid = false;
1124
1125 val = lm90_read_reg(client, LM90_REG_STATUS);
1126 if (val < 0)
1127 return val;
1128 alarms = val & ~LM90_STATUS_BUSY;
1129
1130 if (data->reg_status2) {
1131 val = lm90_read_reg(client, data->reg_status2);
1132 if (val < 0)
1133 return val;
1134 alarms |= val << 8;
1135 }
1136 /*
1137 * If the update is forced (called from interrupt or alert
1138 * handler) and alarm data is valid, the alarms may have been
1139 * updated after the last update interval, and the status
1140 * register may still be cleared. Only add additional alarms
1141 * in this case. Alarms will be cleared later if appropriate.
1142 */
1143 if (force && data->alarms_valid)
1144 data->current_alarms |= alarms;
1145 else
1146 data->current_alarms = alarms;
1147 data->alarms |= alarms;
1148
1149 check_enable = (client->irq || !(data->config_orig & 0x80)) &&
1150 (data->config & 0x80);
1151
1152 if (force || check_enable)
1153 schedule_work(&data->report_work);
1154
1155 /*
1156 * Re-enable ALERT# output if it was originally enabled, relevant
1157 * alarms are all clear, and alerts are currently disabled.
1158 * Otherwise (re)schedule worker if needed.
1159 */
1160 if (check_enable) {
1161 if (!(data->current_alarms & data->alert_alarms)) {
1162 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
1163 lm90_update_confreg(data, data->config & ~0x80);
1164 /*
1165 * We may have been called from the update handler.
1166 * If so, the worker, if scheduled, is no longer
1167 * needed. Cancel it. Don't synchronize because
1168 * it may already be running.
1169 */
1170 cancel_delayed_work(&data->alert_work);
1171 } else {
1172 schedule_delayed_work(&data->alert_work,
1173 max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
1174 }
1175 }
1176 data->alarms_updated = jiffies;
1177 data->alarms_valid = true;
1178 }
1179 return 0;
1180}
1181
1182static int lm90_update_alarms(struct lm90_data *data, bool force)
1183{
1184 int err;
1185
1186 mutex_lock(&data->update_lock);
1187 err = lm90_update_alarms_locked(data, force);
1188 mutex_unlock(&data->update_lock);
1189
1190 return err;
1191}
1192
1193static void lm90_alert_work(struct work_struct *__work)
1194{
1195 struct delayed_work *delayed_work = container_of(__work, struct delayed_work, work);
1196 struct lm90_data *data = container_of(delayed_work, struct lm90_data, alert_work);
1197
1198 /* Nothing to do if alerts are enabled */
1199 if (!(data->config & 0x80))
1200 return;
1201
1202 lm90_update_alarms(data, true);
1203}
1204
1205static int lm90_update_device(struct device *dev)
1206{
1207 struct lm90_data *data = dev_get_drvdata(dev);
1208 struct i2c_client *client = data->client;
1209 unsigned long next_update;
1210 int val;
1211
1212 if (!data->valid) {
1213 val = lm90_update_limits(dev);
1214 if (val < 0)
1215 return val;
1216 }
1217
1218 next_update = data->last_updated +
1219 msecs_to_jiffies(data->update_interval);
1220 if (time_after(jiffies, next_update) || !data->valid) {
1221 dev_dbg(&client->dev, "Updating lm90 data.\n");
1222
1223 data->valid = false;
1224
1225 val = lm90_read_reg(client, LM90_REG_LOCAL_LOW);
1226 if (val < 0)
1227 return val;
1228 data->temp[LOCAL_LOW] = val << 8;
1229
1230 val = lm90_read_reg(client, LM90_REG_LOCAL_HIGH);
1231 if (val < 0)
1232 return val;
1233 data->temp[LOCAL_HIGH] = val << 8;
1234
1235 val = lm90_read16(client, LM90_REG_LOCAL_TEMP,
1236 data->reg_local_ext, true);
1237 if (val < 0)
1238 return val;
1239 data->temp[LOCAL_TEMP] = val;
1240 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1241 data->reg_remote_ext, true);
1242 if (val < 0)
1243 return val;
1244 data->temp[REMOTE_TEMP] = val;
1245
1246 if (data->flags & LM90_HAVE_TEMP3) {
1247 val = lm90_select_remote_channel(data, true);
1248 if (val < 0)
1249 return val;
1250
1251 val = lm90_read16(client, LM90_REG_REMOTE_TEMPH,
1252 data->reg_remote_ext, true);
1253 if (val < 0) {
1254 lm90_select_remote_channel(data, false);
1255 return val;
1256 }
1257 data->temp[REMOTE2_TEMP] = val;
1258
1259 lm90_select_remote_channel(data, false);
1260 }
1261
1262 val = lm90_update_alarms_locked(data, false);
1263 if (val < 0)
1264 return val;
1265
1266 data->last_updated = jiffies;
1267 data->valid = true;
1268 }
1269
1270 return 0;
1271}
1272
1273static int lm90_temp_get_resolution(struct lm90_data *data, int index)
1274{
1275 switch (index) {
1276 case REMOTE_TEMP:
1277 if (data->reg_remote_ext)
1278 return data->resolution;
1279 return 8;
1280 case REMOTE_OFFSET:
1281 case REMOTE2_OFFSET:
1282 case REMOTE2_TEMP:
1283 return data->resolution;
1284 case LOCAL_TEMP:
1285 if (data->reg_local_ext)
1286 return data->resolution;
1287 return 8;
1288 case REMOTE_LOW:
1289 case REMOTE_HIGH:
1290 case REMOTE2_LOW:
1291 case REMOTE2_HIGH:
1292 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
1293 return data->resolution;
1294 return 8;
1295 default:
1296 return 8;
1297 }
1298}
1299
1300static int lm90_temp_from_reg(u32 flags, u16 regval, u8 resolution)
1301{
1302 int val;
1303
1304 if (flags & LM90_HAVE_EXTENDED_TEMP)
1305 val = regval - 0x4000;
1306 else if (flags & (LM90_HAVE_UNSIGNED_TEMP | LM90_HAVE_EXT_UNSIGNED))
1307 val = regval;
1308 else
1309 val = (s16)regval;
1310
1311 return ((val >> (16 - resolution)) * 1000) >> (resolution - 8);
1312}
1313
1314static int lm90_get_temp(struct lm90_data *data, int index, int channel)
1315{
1316 int temp = lm90_temp_from_reg(data->flags, data->temp[index],
1317 lm90_temp_get_resolution(data, index));
1318
1319 /* +16 degrees offset for remote temperature on LM99 */
1320 if (data->kind == lm99 && channel)
1321 temp += 16000;
1322
1323 return temp;
1324}
1325
1326static u16 lm90_temp_to_reg(u32 flags, long val, u8 resolution)
1327{
1328 int fraction = resolution > 8 ?
1329 1000 - DIV_ROUND_CLOSEST(1000, BIT(resolution - 8)) : 0;
1330
1331 if (flags & LM90_HAVE_EXTENDED_TEMP) {
1332 val = clamp_val(val, -64000, 191000 + fraction);
1333 val += 64000;
1334 } else if (flags & LM90_HAVE_EXT_UNSIGNED) {
1335 val = clamp_val(val, 0, 255000 + fraction);
1336 } else if (flags & LM90_HAVE_UNSIGNED_TEMP) {
1337 val = clamp_val(val, 0, 127000 + fraction);
1338 } else {
1339 val = clamp_val(val, -128000, 127000 + fraction);
1340 }
1341
1342 return DIV_ROUND_CLOSEST(val << (resolution - 8), 1000) << (16 - resolution);
1343}
1344
1345static int lm90_set_temp(struct lm90_data *data, int index, int channel, long val)
1346{
1347 static const u8 regs[] = {
1348 [LOCAL_LOW] = LM90_REG_LOCAL_LOW,
1349 [LOCAL_HIGH] = LM90_REG_LOCAL_HIGH,
1350 [LOCAL_CRIT] = LM90_REG_LOCAL_CRIT,
1351 [REMOTE_CRIT] = LM90_REG_REMOTE_CRIT,
1352 [LOCAL_EMERG] = MAX6659_REG_LOCAL_EMERG,
1353 [REMOTE_EMERG] = MAX6659_REG_REMOTE_EMERG,
1354 [REMOTE2_CRIT] = LM90_REG_REMOTE_CRIT,
1355 [REMOTE2_EMERG] = MAX6659_REG_REMOTE_EMERG,
1356 [REMOTE_LOW] = LM90_REG_REMOTE_LOWH,
1357 [REMOTE_HIGH] = LM90_REG_REMOTE_HIGHH,
1358 [REMOTE2_LOW] = LM90_REG_REMOTE_LOWH,
1359 [REMOTE2_HIGH] = LM90_REG_REMOTE_HIGHH,
1360 };
1361 struct i2c_client *client = data->client;
1362 u8 regh = regs[index];
1363 u8 regl = 0;
1364 int err;
1365
1366 if (channel && (data->flags & LM90_HAVE_REM_LIMIT_EXT)) {
1367 if (index == REMOTE_LOW || index == REMOTE2_LOW)
1368 regl = LM90_REG_REMOTE_LOWL;
1369 else if (index == REMOTE_HIGH || index == REMOTE2_HIGH)
1370 regl = LM90_REG_REMOTE_HIGHL;
1371 }
1372
1373 /* +16 degrees offset for remote temperature on LM99 */
1374 if (data->kind == lm99 && channel) {
1375 /* prevent integer underflow */
1376 val = max(val, -128000l);
1377 val -= 16000;
1378 }
1379
1380 data->temp[index] = lm90_temp_to_reg(data->flags, val,
1381 lm90_temp_get_resolution(data, index));
1382
1383 if (channel > 1)
1384 lm90_select_remote_channel(data, true);
1385
1386 err = lm90_write16(client, regh, regl, data->temp[index]);
1387
1388 if (channel > 1)
1389 lm90_select_remote_channel(data, false);
1390
1391 return err;
1392}
1393
1394static int lm90_get_temphyst(struct lm90_data *data, int index, int channel)
1395{
1396 int temp = lm90_get_temp(data, index, channel);
1397
1398 return temp - data->temp_hyst * 1000;
1399}
1400
1401static int lm90_set_temphyst(struct lm90_data *data, long val)
1402{
1403 int temp = lm90_get_temp(data, LOCAL_CRIT, 0);
1404
1405 /* prevent integer overflow/underflow */
1406 val = clamp_val(val, -128000l, 255000l);
1407 data->temp_hyst = clamp_val(DIV_ROUND_CLOSEST(temp - val, 1000), 0, 31);
1408
1409 return lm90_write_reg(data->client, LM90_REG_TCRIT_HYST, data->temp_hyst);
1410}
1411
1412static int lm90_get_temp_offset(struct lm90_data *data, int index)
1413{
1414 int res = lm90_temp_get_resolution(data, index);
1415
1416 return lm90_temp_from_reg(0, data->temp[index], res);
1417}
1418
1419static int lm90_set_temp_offset(struct lm90_data *data, int index, int channel, long val)
1420{
1421 int err;
1422
1423 val = lm90_temp_to_reg(0, val, lm90_temp_get_resolution(data, index));
1424
1425 /* For ADT7481 we can use the same registers for remote channel 1 and 2 */
1426 if (channel > 1)
1427 lm90_select_remote_channel(data, true);
1428
1429 err = lm90_write16(data->client, LM90_REG_REMOTE_OFFSH, LM90_REG_REMOTE_OFFSL, val);
1430
1431 if (channel > 1)
1432 lm90_select_remote_channel(data, false);
1433
1434 if (err)
1435 return err;
1436
1437 data->temp[index] = val;
1438
1439 return 0;
1440}
1441
1442static const u8 lm90_temp_index[MAX_CHANNELS] = {
1443 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
1444};
1445
1446static const u8 lm90_temp_min_index[MAX_CHANNELS] = {
1447 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
1448};
1449
1450static const u8 lm90_temp_max_index[MAX_CHANNELS] = {
1451 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
1452};
1453
1454static const u8 lm90_temp_crit_index[MAX_CHANNELS] = {
1455 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
1456};
1457
1458static const u8 lm90_temp_emerg_index[MAX_CHANNELS] = {
1459 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
1460};
1461
1462static const s8 lm90_temp_offset_index[MAX_CHANNELS] = {
1463 -1, REMOTE_OFFSET, REMOTE2_OFFSET
1464};
1465
1466static const u16 lm90_min_alarm_bits[MAX_CHANNELS] = { BIT(5), BIT(3), BIT(11) };
1467static const u16 lm90_max_alarm_bits[MAX_CHANNELS] = { BIT(6), BIT(4), BIT(12) };
1468static const u16 lm90_crit_alarm_bits[MAX_CHANNELS] = { BIT(0), BIT(1), BIT(9) };
1469static const u16 lm90_crit_alarm_bits_swapped[MAX_CHANNELS] = { BIT(1), BIT(0), BIT(9) };
1470static const u16 lm90_emergency_alarm_bits[MAX_CHANNELS] = { BIT(15), BIT(13), BIT(14) };
1471static const u16 lm90_fault_bits[MAX_CHANNELS] = { BIT(0), BIT(2), BIT(10) };
1472
1473static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1474{
1475 struct lm90_data *data = dev_get_drvdata(dev);
1476 int err;
1477 u16 bit;
1478
1479 mutex_lock(&data->update_lock);
1480 err = lm90_update_device(dev);
1481 mutex_unlock(&data->update_lock);
1482 if (err)
1483 return err;
1484
1485 switch (attr) {
1486 case hwmon_temp_input:
1487 *val = lm90_get_temp(data, lm90_temp_index[channel], channel);
1488 break;
1489 case hwmon_temp_min_alarm:
1490 case hwmon_temp_max_alarm:
1491 case hwmon_temp_crit_alarm:
1492 case hwmon_temp_emergency_alarm:
1493 case hwmon_temp_fault:
1494 switch (attr) {
1495 case hwmon_temp_min_alarm:
1496 bit = lm90_min_alarm_bits[channel];
1497 break;
1498 case hwmon_temp_max_alarm:
1499 bit = lm90_max_alarm_bits[channel];
1500 break;
1501 case hwmon_temp_crit_alarm:
1502 if (data->flags & LM90_HAVE_CRIT_ALRM_SWP)
1503 bit = lm90_crit_alarm_bits_swapped[channel];
1504 else
1505 bit = lm90_crit_alarm_bits[channel];
1506 break;
1507 case hwmon_temp_emergency_alarm:
1508 bit = lm90_emergency_alarm_bits[channel];
1509 break;
1510 case hwmon_temp_fault:
1511 bit = lm90_fault_bits[channel];
1512 break;
1513 }
1514 *val = !!(data->alarms & bit);
1515 data->alarms &= ~bit;
1516 data->alarms |= data->current_alarms;
1517 break;
1518 case hwmon_temp_min:
1519 *val = lm90_get_temp(data, lm90_temp_min_index[channel], channel);
1520 break;
1521 case hwmon_temp_max:
1522 *val = lm90_get_temp(data, lm90_temp_max_index[channel], channel);
1523 break;
1524 case hwmon_temp_crit:
1525 *val = lm90_get_temp(data, lm90_temp_crit_index[channel], channel);
1526 break;
1527 case hwmon_temp_crit_hyst:
1528 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel], channel);
1529 break;
1530 case hwmon_temp_emergency:
1531 *val = lm90_get_temp(data, lm90_temp_emerg_index[channel], channel);
1532 break;
1533 case hwmon_temp_emergency_hyst:
1534 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel], channel);
1535 break;
1536 case hwmon_temp_offset:
1537 *val = lm90_get_temp_offset(data, lm90_temp_offset_index[channel]);
1538 break;
1539 default:
1540 return -EOPNOTSUPP;
1541 }
1542 return 0;
1543}
1544
1545static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1546{
1547 struct lm90_data *data = dev_get_drvdata(dev);
1548 int err;
1549
1550 mutex_lock(&data->update_lock);
1551
1552 err = lm90_update_device(dev);
1553 if (err)
1554 goto error;
1555
1556 switch (attr) {
1557 case hwmon_temp_min:
1558 err = lm90_set_temp(data, lm90_temp_min_index[channel],
1559 channel, val);
1560 break;
1561 case hwmon_temp_max:
1562 err = lm90_set_temp(data, lm90_temp_max_index[channel],
1563 channel, val);
1564 break;
1565 case hwmon_temp_crit:
1566 err = lm90_set_temp(data, lm90_temp_crit_index[channel],
1567 channel, val);
1568 break;
1569 case hwmon_temp_crit_hyst:
1570 err = lm90_set_temphyst(data, val);
1571 break;
1572 case hwmon_temp_emergency:
1573 err = lm90_set_temp(data, lm90_temp_emerg_index[channel],
1574 channel, val);
1575 break;
1576 case hwmon_temp_offset:
1577 err = lm90_set_temp_offset(data, lm90_temp_offset_index[channel],
1578 channel, val);
1579 break;
1580 default:
1581 err = -EOPNOTSUPP;
1582 break;
1583 }
1584error:
1585 mutex_unlock(&data->update_lock);
1586
1587 return err;
1588}
1589
1590static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
1591{
1592 switch (attr) {
1593 case hwmon_temp_input:
1594 case hwmon_temp_min_alarm:
1595 case hwmon_temp_max_alarm:
1596 case hwmon_temp_crit_alarm:
1597 case hwmon_temp_emergency_alarm:
1598 case hwmon_temp_emergency_hyst:
1599 case hwmon_temp_fault:
1600 case hwmon_temp_label:
1601 return 0444;
1602 case hwmon_temp_min:
1603 case hwmon_temp_max:
1604 case hwmon_temp_crit:
1605 case hwmon_temp_emergency:
1606 case hwmon_temp_offset:
1607 return 0644;
1608 case hwmon_temp_crit_hyst:
1609 if (channel == 0)
1610 return 0644;
1611 return 0444;
1612 default:
1613 return 0;
1614 }
1615}
1616
1617static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
1618{
1619 struct lm90_data *data = dev_get_drvdata(dev);
1620 int err;
1621
1622 mutex_lock(&data->update_lock);
1623 err = lm90_update_device(dev);
1624 mutex_unlock(&data->update_lock);
1625 if (err)
1626 return err;
1627
1628 switch (attr) {
1629 case hwmon_chip_update_interval:
1630 *val = data->update_interval;
1631 break;
1632 case hwmon_chip_alarms:
1633 *val = data->alarms;
1634 break;
1635 case hwmon_chip_temp_samples:
1636 if (data->faultqueue_mask) {
1637 *val = (data->config & data->faultqueue_mask) ?
1638 data->faultqueue_depth : 1;
1639 } else {
1640 switch (data->conalert & 0x0e) {
1641 case 0x0:
1642 default:
1643 *val = 1;
1644 break;
1645 case 0x2:
1646 *val = 2;
1647 break;
1648 case 0x6:
1649 *val = 3;
1650 break;
1651 case 0xe:
1652 *val = 4;
1653 break;
1654 }
1655 }
1656 break;
1657 default:
1658 return -EOPNOTSUPP;
1659 }
1660
1661 return 0;
1662}
1663
1664static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1665{
1666 struct lm90_data *data = dev_get_drvdata(dev);
1667 struct i2c_client *client = data->client;
1668 int err;
1669
1670 mutex_lock(&data->update_lock);
1671
1672 err = lm90_update_device(dev);
1673 if (err)
1674 goto error;
1675
1676 switch (attr) {
1677 case hwmon_chip_update_interval:
1678 err = lm90_set_convrate(client, data,
1679 clamp_val(val, 0, 100000));
1680 break;
1681 case hwmon_chip_temp_samples:
1682 err = lm90_set_faultqueue(client, data, clamp_val(val, 1, 4));
1683 break;
1684 default:
1685 err = -EOPNOTSUPP;
1686 break;
1687 }
1688error:
1689 mutex_unlock(&data->update_lock);
1690
1691 return err;
1692}
1693
1694static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1695{
1696 switch (attr) {
1697 case hwmon_chip_update_interval:
1698 case hwmon_chip_temp_samples:
1699 return 0644;
1700 case hwmon_chip_alarms:
1701 return 0444;
1702 default:
1703 return 0;
1704 }
1705}
1706
1707static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1708 u32 attr, int channel, long *val)
1709{
1710 switch (type) {
1711 case hwmon_chip:
1712 return lm90_chip_read(dev, attr, channel, val);
1713 case hwmon_temp:
1714 return lm90_temp_read(dev, attr, channel, val);
1715 default:
1716 return -EOPNOTSUPP;
1717 }
1718}
1719
1720static int lm90_read_string(struct device *dev, enum hwmon_sensor_types type,
1721 u32 attr, int channel, const char **str)
1722{
1723 struct lm90_data *data = dev_get_drvdata(dev);
1724
1725 *str = data->channel_label[channel];
1726
1727 return 0;
1728}
1729
1730static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1731 u32 attr, int channel, long val)
1732{
1733 switch (type) {
1734 case hwmon_chip:
1735 return lm90_chip_write(dev, attr, channel, val);
1736 case hwmon_temp:
1737 return lm90_temp_write(dev, attr, channel, val);
1738 default:
1739 return -EOPNOTSUPP;
1740 }
1741}
1742
1743static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1744 u32 attr, int channel)
1745{
1746 switch (type) {
1747 case hwmon_chip:
1748 return lm90_chip_is_visible(data, attr, channel);
1749 case hwmon_temp:
1750 return lm90_temp_is_visible(data, attr, channel);
1751 default:
1752 return 0;
1753 }
1754}
1755
1756static const char *lm90_detect_lm84(struct i2c_client *client)
1757{
1758 static const u8 regs[] = {
1759 LM90_REG_STATUS, LM90_REG_LOCAL_TEMP, LM90_REG_LOCAL_HIGH,
1760 LM90_REG_REMOTE_TEMPH, LM90_REG_REMOTE_HIGHH
1761 };
1762 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1763 int reg1, reg2, reg3, reg4;
1764 bool nonzero = false;
1765 u8 ff = 0xff;
1766 int i;
1767
1768 if (status < 0 || (status & 0xab))
1769 return NULL;
1770
1771 /*
1772 * For LM84, undefined registers return the most recent value.
1773 * Repeat several times, each time checking against a different
1774 * (presumably) existing register.
1775 */
1776 for (i = 0; i < ARRAY_SIZE(regs); i++) {
1777 reg1 = i2c_smbus_read_byte_data(client, regs[i]);
1778 reg2 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL);
1779 reg3 = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1780 reg4 = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1781
1782 if (reg1 < 0)
1783 return NULL;
1784
1785 /* If any register has a different value, this is not an LM84 */
1786 if (reg2 != reg1 || reg3 != reg1 || reg4 != reg1)
1787 return NULL;
1788
1789 nonzero |= reg1 || reg2 || reg3 || reg4;
1790 ff &= reg1;
1791 }
1792 /*
1793 * If all registers always returned 0 or 0xff, all bets are off,
1794 * and we can not make any predictions about the chip type.
1795 */
1796 return nonzero && ff != 0xff ? "lm84" : NULL;
1797}
1798
1799static const char *lm90_detect_max1617(struct i2c_client *client, int config1)
1800{
1801 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1802 int llo, rlo, lhi, rhi;
1803
1804 if (status < 0 || (status & 0x03))
1805 return NULL;
1806
1807 if (config1 & 0x3f)
1808 return NULL;
1809
1810 /*
1811 * Fail if unsupported registers return anything but 0xff.
1812 * The calling code already checked man_id and chip_id.
1813 * A byte read operation repeats the most recent read operation
1814 * and should also return 0xff.
1815 */
1816 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) != 0xff ||
1817 i2c_smbus_read_byte_data(client, MAX6657_REG_LOCAL_TEMPL) != 0xff ||
1818 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWL) != 0xff ||
1819 i2c_smbus_read_byte(client) != 0xff)
1820 return NULL;
1821
1822 llo = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW);
1823 rlo = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH);
1824
1825 lhi = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
1826 rhi = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_HIGHH);
1827
1828 if (llo < 0 || rlo < 0)
1829 return NULL;
1830
1831 /*
1832 * A byte read operation repeats the most recent read and should
1833 * return the same value.
1834 */
1835 if (i2c_smbus_read_byte(client) != rhi)
1836 return NULL;
1837
1838 /*
1839 * The following two checks are marginal since the checked values
1840 * are strictly speaking valid.
1841 */
1842
1843 /* fail for negative high limits; this also catches read errors */
1844 if ((s8)lhi < 0 || (s8)rhi < 0)
1845 return NULL;
1846
1847 /* fail if low limits are larger than or equal to high limits */
1848 if ((s8)llo >= lhi || (s8)rlo >= rhi)
1849 return NULL;
1850
1851 if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA)) {
1852 /*
1853 * Word read operations return 0xff in second byte
1854 */
1855 if (i2c_smbus_read_word_data(client, LM90_REG_REMOTE_TEMPL) !=
1856 0xffff)
1857 return NULL;
1858 if (i2c_smbus_read_word_data(client, LM90_REG_CONFIG1) !=
1859 (config1 | 0xff00))
1860 return NULL;
1861 if (i2c_smbus_read_word_data(client, LM90_REG_LOCAL_HIGH) !=
1862 (lhi | 0xff00))
1863 return NULL;
1864 }
1865
1866 return "max1617";
1867}
1868
1869static const char *lm90_detect_national(struct i2c_client *client, int chip_id,
1870 int config1, int convrate)
1871{
1872 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
1873 int address = client->addr;
1874 const char *name = NULL;
1875
1876 if (config2 < 0)
1877 return NULL;
1878
1879 if ((config1 & 0x2a) || (config2 & 0xf8) || convrate > 0x09)
1880 return NULL;
1881
1882 if (address != 0x4c && address != 0x4d)
1883 return NULL;
1884
1885 switch (chip_id & 0xf0) {
1886 case 0x10: /* LM86 */
1887 if (address == 0x4c)
1888 name = "lm86";
1889 break;
1890 case 0x20: /* LM90 */
1891 if (address == 0x4c)
1892 name = "lm90";
1893 break;
1894 case 0x30: /* LM89/LM99 */
1895 name = "lm99"; /* detect LM89 as LM99 */
1896 break;
1897 default:
1898 break;
1899 }
1900
1901 return name;
1902}
1903
1904static const char *lm90_detect_on(struct i2c_client *client, int chip_id, int config1,
1905 int convrate)
1906{
1907 int address = client->addr;
1908 const char *name = NULL;
1909
1910 switch (chip_id) {
1911 case 0xca: /* NCT218 */
1912 if ((address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
1913 convrate <= 0x0a)
1914 name = "nct218";
1915 break;
1916 default:
1917 break;
1918 }
1919 return name;
1920}
1921
1922static const char *lm90_detect_analog(struct i2c_client *client, bool common_address,
1923 int chip_id, int config1, int convrate)
1924{
1925 int status = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
1926 int config2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CONFIG2);
1927 int man_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_MAN_ID);
1928 int chip_id2 = i2c_smbus_read_byte_data(client, ADT7481_REG_CHIP_ID);
1929 int address = client->addr;
1930 const char *name = NULL;
1931
1932 if (status < 0 || config2 < 0 || man_id2 < 0 || chip_id2 < 0)
1933 return NULL;
1934
1935 /*
1936 * The following chips should be detected by this function. Known
1937 * register values are listed. Registers 0x3d .. 0x3e are undocumented
1938 * for most of the chips, yet appear to return a well defined value.
1939 * Register 0xff is undocumented for some of the chips. Register 0x3f
1940 * is undocumented for all chips, but also returns a well defined value.
1941 * Values are as reported from real chips unless mentioned otherwise.
1942 * The code below checks values for registers 0x3d, 0x3e, and 0xff,
1943 * but not for register 0x3f.
1944 *
1945 * Chip Register
1946 * 3d 3e 3f fe ff Notes
1947 * ----------------------------------------------------------
1948 * adm1020 00 00 00 41 39
1949 * adm1021 00 00 00 41 03
1950 * adm1021a 00 00 00 41 3c
1951 * adm1023 00 00 00 41 3c same as adm1021a
1952 * adm1032 00 00 00 41 42
1953 *
1954 * adt7421 21 41 04 41 04
1955 * adt7461 00 00 00 41 51
1956 * adt7461a 61 41 05 41 57
1957 * adt7481 81 41 02 41 62
1958 * adt7482 - - - 41 65 datasheet
1959 * 82 41 05 41 75 real chip
1960 * adt7483 83 41 04 41 94
1961 *
1962 * nct72 61 41 07 41 55
1963 * nct210 00 00 00 41 3f
1964 * nct214 61 41 08 41 5a
1965 * nct1008 - - - 41 57 datasheet rev. 3
1966 * 61 41 06 41 54 real chip
1967 *
1968 * nvt210 - - - 41 - datasheet
1969 * nvt211 - - - 41 - datasheet
1970 */
1971 switch (chip_id) {
1972 case 0x00 ... 0x03: /* ADM1021 */
1973 case 0x05 ... 0x0f:
1974 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
1975 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
1976 name = "adm1021";
1977 break;
1978 case 0x04: /* ADT7421 (undocumented) */
1979 if (man_id2 == 0x41 && chip_id2 == 0x21 &&
1980 (address == 0x4c || address == 0x4d) &&
1981 (config1 & 0x0b) == 0x08 && convrate <= 0x0a)
1982 name = "adt7421";
1983 break;
1984 case 0x30 ... 0x38: /* ADM1021A, ADM1023 */
1985 case 0x3a ... 0x3e:
1986 /*
1987 * ADM1021A and compatible chips will be mis-detected as
1988 * ADM1023. Chips labeled 'ADM1021A' and 'ADM1023' were both
1989 * found to have a Chip ID of 0x3c.
1990 * ADM1021A does not officially support low byte registers
1991 * (0x12 .. 0x14), but a chip labeled ADM1021A does support it.
1992 * Official support for the temperature offset high byte
1993 * register (0x11) was added to revision F of the ADM1021A
1994 * datasheet.
1995 * It is currently unknown if there is a means to distinguish
1996 * ADM1021A from ADM1023, and/or if revisions of ADM1021A exist
1997 * which differ in functionality from ADM1023.
1998 */
1999 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2000 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2001 name = "adm1023";
2002 break;
2003 case 0x39: /* ADM1020 (undocumented) */
2004 if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2005 (address == 0x4c || address == 0x4d || address == 0x4e) &&
2006 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2007 name = "adm1020";
2008 break;
2009 case 0x3f: /* NCT210 */
2010 if (man_id2 == 0x00 && chip_id2 == 0x00 && common_address &&
2011 !(status & 0x03) && !(config1 & 0x3f) && !(convrate & 0xf8))
2012 name = "nct210";
2013 break;
2014 case 0x40 ... 0x4f: /* ADM1032 */
2015 if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2016 (address == 0x4c || address == 0x4d) && !(config1 & 0x3f) &&
2017 convrate <= 0x0a)
2018 name = "adm1032";
2019 break;
2020 case 0x51: /* ADT7461 */
2021 if (man_id2 == 0x00 && chip_id2 == 0x00 &&
2022 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2023 convrate <= 0x0a)
2024 name = "adt7461";
2025 break;
2026 case 0x54: /* NCT1008 */
2027 if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2028 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2029 convrate <= 0x0a)
2030 name = "nct1008";
2031 break;
2032 case 0x55: /* NCT72 */
2033 if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2034 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2035 convrate <= 0x0a)
2036 name = "nct72";
2037 break;
2038 case 0x57: /* ADT7461A, NCT1008 (datasheet rev. 3) */
2039 if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2040 (address == 0x4c || address == 0x4d) && !(config1 & 0x1b) &&
2041 convrate <= 0x0a)
2042 name = "adt7461a";
2043 break;
2044 case 0x5a: /* NCT214 */
2045 if (man_id2 == 0x41 && chip_id2 == 0x61 &&
2046 common_address && !(config1 & 0x1b) && convrate <= 0x0a)
2047 name = "nct214";
2048 break;
2049 case 0x62: /* ADT7481, undocumented */
2050 if (man_id2 == 0x41 && chip_id2 == 0x81 &&
2051 (address == 0x4b || address == 0x4c) && !(config1 & 0x10) &&
2052 !(config2 & 0x7f) && (convrate & 0x0f) <= 0x0b) {
2053 name = "adt7481";
2054 }
2055 break;
2056 case 0x65: /* ADT7482, datasheet */
2057 case 0x75: /* ADT7482, real chip */
2058 if (man_id2 == 0x41 && chip_id2 == 0x82 &&
2059 address == 0x4c && !(config1 & 0x10) && !(config2 & 0x7f) &&
2060 convrate <= 0x0a)
2061 name = "adt7482";
2062 break;
2063 case 0x94: /* ADT7483 */
2064 if (man_id2 == 0x41 && chip_id2 == 0x83 &&
2065 common_address &&
2066 ((address >= 0x18 && address <= 0x1a) ||
2067 (address >= 0x29 && address <= 0x2b) ||
2068 (address >= 0x4c && address <= 0x4e)) &&
2069 !(config1 & 0x10) && !(config2 & 0x7f) && convrate <= 0x0a)
2070 name = "adt7483a";
2071 break;
2072 default:
2073 break;
2074 }
2075
2076 return name;
2077}
2078
2079static const char *lm90_detect_maxim(struct i2c_client *client, bool common_address,
2080 int chip_id, int config1, int convrate)
2081{
2082 int man_id, emerg, emerg2, status2;
2083 int address = client->addr;
2084 const char *name = NULL;
2085
2086 switch (chip_id) {
2087 case 0x01:
2088 if (!common_address)
2089 break;
2090
2091 /*
2092 * We read MAX6659_REG_REMOTE_EMERG twice, and re-read
2093 * LM90_REG_MAN_ID in between. If MAX6659_REG_REMOTE_EMERG
2094 * exists, both readings will reflect the same value. Otherwise,
2095 * the readings will be different.
2096 */
2097 emerg = i2c_smbus_read_byte_data(client,
2098 MAX6659_REG_REMOTE_EMERG);
2099 man_id = i2c_smbus_read_byte_data(client,
2100 LM90_REG_MAN_ID);
2101 emerg2 = i2c_smbus_read_byte_data(client,
2102 MAX6659_REG_REMOTE_EMERG);
2103 status2 = i2c_smbus_read_byte_data(client,
2104 MAX6696_REG_STATUS2);
2105 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
2106 return NULL;
2107
2108 /*
2109 * Even though MAX6695 and MAX6696 do not have a chip ID
2110 * register, reading it returns 0x01. Bit 4 of the config1
2111 * register is unused and should return zero when read. Bit 0 of
2112 * the status2 register is unused and should return zero when
2113 * read.
2114 *
2115 * MAX6695 and MAX6696 have an additional set of temperature
2116 * limit registers. We can detect those chips by checking if
2117 * one of those registers exists.
2118 */
2119 if (!(config1 & 0x10) && !(status2 & 0x01) && emerg == emerg2 &&
2120 convrate <= 0x07)
2121 name = "max6696";
2122 /*
2123 * The chip_id register of the MAX6680 and MAX6681 holds the
2124 * revision of the chip. The lowest bit of the config1 register
2125 * is unused and should return zero when read, so should the
2126 * second to last bit of config1 (software reset). Register
2127 * address 0x12 (LM90_REG_REMOTE_OFFSL) exists for this chip and
2128 * should differ from emerg2, and emerg2 should match man_id
2129 * since it does not exist.
2130 */
2131 else if (!(config1 & 0x03) && convrate <= 0x07 &&
2132 emerg2 == man_id && emerg2 != status2)
2133 name = "max6680";
2134 /*
2135 * MAX1617A does not have any extended registers (register
2136 * address 0x10 or higher) except for manufacturer and
2137 * device ID registers. Unlike other chips of this series,
2138 * unsupported registers were observed to return a fixed value
2139 * of 0x01.
2140 * Note: Multiple chips with different markings labeled as
2141 * "MAX1617" (no "A") were observed to report manufacturer ID
2142 * 0x4d and device ID 0x01. It is unknown if other variants of
2143 * MAX1617/MAX617A with different behavior exist. The detection
2144 * code below works for those chips.
2145 */
2146 else if (!(config1 & 0x03f) && convrate <= 0x07 &&
2147 emerg == 0x01 && emerg2 == 0x01 && status2 == 0x01)
2148 name = "max1617";
2149 break;
2150 case 0x08:
2151 /*
2152 * The chip_id of the MAX6654 holds the revision of the chip.
2153 * The lowest 3 bits of the config1 register are unused and
2154 * should return zero when read.
2155 */
2156 if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2157 name = "max6654";
2158 break;
2159 case 0x09:
2160 /*
2161 * The chip_id of the MAX6690 holds the revision of the chip.
2162 * The lowest 3 bits of the config1 register are unused and
2163 * should return zero when read.
2164 * Note that MAX6654 and MAX6690 are practically the same chips.
2165 * The only diference is the rated accuracy. Rev. 1 of the
2166 * MAX6690 datasheet lists a chip ID of 0x08, and a chip labeled
2167 * MAX6654 was observed to have a chip ID of 0x09.
2168 */
2169 if (common_address && !(config1 & 0x07) && convrate <= 0x07)
2170 name = "max6690";
2171 break;
2172 case 0x4d:
2173 /*
2174 * MAX6642, MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
2175 * register. Reading from that address will return the last
2176 * read value, which in our case is those of the man_id
2177 * register, or 0x4d.
2178 * MAX6642 does not have a conversion rate register, nor low
2179 * limit registers. Reading from those registers returns the
2180 * last read value.
2181 *
2182 * For MAX6657, MAX6658 and MAX6659, the config1 register lacks
2183 * a low nibble, so the value will be those of the previous
2184 * read, so in our case again those of the man_id register.
2185 * MAX6659 has a third set of upper temperature limit registers.
2186 * Those registers also return values on MAX6657 and MAX6658,
2187 * thus the only way to detect MAX6659 is by its address.
2188 * For this reason it will be mis-detected as MAX6657 if its
2189 * address is 0x4c.
2190 */
2191 if (address >= 0x48 && address <= 0x4f && config1 == convrate &&
2192 !(config1 & 0x0f)) {
2193 int regval;
2194
2195 /*
2196 * We know that this is not a MAX6657/58/59 because its
2197 * configuration register has the wrong value and it does
2198 * not appear to have a conversion rate register.
2199 */
2200
2201 /* re-read manufacturer ID to have a good baseline */
2202 if (i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID) != 0x4d)
2203 break;
2204
2205 /* check various non-existing registers */
2206 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != 0x4d ||
2207 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != 0x4d ||
2208 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != 0x4d)
2209 break;
2210
2211 /* check for unused status register bits */
2212 regval = i2c_smbus_read_byte_data(client, LM90_REG_STATUS);
2213 if (regval < 0 || (regval & 0x2b))
2214 break;
2215
2216 /* re-check unsupported registers */
2217 if (i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE) != regval ||
2218 i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_LOW) != regval ||
2219 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_LOWH) != regval)
2220 break;
2221
2222 name = "max6642";
2223 } else if ((address == 0x4c || address == 0x4d || address == 0x4e) &&
2224 (config1 & 0x1f) == 0x0d && convrate <= 0x09) {
2225 if (address == 0x4c)
2226 name = "max6657";
2227 else
2228 name = "max6659";
2229 }
2230 break;
2231 case 0x59:
2232 /*
2233 * The chip_id register of the MAX6646/6647/6649 holds the
2234 * revision of the chip. The lowest 6 bits of the config1
2235 * register are unused and should return zero when read.
2236 * The I2C address of MAX6648/6692 is fixed at 0x4c.
2237 * MAX6646 is at address 0x4d, MAX6647 is at address 0x4e,
2238 * and MAX6649 is at address 0x4c. A slight difference between
2239 * the two sets of chips is that the remote temperature register
2240 * reports different values if the DXP pin is open or shorted.
2241 * We can use that information to help distinguish between the
2242 * chips. MAX6648 will be mis-detected as MAX6649 if the remote
2243 * diode is connected, but there isn't really anything we can
2244 * do about that.
2245 */
2246 if (!(config1 & 0x3f) && convrate <= 0x07) {
2247 int temp;
2248
2249 switch (address) {
2250 case 0x4c:
2251 /*
2252 * MAX6649 reports an external temperature
2253 * value of 0xff if DXP is open or shorted.
2254 * MAX6648 reports 0x80 in that case.
2255 */
2256 temp = i2c_smbus_read_byte_data(client,
2257 LM90_REG_REMOTE_TEMPH);
2258 if (temp == 0x80)
2259 name = "max6648";
2260 else
2261 name = "max6649";
2262 break;
2263 case 0x4d:
2264 name = "max6646";
2265 break;
2266 case 0x4e:
2267 name = "max6647";
2268 break;
2269 default:
2270 break;
2271 }
2272 }
2273 break;
2274 default:
2275 break;
2276 }
2277
2278 return name;
2279}
2280
2281static const char *lm90_detect_nuvoton(struct i2c_client *client, int chip_id,
2282 int config1, int convrate)
2283{
2284 int config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2285 int address = client->addr;
2286 const char *name = NULL;
2287
2288 if (config2 < 0)
2289 return NULL;
2290
2291 if (address == 0x4c && !(config1 & 0x2a) && !(config2 & 0xf8)) {
2292 if (chip_id == 0x01 && convrate <= 0x09) {
2293 /* W83L771W/G */
2294 name = "w83l771";
2295 } else if ((chip_id & 0xfe) == 0x10 && convrate <= 0x08) {
2296 /* W83L771AWG/ASG */
2297 name = "w83l771";
2298 }
2299 }
2300 return name;
2301}
2302
2303static const char *lm90_detect_nxp(struct i2c_client *client, bool common_address,
2304 int chip_id, int config1, int convrate)
2305{
2306 int address = client->addr;
2307 const char *name = NULL;
2308 int config2;
2309
2310 switch (chip_id) {
2311 case 0x00:
2312 config2 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG2);
2313 if (config2 < 0)
2314 return NULL;
2315 if (address >= 0x48 && address <= 0x4f &&
2316 !(config1 & 0x2a) && !(config2 & 0xfe) && convrate <= 0x09)
2317 name = "sa56004";
2318 break;
2319 case 0x80:
2320 if (common_address && !(config1 & 0x3f) && convrate <= 0x07)
2321 name = "ne1618";
2322 break;
2323 default:
2324 break;
2325 }
2326 return name;
2327}
2328
2329static const char *lm90_detect_gmt(struct i2c_client *client, int chip_id,
2330 int config1, int convrate)
2331{
2332 int address = client->addr;
2333
2334 /*
2335 * According to the datasheet, G781 is supposed to be at I2C Address
2336 * 0x4c and have a chip ID of 0x01. G781-1 is supposed to be at I2C
2337 * address 0x4d and have a chip ID of 0x03. However, when support
2338 * for G781 was added, chips at 0x4c and 0x4d were found to have a
2339 * chip ID of 0x01. A G781-1 at I2C address 0x4d was now found with
2340 * chip ID 0x03.
2341 * To avoid detection failures, accept chip ID 0x01 and 0x03 at both
2342 * addresses.
2343 * G784 reports manufacturer ID 0x47 and chip ID 0x01. A public
2344 * datasheet is not available. Extensive testing suggests that
2345 * the chip appears to be fully compatible with G781.
2346 * Available register dumps show that G751 also reports manufacturer
2347 * ID 0x47 and chip ID 0x01 even though that chip does not officially
2348 * support those registers. This makes chip detection somewhat
2349 * vulnerable. To improve detection quality, read the offset low byte
2350 * and alert fault queue registers and verify that only expected bits
2351 * are set.
2352 */
2353 if ((chip_id == 0x01 || chip_id == 0x03) &&
2354 (address == 0x4c || address == 0x4d) &&
2355 !(config1 & 0x3f) && convrate <= 0x08) {
2356 int reg;
2357
2358 reg = i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_OFFSL);
2359 if (reg < 0 || reg & 0x1f)
2360 return NULL;
2361 reg = i2c_smbus_read_byte_data(client, TMP451_REG_CONALERT);
2362 if (reg < 0 || reg & 0xf1)
2363 return NULL;
2364
2365 return "g781";
2366 }
2367
2368 return NULL;
2369}
2370
2371static const char *lm90_detect_ti49(struct i2c_client *client, bool common_address,
2372 int chip_id, int config1, int convrate)
2373{
2374 if (common_address && chip_id == 0x00 && !(config1 & 0x3f) && !(convrate & 0xf8)) {
2375 /* THMC10: Unsupported registers return 0xff */
2376 if (i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_TEMPL) == 0xff &&
2377 i2c_smbus_read_byte_data(client, LM90_REG_REMOTE_CRIT) == 0xff)
2378 return "thmc10";
2379 }
2380 return NULL;
2381}
2382
2383static const char *lm90_detect_ti(struct i2c_client *client, int chip_id,
2384 int config1, int convrate)
2385{
2386 int address = client->addr;
2387 const char *name = NULL;
2388
2389 if (chip_id == 0x00 && !(config1 & 0x1b) && convrate <= 0x09) {
2390 int local_ext, conalert, chen, dfc;
2391
2392 local_ext = i2c_smbus_read_byte_data(client,
2393 TMP451_REG_LOCAL_TEMPL);
2394 conalert = i2c_smbus_read_byte_data(client,
2395 TMP451_REG_CONALERT);
2396 chen = i2c_smbus_read_byte_data(client, TMP461_REG_CHEN);
2397 dfc = i2c_smbus_read_byte_data(client, TMP461_REG_DFC);
2398
2399 if (!(local_ext & 0x0f) && (conalert & 0xf1) == 0x01 &&
2400 (chen & 0xfc) == 0x00 && (dfc & 0xfc) == 0x00) {
2401 if (address == 0x4c && !(chen & 0x03))
2402 name = "tmp451";
2403 else if (address >= 0x48 && address <= 0x4f)
2404 name = "tmp461";
2405 }
2406 }
2407
2408 return name;
2409}
2410
2411/* Return 0 if detection is successful, -ENODEV otherwise */
2412static int lm90_detect(struct i2c_client *client, struct i2c_board_info *info)
2413{
2414 struct i2c_adapter *adapter = client->adapter;
2415 int man_id, chip_id, config1, convrate, lhigh;
2416 const char *name = NULL;
2417 int address = client->addr;
2418 bool common_address =
2419 (address >= 0x18 && address <= 0x1a) ||
2420 (address >= 0x29 && address <= 0x2b) ||
2421 (address >= 0x4c && address <= 0x4e);
2422
2423 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
2424 return -ENODEV;
2425
2426 /*
2427 * Get well defined register value for chips with neither man_id nor
2428 * chip_id registers.
2429 */
2430 lhigh = i2c_smbus_read_byte_data(client, LM90_REG_LOCAL_HIGH);
2431
2432 /* detection and identification */
2433 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2434 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2435 config1 = i2c_smbus_read_byte_data(client, LM90_REG_CONFIG1);
2436 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2437 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0 || lhigh < 0)
2438 return -ENODEV;
2439
2440 /* Bail out immediately if all register report the same value */
2441 if (lhigh == man_id && lhigh == chip_id && lhigh == config1 && lhigh == convrate)
2442 return -ENODEV;
2443
2444 /*
2445 * If reading man_id and chip_id both return the same value as lhigh,
2446 * the chip may not support those registers and return the most recent read
2447 * value. Check again with a different register and handle accordingly.
2448 */
2449 if (man_id == lhigh && chip_id == lhigh) {
2450 convrate = i2c_smbus_read_byte_data(client, LM90_REG_CONVRATE);
2451 man_id = i2c_smbus_read_byte_data(client, LM90_REG_MAN_ID);
2452 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_CHIP_ID);
2453 if (convrate < 0 || man_id < 0 || chip_id < 0)
2454 return -ENODEV;
2455 if (man_id == convrate && chip_id == convrate)
2456 man_id = -1;
2457 }
2458 switch (man_id) {
2459 case -1: /* Chip does not support man_id / chip_id */
2460 if (common_address && !convrate && !(config1 & 0x7f))
2461 name = lm90_detect_lm84(client);
2462 break;
2463 case 0x01: /* National Semiconductor */
2464 name = lm90_detect_national(client, chip_id, config1, convrate);
2465 break;
2466 case 0x1a: /* ON */
2467 name = lm90_detect_on(client, chip_id, config1, convrate);
2468 break;
2469 case 0x23: /* Genesys Logic */
2470 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2471 name = "gl523sm";
2472 break;
2473 case 0x41: /* Analog Devices */
2474 name = lm90_detect_analog(client, common_address, chip_id, config1,
2475 convrate);
2476 break;
2477 case 0x47: /* GMT */
2478 name = lm90_detect_gmt(client, chip_id, config1, convrate);
2479 break;
2480 case 0x49: /* TI */
2481 name = lm90_detect_ti49(client, common_address, chip_id, config1, convrate);
2482 break;
2483 case 0x4d: /* Maxim Integrated */
2484 name = lm90_detect_maxim(client, common_address, chip_id,
2485 config1, convrate);
2486 break;
2487 case 0x54: /* ON MC1066, Microchip TC1068, TCM1617 (originally TelCom) */
2488 if (common_address && !(config1 & 0x3f) && !(convrate & 0xf8))
2489 name = "mc1066";
2490 break;
2491 case 0x55: /* TI */
2492 name = lm90_detect_ti(client, chip_id, config1, convrate);
2493 break;
2494 case 0x5c: /* Winbond/Nuvoton */
2495 name = lm90_detect_nuvoton(client, chip_id, config1, convrate);
2496 break;
2497 case 0xa1: /* NXP Semiconductor/Philips */
2498 name = lm90_detect_nxp(client, common_address, chip_id, config1, convrate);
2499 break;
2500 case 0xff: /* MAX1617, G767, NE1617 */
2501 if (common_address && chip_id == 0xff && convrate < 8)
2502 name = lm90_detect_max1617(client, config1);
2503 break;
2504 default:
2505 break;
2506 }
2507
2508 if (!name) { /* identification failed */
2509 dev_dbg(&adapter->dev,
2510 "Unsupported chip at 0x%02x (man_id=0x%02X, chip_id=0x%02X)\n",
2511 client->addr, man_id, chip_id);
2512 return -ENODEV;
2513 }
2514
2515 strscpy(info->type, name, I2C_NAME_SIZE);
2516
2517 return 0;
2518}
2519
2520static void lm90_restore_conf(void *_data)
2521{
2522 struct lm90_data *data = _data;
2523 struct i2c_client *client = data->client;
2524
2525 cancel_delayed_work_sync(&data->alert_work);
2526 cancel_work_sync(&data->report_work);
2527
2528 /* Restore initial configuration */
2529 if (data->flags & LM90_HAVE_CONVRATE)
2530 lm90_write_convrate(data, data->convrate_orig);
2531 lm90_write_reg(client, LM90_REG_CONFIG1, data->config_orig);
2532}
2533
2534static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
2535{
2536 struct device_node *np = client->dev.of_node;
2537 int config, convrate;
2538
2539 if (data->flags & LM90_HAVE_CONVRATE) {
2540 convrate = lm90_read_reg(client, LM90_REG_CONVRATE);
2541 if (convrate < 0)
2542 return convrate;
2543 data->convrate_orig = convrate;
2544 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
2545 } else {
2546 data->update_interval = 500;
2547 }
2548
2549 /*
2550 * Start the conversions.
2551 */
2552 config = lm90_read_reg(client, LM90_REG_CONFIG1);
2553 if (config < 0)
2554 return config;
2555 data->config_orig = config;
2556 data->config = config;
2557
2558 /* Check Temperature Range Select */
2559 if (data->flags & LM90_HAVE_EXTENDED_TEMP) {
2560 if (of_property_read_bool(np, "ti,extended-range-enable"))
2561 config |= 0x04;
2562 if (!(config & 0x04))
2563 data->flags &= ~LM90_HAVE_EXTENDED_TEMP;
2564 }
2565
2566 /*
2567 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
2568 * 0.125 degree resolution) and range (0x08, extend range
2569 * to -64 degree) mode for the remote temperature sensor.
2570 * Note that expeciments with an actual chip do not show a difference
2571 * if bit 3 is set or not.
2572 */
2573 if (data->kind == max6680)
2574 config |= 0x18;
2575
2576 /*
2577 * Put MAX6654 into extended range (0x20, extend minimum range from
2578 * 0 degrees to -64 degrees). Note that extended resolution is not
2579 * possible on the MAX6654 unless conversion rate is set to 1 Hz or
2580 * slower, which is intentionally not done by default.
2581 */
2582 if (data->kind == max6654)
2583 config |= 0x20;
2584
2585 /*
2586 * Select external channel 0 for devices with three sensors
2587 */
2588 if (data->flags & LM90_HAVE_TEMP3)
2589 config &= ~0x08;
2590
2591 /*
2592 * Interrupt is enabled by default on reset, but it may be disabled
2593 * by bootloader, unmask it.
2594 */
2595 if (client->irq)
2596 config &= ~0x80;
2597
2598 config &= 0xBF; /* run */
2599 lm90_update_confreg(data, config);
2600
2601 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
2602}
2603
2604static bool lm90_is_tripped(struct i2c_client *client)
2605{
2606 struct lm90_data *data = i2c_get_clientdata(client);
2607 int ret;
2608
2609 ret = lm90_update_alarms(data, true);
2610 if (ret < 0)
2611 return false;
2612
2613 return !!data->current_alarms;
2614}
2615
2616static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
2617{
2618 struct i2c_client *client = dev_id;
2619
2620 if (lm90_is_tripped(client))
2621 return IRQ_HANDLED;
2622 else
2623 return IRQ_NONE;
2624}
2625
2626static int lm90_probe_channel_from_dt(struct i2c_client *client,
2627 struct device_node *child,
2628 struct lm90_data *data)
2629{
2630 u32 id;
2631 s32 val;
2632 int err;
2633 struct device *dev = &client->dev;
2634
2635 err = of_property_read_u32(child, "reg", &id);
2636 if (err) {
2637 dev_err(dev, "missing reg property of %pOFn\n", child);
2638 return err;
2639 }
2640
2641 if (id >= MAX_CHANNELS) {
2642 dev_err(dev, "invalid reg property value %d in %pOFn\n", id, child);
2643 return -EINVAL;
2644 }
2645
2646 err = of_property_read_string(child, "label", &data->channel_label[id]);
2647 if (err == -ENODATA || err == -EILSEQ) {
2648 dev_err(dev, "invalid label property in %pOFn\n", child);
2649 return err;
2650 }
2651
2652 if (data->channel_label[id])
2653 data->channel_config[id] |= HWMON_T_LABEL;
2654
2655 err = of_property_read_s32(child, "temperature-offset-millicelsius", &val);
2656 if (!err) {
2657 if (id == 0) {
2658 dev_err(dev, "temperature-offset-millicelsius can't be set for internal channel\n");
2659 return -EINVAL;
2660 }
2661
2662 err = lm90_set_temp_offset(data, lm90_temp_offset_index[id], id, val);
2663 if (err) {
2664 dev_err(dev, "can't set temperature offset %d for channel %d (%d)\n",
2665 val, id, err);
2666 return err;
2667 }
2668 }
2669
2670 return 0;
2671}
2672
2673static int lm90_parse_dt_channel_info(struct i2c_client *client,
2674 struct lm90_data *data)
2675{
2676 int err;
2677 struct device *dev = &client->dev;
2678 const struct device_node *np = dev->of_node;
2679
2680 for_each_child_of_node_scoped(np, child) {
2681 if (strcmp(child->name, "channel"))
2682 continue;
2683
2684 err = lm90_probe_channel_from_dt(client, child, data);
2685 if (err)
2686 return err;
2687 }
2688
2689 return 0;
2690}
2691
2692static const struct hwmon_ops lm90_ops = {
2693 .is_visible = lm90_is_visible,
2694 .read = lm90_read,
2695 .read_string = lm90_read_string,
2696 .write = lm90_write,
2697};
2698
2699static int lm90_probe(struct i2c_client *client)
2700{
2701 struct device *dev = &client->dev;
2702 struct i2c_adapter *adapter = client->adapter;
2703 struct hwmon_channel_info *info;
2704 struct device *hwmon_dev;
2705 struct lm90_data *data;
2706 int err;
2707
2708 err = devm_regulator_get_enable(dev, "vcc");
2709 if (err)
2710 return dev_err_probe(dev, err, "Failed to enable regulator\n");
2711
2712 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
2713 if (!data)
2714 return -ENOMEM;
2715
2716 data->client = client;
2717 i2c_set_clientdata(client, data);
2718 mutex_init(&data->update_lock);
2719 INIT_DELAYED_WORK(&data->alert_work, lm90_alert_work);
2720 INIT_WORK(&data->report_work, lm90_report_alarms);
2721
2722 /* Set the device type */
2723 data->kind = (uintptr_t)i2c_get_match_data(client);
2724
2725 /*
2726 * Different devices have different alarm bits triggering the
2727 * ALERT# output
2728 */
2729 data->alert_alarms = lm90_params[data->kind].alert_alarms;
2730 data->resolution = lm90_params[data->kind].resolution ? : 11;
2731
2732 /* Set chip capabilities */
2733 data->flags = lm90_params[data->kind].flags;
2734
2735 if ((data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC)) &&
2736 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_PEC))
2737 data->flags &= ~(LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC);
2738
2739 if ((data->flags & LM90_HAVE_PARTIAL_PEC) &&
2740 !i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
2741 data->flags &= ~LM90_HAVE_PARTIAL_PEC;
2742
2743 data->chip.ops = &lm90_ops;
2744 data->chip.info = data->info;
2745
2746 data->info[0] = &data->chip_info;
2747 info = &data->chip_info;
2748 info->type = hwmon_chip;
2749 info->config = data->chip_config;
2750
2751 data->chip_config[0] = HWMON_C_REGISTER_TZ;
2752 if (data->flags & LM90_HAVE_ALARMS)
2753 data->chip_config[0] |= HWMON_C_ALARMS;
2754 if (data->flags & LM90_HAVE_CONVRATE)
2755 data->chip_config[0] |= HWMON_C_UPDATE_INTERVAL;
2756 if (data->flags & LM90_HAVE_FAULTQUEUE)
2757 data->chip_config[0] |= HWMON_C_TEMP_SAMPLES;
2758 if (data->flags & (LM90_HAVE_PEC | LM90_HAVE_PARTIAL_PEC))
2759 data->chip_config[0] |= HWMON_C_PEC;
2760 data->info[1] = &data->temp_info;
2761
2762 info = &data->temp_info;
2763 info->type = hwmon_temp;
2764 info->config = data->channel_config;
2765
2766 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MAX |
2767 HWMON_T_MAX_ALARM;
2768 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MAX |
2769 HWMON_T_MAX_ALARM | HWMON_T_FAULT;
2770
2771 if (data->flags & LM90_HAVE_LOW) {
2772 data->channel_config[0] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2773 data->channel_config[1] |= HWMON_T_MIN | HWMON_T_MIN_ALARM;
2774 }
2775
2776 if (data->flags & LM90_HAVE_CRIT) {
2777 data->channel_config[0] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2778 data->channel_config[1] |= HWMON_T_CRIT | HWMON_T_CRIT_ALARM | HWMON_T_CRIT_HYST;
2779 }
2780
2781 if (data->flags & LM90_HAVE_OFFSET)
2782 data->channel_config[1] |= HWMON_T_OFFSET;
2783
2784 if (data->flags & LM90_HAVE_EMERGENCY) {
2785 data->channel_config[0] |= HWMON_T_EMERGENCY |
2786 HWMON_T_EMERGENCY_HYST;
2787 data->channel_config[1] |= HWMON_T_EMERGENCY |
2788 HWMON_T_EMERGENCY_HYST;
2789 }
2790
2791 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
2792 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
2793 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
2794 }
2795
2796 if (data->flags & LM90_HAVE_TEMP3) {
2797 data->channel_config[2] = HWMON_T_INPUT |
2798 HWMON_T_MIN | HWMON_T_MAX |
2799 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
2800 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
2801 HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
2802 if (data->flags & LM90_HAVE_EMERGENCY) {
2803 data->channel_config[2] |= HWMON_T_EMERGENCY |
2804 HWMON_T_EMERGENCY_HYST;
2805 }
2806 if (data->flags & LM90_HAVE_EMERGENCY_ALARM)
2807 data->channel_config[2] |= HWMON_T_EMERGENCY_ALARM;
2808 if (data->flags & LM90_HAVE_OFFSET)
2809 data->channel_config[2] |= HWMON_T_OFFSET;
2810 }
2811
2812 data->faultqueue_mask = lm90_params[data->kind].faultqueue_mask;
2813 data->faultqueue_depth = lm90_params[data->kind].faultqueue_depth;
2814 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
2815 if (data->flags & LM90_HAVE_REMOTE_EXT)
2816 data->reg_remote_ext = LM90_REG_REMOTE_TEMPL;
2817 data->reg_status2 = lm90_params[data->kind].reg_status2;
2818
2819 /* Set maximum conversion rate */
2820 data->max_convrate = lm90_params[data->kind].max_convrate;
2821
2822 /* Parse device-tree channel information */
2823 if (client->dev.of_node) {
2824 err = lm90_parse_dt_channel_info(client, data);
2825 if (err)
2826 return err;
2827 }
2828
2829 /* Initialize the LM90 chip */
2830 err = lm90_init_client(client, data);
2831 if (err < 0) {
2832 dev_err(dev, "Failed to initialize device\n");
2833 return err;
2834 }
2835
2836 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
2837 data, &data->chip,
2838 NULL);
2839 if (IS_ERR(hwmon_dev))
2840 return PTR_ERR(hwmon_dev);
2841
2842 data->hwmon_dev = hwmon_dev;
2843
2844 if (client->irq) {
2845 dev_dbg(dev, "IRQ: %d\n", client->irq);
2846 err = devm_request_threaded_irq(dev, client->irq,
2847 NULL, lm90_irq_thread,
2848 IRQF_ONESHOT, "lm90", client);
2849 if (err < 0) {
2850 dev_err(dev, "cannot request IRQ %d\n", client->irq);
2851 return err;
2852 }
2853 }
2854
2855 return 0;
2856}
2857
2858static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
2859 unsigned int flag)
2860{
2861 if (type != I2C_PROTOCOL_SMBUS_ALERT)
2862 return;
2863
2864 if (lm90_is_tripped(client)) {
2865 /*
2866 * Disable ALERT# output, because these chips don't implement
2867 * SMBus alert correctly; they should only hold the alert line
2868 * low briefly.
2869 */
2870 struct lm90_data *data = i2c_get_clientdata(client);
2871
2872 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
2873 (data->current_alarms & data->alert_alarms)) {
2874 if (!(data->config & 0x80)) {
2875 dev_dbg(&client->dev, "Disabling ALERT#\n");
2876 lm90_update_confreg(data, data->config | 0x80);
2877 }
2878 schedule_delayed_work(&data->alert_work,
2879 max_t(int, HZ, msecs_to_jiffies(data->update_interval)));
2880 }
2881 } else {
2882 dev_dbg(&client->dev, "Everything OK\n");
2883 }
2884}
2885
2886static int lm90_suspend(struct device *dev)
2887{
2888 struct lm90_data *data = dev_get_drvdata(dev);
2889 struct i2c_client *client = data->client;
2890
2891 if (client->irq)
2892 disable_irq(client->irq);
2893
2894 return 0;
2895}
2896
2897static int lm90_resume(struct device *dev)
2898{
2899 struct lm90_data *data = dev_get_drvdata(dev);
2900 struct i2c_client *client = data->client;
2901
2902 if (client->irq)
2903 enable_irq(client->irq);
2904
2905 return 0;
2906}
2907
2908static DEFINE_SIMPLE_DEV_PM_OPS(lm90_pm_ops, lm90_suspend, lm90_resume);
2909
2910static struct i2c_driver lm90_driver = {
2911 .class = I2C_CLASS_HWMON,
2912 .driver = {
2913 .name = "lm90",
2914 .of_match_table = of_match_ptr(lm90_of_match),
2915 .pm = pm_sleep_ptr(&lm90_pm_ops),
2916 },
2917 .probe = lm90_probe,
2918 .alert = lm90_alert,
2919 .id_table = lm90_id,
2920 .detect = lm90_detect,
2921 .address_list = normal_i2c,
2922};
2923
2924module_i2c_driver(lm90_driver);
2925
2926MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
2927MODULE_DESCRIPTION("LM90/ADM1032 driver");
2928MODULE_LICENSE("GPL");
1/*
2 * lm90.c - Part of lm_sensors, Linux kernel modules for hardware
3 * monitoring
4 * Copyright (C) 2003-2010 Jean Delvare <jdelvare@suse.de>
5 *
6 * Based on the lm83 driver. The LM90 is a sensor chip made by National
7 * Semiconductor. It reports up to two temperatures (its own plus up to
8 * one external one) with a 0.125 deg resolution (1 deg for local
9 * temperature) and a 3-4 deg accuracy.
10 *
11 * This driver also supports the LM89 and LM99, two other sensor chips
12 * made by National Semiconductor. Both have an increased remote
13 * temperature measurement accuracy (1 degree), and the LM99
14 * additionally shifts remote temperatures (measured and limits) by 16
15 * degrees, which allows for higher temperatures measurement.
16 * Note that there is no way to differentiate between both chips.
17 * When device is auto-detected, the driver will assume an LM99.
18 *
19 * This driver also supports the LM86, another sensor chip made by
20 * National Semiconductor. It is exactly similar to the LM90 except it
21 * has a higher accuracy.
22 *
23 * This driver also supports the ADM1032, a sensor chip made by Analog
24 * Devices. That chip is similar to the LM90, with a few differences
25 * that are not handled by this driver. Among others, it has a higher
26 * accuracy than the LM90, much like the LM86 does.
27 *
28 * This driver also supports the MAX6657, MAX6658 and MAX6659 sensor
29 * chips made by Maxim. These chips are similar to the LM86.
30 * Note that there is no easy way to differentiate between the three
31 * variants. We use the device address to detect MAX6659, which will result
32 * in a detection as max6657 if it is on address 0x4c. The extra address
33 * and features of the MAX6659 are only supported if the chip is configured
34 * explicitly as max6659, or if its address is not 0x4c.
35 * These chips lack the remote temperature offset feature.
36 *
37 * This driver also supports the MAX6646, MAX6647, MAX6648, MAX6649 and
38 * MAX6692 chips made by Maxim. These are again similar to the LM86,
39 * but they use unsigned temperature values and can report temperatures
40 * from 0 to 145 degrees.
41 *
42 * This driver also supports the MAX6680 and MAX6681, two other sensor
43 * chips made by Maxim. These are quite similar to the other Maxim
44 * chips. The MAX6680 and MAX6681 only differ in the pinout so they can
45 * be treated identically.
46 *
47 * This driver also supports the MAX6695 and MAX6696, two other sensor
48 * chips made by Maxim. These are also quite similar to other Maxim
49 * chips, but support three temperature sensors instead of two. MAX6695
50 * and MAX6696 only differ in the pinout so they can be treated identically.
51 *
52 * This driver also supports ADT7461 and ADT7461A from Analog Devices as well as
53 * NCT1008 from ON Semiconductor. The chips are supported in both compatibility
54 * and extended mode. They are mostly compatible with LM90 except for a data
55 * format difference for the temperature value registers.
56 *
57 * This driver also supports the SA56004 from Philips. This device is
58 * pin-compatible with the LM86, the ED/EDP parts are also address-compatible.
59 *
60 * This driver also supports the G781 from GMT. This device is compatible
61 * with the ADM1032.
62 *
63 * This driver also supports TMP451 from Texas Instruments. This device is
64 * supported in both compatibility and extended mode. It's mostly compatible
65 * with ADT7461 except for local temperature low byte register and max
66 * conversion rate.
67 *
68 * Since the LM90 was the first chipset supported by this driver, most
69 * comments will refer to this chipset, but are actually general and
70 * concern all supported chipsets, unless mentioned otherwise.
71 *
72 * This program is free software; you can redistribute it and/or modify
73 * it under the terms of the GNU General Public License as published by
74 * the Free Software Foundation; either version 2 of the License, or
75 * (at your option) any later version.
76 *
77 * This program is distributed in the hope that it will be useful,
78 * but WITHOUT ANY WARRANTY; without even the implied warranty of
79 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
80 * GNU General Public License for more details.
81 *
82 * You should have received a copy of the GNU General Public License
83 * along with this program; if not, write to the Free Software
84 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
85 */
86
87#include <linux/module.h>
88#include <linux/init.h>
89#include <linux/slab.h>
90#include <linux/jiffies.h>
91#include <linux/i2c.h>
92#include <linux/hwmon.h>
93#include <linux/err.h>
94#include <linux/mutex.h>
95#include <linux/of_device.h>
96#include <linux/sysfs.h>
97#include <linux/interrupt.h>
98#include <linux/regulator/consumer.h>
99
100/*
101 * Addresses to scan
102 * Address is fully defined internally and cannot be changed except for
103 * MAX6659, MAX6680 and MAX6681.
104 * LM86, LM89, LM90, LM99, ADM1032, ADM1032-1, ADT7461, ADT7461A, MAX6649,
105 * MAX6657, MAX6658, NCT1008 and W83L771 have address 0x4c.
106 * ADM1032-2, ADT7461-2, ADT7461A-2, LM89-1, LM99-1, MAX6646, and NCT1008D
107 * have address 0x4d.
108 * MAX6647 has address 0x4e.
109 * MAX6659 can have address 0x4c, 0x4d or 0x4e.
110 * MAX6680 and MAX6681 can have address 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b,
111 * 0x4c, 0x4d or 0x4e.
112 * SA56004 can have address 0x48 through 0x4F.
113 */
114
115static const unsigned short normal_i2c[] = {
116 0x18, 0x19, 0x1a, 0x29, 0x2a, 0x2b, 0x48, 0x49, 0x4a, 0x4b, 0x4c,
117 0x4d, 0x4e, 0x4f, I2C_CLIENT_END };
118
119enum chips { lm90, adm1032, lm99, lm86, max6657, max6659, adt7461, max6680,
120 max6646, w83l771, max6696, sa56004, g781, tmp451 };
121
122/*
123 * The LM90 registers
124 */
125
126#define LM90_REG_R_MAN_ID 0xFE
127#define LM90_REG_R_CHIP_ID 0xFF
128#define LM90_REG_R_CONFIG1 0x03
129#define LM90_REG_W_CONFIG1 0x09
130#define LM90_REG_R_CONFIG2 0xBF
131#define LM90_REG_W_CONFIG2 0xBF
132#define LM90_REG_R_CONVRATE 0x04
133#define LM90_REG_W_CONVRATE 0x0A
134#define LM90_REG_R_STATUS 0x02
135#define LM90_REG_R_LOCAL_TEMP 0x00
136#define LM90_REG_R_LOCAL_HIGH 0x05
137#define LM90_REG_W_LOCAL_HIGH 0x0B
138#define LM90_REG_R_LOCAL_LOW 0x06
139#define LM90_REG_W_LOCAL_LOW 0x0C
140#define LM90_REG_R_LOCAL_CRIT 0x20
141#define LM90_REG_W_LOCAL_CRIT 0x20
142#define LM90_REG_R_REMOTE_TEMPH 0x01
143#define LM90_REG_R_REMOTE_TEMPL 0x10
144#define LM90_REG_R_REMOTE_OFFSH 0x11
145#define LM90_REG_W_REMOTE_OFFSH 0x11
146#define LM90_REG_R_REMOTE_OFFSL 0x12
147#define LM90_REG_W_REMOTE_OFFSL 0x12
148#define LM90_REG_R_REMOTE_HIGHH 0x07
149#define LM90_REG_W_REMOTE_HIGHH 0x0D
150#define LM90_REG_R_REMOTE_HIGHL 0x13
151#define LM90_REG_W_REMOTE_HIGHL 0x13
152#define LM90_REG_R_REMOTE_LOWH 0x08
153#define LM90_REG_W_REMOTE_LOWH 0x0E
154#define LM90_REG_R_REMOTE_LOWL 0x14
155#define LM90_REG_W_REMOTE_LOWL 0x14
156#define LM90_REG_R_REMOTE_CRIT 0x19
157#define LM90_REG_W_REMOTE_CRIT 0x19
158#define LM90_REG_R_TCRIT_HYST 0x21
159#define LM90_REG_W_TCRIT_HYST 0x21
160
161/* MAX6646/6647/6649/6657/6658/6659/6695/6696 registers */
162
163#define MAX6657_REG_R_LOCAL_TEMPL 0x11
164#define MAX6696_REG_R_STATUS2 0x12
165#define MAX6659_REG_R_REMOTE_EMERG 0x16
166#define MAX6659_REG_W_REMOTE_EMERG 0x16
167#define MAX6659_REG_R_LOCAL_EMERG 0x17
168#define MAX6659_REG_W_LOCAL_EMERG 0x17
169
170/* SA56004 registers */
171
172#define SA56004_REG_R_LOCAL_TEMPL 0x22
173
174#define LM90_MAX_CONVRATE_MS 16000 /* Maximum conversion rate in ms */
175
176/* TMP451 registers */
177#define TMP451_REG_R_LOCAL_TEMPL 0x15
178
179/*
180 * Device flags
181 */
182#define LM90_FLAG_ADT7461_EXT (1 << 0) /* ADT7461 extended mode */
183/* Device features */
184#define LM90_HAVE_OFFSET (1 << 1) /* temperature offset register */
185#define LM90_HAVE_REM_LIMIT_EXT (1 << 3) /* extended remote limit */
186#define LM90_HAVE_EMERGENCY (1 << 4) /* 3rd upper (emergency) limit */
187#define LM90_HAVE_EMERGENCY_ALARM (1 << 5)/* emergency alarm */
188#define LM90_HAVE_TEMP3 (1 << 6) /* 3rd temperature sensor */
189#define LM90_HAVE_BROKEN_ALERT (1 << 7) /* Broken alert */
190
191/* LM90 status */
192#define LM90_STATUS_LTHRM (1 << 0) /* local THERM limit tripped */
193#define LM90_STATUS_RTHRM (1 << 1) /* remote THERM limit tripped */
194#define LM90_STATUS_ROPEN (1 << 2) /* remote is an open circuit */
195#define LM90_STATUS_RLOW (1 << 3) /* remote low temp limit tripped */
196#define LM90_STATUS_RHIGH (1 << 4) /* remote high temp limit tripped */
197#define LM90_STATUS_LLOW (1 << 5) /* local low temp limit tripped */
198#define LM90_STATUS_LHIGH (1 << 6) /* local high temp limit tripped */
199
200#define MAX6696_STATUS2_R2THRM (1 << 1) /* remote2 THERM limit tripped */
201#define MAX6696_STATUS2_R2OPEN (1 << 2) /* remote2 is an open circuit */
202#define MAX6696_STATUS2_R2LOW (1 << 3) /* remote2 low temp limit tripped */
203#define MAX6696_STATUS2_R2HIGH (1 << 4) /* remote2 high temp limit tripped */
204#define MAX6696_STATUS2_ROT2 (1 << 5) /* remote emergency limit tripped */
205#define MAX6696_STATUS2_R2OT2 (1 << 6) /* remote2 emergency limit tripped */
206#define MAX6696_STATUS2_LOT2 (1 << 7) /* local emergency limit tripped */
207
208/*
209 * Driver data (common to all clients)
210 */
211
212static const struct i2c_device_id lm90_id[] = {
213 { "adm1032", adm1032 },
214 { "adt7461", adt7461 },
215 { "adt7461a", adt7461 },
216 { "g781", g781 },
217 { "lm90", lm90 },
218 { "lm86", lm86 },
219 { "lm89", lm86 },
220 { "lm99", lm99 },
221 { "max6646", max6646 },
222 { "max6647", max6646 },
223 { "max6649", max6646 },
224 { "max6657", max6657 },
225 { "max6658", max6657 },
226 { "max6659", max6659 },
227 { "max6680", max6680 },
228 { "max6681", max6680 },
229 { "max6695", max6696 },
230 { "max6696", max6696 },
231 { "nct1008", adt7461 },
232 { "w83l771", w83l771 },
233 { "sa56004", sa56004 },
234 { "tmp451", tmp451 },
235 { }
236};
237MODULE_DEVICE_TABLE(i2c, lm90_id);
238
239static const struct of_device_id lm90_of_match[] = {
240 {
241 .compatible = "adi,adm1032",
242 .data = (void *)adm1032
243 },
244 {
245 .compatible = "adi,adt7461",
246 .data = (void *)adt7461
247 },
248 {
249 .compatible = "adi,adt7461a",
250 .data = (void *)adt7461
251 },
252 {
253 .compatible = "gmt,g781",
254 .data = (void *)g781
255 },
256 {
257 .compatible = "national,lm90",
258 .data = (void *)lm90
259 },
260 {
261 .compatible = "national,lm86",
262 .data = (void *)lm86
263 },
264 {
265 .compatible = "national,lm89",
266 .data = (void *)lm86
267 },
268 {
269 .compatible = "national,lm99",
270 .data = (void *)lm99
271 },
272 {
273 .compatible = "dallas,max6646",
274 .data = (void *)max6646
275 },
276 {
277 .compatible = "dallas,max6647",
278 .data = (void *)max6646
279 },
280 {
281 .compatible = "dallas,max6649",
282 .data = (void *)max6646
283 },
284 {
285 .compatible = "dallas,max6657",
286 .data = (void *)max6657
287 },
288 {
289 .compatible = "dallas,max6658",
290 .data = (void *)max6657
291 },
292 {
293 .compatible = "dallas,max6659",
294 .data = (void *)max6659
295 },
296 {
297 .compatible = "dallas,max6680",
298 .data = (void *)max6680
299 },
300 {
301 .compatible = "dallas,max6681",
302 .data = (void *)max6680
303 },
304 {
305 .compatible = "dallas,max6695",
306 .data = (void *)max6696
307 },
308 {
309 .compatible = "dallas,max6696",
310 .data = (void *)max6696
311 },
312 {
313 .compatible = "onnn,nct1008",
314 .data = (void *)adt7461
315 },
316 {
317 .compatible = "winbond,w83l771",
318 .data = (void *)w83l771
319 },
320 {
321 .compatible = "nxp,sa56004",
322 .data = (void *)sa56004
323 },
324 {
325 .compatible = "ti,tmp451",
326 .data = (void *)tmp451
327 },
328 { },
329};
330MODULE_DEVICE_TABLE(of, lm90_of_match);
331
332/*
333 * chip type specific parameters
334 */
335struct lm90_params {
336 u32 flags; /* Capabilities */
337 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
338 /* Upper 8 bits for max6695/96 */
339 u8 max_convrate; /* Maximum conversion rate register value */
340 u8 reg_local_ext; /* Extended local temp register (optional) */
341};
342
343static const struct lm90_params lm90_params[] = {
344 [adm1032] = {
345 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
346 | LM90_HAVE_BROKEN_ALERT,
347 .alert_alarms = 0x7c,
348 .max_convrate = 10,
349 },
350 [adt7461] = {
351 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
352 | LM90_HAVE_BROKEN_ALERT,
353 .alert_alarms = 0x7c,
354 .max_convrate = 10,
355 },
356 [g781] = {
357 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
358 | LM90_HAVE_BROKEN_ALERT,
359 .alert_alarms = 0x7c,
360 .max_convrate = 8,
361 },
362 [lm86] = {
363 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
364 .alert_alarms = 0x7b,
365 .max_convrate = 9,
366 },
367 [lm90] = {
368 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
369 .alert_alarms = 0x7b,
370 .max_convrate = 9,
371 },
372 [lm99] = {
373 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
374 .alert_alarms = 0x7b,
375 .max_convrate = 9,
376 },
377 [max6646] = {
378 .alert_alarms = 0x7c,
379 .max_convrate = 6,
380 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
381 },
382 [max6657] = {
383 .alert_alarms = 0x7c,
384 .max_convrate = 8,
385 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
386 },
387 [max6659] = {
388 .flags = LM90_HAVE_EMERGENCY,
389 .alert_alarms = 0x7c,
390 .max_convrate = 8,
391 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
392 },
393 [max6680] = {
394 .flags = LM90_HAVE_OFFSET,
395 .alert_alarms = 0x7c,
396 .max_convrate = 7,
397 },
398 [max6696] = {
399 .flags = LM90_HAVE_EMERGENCY
400 | LM90_HAVE_EMERGENCY_ALARM | LM90_HAVE_TEMP3,
401 .alert_alarms = 0x1c7c,
402 .max_convrate = 6,
403 .reg_local_ext = MAX6657_REG_R_LOCAL_TEMPL,
404 },
405 [w83l771] = {
406 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
407 .alert_alarms = 0x7c,
408 .max_convrate = 8,
409 },
410 [sa56004] = {
411 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT,
412 .alert_alarms = 0x7b,
413 .max_convrate = 9,
414 .reg_local_ext = SA56004_REG_R_LOCAL_TEMPL,
415 },
416 [tmp451] = {
417 .flags = LM90_HAVE_OFFSET | LM90_HAVE_REM_LIMIT_EXT
418 | LM90_HAVE_BROKEN_ALERT,
419 .alert_alarms = 0x7c,
420 .max_convrate = 9,
421 .reg_local_ext = TMP451_REG_R_LOCAL_TEMPL,
422 },
423};
424
425/*
426 * TEMP8 register index
427 */
428enum lm90_temp8_reg_index {
429 LOCAL_LOW = 0,
430 LOCAL_HIGH,
431 LOCAL_CRIT,
432 REMOTE_CRIT,
433 LOCAL_EMERG, /* max6659 and max6695/96 */
434 REMOTE_EMERG, /* max6659 and max6695/96 */
435 REMOTE2_CRIT, /* max6695/96 only */
436 REMOTE2_EMERG, /* max6695/96 only */
437 TEMP8_REG_NUM
438};
439
440/*
441 * TEMP11 register index
442 */
443enum lm90_temp11_reg_index {
444 REMOTE_TEMP = 0,
445 REMOTE_LOW,
446 REMOTE_HIGH,
447 REMOTE_OFFSET, /* except max6646, max6657/58/59, and max6695/96 */
448 LOCAL_TEMP,
449 REMOTE2_TEMP, /* max6695/96 only */
450 REMOTE2_LOW, /* max6695/96 only */
451 REMOTE2_HIGH, /* max6695/96 only */
452 TEMP11_REG_NUM
453};
454
455/*
456 * Client data (each client gets its own)
457 */
458
459struct lm90_data {
460 struct i2c_client *client;
461 u32 channel_config[4];
462 struct hwmon_channel_info temp_info;
463 const struct hwmon_channel_info *info[3];
464 struct hwmon_chip_info chip;
465 struct mutex update_lock;
466 bool valid; /* true if register values are valid */
467 unsigned long last_updated; /* in jiffies */
468 int kind;
469 u32 flags;
470
471 unsigned int update_interval; /* in milliseconds */
472
473 u8 config_orig; /* Original configuration register value */
474 u8 convrate_orig; /* Original conversion rate register value */
475 u16 alert_alarms; /* Which alarm bits trigger ALERT# */
476 /* Upper 8 bits for max6695/96 */
477 u8 max_convrate; /* Maximum conversion rate */
478 u8 reg_local_ext; /* local extension register offset */
479
480 /* registers values */
481 s8 temp8[TEMP8_REG_NUM];
482 s16 temp11[TEMP11_REG_NUM];
483 u8 temp_hyst;
484 u16 alarms; /* bitvector (upper 8 bits for max6695/96) */
485};
486
487/*
488 * Support functions
489 */
490
491/*
492 * The ADM1032 supports PEC but not on write byte transactions, so we need
493 * to explicitly ask for a transaction without PEC.
494 */
495static inline s32 adm1032_write_byte(struct i2c_client *client, u8 value)
496{
497 return i2c_smbus_xfer(client->adapter, client->addr,
498 client->flags & ~I2C_CLIENT_PEC,
499 I2C_SMBUS_WRITE, value, I2C_SMBUS_BYTE, NULL);
500}
501
502/*
503 * It is assumed that client->update_lock is held (unless we are in
504 * detection or initialization steps). This matters when PEC is enabled,
505 * because we don't want the address pointer to change between the write
506 * byte and the read byte transactions.
507 */
508static int lm90_read_reg(struct i2c_client *client, u8 reg)
509{
510 int err;
511
512 if (client->flags & I2C_CLIENT_PEC) {
513 err = adm1032_write_byte(client, reg);
514 if (err >= 0)
515 err = i2c_smbus_read_byte(client);
516 } else
517 err = i2c_smbus_read_byte_data(client, reg);
518
519 return err;
520}
521
522static int lm90_read16(struct i2c_client *client, u8 regh, u8 regl)
523{
524 int oldh, newh, l;
525
526 /*
527 * There is a trick here. We have to read two registers to have the
528 * sensor temperature, but we have to beware a conversion could occur
529 * between the readings. The datasheet says we should either use
530 * the one-shot conversion register, which we don't want to do
531 * (disables hardware monitoring) or monitor the busy bit, which is
532 * impossible (we can't read the values and monitor that bit at the
533 * exact same time). So the solution used here is to read the high
534 * byte once, then the low byte, then the high byte again. If the new
535 * high byte matches the old one, then we have a valid reading. Else
536 * we have to read the low byte again, and now we believe we have a
537 * correct reading.
538 */
539 oldh = lm90_read_reg(client, regh);
540 if (oldh < 0)
541 return oldh;
542 l = lm90_read_reg(client, regl);
543 if (l < 0)
544 return l;
545 newh = lm90_read_reg(client, regh);
546 if (newh < 0)
547 return newh;
548 if (oldh != newh) {
549 l = lm90_read_reg(client, regl);
550 if (l < 0)
551 return l;
552 }
553 return (newh << 8) | l;
554}
555
556/*
557 * client->update_lock must be held when calling this function (unless we are
558 * in detection or initialization steps), and while a remote channel other
559 * than channel 0 is selected. Also, calling code must make sure to re-select
560 * external channel 0 before releasing the lock. This is necessary because
561 * various registers have different meanings as a result of selecting a
562 * non-default remote channel.
563 */
564static inline int lm90_select_remote_channel(struct i2c_client *client,
565 struct lm90_data *data,
566 int channel)
567{
568 int config;
569
570 if (data->kind == max6696) {
571 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
572 if (config < 0)
573 return config;
574 config &= ~0x08;
575 if (channel)
576 config |= 0x08;
577 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
578 config);
579 }
580 return 0;
581}
582
583/*
584 * Set conversion rate.
585 * client->update_lock must be held when calling this function (unless we are
586 * in detection or initialization steps).
587 */
588static int lm90_set_convrate(struct i2c_client *client, struct lm90_data *data,
589 unsigned int interval)
590{
591 unsigned int update_interval;
592 int i, err;
593
594 /* Shift calculations to avoid rounding errors */
595 interval <<= 6;
596
597 /* find the nearest update rate */
598 for (i = 0, update_interval = LM90_MAX_CONVRATE_MS << 6;
599 i < data->max_convrate; i++, update_interval >>= 1)
600 if (interval >= update_interval * 3 / 4)
601 break;
602
603 err = i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE, i);
604 data->update_interval = DIV_ROUND_CLOSEST(update_interval, 64);
605 return err;
606}
607
608static int lm90_update_limits(struct device *dev)
609{
610 struct lm90_data *data = dev_get_drvdata(dev);
611 struct i2c_client *client = data->client;
612 int val;
613
614 val = lm90_read_reg(client, LM90_REG_R_LOCAL_CRIT);
615 if (val < 0)
616 return val;
617 data->temp8[LOCAL_CRIT] = val;
618
619 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
620 if (val < 0)
621 return val;
622 data->temp8[REMOTE_CRIT] = val;
623
624 val = lm90_read_reg(client, LM90_REG_R_TCRIT_HYST);
625 if (val < 0)
626 return val;
627 data->temp_hyst = val;
628
629 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
630 if (val < 0)
631 return val;
632 data->temp11[REMOTE_LOW] = val << 8;
633
634 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
635 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWL);
636 if (val < 0)
637 return val;
638 data->temp11[REMOTE_LOW] |= val;
639 }
640
641 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
642 if (val < 0)
643 return val;
644 data->temp11[REMOTE_HIGH] = val << 8;
645
646 if (data->flags & LM90_HAVE_REM_LIMIT_EXT) {
647 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHL);
648 if (val < 0)
649 return val;
650 data->temp11[REMOTE_HIGH] |= val;
651 }
652
653 if (data->flags & LM90_HAVE_OFFSET) {
654 val = lm90_read16(client, LM90_REG_R_REMOTE_OFFSH,
655 LM90_REG_R_REMOTE_OFFSL);
656 if (val < 0)
657 return val;
658 data->temp11[REMOTE_OFFSET] = val;
659 }
660
661 if (data->flags & LM90_HAVE_EMERGENCY) {
662 val = lm90_read_reg(client, MAX6659_REG_R_LOCAL_EMERG);
663 if (val < 0)
664 return val;
665 data->temp8[LOCAL_EMERG] = val;
666
667 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
668 if (val < 0)
669 return val;
670 data->temp8[REMOTE_EMERG] = val;
671 }
672
673 if (data->kind == max6696) {
674 val = lm90_select_remote_channel(client, data, 1);
675 if (val < 0)
676 return val;
677
678 val = lm90_read_reg(client, LM90_REG_R_REMOTE_CRIT);
679 if (val < 0)
680 return val;
681 data->temp8[REMOTE2_CRIT] = val;
682
683 val = lm90_read_reg(client, MAX6659_REG_R_REMOTE_EMERG);
684 if (val < 0)
685 return val;
686 data->temp8[REMOTE2_EMERG] = val;
687
688 val = lm90_read_reg(client, LM90_REG_R_REMOTE_LOWH);
689 if (val < 0)
690 return val;
691 data->temp11[REMOTE2_LOW] = val << 8;
692
693 val = lm90_read_reg(client, LM90_REG_R_REMOTE_HIGHH);
694 if (val < 0)
695 return val;
696 data->temp11[REMOTE2_HIGH] = val << 8;
697
698 lm90_select_remote_channel(client, data, 0);
699 }
700
701 return 0;
702}
703
704static int lm90_update_device(struct device *dev)
705{
706 struct lm90_data *data = dev_get_drvdata(dev);
707 struct i2c_client *client = data->client;
708 unsigned long next_update;
709 int val;
710
711 if (!data->valid) {
712 val = lm90_update_limits(dev);
713 if (val < 0)
714 return val;
715 }
716
717 next_update = data->last_updated +
718 msecs_to_jiffies(data->update_interval);
719 if (time_after(jiffies, next_update) || !data->valid) {
720 dev_dbg(&client->dev, "Updating lm90 data.\n");
721
722 data->valid = false;
723
724 val = lm90_read_reg(client, LM90_REG_R_LOCAL_LOW);
725 if (val < 0)
726 return val;
727 data->temp8[LOCAL_LOW] = val;
728
729 val = lm90_read_reg(client, LM90_REG_R_LOCAL_HIGH);
730 if (val < 0)
731 return val;
732 data->temp8[LOCAL_HIGH] = val;
733
734 if (data->reg_local_ext) {
735 val = lm90_read16(client, LM90_REG_R_LOCAL_TEMP,
736 data->reg_local_ext);
737 if (val < 0)
738 return val;
739 data->temp11[LOCAL_TEMP] = val;
740 } else {
741 val = lm90_read_reg(client, LM90_REG_R_LOCAL_TEMP);
742 if (val < 0)
743 return val;
744 data->temp11[LOCAL_TEMP] = val << 8;
745 }
746 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
747 LM90_REG_R_REMOTE_TEMPL);
748 if (val < 0)
749 return val;
750 data->temp11[REMOTE_TEMP] = val;
751
752 val = lm90_read_reg(client, LM90_REG_R_STATUS);
753 if (val < 0)
754 return val;
755 data->alarms = val; /* lower 8 bit of alarms */
756
757 if (data->kind == max6696) {
758 val = lm90_select_remote_channel(client, data, 1);
759 if (val < 0)
760 return val;
761
762 val = lm90_read16(client, LM90_REG_R_REMOTE_TEMPH,
763 LM90_REG_R_REMOTE_TEMPL);
764 if (val < 0) {
765 lm90_select_remote_channel(client, data, 0);
766 return val;
767 }
768 data->temp11[REMOTE2_TEMP] = val;
769
770 lm90_select_remote_channel(client, data, 0);
771
772 val = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
773 if (val < 0)
774 return val;
775 data->alarms |= val << 8;
776 }
777
778 /*
779 * Re-enable ALERT# output if it was originally enabled and
780 * relevant alarms are all clear
781 */
782 if (!(data->config_orig & 0x80) &&
783 !(data->alarms & data->alert_alarms)) {
784 val = lm90_read_reg(client, LM90_REG_R_CONFIG1);
785 if (val < 0)
786 return val;
787
788 if (val & 0x80) {
789 dev_dbg(&client->dev, "Re-enabling ALERT#\n");
790 i2c_smbus_write_byte_data(client,
791 LM90_REG_W_CONFIG1,
792 val & ~0x80);
793 }
794 }
795
796 data->last_updated = jiffies;
797 data->valid = true;
798 }
799
800 return 0;
801}
802
803/*
804 * Conversions
805 * For local temperatures and limits, critical limits and the hysteresis
806 * value, the LM90 uses signed 8-bit values with LSB = 1 degree Celsius.
807 * For remote temperatures and limits, it uses signed 11-bit values with
808 * LSB = 0.125 degree Celsius, left-justified in 16-bit registers. Some
809 * Maxim chips use unsigned values.
810 */
811
812static inline int temp_from_s8(s8 val)
813{
814 return val * 1000;
815}
816
817static inline int temp_from_u8(u8 val)
818{
819 return val * 1000;
820}
821
822static inline int temp_from_s16(s16 val)
823{
824 return val / 32 * 125;
825}
826
827static inline int temp_from_u16(u16 val)
828{
829 return val / 32 * 125;
830}
831
832static s8 temp_to_s8(long val)
833{
834 if (val <= -128000)
835 return -128;
836 if (val >= 127000)
837 return 127;
838 if (val < 0)
839 return (val - 500) / 1000;
840 return (val + 500) / 1000;
841}
842
843static u8 temp_to_u8(long val)
844{
845 if (val <= 0)
846 return 0;
847 if (val >= 255000)
848 return 255;
849 return (val + 500) / 1000;
850}
851
852static s16 temp_to_s16(long val)
853{
854 if (val <= -128000)
855 return 0x8000;
856 if (val >= 127875)
857 return 0x7FE0;
858 if (val < 0)
859 return (val - 62) / 125 * 32;
860 return (val + 62) / 125 * 32;
861}
862
863static u8 hyst_to_reg(long val)
864{
865 if (val <= 0)
866 return 0;
867 if (val >= 30500)
868 return 31;
869 return (val + 500) / 1000;
870}
871
872/*
873 * ADT7461 in compatibility mode is almost identical to LM90 except that
874 * attempts to write values that are outside the range 0 < temp < 127 are
875 * treated as the boundary value.
876 *
877 * ADT7461 in "extended mode" operation uses unsigned integers offset by
878 * 64 (e.g., 0 -> -64 degC). The range is restricted to -64..191 degC.
879 */
880static inline int temp_from_u8_adt7461(struct lm90_data *data, u8 val)
881{
882 if (data->flags & LM90_FLAG_ADT7461_EXT)
883 return (val - 64) * 1000;
884 return temp_from_s8(val);
885}
886
887static inline int temp_from_u16_adt7461(struct lm90_data *data, u16 val)
888{
889 if (data->flags & LM90_FLAG_ADT7461_EXT)
890 return (val - 0x4000) / 64 * 250;
891 return temp_from_s16(val);
892}
893
894static u8 temp_to_u8_adt7461(struct lm90_data *data, long val)
895{
896 if (data->flags & LM90_FLAG_ADT7461_EXT) {
897 if (val <= -64000)
898 return 0;
899 if (val >= 191000)
900 return 0xFF;
901 return (val + 500 + 64000) / 1000;
902 }
903 if (val <= 0)
904 return 0;
905 if (val >= 127000)
906 return 127;
907 return (val + 500) / 1000;
908}
909
910static u16 temp_to_u16_adt7461(struct lm90_data *data, long val)
911{
912 if (data->flags & LM90_FLAG_ADT7461_EXT) {
913 if (val <= -64000)
914 return 0;
915 if (val >= 191750)
916 return 0xFFC0;
917 return (val + 64000 + 125) / 250 * 64;
918 }
919 if (val <= 0)
920 return 0;
921 if (val >= 127750)
922 return 0x7FC0;
923 return (val + 125) / 250 * 64;
924}
925
926/* pec used for ADM1032 only */
927static ssize_t pec_show(struct device *dev, struct device_attribute *dummy,
928 char *buf)
929{
930 struct i2c_client *client = to_i2c_client(dev);
931
932 return sprintf(buf, "%d\n", !!(client->flags & I2C_CLIENT_PEC));
933}
934
935static ssize_t pec_store(struct device *dev, struct device_attribute *dummy,
936 const char *buf, size_t count)
937{
938 struct i2c_client *client = to_i2c_client(dev);
939 long val;
940 int err;
941
942 err = kstrtol(buf, 10, &val);
943 if (err < 0)
944 return err;
945
946 switch (val) {
947 case 0:
948 client->flags &= ~I2C_CLIENT_PEC;
949 break;
950 case 1:
951 client->flags |= I2C_CLIENT_PEC;
952 break;
953 default:
954 return -EINVAL;
955 }
956
957 return count;
958}
959
960static DEVICE_ATTR_RW(pec);
961
962static int lm90_get_temp11(struct lm90_data *data, int index)
963{
964 s16 temp11 = data->temp11[index];
965 int temp;
966
967 if (data->kind == adt7461 || data->kind == tmp451)
968 temp = temp_from_u16_adt7461(data, temp11);
969 else if (data->kind == max6646)
970 temp = temp_from_u16(temp11);
971 else
972 temp = temp_from_s16(temp11);
973
974 /* +16 degrees offset for temp2 for the LM99 */
975 if (data->kind == lm99 && index <= 2)
976 temp += 16000;
977
978 return temp;
979}
980
981static int lm90_set_temp11(struct lm90_data *data, int index, long val)
982{
983 static struct reg {
984 u8 high;
985 u8 low;
986 } reg[] = {
987 [REMOTE_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
988 [REMOTE_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL },
989 [REMOTE_OFFSET] = { LM90_REG_W_REMOTE_OFFSH, LM90_REG_W_REMOTE_OFFSL },
990 [REMOTE2_LOW] = { LM90_REG_W_REMOTE_LOWH, LM90_REG_W_REMOTE_LOWL },
991 [REMOTE2_HIGH] = { LM90_REG_W_REMOTE_HIGHH, LM90_REG_W_REMOTE_HIGHL }
992 };
993 struct i2c_client *client = data->client;
994 struct reg *regp = ®[index];
995 int err;
996
997 /* +16 degrees offset for temp2 for the LM99 */
998 if (data->kind == lm99 && index <= 2)
999 val -= 16000;
1000
1001 if (data->kind == adt7461 || data->kind == tmp451)
1002 data->temp11[index] = temp_to_u16_adt7461(data, val);
1003 else if (data->kind == max6646)
1004 data->temp11[index] = temp_to_u8(val) << 8;
1005 else if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
1006 data->temp11[index] = temp_to_s16(val);
1007 else
1008 data->temp11[index] = temp_to_s8(val) << 8;
1009
1010 lm90_select_remote_channel(client, data, index >= 3);
1011 err = i2c_smbus_write_byte_data(client, regp->high,
1012 data->temp11[index] >> 8);
1013 if (err < 0)
1014 return err;
1015 if (data->flags & LM90_HAVE_REM_LIMIT_EXT)
1016 err = i2c_smbus_write_byte_data(client, regp->low,
1017 data->temp11[index] & 0xff);
1018
1019 lm90_select_remote_channel(client, data, 0);
1020 return err;
1021}
1022
1023static int lm90_get_temp8(struct lm90_data *data, int index)
1024{
1025 s8 temp8 = data->temp8[index];
1026 int temp;
1027
1028 if (data->kind == adt7461 || data->kind == tmp451)
1029 temp = temp_from_u8_adt7461(data, temp8);
1030 else if (data->kind == max6646)
1031 temp = temp_from_u8(temp8);
1032 else
1033 temp = temp_from_s8(temp8);
1034
1035 /* +16 degrees offset for temp2 for the LM99 */
1036 if (data->kind == lm99 && index == 3)
1037 temp += 16000;
1038
1039 return temp;
1040}
1041
1042static int lm90_set_temp8(struct lm90_data *data, int index, long val)
1043{
1044 static const u8 reg[TEMP8_REG_NUM] = {
1045 LM90_REG_W_LOCAL_LOW,
1046 LM90_REG_W_LOCAL_HIGH,
1047 LM90_REG_W_LOCAL_CRIT,
1048 LM90_REG_W_REMOTE_CRIT,
1049 MAX6659_REG_W_LOCAL_EMERG,
1050 MAX6659_REG_W_REMOTE_EMERG,
1051 LM90_REG_W_REMOTE_CRIT,
1052 MAX6659_REG_W_REMOTE_EMERG,
1053 };
1054 struct i2c_client *client = data->client;
1055 int err;
1056
1057 /* +16 degrees offset for temp2 for the LM99 */
1058 if (data->kind == lm99 && index == 3)
1059 val -= 16000;
1060
1061 if (data->kind == adt7461 || data->kind == tmp451)
1062 data->temp8[index] = temp_to_u8_adt7461(data, val);
1063 else if (data->kind == max6646)
1064 data->temp8[index] = temp_to_u8(val);
1065 else
1066 data->temp8[index] = temp_to_s8(val);
1067
1068 lm90_select_remote_channel(client, data, index >= 6);
1069 err = i2c_smbus_write_byte_data(client, reg[index], data->temp8[index]);
1070 lm90_select_remote_channel(client, data, 0);
1071
1072 return err;
1073}
1074
1075static int lm90_get_temphyst(struct lm90_data *data, int index)
1076{
1077 int temp;
1078
1079 if (data->kind == adt7461 || data->kind == tmp451)
1080 temp = temp_from_u8_adt7461(data, data->temp8[index]);
1081 else if (data->kind == max6646)
1082 temp = temp_from_u8(data->temp8[index]);
1083 else
1084 temp = temp_from_s8(data->temp8[index]);
1085
1086 /* +16 degrees offset for temp2 for the LM99 */
1087 if (data->kind == lm99 && index == 3)
1088 temp += 16000;
1089
1090 return temp - temp_from_s8(data->temp_hyst);
1091}
1092
1093static int lm90_set_temphyst(struct lm90_data *data, long val)
1094{
1095 struct i2c_client *client = data->client;
1096 int temp;
1097 int err;
1098
1099 if (data->kind == adt7461 || data->kind == tmp451)
1100 temp = temp_from_u8_adt7461(data, data->temp8[LOCAL_CRIT]);
1101 else if (data->kind == max6646)
1102 temp = temp_from_u8(data->temp8[LOCAL_CRIT]);
1103 else
1104 temp = temp_from_s8(data->temp8[LOCAL_CRIT]);
1105
1106 data->temp_hyst = hyst_to_reg(temp - val);
1107 err = i2c_smbus_write_byte_data(client, LM90_REG_W_TCRIT_HYST,
1108 data->temp_hyst);
1109 return err;
1110}
1111
1112static const u8 lm90_temp_index[3] = {
1113 LOCAL_TEMP, REMOTE_TEMP, REMOTE2_TEMP
1114};
1115
1116static const u8 lm90_temp_min_index[3] = {
1117 LOCAL_LOW, REMOTE_LOW, REMOTE2_LOW
1118};
1119
1120static const u8 lm90_temp_max_index[3] = {
1121 LOCAL_HIGH, REMOTE_HIGH, REMOTE2_HIGH
1122};
1123
1124static const u8 lm90_temp_crit_index[3] = {
1125 LOCAL_CRIT, REMOTE_CRIT, REMOTE2_CRIT
1126};
1127
1128static const u8 lm90_temp_emerg_index[3] = {
1129 LOCAL_EMERG, REMOTE_EMERG, REMOTE2_EMERG
1130};
1131
1132static const u8 lm90_min_alarm_bits[3] = { 5, 3, 11 };
1133static const u8 lm90_max_alarm_bits[3] = { 6, 4, 12 };
1134static const u8 lm90_crit_alarm_bits[3] = { 0, 1, 9 };
1135static const u8 lm90_emergency_alarm_bits[3] = { 15, 13, 14 };
1136static const u8 lm90_fault_bits[3] = { 0, 2, 10 };
1137
1138static int lm90_temp_read(struct device *dev, u32 attr, int channel, long *val)
1139{
1140 struct lm90_data *data = dev_get_drvdata(dev);
1141 int err;
1142
1143 mutex_lock(&data->update_lock);
1144 err = lm90_update_device(dev);
1145 mutex_unlock(&data->update_lock);
1146 if (err)
1147 return err;
1148
1149 switch (attr) {
1150 case hwmon_temp_input:
1151 *val = lm90_get_temp11(data, lm90_temp_index[channel]);
1152 break;
1153 case hwmon_temp_min_alarm:
1154 *val = (data->alarms >> lm90_min_alarm_bits[channel]) & 1;
1155 break;
1156 case hwmon_temp_max_alarm:
1157 *val = (data->alarms >> lm90_max_alarm_bits[channel]) & 1;
1158 break;
1159 case hwmon_temp_crit_alarm:
1160 *val = (data->alarms >> lm90_crit_alarm_bits[channel]) & 1;
1161 break;
1162 case hwmon_temp_emergency_alarm:
1163 *val = (data->alarms >> lm90_emergency_alarm_bits[channel]) & 1;
1164 break;
1165 case hwmon_temp_fault:
1166 *val = (data->alarms >> lm90_fault_bits[channel]) & 1;
1167 break;
1168 case hwmon_temp_min:
1169 if (channel == 0)
1170 *val = lm90_get_temp8(data,
1171 lm90_temp_min_index[channel]);
1172 else
1173 *val = lm90_get_temp11(data,
1174 lm90_temp_min_index[channel]);
1175 break;
1176 case hwmon_temp_max:
1177 if (channel == 0)
1178 *val = lm90_get_temp8(data,
1179 lm90_temp_max_index[channel]);
1180 else
1181 *val = lm90_get_temp11(data,
1182 lm90_temp_max_index[channel]);
1183 break;
1184 case hwmon_temp_crit:
1185 *val = lm90_get_temp8(data, lm90_temp_crit_index[channel]);
1186 break;
1187 case hwmon_temp_crit_hyst:
1188 *val = lm90_get_temphyst(data, lm90_temp_crit_index[channel]);
1189 break;
1190 case hwmon_temp_emergency:
1191 *val = lm90_get_temp8(data, lm90_temp_emerg_index[channel]);
1192 break;
1193 case hwmon_temp_emergency_hyst:
1194 *val = lm90_get_temphyst(data, lm90_temp_emerg_index[channel]);
1195 break;
1196 case hwmon_temp_offset:
1197 *val = lm90_get_temp11(data, REMOTE_OFFSET);
1198 break;
1199 default:
1200 return -EOPNOTSUPP;
1201 }
1202 return 0;
1203}
1204
1205static int lm90_temp_write(struct device *dev, u32 attr, int channel, long val)
1206{
1207 struct lm90_data *data = dev_get_drvdata(dev);
1208 int err;
1209
1210 mutex_lock(&data->update_lock);
1211
1212 err = lm90_update_device(dev);
1213 if (err)
1214 goto error;
1215
1216 switch (attr) {
1217 case hwmon_temp_min:
1218 if (channel == 0)
1219 err = lm90_set_temp8(data,
1220 lm90_temp_min_index[channel],
1221 val);
1222 else
1223 err = lm90_set_temp11(data,
1224 lm90_temp_min_index[channel],
1225 val);
1226 break;
1227 case hwmon_temp_max:
1228 if (channel == 0)
1229 err = lm90_set_temp8(data,
1230 lm90_temp_max_index[channel],
1231 val);
1232 else
1233 err = lm90_set_temp11(data,
1234 lm90_temp_max_index[channel],
1235 val);
1236 break;
1237 case hwmon_temp_crit:
1238 err = lm90_set_temp8(data, lm90_temp_crit_index[channel], val);
1239 break;
1240 case hwmon_temp_crit_hyst:
1241 err = lm90_set_temphyst(data, val);
1242 break;
1243 case hwmon_temp_emergency:
1244 err = lm90_set_temp8(data, lm90_temp_emerg_index[channel], val);
1245 break;
1246 case hwmon_temp_offset:
1247 err = lm90_set_temp11(data, REMOTE_OFFSET, val);
1248 break;
1249 default:
1250 err = -EOPNOTSUPP;
1251 break;
1252 }
1253error:
1254 mutex_unlock(&data->update_lock);
1255
1256 return err;
1257}
1258
1259static umode_t lm90_temp_is_visible(const void *data, u32 attr, int channel)
1260{
1261 switch (attr) {
1262 case hwmon_temp_input:
1263 case hwmon_temp_min_alarm:
1264 case hwmon_temp_max_alarm:
1265 case hwmon_temp_crit_alarm:
1266 case hwmon_temp_emergency_alarm:
1267 case hwmon_temp_emergency_hyst:
1268 case hwmon_temp_fault:
1269 return S_IRUGO;
1270 case hwmon_temp_min:
1271 case hwmon_temp_max:
1272 case hwmon_temp_crit:
1273 case hwmon_temp_emergency:
1274 case hwmon_temp_offset:
1275 return S_IRUGO | S_IWUSR;
1276 case hwmon_temp_crit_hyst:
1277 if (channel == 0)
1278 return S_IRUGO | S_IWUSR;
1279 return S_IRUGO;
1280 default:
1281 return 0;
1282 }
1283}
1284
1285static int lm90_chip_read(struct device *dev, u32 attr, int channel, long *val)
1286{
1287 struct lm90_data *data = dev_get_drvdata(dev);
1288 int err;
1289
1290 mutex_lock(&data->update_lock);
1291 err = lm90_update_device(dev);
1292 mutex_unlock(&data->update_lock);
1293 if (err)
1294 return err;
1295
1296 switch (attr) {
1297 case hwmon_chip_update_interval:
1298 *val = data->update_interval;
1299 break;
1300 case hwmon_chip_alarms:
1301 *val = data->alarms;
1302 break;
1303 default:
1304 return -EOPNOTSUPP;
1305 }
1306
1307 return 0;
1308}
1309
1310static int lm90_chip_write(struct device *dev, u32 attr, int channel, long val)
1311{
1312 struct lm90_data *data = dev_get_drvdata(dev);
1313 struct i2c_client *client = data->client;
1314 int err;
1315
1316 mutex_lock(&data->update_lock);
1317
1318 err = lm90_update_device(dev);
1319 if (err)
1320 goto error;
1321
1322 switch (attr) {
1323 case hwmon_chip_update_interval:
1324 err = lm90_set_convrate(client, data,
1325 clamp_val(val, 0, 100000));
1326 break;
1327 default:
1328 err = -EOPNOTSUPP;
1329 break;
1330 }
1331error:
1332 mutex_unlock(&data->update_lock);
1333
1334 return err;
1335}
1336
1337static umode_t lm90_chip_is_visible(const void *data, u32 attr, int channel)
1338{
1339 switch (attr) {
1340 case hwmon_chip_update_interval:
1341 return S_IRUGO | S_IWUSR;
1342 case hwmon_chip_alarms:
1343 return S_IRUGO;
1344 default:
1345 return 0;
1346 }
1347}
1348
1349static int lm90_read(struct device *dev, enum hwmon_sensor_types type,
1350 u32 attr, int channel, long *val)
1351{
1352 switch (type) {
1353 case hwmon_chip:
1354 return lm90_chip_read(dev, attr, channel, val);
1355 case hwmon_temp:
1356 return lm90_temp_read(dev, attr, channel, val);
1357 default:
1358 return -EOPNOTSUPP;
1359 }
1360}
1361
1362static int lm90_write(struct device *dev, enum hwmon_sensor_types type,
1363 u32 attr, int channel, long val)
1364{
1365 switch (type) {
1366 case hwmon_chip:
1367 return lm90_chip_write(dev, attr, channel, val);
1368 case hwmon_temp:
1369 return lm90_temp_write(dev, attr, channel, val);
1370 default:
1371 return -EOPNOTSUPP;
1372 }
1373}
1374
1375static umode_t lm90_is_visible(const void *data, enum hwmon_sensor_types type,
1376 u32 attr, int channel)
1377{
1378 switch (type) {
1379 case hwmon_chip:
1380 return lm90_chip_is_visible(data, attr, channel);
1381 case hwmon_temp:
1382 return lm90_temp_is_visible(data, attr, channel);
1383 default:
1384 return 0;
1385 }
1386}
1387
1388/* Return 0 if detection is successful, -ENODEV otherwise */
1389static int lm90_detect(struct i2c_client *client,
1390 struct i2c_board_info *info)
1391{
1392 struct i2c_adapter *adapter = client->adapter;
1393 int address = client->addr;
1394 const char *name = NULL;
1395 int man_id, chip_id, config1, config2, convrate;
1396
1397 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1398 return -ENODEV;
1399
1400 /* detection and identification */
1401 man_id = i2c_smbus_read_byte_data(client, LM90_REG_R_MAN_ID);
1402 chip_id = i2c_smbus_read_byte_data(client, LM90_REG_R_CHIP_ID);
1403 config1 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG1);
1404 convrate = i2c_smbus_read_byte_data(client, LM90_REG_R_CONVRATE);
1405 if (man_id < 0 || chip_id < 0 || config1 < 0 || convrate < 0)
1406 return -ENODEV;
1407
1408 if (man_id == 0x01 || man_id == 0x5C || man_id == 0x41) {
1409 config2 = i2c_smbus_read_byte_data(client, LM90_REG_R_CONFIG2);
1410 if (config2 < 0)
1411 return -ENODEV;
1412 } else
1413 config2 = 0; /* Make compiler happy */
1414
1415 if ((address == 0x4C || address == 0x4D)
1416 && man_id == 0x01) { /* National Semiconductor */
1417 if ((config1 & 0x2A) == 0x00
1418 && (config2 & 0xF8) == 0x00
1419 && convrate <= 0x09) {
1420 if (address == 0x4C
1421 && (chip_id & 0xF0) == 0x20) { /* LM90 */
1422 name = "lm90";
1423 } else
1424 if ((chip_id & 0xF0) == 0x30) { /* LM89/LM99 */
1425 name = "lm99";
1426 dev_info(&adapter->dev,
1427 "Assuming LM99 chip at 0x%02x\n",
1428 address);
1429 dev_info(&adapter->dev,
1430 "If it is an LM89, instantiate it "
1431 "with the new_device sysfs "
1432 "interface\n");
1433 } else
1434 if (address == 0x4C
1435 && (chip_id & 0xF0) == 0x10) { /* LM86 */
1436 name = "lm86";
1437 }
1438 }
1439 } else
1440 if ((address == 0x4C || address == 0x4D)
1441 && man_id == 0x41) { /* Analog Devices */
1442 if ((chip_id & 0xF0) == 0x40 /* ADM1032 */
1443 && (config1 & 0x3F) == 0x00
1444 && convrate <= 0x0A) {
1445 name = "adm1032";
1446 /*
1447 * The ADM1032 supports PEC, but only if combined
1448 * transactions are not used.
1449 */
1450 if (i2c_check_functionality(adapter,
1451 I2C_FUNC_SMBUS_BYTE))
1452 info->flags |= I2C_CLIENT_PEC;
1453 } else
1454 if (chip_id == 0x51 /* ADT7461 */
1455 && (config1 & 0x1B) == 0x00
1456 && convrate <= 0x0A) {
1457 name = "adt7461";
1458 } else
1459 if (chip_id == 0x57 /* ADT7461A, NCT1008 */
1460 && (config1 & 0x1B) == 0x00
1461 && convrate <= 0x0A) {
1462 name = "adt7461a";
1463 }
1464 } else
1465 if (man_id == 0x4D) { /* Maxim */
1466 int emerg, emerg2, status2;
1467
1468 /*
1469 * We read MAX6659_REG_R_REMOTE_EMERG twice, and re-read
1470 * LM90_REG_R_MAN_ID in between. If MAX6659_REG_R_REMOTE_EMERG
1471 * exists, both readings will reflect the same value. Otherwise,
1472 * the readings will be different.
1473 */
1474 emerg = i2c_smbus_read_byte_data(client,
1475 MAX6659_REG_R_REMOTE_EMERG);
1476 man_id = i2c_smbus_read_byte_data(client,
1477 LM90_REG_R_MAN_ID);
1478 emerg2 = i2c_smbus_read_byte_data(client,
1479 MAX6659_REG_R_REMOTE_EMERG);
1480 status2 = i2c_smbus_read_byte_data(client,
1481 MAX6696_REG_R_STATUS2);
1482 if (emerg < 0 || man_id < 0 || emerg2 < 0 || status2 < 0)
1483 return -ENODEV;
1484
1485 /*
1486 * The MAX6657, MAX6658 and MAX6659 do NOT have a chip_id
1487 * register. Reading from that address will return the last
1488 * read value, which in our case is those of the man_id
1489 * register. Likewise, the config1 register seems to lack a
1490 * low nibble, so the value will be those of the previous
1491 * read, so in our case those of the man_id register.
1492 * MAX6659 has a third set of upper temperature limit registers.
1493 * Those registers also return values on MAX6657 and MAX6658,
1494 * thus the only way to detect MAX6659 is by its address.
1495 * For this reason it will be mis-detected as MAX6657 if its
1496 * address is 0x4C.
1497 */
1498 if (chip_id == man_id
1499 && (address == 0x4C || address == 0x4D || address == 0x4E)
1500 && (config1 & 0x1F) == (man_id & 0x0F)
1501 && convrate <= 0x09) {
1502 if (address == 0x4C)
1503 name = "max6657";
1504 else
1505 name = "max6659";
1506 } else
1507 /*
1508 * Even though MAX6695 and MAX6696 do not have a chip ID
1509 * register, reading it returns 0x01. Bit 4 of the config1
1510 * register is unused and should return zero when read. Bit 0 of
1511 * the status2 register is unused and should return zero when
1512 * read.
1513 *
1514 * MAX6695 and MAX6696 have an additional set of temperature
1515 * limit registers. We can detect those chips by checking if
1516 * one of those registers exists.
1517 */
1518 if (chip_id == 0x01
1519 && (config1 & 0x10) == 0x00
1520 && (status2 & 0x01) == 0x00
1521 && emerg == emerg2
1522 && convrate <= 0x07) {
1523 name = "max6696";
1524 } else
1525 /*
1526 * The chip_id register of the MAX6680 and MAX6681 holds the
1527 * revision of the chip. The lowest bit of the config1 register
1528 * is unused and should return zero when read, so should the
1529 * second to last bit of config1 (software reset).
1530 */
1531 if (chip_id == 0x01
1532 && (config1 & 0x03) == 0x00
1533 && convrate <= 0x07) {
1534 name = "max6680";
1535 } else
1536 /*
1537 * The chip_id register of the MAX6646/6647/6649 holds the
1538 * revision of the chip. The lowest 6 bits of the config1
1539 * register are unused and should return zero when read.
1540 */
1541 if (chip_id == 0x59
1542 && (config1 & 0x3f) == 0x00
1543 && convrate <= 0x07) {
1544 name = "max6646";
1545 }
1546 } else
1547 if (address == 0x4C
1548 && man_id == 0x5C) { /* Winbond/Nuvoton */
1549 if ((config1 & 0x2A) == 0x00
1550 && (config2 & 0xF8) == 0x00) {
1551 if (chip_id == 0x01 /* W83L771W/G */
1552 && convrate <= 0x09) {
1553 name = "w83l771";
1554 } else
1555 if ((chip_id & 0xFE) == 0x10 /* W83L771AWG/ASG */
1556 && convrate <= 0x08) {
1557 name = "w83l771";
1558 }
1559 }
1560 } else
1561 if (address >= 0x48 && address <= 0x4F
1562 && man_id == 0xA1) { /* NXP Semiconductor/Philips */
1563 if (chip_id == 0x00
1564 && (config1 & 0x2A) == 0x00
1565 && (config2 & 0xFE) == 0x00
1566 && convrate <= 0x09) {
1567 name = "sa56004";
1568 }
1569 } else
1570 if ((address == 0x4C || address == 0x4D)
1571 && man_id == 0x47) { /* GMT */
1572 if (chip_id == 0x01 /* G781 */
1573 && (config1 & 0x3F) == 0x00
1574 && convrate <= 0x08)
1575 name = "g781";
1576 } else
1577 if (address == 0x4C
1578 && man_id == 0x55) { /* Texas Instruments */
1579 int local_ext;
1580
1581 local_ext = i2c_smbus_read_byte_data(client,
1582 TMP451_REG_R_LOCAL_TEMPL);
1583
1584 if (chip_id == 0x00 /* TMP451 */
1585 && (config1 & 0x1B) == 0x00
1586 && convrate <= 0x09
1587 && (local_ext & 0x0F) == 0x00)
1588 name = "tmp451";
1589 }
1590
1591 if (!name) { /* identification failed */
1592 dev_dbg(&adapter->dev,
1593 "Unsupported chip at 0x%02x (man_id=0x%02X, "
1594 "chip_id=0x%02X)\n", address, man_id, chip_id);
1595 return -ENODEV;
1596 }
1597
1598 strlcpy(info->type, name, I2C_NAME_SIZE);
1599
1600 return 0;
1601}
1602
1603static void lm90_restore_conf(void *_data)
1604{
1605 struct lm90_data *data = _data;
1606 struct i2c_client *client = data->client;
1607
1608 /* Restore initial configuration */
1609 i2c_smbus_write_byte_data(client, LM90_REG_W_CONVRATE,
1610 data->convrate_orig);
1611 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1,
1612 data->config_orig);
1613}
1614
1615static int lm90_init_client(struct i2c_client *client, struct lm90_data *data)
1616{
1617 int config, convrate;
1618
1619 convrate = lm90_read_reg(client, LM90_REG_R_CONVRATE);
1620 if (convrate < 0)
1621 return convrate;
1622 data->convrate_orig = convrate;
1623
1624 /*
1625 * Start the conversions.
1626 */
1627 lm90_set_convrate(client, data, 500); /* 500ms; 2Hz conversion rate */
1628 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1629 if (config < 0)
1630 return config;
1631 data->config_orig = config;
1632
1633 /* Check Temperature Range Select */
1634 if (data->kind == adt7461 || data->kind == tmp451) {
1635 if (config & 0x04)
1636 data->flags |= LM90_FLAG_ADT7461_EXT;
1637 }
1638
1639 /*
1640 * Put MAX6680/MAX8881 into extended resolution (bit 0x10,
1641 * 0.125 degree resolution) and range (0x08, extend range
1642 * to -64 degree) mode for the remote temperature sensor.
1643 */
1644 if (data->kind == max6680)
1645 config |= 0x18;
1646
1647 /*
1648 * Select external channel 0 for max6695/96
1649 */
1650 if (data->kind == max6696)
1651 config &= ~0x08;
1652
1653 config &= 0xBF; /* run */
1654 if (config != data->config_orig) /* Only write if changed */
1655 i2c_smbus_write_byte_data(client, LM90_REG_W_CONFIG1, config);
1656
1657 return devm_add_action_or_reset(&client->dev, lm90_restore_conf, data);
1658}
1659
1660static bool lm90_is_tripped(struct i2c_client *client, u16 *status)
1661{
1662 struct lm90_data *data = i2c_get_clientdata(client);
1663 int st, st2 = 0;
1664
1665 st = lm90_read_reg(client, LM90_REG_R_STATUS);
1666 if (st < 0)
1667 return false;
1668
1669 if (data->kind == max6696) {
1670 st2 = lm90_read_reg(client, MAX6696_REG_R_STATUS2);
1671 if (st2 < 0)
1672 return false;
1673 }
1674
1675 *status = st | (st2 << 8);
1676
1677 if ((st & 0x7f) == 0 && (st2 & 0xfe) == 0)
1678 return false;
1679
1680 if ((st & (LM90_STATUS_LLOW | LM90_STATUS_LHIGH | LM90_STATUS_LTHRM)) ||
1681 (st2 & MAX6696_STATUS2_LOT2))
1682 dev_warn(&client->dev,
1683 "temp%d out of range, please check!\n", 1);
1684 if ((st & (LM90_STATUS_RLOW | LM90_STATUS_RHIGH | LM90_STATUS_RTHRM)) ||
1685 (st2 & MAX6696_STATUS2_ROT2))
1686 dev_warn(&client->dev,
1687 "temp%d out of range, please check!\n", 2);
1688 if (st & LM90_STATUS_ROPEN)
1689 dev_warn(&client->dev,
1690 "temp%d diode open, please check!\n", 2);
1691 if (st2 & (MAX6696_STATUS2_R2LOW | MAX6696_STATUS2_R2HIGH |
1692 MAX6696_STATUS2_R2THRM | MAX6696_STATUS2_R2OT2))
1693 dev_warn(&client->dev,
1694 "temp%d out of range, please check!\n", 3);
1695 if (st2 & MAX6696_STATUS2_R2OPEN)
1696 dev_warn(&client->dev,
1697 "temp%d diode open, please check!\n", 3);
1698
1699 return true;
1700}
1701
1702static irqreturn_t lm90_irq_thread(int irq, void *dev_id)
1703{
1704 struct i2c_client *client = dev_id;
1705 u16 status;
1706
1707 if (lm90_is_tripped(client, &status))
1708 return IRQ_HANDLED;
1709 else
1710 return IRQ_NONE;
1711}
1712
1713static void lm90_remove_pec(void *dev)
1714{
1715 device_remove_file(dev, &dev_attr_pec);
1716}
1717
1718static void lm90_regulator_disable(void *regulator)
1719{
1720 regulator_disable(regulator);
1721}
1722
1723static const u32 lm90_chip_config[] = {
1724 HWMON_C_REGISTER_TZ | HWMON_C_UPDATE_INTERVAL | HWMON_C_ALARMS,
1725 0
1726};
1727
1728static const struct hwmon_channel_info lm90_chip_info = {
1729 .type = hwmon_chip,
1730 .config = lm90_chip_config,
1731};
1732
1733
1734static const struct hwmon_ops lm90_ops = {
1735 .is_visible = lm90_is_visible,
1736 .read = lm90_read,
1737 .write = lm90_write,
1738};
1739
1740static int lm90_probe(struct i2c_client *client,
1741 const struct i2c_device_id *id)
1742{
1743 struct device *dev = &client->dev;
1744 struct i2c_adapter *adapter = to_i2c_adapter(dev->parent);
1745 struct hwmon_channel_info *info;
1746 struct regulator *regulator;
1747 struct device *hwmon_dev;
1748 struct lm90_data *data;
1749 int err;
1750
1751 regulator = devm_regulator_get(dev, "vcc");
1752 if (IS_ERR(regulator))
1753 return PTR_ERR(regulator);
1754
1755 err = regulator_enable(regulator);
1756 if (err < 0) {
1757 dev_err(dev, "Failed to enable regulator: %d\n", err);
1758 return err;
1759 }
1760
1761 err = devm_add_action_or_reset(dev, lm90_regulator_disable, regulator);
1762 if (err)
1763 return err;
1764
1765 data = devm_kzalloc(dev, sizeof(struct lm90_data), GFP_KERNEL);
1766 if (!data)
1767 return -ENOMEM;
1768
1769 data->client = client;
1770 i2c_set_clientdata(client, data);
1771 mutex_init(&data->update_lock);
1772
1773 /* Set the device type */
1774 if (client->dev.of_node)
1775 data->kind = (enum chips)of_device_get_match_data(&client->dev);
1776 else
1777 data->kind = id->driver_data;
1778 if (data->kind == adm1032) {
1779 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE))
1780 client->flags &= ~I2C_CLIENT_PEC;
1781 }
1782
1783 /*
1784 * Different devices have different alarm bits triggering the
1785 * ALERT# output
1786 */
1787 data->alert_alarms = lm90_params[data->kind].alert_alarms;
1788
1789 /* Set chip capabilities */
1790 data->flags = lm90_params[data->kind].flags;
1791
1792 data->chip.ops = &lm90_ops;
1793 data->chip.info = data->info;
1794
1795 data->info[0] = &lm90_chip_info;
1796 data->info[1] = &data->temp_info;
1797
1798 info = &data->temp_info;
1799 info->type = hwmon_temp;
1800 info->config = data->channel_config;
1801
1802 data->channel_config[0] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1803 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1804 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM;
1805 data->channel_config[1] = HWMON_T_INPUT | HWMON_T_MIN | HWMON_T_MAX |
1806 HWMON_T_CRIT | HWMON_T_CRIT_HYST | HWMON_T_MIN_ALARM |
1807 HWMON_T_MAX_ALARM | HWMON_T_CRIT_ALARM | HWMON_T_FAULT;
1808
1809 if (data->flags & LM90_HAVE_OFFSET)
1810 data->channel_config[1] |= HWMON_T_OFFSET;
1811
1812 if (data->flags & LM90_HAVE_EMERGENCY) {
1813 data->channel_config[0] |= HWMON_T_EMERGENCY |
1814 HWMON_T_EMERGENCY_HYST;
1815 data->channel_config[1] |= HWMON_T_EMERGENCY |
1816 HWMON_T_EMERGENCY_HYST;
1817 }
1818
1819 if (data->flags & LM90_HAVE_EMERGENCY_ALARM) {
1820 data->channel_config[0] |= HWMON_T_EMERGENCY_ALARM;
1821 data->channel_config[1] |= HWMON_T_EMERGENCY_ALARM;
1822 }
1823
1824 if (data->flags & LM90_HAVE_TEMP3) {
1825 data->channel_config[2] = HWMON_T_INPUT |
1826 HWMON_T_MIN | HWMON_T_MAX |
1827 HWMON_T_CRIT | HWMON_T_CRIT_HYST |
1828 HWMON_T_EMERGENCY | HWMON_T_EMERGENCY_HYST |
1829 HWMON_T_MIN_ALARM | HWMON_T_MAX_ALARM |
1830 HWMON_T_CRIT_ALARM | HWMON_T_EMERGENCY_ALARM |
1831 HWMON_T_FAULT;
1832 }
1833
1834 data->reg_local_ext = lm90_params[data->kind].reg_local_ext;
1835
1836 /* Set maximum conversion rate */
1837 data->max_convrate = lm90_params[data->kind].max_convrate;
1838
1839 /* Initialize the LM90 chip */
1840 err = lm90_init_client(client, data);
1841 if (err < 0) {
1842 dev_err(dev, "Failed to initialize device\n");
1843 return err;
1844 }
1845
1846 /*
1847 * The 'pec' attribute is attached to the i2c device and thus created
1848 * separately.
1849 */
1850 if (client->flags & I2C_CLIENT_PEC) {
1851 err = device_create_file(dev, &dev_attr_pec);
1852 if (err)
1853 return err;
1854 err = devm_add_action_or_reset(dev, lm90_remove_pec, dev);
1855 if (err)
1856 return err;
1857 }
1858
1859 hwmon_dev = devm_hwmon_device_register_with_info(dev, client->name,
1860 data, &data->chip,
1861 NULL);
1862 if (IS_ERR(hwmon_dev))
1863 return PTR_ERR(hwmon_dev);
1864
1865 if (client->irq) {
1866 dev_dbg(dev, "IRQ: %d\n", client->irq);
1867 err = devm_request_threaded_irq(dev, client->irq,
1868 NULL, lm90_irq_thread,
1869 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
1870 "lm90", client);
1871 if (err < 0) {
1872 dev_err(dev, "cannot request IRQ %d\n", client->irq);
1873 return err;
1874 }
1875 }
1876
1877 return 0;
1878}
1879
1880static void lm90_alert(struct i2c_client *client, enum i2c_alert_protocol type,
1881 unsigned int flag)
1882{
1883 u16 alarms;
1884
1885 if (type != I2C_PROTOCOL_SMBUS_ALERT)
1886 return;
1887
1888 if (lm90_is_tripped(client, &alarms)) {
1889 /*
1890 * Disable ALERT# output, because these chips don't implement
1891 * SMBus alert correctly; they should only hold the alert line
1892 * low briefly.
1893 */
1894 struct lm90_data *data = i2c_get_clientdata(client);
1895
1896 if ((data->flags & LM90_HAVE_BROKEN_ALERT) &&
1897 (alarms & data->alert_alarms)) {
1898 int config;
1899
1900 dev_dbg(&client->dev, "Disabling ALERT#\n");
1901 config = lm90_read_reg(client, LM90_REG_R_CONFIG1);
1902 if (config >= 0)
1903 i2c_smbus_write_byte_data(client,
1904 LM90_REG_W_CONFIG1,
1905 config | 0x80);
1906 }
1907 } else {
1908 dev_info(&client->dev, "Everything OK\n");
1909 }
1910}
1911
1912static struct i2c_driver lm90_driver = {
1913 .class = I2C_CLASS_HWMON,
1914 .driver = {
1915 .name = "lm90",
1916 .of_match_table = of_match_ptr(lm90_of_match),
1917 },
1918 .probe = lm90_probe,
1919 .alert = lm90_alert,
1920 .id_table = lm90_id,
1921 .detect = lm90_detect,
1922 .address_list = normal_i2c,
1923};
1924
1925module_i2c_driver(lm90_driver);
1926
1927MODULE_AUTHOR("Jean Delvare <jdelvare@suse.de>");
1928MODULE_DESCRIPTION("LM90/ADM1032 driver");
1929MODULE_LICENSE("GPL");