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1// SPDX-License-Identifier: GPL-2.0 OR MIT
2/**************************************************************************
3 *
4 * Copyright 2015 VMware, Inc., Palo Alto, CA., USA
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27/*
28 * This file implements the vmwgfx context binding manager,
29 * The sole reason for having to use this code is that vmware guest
30 * backed contexts can be swapped out to their backing mobs by the device
31 * at any time, also swapped in at any time. At swapin time, the device
32 * validates the context bindings to make sure they point to valid resources.
33 * It's this outside-of-drawcall validation (that can happen at any time),
34 * that makes this code necessary.
35 *
36 * We therefore need to kill any context bindings pointing to a resource
37 * when the resource is swapped out. Furthermore, if the vmwgfx driver has
38 * swapped out the context we can't swap it in again to kill bindings because
39 * of backing mob reservation lockdep violations, so as part of
40 * context swapout, also kill all bindings of a context, so that they are
41 * already killed if a resource to which a binding points
42 * needs to be swapped out.
43 *
44 * Note that a resource can be pointed to by bindings from multiple contexts,
45 * Therefore we can't easily protect this data by a per context mutex
46 * (unless we use deadlock-safe WW mutexes). So we use a global binding_mutex
47 * to protect all binding manager data.
48 *
49 * Finally, any association between a context and a global resource
50 * (surface, shader or even DX query) is conceptually a context binding that
51 * needs to be tracked by this code.
52 */
53
54#include "vmwgfx_drv.h"
55#include "vmwgfx_binding.h"
56#include "device_include/svga3d_reg.h"
57#include <linux/vmalloc.h>
58
59#define VMW_BINDING_RT_BIT 0
60#define VMW_BINDING_PS_BIT 1
61#define VMW_BINDING_SO_T_BIT 2
62#define VMW_BINDING_VB_BIT 3
63#define VMW_BINDING_UAV_BIT 4
64#define VMW_BINDING_CS_UAV_BIT 5
65#define VMW_BINDING_NUM_BITS 6
66
67#define VMW_BINDING_PS_SR_BIT 0
68
69/**
70 * struct vmw_ctx_binding_state - per context binding state
71 *
72 * @dev_priv: Pointer to device private structure.
73 * @list: linked list of individual active bindings.
74 * @render_targets: Render target bindings.
75 * @texture_units: Texture units bindings.
76 * @ds_view: Depth-stencil view binding.
77 * @so_targets: StreamOutput target bindings.
78 * @vertex_buffers: Vertex buffer bindings.
79 * @index_buffer: Index buffer binding.
80 * @per_shader: Per shader-type bindings.
81 * @ua_views: UAV bindings.
82 * @so_state: StreamOutput bindings.
83 * @dirty: Bitmap tracking per binding-type changes that have not yet
84 * been emitted to the device.
85 * @dirty_vb: Bitmap tracking individual vertex buffer binding changes that
86 * have not yet been emitted to the device.
87 * @bind_cmd_buffer: Scratch space used to construct binding commands.
88 * @bind_cmd_count: Number of binding command data entries in @bind_cmd_buffer
89 * @bind_first_slot: Used together with @bind_cmd_buffer to indicate the
90 * device binding slot of the first command data entry in @bind_cmd_buffer.
91 *
92 * Note that this structure also provides storage space for the individual
93 * struct vmw_ctx_binding objects, so that no dynamic allocation is needed
94 * for individual bindings.
95 *
96 */
97struct vmw_ctx_binding_state {
98 struct vmw_private *dev_priv;
99 struct list_head list;
100 struct vmw_ctx_bindinfo_view render_targets[SVGA3D_RT_MAX];
101 struct vmw_ctx_bindinfo_tex texture_units[SVGA3D_NUM_TEXTURE_UNITS];
102 struct vmw_ctx_bindinfo_view ds_view;
103 struct vmw_ctx_bindinfo_so_target so_targets[SVGA3D_DX_MAX_SOTARGETS];
104 struct vmw_ctx_bindinfo_vb vertex_buffers[SVGA3D_DX_MAX_VERTEXBUFFERS];
105 struct vmw_ctx_bindinfo_ib index_buffer;
106 struct vmw_dx_shader_bindings per_shader[SVGA3D_NUM_SHADERTYPE];
107 struct vmw_ctx_bindinfo_uav ua_views[VMW_MAX_UAV_BIND_TYPE];
108 struct vmw_ctx_bindinfo_so so_state;
109
110 unsigned long dirty;
111 DECLARE_BITMAP(dirty_vb, SVGA3D_DX_MAX_VERTEXBUFFERS);
112
113 u32 bind_cmd_buffer[VMW_MAX_VIEW_BINDINGS];
114 u32 bind_cmd_count;
115 u32 bind_first_slot;
116};
117
118static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind);
119static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
120 bool rebind);
121static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi, bool rebind);
122static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind);
123static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind);
124static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind);
125static int vmw_binding_scrub_so_target(struct vmw_ctx_bindinfo *bi, bool rebind);
126static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs);
127static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi,
128 bool rebind);
129static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind);
130static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind);
131static int vmw_binding_scrub_uav(struct vmw_ctx_bindinfo *bi, bool rebind);
132static int vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo *bi, bool rebind);
133static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind);
134
135static void vmw_binding_build_asserts(void) __attribute__ ((unused));
136
137typedef int (*vmw_scrub_func)(struct vmw_ctx_bindinfo *, bool);
138
139/**
140 * struct vmw_binding_info - Per binding type information for the binding
141 * manager
142 *
143 * @size: The size of the struct binding derived from a struct vmw_ctx_bindinfo.
144 * @offsets: array[shader_slot] of offsets to the array[slot]
145 * of struct bindings for the binding type.
146 * @scrub_func: Pointer to the scrub function for this binding type.
147 *
148 * Holds static information to help optimize the binding manager and avoid
149 * an excessive amount of switch statements.
150 */
151struct vmw_binding_info {
152 size_t size;
153 const size_t *offsets;
154 vmw_scrub_func scrub_func;
155};
156
157/*
158 * A number of static variables that help determine the scrub func and the
159 * location of the struct vmw_ctx_bindinfo slots for each binding type.
160 */
161static const size_t vmw_binding_shader_offsets[] = {
162 offsetof(struct vmw_ctx_binding_state, per_shader[0].shader),
163 offsetof(struct vmw_ctx_binding_state, per_shader[1].shader),
164 offsetof(struct vmw_ctx_binding_state, per_shader[2].shader),
165 offsetof(struct vmw_ctx_binding_state, per_shader[3].shader),
166 offsetof(struct vmw_ctx_binding_state, per_shader[4].shader),
167 offsetof(struct vmw_ctx_binding_state, per_shader[5].shader),
168};
169static const size_t vmw_binding_rt_offsets[] = {
170 offsetof(struct vmw_ctx_binding_state, render_targets),
171};
172static const size_t vmw_binding_tex_offsets[] = {
173 offsetof(struct vmw_ctx_binding_state, texture_units),
174};
175static const size_t vmw_binding_cb_offsets[] = {
176 offsetof(struct vmw_ctx_binding_state, per_shader[0].const_buffers),
177 offsetof(struct vmw_ctx_binding_state, per_shader[1].const_buffers),
178 offsetof(struct vmw_ctx_binding_state, per_shader[2].const_buffers),
179 offsetof(struct vmw_ctx_binding_state, per_shader[3].const_buffers),
180 offsetof(struct vmw_ctx_binding_state, per_shader[4].const_buffers),
181 offsetof(struct vmw_ctx_binding_state, per_shader[5].const_buffers),
182};
183static const size_t vmw_binding_dx_ds_offsets[] = {
184 offsetof(struct vmw_ctx_binding_state, ds_view),
185};
186static const size_t vmw_binding_sr_offsets[] = {
187 offsetof(struct vmw_ctx_binding_state, per_shader[0].shader_res),
188 offsetof(struct vmw_ctx_binding_state, per_shader[1].shader_res),
189 offsetof(struct vmw_ctx_binding_state, per_shader[2].shader_res),
190 offsetof(struct vmw_ctx_binding_state, per_shader[3].shader_res),
191 offsetof(struct vmw_ctx_binding_state, per_shader[4].shader_res),
192 offsetof(struct vmw_ctx_binding_state, per_shader[5].shader_res),
193};
194static const size_t vmw_binding_so_target_offsets[] = {
195 offsetof(struct vmw_ctx_binding_state, so_targets),
196};
197static const size_t vmw_binding_vb_offsets[] = {
198 offsetof(struct vmw_ctx_binding_state, vertex_buffers),
199};
200static const size_t vmw_binding_ib_offsets[] = {
201 offsetof(struct vmw_ctx_binding_state, index_buffer),
202};
203static const size_t vmw_binding_uav_offsets[] = {
204 offsetof(struct vmw_ctx_binding_state, ua_views[0].views),
205};
206static const size_t vmw_binding_cs_uav_offsets[] = {
207 offsetof(struct vmw_ctx_binding_state, ua_views[1].views),
208};
209static const size_t vmw_binding_so_offsets[] = {
210 offsetof(struct vmw_ctx_binding_state, so_state),
211};
212
213static const struct vmw_binding_info vmw_binding_infos[] = {
214 [vmw_ctx_binding_shader] = {
215 .size = sizeof(struct vmw_ctx_bindinfo_shader),
216 .offsets = vmw_binding_shader_offsets,
217 .scrub_func = vmw_binding_scrub_shader},
218 [vmw_ctx_binding_rt] = {
219 .size = sizeof(struct vmw_ctx_bindinfo_view),
220 .offsets = vmw_binding_rt_offsets,
221 .scrub_func = vmw_binding_scrub_render_target},
222 [vmw_ctx_binding_tex] = {
223 .size = sizeof(struct vmw_ctx_bindinfo_tex),
224 .offsets = vmw_binding_tex_offsets,
225 .scrub_func = vmw_binding_scrub_texture},
226 [vmw_ctx_binding_cb] = {
227 .size = sizeof(struct vmw_ctx_bindinfo_cb),
228 .offsets = vmw_binding_cb_offsets,
229 .scrub_func = vmw_binding_scrub_cb},
230 [vmw_ctx_binding_dx_shader] = {
231 .size = sizeof(struct vmw_ctx_bindinfo_shader),
232 .offsets = vmw_binding_shader_offsets,
233 .scrub_func = vmw_binding_scrub_dx_shader},
234 [vmw_ctx_binding_dx_rt] = {
235 .size = sizeof(struct vmw_ctx_bindinfo_view),
236 .offsets = vmw_binding_rt_offsets,
237 .scrub_func = vmw_binding_scrub_dx_rt},
238 [vmw_ctx_binding_sr] = {
239 .size = sizeof(struct vmw_ctx_bindinfo_view),
240 .offsets = vmw_binding_sr_offsets,
241 .scrub_func = vmw_binding_scrub_sr},
242 [vmw_ctx_binding_ds] = {
243 .size = sizeof(struct vmw_ctx_bindinfo_view),
244 .offsets = vmw_binding_dx_ds_offsets,
245 .scrub_func = vmw_binding_scrub_dx_rt},
246 [vmw_ctx_binding_so_target] = {
247 .size = sizeof(struct vmw_ctx_bindinfo_so_target),
248 .offsets = vmw_binding_so_target_offsets,
249 .scrub_func = vmw_binding_scrub_so_target},
250 [vmw_ctx_binding_vb] = {
251 .size = sizeof(struct vmw_ctx_bindinfo_vb),
252 .offsets = vmw_binding_vb_offsets,
253 .scrub_func = vmw_binding_scrub_vb},
254 [vmw_ctx_binding_ib] = {
255 .size = sizeof(struct vmw_ctx_bindinfo_ib),
256 .offsets = vmw_binding_ib_offsets,
257 .scrub_func = vmw_binding_scrub_ib},
258 [vmw_ctx_binding_uav] = {
259 .size = sizeof(struct vmw_ctx_bindinfo_view),
260 .offsets = vmw_binding_uav_offsets,
261 .scrub_func = vmw_binding_scrub_uav},
262 [vmw_ctx_binding_cs_uav] = {
263 .size = sizeof(struct vmw_ctx_bindinfo_view),
264 .offsets = vmw_binding_cs_uav_offsets,
265 .scrub_func = vmw_binding_scrub_cs_uav},
266 [vmw_ctx_binding_so] = {
267 .size = sizeof(struct vmw_ctx_bindinfo_so),
268 .offsets = vmw_binding_so_offsets,
269 .scrub_func = vmw_binding_scrub_so},
270};
271
272/**
273 * vmw_cbs_context - Return a pointer to the context resource of a
274 * context binding state tracker.
275 *
276 * @cbs: The context binding state tracker.
277 *
278 * Provided there are any active bindings, this function will return an
279 * unreferenced pointer to the context resource that owns the context
280 * binding state tracker. If there are no active bindings, this function
281 * will return NULL. Note that the caller must somehow ensure that a reference
282 * is held on the context resource prior to calling this function.
283 */
284static const struct vmw_resource *
285vmw_cbs_context(const struct vmw_ctx_binding_state *cbs)
286{
287 if (list_empty(&cbs->list))
288 return NULL;
289
290 return list_first_entry(&cbs->list, struct vmw_ctx_bindinfo,
291 ctx_list)->ctx;
292}
293
294/**
295 * vmw_binding_loc - determine the struct vmw_ctx_bindinfo slot location.
296 *
297 * @cbs: Pointer to a struct vmw_ctx_binding state which holds the slot.
298 * @bt: The binding type.
299 * @shader_slot: The shader slot of the binding. If none, then set to 0.
300 * @slot: The slot of the binding.
301 */
302static struct vmw_ctx_bindinfo *
303vmw_binding_loc(struct vmw_ctx_binding_state *cbs,
304 enum vmw_ctx_binding_type bt, u32 shader_slot, u32 slot)
305{
306 const struct vmw_binding_info *b = &vmw_binding_infos[bt];
307 size_t offset = b->offsets[shader_slot] + b->size*slot;
308
309 return (struct vmw_ctx_bindinfo *)((u8 *) cbs + offset);
310}
311
312/**
313 * vmw_binding_drop: Stop tracking a context binding
314 *
315 * @bi: Pointer to binding tracker storage.
316 *
317 * Stops tracking a context binding, and re-initializes its storage.
318 * Typically used when the context binding is replaced with a binding to
319 * another (or the same, for that matter) resource.
320 */
321static void vmw_binding_drop(struct vmw_ctx_bindinfo *bi)
322{
323 list_del(&bi->ctx_list);
324 if (!list_empty(&bi->res_list))
325 list_del(&bi->res_list);
326 bi->ctx = NULL;
327}
328
329/**
330 * vmw_binding_add: Start tracking a context binding
331 *
332 * @cbs: Pointer to the context binding state tracker.
333 * @bi: Information about the binding to track.
334 * @shader_slot: The shader slot of the binding.
335 * @slot: The slot of the binding.
336 *
337 * Starts tracking the binding in the context binding
338 * state structure @cbs.
339 */
340void vmw_binding_add(struct vmw_ctx_binding_state *cbs,
341 const struct vmw_ctx_bindinfo *bi,
342 u32 shader_slot, u32 slot)
343{
344 struct vmw_ctx_bindinfo *loc =
345 vmw_binding_loc(cbs, bi->bt, shader_slot, slot);
346 const struct vmw_binding_info *b = &vmw_binding_infos[bi->bt];
347
348 if (loc->ctx != NULL)
349 vmw_binding_drop(loc);
350
351 memcpy(loc, bi, b->size);
352 loc->scrubbed = false;
353 list_add(&loc->ctx_list, &cbs->list);
354 INIT_LIST_HEAD(&loc->res_list);
355}
356
357/**
358 * vmw_binding_cb_offset_update: Update the offset of a cb binding
359 *
360 * @cbs: Pointer to the context binding state tracker.
361 * @shader_slot: The shader slot of the binding.
362 * @slot: The slot of the binding.
363 * @offsetInBytes: The new offset of the binding.
364 *
365 * Updates the offset of an existing cb binding in the context binding
366 * state structure @cbs.
367 */
368void vmw_binding_cb_offset_update(struct vmw_ctx_binding_state *cbs,
369 u32 shader_slot, u32 slot, u32 offsetInBytes)
370{
371 struct vmw_ctx_bindinfo *loc =
372 vmw_binding_loc(cbs, vmw_ctx_binding_cb, shader_slot, slot);
373 struct vmw_ctx_bindinfo_cb *loc_cb =
374 (struct vmw_ctx_bindinfo_cb *)((u8 *) loc);
375 loc_cb->offset = offsetInBytes;
376}
377
378/**
379 * vmw_binding_add_uav_index - Add UAV index for tracking.
380 * @cbs: Pointer to the context binding state tracker.
381 * @slot: UAV type to which bind this index.
382 * @index: The splice index to track.
383 */
384void vmw_binding_add_uav_index(struct vmw_ctx_binding_state *cbs, uint32 slot,
385 uint32 index)
386{
387 cbs->ua_views[slot].index = index;
388}
389
390/**
391 * vmw_binding_transfer: Transfer a context binding tracking entry.
392 *
393 * @cbs: Pointer to the persistent context binding state tracker.
394 * @from: Staged binding info built during execbuf
395 * @bi: Information about the binding to track.
396 *
397 */
398static void vmw_binding_transfer(struct vmw_ctx_binding_state *cbs,
399 const struct vmw_ctx_binding_state *from,
400 const struct vmw_ctx_bindinfo *bi)
401{
402 size_t offset = (unsigned long)bi - (unsigned long)from;
403 struct vmw_ctx_bindinfo *loc = (struct vmw_ctx_bindinfo *)
404 ((unsigned long) cbs + offset);
405
406 if (loc->ctx != NULL) {
407 WARN_ON(bi->scrubbed);
408
409 vmw_binding_drop(loc);
410 }
411
412 if (bi->res != NULL) {
413 memcpy(loc, bi, vmw_binding_infos[bi->bt].size);
414 list_add_tail(&loc->ctx_list, &cbs->list);
415 list_add_tail(&loc->res_list, &loc->res->binding_head);
416 }
417}
418
419/**
420 * vmw_binding_state_kill - Kill all bindings associated with a
421 * struct vmw_ctx_binding state structure, and re-initialize the structure.
422 *
423 * @cbs: Pointer to the context binding state tracker.
424 *
425 * Emits commands to scrub all bindings associated with the
426 * context binding state tracker. Then re-initializes the whole structure.
427 */
428void vmw_binding_state_kill(struct vmw_ctx_binding_state *cbs)
429{
430 struct vmw_ctx_bindinfo *entry, *next;
431
432 vmw_binding_state_scrub(cbs);
433 list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
434 vmw_binding_drop(entry);
435}
436
437/**
438 * vmw_binding_state_scrub - Scrub all bindings associated with a
439 * struct vmw_ctx_binding state structure.
440 *
441 * @cbs: Pointer to the context binding state tracker.
442 *
443 * Emits commands to scrub all bindings associated with the
444 * context binding state tracker.
445 */
446void vmw_binding_state_scrub(struct vmw_ctx_binding_state *cbs)
447{
448 struct vmw_ctx_bindinfo *entry;
449
450 list_for_each_entry(entry, &cbs->list, ctx_list) {
451 if (!entry->scrubbed) {
452 (void) vmw_binding_infos[entry->bt].scrub_func
453 (entry, false);
454 entry->scrubbed = true;
455 }
456 }
457
458 (void) vmw_binding_emit_dirty(cbs);
459}
460
461/**
462 * vmw_binding_res_list_kill - Kill all bindings on a
463 * resource binding list
464 *
465 * @head: list head of resource binding list
466 *
467 * Kills all bindings associated with a specific resource. Typically
468 * called before the resource is destroyed.
469 */
470void vmw_binding_res_list_kill(struct list_head *head)
471{
472 struct vmw_ctx_bindinfo *entry, *next;
473
474 vmw_binding_res_list_scrub(head);
475 list_for_each_entry_safe(entry, next, head, res_list)
476 vmw_binding_drop(entry);
477}
478
479/**
480 * vmw_binding_res_list_scrub - Scrub all bindings on a
481 * resource binding list
482 *
483 * @head: list head of resource binding list
484 *
485 * Scrub all bindings associated with a specific resource. Typically
486 * called before the resource is evicted.
487 */
488void vmw_binding_res_list_scrub(struct list_head *head)
489{
490 struct vmw_ctx_bindinfo *entry;
491
492 list_for_each_entry(entry, head, res_list) {
493 if (!entry->scrubbed) {
494 (void) vmw_binding_infos[entry->bt].scrub_func
495 (entry, false);
496 entry->scrubbed = true;
497 }
498 }
499
500 list_for_each_entry(entry, head, res_list) {
501 struct vmw_ctx_binding_state *cbs =
502 vmw_context_binding_state(entry->ctx);
503
504 (void) vmw_binding_emit_dirty(cbs);
505 }
506}
507
508
509/**
510 * vmw_binding_state_commit - Commit staged binding info
511 *
512 * @to: Staged binding info area to copy into to.
513 * @from: Staged binding info built during execbuf.
514 *
515 * Transfers binding info from a temporary structure
516 * (typically used by execbuf) to the persistent
517 * structure in the context. This can be done once commands have been
518 * submitted to hardware
519 */
520void vmw_binding_state_commit(struct vmw_ctx_binding_state *to,
521 struct vmw_ctx_binding_state *from)
522{
523 struct vmw_ctx_bindinfo *entry, *next;
524
525 list_for_each_entry_safe(entry, next, &from->list, ctx_list) {
526 vmw_binding_transfer(to, from, entry);
527 vmw_binding_drop(entry);
528 }
529
530 /* Also transfer uav splice indices */
531 to->ua_views[0].index = from->ua_views[0].index;
532 to->ua_views[1].index = from->ua_views[1].index;
533}
534
535/**
536 * vmw_binding_rebind_all - Rebind all scrubbed bindings of a context
537 *
538 * @cbs: Pointer to the context binding state tracker.
539 *
540 * Walks through the context binding list and rebinds all scrubbed
541 * resources.
542 */
543int vmw_binding_rebind_all(struct vmw_ctx_binding_state *cbs)
544{
545 struct vmw_ctx_bindinfo *entry;
546 int ret;
547
548 list_for_each_entry(entry, &cbs->list, ctx_list) {
549 if (likely(!entry->scrubbed))
550 continue;
551
552 if ((entry->res == NULL || entry->res->id ==
553 SVGA3D_INVALID_ID))
554 continue;
555
556 ret = vmw_binding_infos[entry->bt].scrub_func(entry, true);
557 if (unlikely(ret != 0))
558 return ret;
559
560 entry->scrubbed = false;
561 }
562
563 return vmw_binding_emit_dirty(cbs);
564}
565
566/**
567 * vmw_binding_scrub_shader - scrub a shader binding from a context.
568 *
569 * @bi: single binding information.
570 * @rebind: Whether to issue a bind instead of scrub command.
571 */
572static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
573{
574 struct vmw_ctx_bindinfo_shader *binding =
575 container_of(bi, typeof(*binding), bi);
576 struct vmw_private *dev_priv = bi->ctx->dev_priv;
577 struct {
578 SVGA3dCmdHeader header;
579 SVGA3dCmdSetShader body;
580 } *cmd;
581
582 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
583 if (unlikely(cmd == NULL))
584 return -ENOMEM;
585
586 cmd->header.id = SVGA_3D_CMD_SET_SHADER;
587 cmd->header.size = sizeof(cmd->body);
588 cmd->body.cid = bi->ctx->id;
589 cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
590 cmd->body.shid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
591 vmw_cmd_commit(dev_priv, sizeof(*cmd));
592
593 return 0;
594}
595
596/**
597 * vmw_binding_scrub_render_target - scrub a render target binding
598 * from a context.
599 *
600 * @bi: single binding information.
601 * @rebind: Whether to issue a bind instead of scrub command.
602 */
603static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
604 bool rebind)
605{
606 struct vmw_ctx_bindinfo_view *binding =
607 container_of(bi, typeof(*binding), bi);
608 struct vmw_private *dev_priv = bi->ctx->dev_priv;
609 struct {
610 SVGA3dCmdHeader header;
611 SVGA3dCmdSetRenderTarget body;
612 } *cmd;
613
614 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
615 if (unlikely(cmd == NULL))
616 return -ENOMEM;
617
618 cmd->header.id = SVGA_3D_CMD_SETRENDERTARGET;
619 cmd->header.size = sizeof(cmd->body);
620 cmd->body.cid = bi->ctx->id;
621 cmd->body.type = binding->slot;
622 cmd->body.target.sid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
623 cmd->body.target.face = 0;
624 cmd->body.target.mipmap = 0;
625 vmw_cmd_commit(dev_priv, sizeof(*cmd));
626
627 return 0;
628}
629
630/**
631 * vmw_binding_scrub_texture - scrub a texture binding from a context.
632 *
633 * @bi: single binding information.
634 * @rebind: Whether to issue a bind instead of scrub command.
635 *
636 * TODO: Possibly complement this function with a function that takes
637 * a list of texture bindings and combines them to a single command.
638 */
639static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi,
640 bool rebind)
641{
642 struct vmw_ctx_bindinfo_tex *binding =
643 container_of(bi, typeof(*binding), bi);
644 struct vmw_private *dev_priv = bi->ctx->dev_priv;
645 struct {
646 SVGA3dCmdHeader header;
647 struct {
648 SVGA3dCmdSetTextureState c;
649 SVGA3dTextureState s1;
650 } body;
651 } *cmd;
652
653 cmd = VMW_CMD_RESERVE(dev_priv, sizeof(*cmd));
654 if (unlikely(cmd == NULL))
655 return -ENOMEM;
656
657 cmd->header.id = SVGA_3D_CMD_SETTEXTURESTATE;
658 cmd->header.size = sizeof(cmd->body);
659 cmd->body.c.cid = bi->ctx->id;
660 cmd->body.s1.stage = binding->texture_stage;
661 cmd->body.s1.name = SVGA3D_TS_BIND_TEXTURE;
662 cmd->body.s1.value = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
663 vmw_cmd_commit(dev_priv, sizeof(*cmd));
664
665 return 0;
666}
667
668/**
669 * vmw_binding_scrub_dx_shader - scrub a dx shader binding from a context.
670 *
671 * @bi: single binding information.
672 * @rebind: Whether to issue a bind instead of scrub command.
673 */
674static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
675{
676 struct vmw_ctx_bindinfo_shader *binding =
677 container_of(bi, typeof(*binding), bi);
678 struct vmw_private *dev_priv = bi->ctx->dev_priv;
679 struct {
680 SVGA3dCmdHeader header;
681 SVGA3dCmdDXSetShader body;
682 } *cmd;
683
684 cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);
685 if (unlikely(cmd == NULL))
686 return -ENOMEM;
687
688 cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER;
689 cmd->header.size = sizeof(cmd->body);
690 cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
691 cmd->body.shaderId = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
692 vmw_cmd_commit(dev_priv, sizeof(*cmd));
693
694 return 0;
695}
696
697/**
698 * vmw_binding_scrub_cb - scrub a constant buffer binding from a context.
699 *
700 * @bi: single binding information.
701 * @rebind: Whether to issue a bind instead of scrub command.
702 */
703static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind)
704{
705 struct vmw_ctx_bindinfo_cb *binding =
706 container_of(bi, typeof(*binding), bi);
707 struct vmw_private *dev_priv = bi->ctx->dev_priv;
708 struct {
709 SVGA3dCmdHeader header;
710 SVGA3dCmdDXSetSingleConstantBuffer body;
711 } *cmd;
712
713 cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);
714 if (unlikely(cmd == NULL))
715 return -ENOMEM;
716
717 cmd->header.id = SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER;
718 cmd->header.size = sizeof(cmd->body);
719 cmd->body.slot = binding->slot;
720 cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
721 if (rebind) {
722 cmd->body.offsetInBytes = binding->offset;
723 cmd->body.sizeInBytes = binding->size;
724 cmd->body.sid = bi->res->id;
725 } else {
726 cmd->body.offsetInBytes = 0;
727 cmd->body.sizeInBytes = 0;
728 cmd->body.sid = SVGA3D_INVALID_ID;
729 }
730 vmw_cmd_commit(dev_priv, sizeof(*cmd));
731
732 return 0;
733}
734
735/**
736 * vmw_collect_view_ids - Build view id data for a view binding command
737 * without checking which bindings actually need to be emitted
738 *
739 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
740 * @biv: Pointer to where the binding info array is stored in @cbs
741 * @max_num: Maximum number of entries in the @bi array.
742 *
743 * Scans the @bi array for bindings and builds a buffer of view id data.
744 * Stops at the first non-existing binding in the @bi array.
745 * On output, @cbs->bind_cmd_count contains the number of bindings to be
746 * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
747 * contains the command data.
748 */
749static void vmw_collect_view_ids(struct vmw_ctx_binding_state *cbs,
750 const struct vmw_ctx_bindinfo_view *biv,
751 u32 max_num)
752{
753 unsigned long i;
754
755 cbs->bind_cmd_count = 0;
756 cbs->bind_first_slot = 0;
757
758 for (i = 0; i < max_num; ++i, ++biv) {
759 if (!biv->bi.ctx)
760 break;
761
762 cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
763 ((biv->bi.scrubbed) ?
764 SVGA3D_INVALID_ID : biv->bi.res->id);
765 }
766}
767
768/**
769 * vmw_collect_dirty_view_ids - Build view id data for a view binding command
770 *
771 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
772 * @bi: Pointer to where the binding info array is stored in @cbs
773 * @dirty: Bitmap indicating which bindings need to be emitted.
774 * @max_num: Maximum number of entries in the @bi array.
775 *
776 * Scans the @bi array for bindings that need to be emitted and
777 * builds a buffer of view id data.
778 * On output, @cbs->bind_cmd_count contains the number of bindings to be
779 * emitted, @cbs->bind_first_slot indicates the index of the first emitted
780 * binding, and @cbs->bind_cmd_buffer contains the command data.
781 */
782static void vmw_collect_dirty_view_ids(struct vmw_ctx_binding_state *cbs,
783 const struct vmw_ctx_bindinfo *bi,
784 unsigned long *dirty,
785 u32 max_num)
786{
787 const struct vmw_ctx_bindinfo_view *biv =
788 container_of(bi, struct vmw_ctx_bindinfo_view, bi);
789 unsigned long i, next_bit;
790
791 cbs->bind_cmd_count = 0;
792 i = find_first_bit(dirty, max_num);
793 next_bit = i;
794 cbs->bind_first_slot = i;
795
796 biv += i;
797 for (; i < max_num; ++i, ++biv) {
798 cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
799 ((!biv->bi.ctx || biv->bi.scrubbed) ?
800 SVGA3D_INVALID_ID : biv->bi.res->id);
801
802 if (next_bit == i) {
803 next_bit = find_next_bit(dirty, max_num, i + 1);
804 if (next_bit >= max_num)
805 break;
806 }
807 }
808}
809
810/**
811 * vmw_emit_set_sr - Issue delayed DX shader resource binding commands
812 *
813 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
814 * @shader_slot: The shader slot of the binding.
815 */
816static int vmw_emit_set_sr(struct vmw_ctx_binding_state *cbs,
817 int shader_slot)
818{
819 const struct vmw_ctx_bindinfo *loc =
820 &cbs->per_shader[shader_slot].shader_res[0].bi;
821 struct {
822 SVGA3dCmdHeader header;
823 SVGA3dCmdDXSetShaderResources body;
824 } *cmd;
825 size_t cmd_size, view_id_size;
826 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
827
828 vmw_collect_dirty_view_ids(cbs, loc,
829 cbs->per_shader[shader_slot].dirty_sr,
830 SVGA3D_DX_MAX_SRVIEWS);
831 if (cbs->bind_cmd_count == 0)
832 return 0;
833
834 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
835 cmd_size = sizeof(*cmd) + view_id_size;
836 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
837 if (unlikely(cmd == NULL))
838 return -ENOMEM;
839
840 cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER_RESOURCES;
841 cmd->header.size = sizeof(cmd->body) + view_id_size;
842 cmd->body.type = shader_slot + SVGA3D_SHADERTYPE_MIN;
843 cmd->body.startView = cbs->bind_first_slot;
844
845 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
846
847 vmw_cmd_commit(ctx->dev_priv, cmd_size);
848 bitmap_clear(cbs->per_shader[shader_slot].dirty_sr,
849 cbs->bind_first_slot, cbs->bind_cmd_count);
850
851 return 0;
852}
853
854/**
855 * vmw_emit_set_rt - Issue delayed DX rendertarget binding commands
856 *
857 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
858 */
859static int vmw_emit_set_rt(struct vmw_ctx_binding_state *cbs)
860{
861 const struct vmw_ctx_bindinfo_view *loc = &cbs->render_targets[0];
862 struct {
863 SVGA3dCmdHeader header;
864 SVGA3dCmdDXSetRenderTargets body;
865 } *cmd;
866 size_t cmd_size, view_id_size;
867 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
868
869 vmw_collect_view_ids(cbs, loc, SVGA3D_DX_MAX_RENDER_TARGETS);
870 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
871 cmd_size = sizeof(*cmd) + view_id_size;
872 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
873 if (unlikely(cmd == NULL))
874 return -ENOMEM;
875
876 cmd->header.id = SVGA_3D_CMD_DX_SET_RENDERTARGETS;
877 cmd->header.size = sizeof(cmd->body) + view_id_size;
878
879 if (cbs->ds_view.bi.ctx && !cbs->ds_view.bi.scrubbed)
880 cmd->body.depthStencilViewId = cbs->ds_view.bi.res->id;
881 else
882 cmd->body.depthStencilViewId = SVGA3D_INVALID_ID;
883
884 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
885
886 vmw_cmd_commit(ctx->dev_priv, cmd_size);
887
888 return 0;
889
890}
891
892/**
893 * vmw_collect_so_targets - Build SVGA3dSoTarget data for a binding command
894 * without checking which bindings actually need to be emitted
895 *
896 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
897 * @biso: Pointer to where the binding info array is stored in @cbs
898 * @max_num: Maximum number of entries in the @bi array.
899 *
900 * Scans the @bi array for bindings and builds a buffer of SVGA3dSoTarget data.
901 * Stops at the first non-existing binding in the @bi array.
902 * On output, @cbs->bind_cmd_count contains the number of bindings to be
903 * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
904 * contains the command data.
905 */
906static void vmw_collect_so_targets(struct vmw_ctx_binding_state *cbs,
907 const struct vmw_ctx_bindinfo_so_target *biso,
908 u32 max_num)
909{
910 unsigned long i;
911 SVGA3dSoTarget *so_buffer = (SVGA3dSoTarget *) cbs->bind_cmd_buffer;
912
913 cbs->bind_cmd_count = 0;
914 cbs->bind_first_slot = 0;
915
916 for (i = 0; i < max_num; ++i, ++biso, ++so_buffer,
917 ++cbs->bind_cmd_count) {
918 if (!biso->bi.ctx)
919 break;
920
921 if (!biso->bi.scrubbed) {
922 so_buffer->sid = biso->bi.res->id;
923 so_buffer->offset = biso->offset;
924 so_buffer->sizeInBytes = biso->size;
925 } else {
926 so_buffer->sid = SVGA3D_INVALID_ID;
927 so_buffer->offset = 0;
928 so_buffer->sizeInBytes = 0;
929 }
930 }
931}
932
933/**
934 * vmw_emit_set_so_target - Issue delayed streamout binding commands
935 *
936 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
937 */
938static int vmw_emit_set_so_target(struct vmw_ctx_binding_state *cbs)
939{
940 const struct vmw_ctx_bindinfo_so_target *loc = &cbs->so_targets[0];
941 struct {
942 SVGA3dCmdHeader header;
943 SVGA3dCmdDXSetSOTargets body;
944 } *cmd;
945 size_t cmd_size, so_target_size;
946 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
947
948 vmw_collect_so_targets(cbs, loc, SVGA3D_DX_MAX_SOTARGETS);
949 if (cbs->bind_cmd_count == 0)
950 return 0;
951
952 so_target_size = cbs->bind_cmd_count*sizeof(SVGA3dSoTarget);
953 cmd_size = sizeof(*cmd) + so_target_size;
954 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
955 if (unlikely(cmd == NULL))
956 return -ENOMEM;
957
958 cmd->header.id = SVGA_3D_CMD_DX_SET_SOTARGETS;
959 cmd->header.size = sizeof(cmd->body) + so_target_size;
960 memcpy(&cmd[1], cbs->bind_cmd_buffer, so_target_size);
961
962 vmw_cmd_commit(ctx->dev_priv, cmd_size);
963
964 return 0;
965
966}
967
968/**
969 * vmw_binding_emit_dirty_ps - Issue delayed per shader binding commands
970 *
971 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
972 *
973 */
974static int vmw_binding_emit_dirty_ps(struct vmw_ctx_binding_state *cbs)
975{
976 struct vmw_dx_shader_bindings *sb = &cbs->per_shader[0];
977 u32 i;
978 int ret;
979
980 for (i = 0; i < SVGA3D_NUM_SHADERTYPE_DX10; ++i, ++sb) {
981 if (!test_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty))
982 continue;
983
984 ret = vmw_emit_set_sr(cbs, i);
985 if (ret)
986 break;
987
988 __clear_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty);
989 }
990
991 return 0;
992}
993
994/**
995 * vmw_collect_dirty_vbs - Build SVGA3dVertexBuffer data for a
996 * SVGA3dCmdDXSetVertexBuffers command
997 *
998 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
999 * @bi: Pointer to where the binding info array is stored in @cbs
1000 * @dirty: Bitmap indicating which bindings need to be emitted.
1001 * @max_num: Maximum number of entries in the @bi array.
1002 *
1003 * Scans the @bi array for bindings that need to be emitted and
1004 * builds a buffer of SVGA3dVertexBuffer data.
1005 * On output, @cbs->bind_cmd_count contains the number of bindings to be
1006 * emitted, @cbs->bind_first_slot indicates the index of the first emitted
1007 * binding, and @cbs->bind_cmd_buffer contains the command data.
1008 */
1009static void vmw_collect_dirty_vbs(struct vmw_ctx_binding_state *cbs,
1010 const struct vmw_ctx_bindinfo *bi,
1011 unsigned long *dirty,
1012 u32 max_num)
1013{
1014 const struct vmw_ctx_bindinfo_vb *biv =
1015 container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
1016 unsigned long i, next_bit;
1017 SVGA3dVertexBuffer *vbs = (SVGA3dVertexBuffer *) &cbs->bind_cmd_buffer;
1018
1019 cbs->bind_cmd_count = 0;
1020 i = find_first_bit(dirty, max_num);
1021 next_bit = i;
1022 cbs->bind_first_slot = i;
1023
1024 biv += i;
1025 for (; i < max_num; ++i, ++biv, ++vbs) {
1026 if (!biv->bi.ctx || biv->bi.scrubbed) {
1027 vbs->sid = SVGA3D_INVALID_ID;
1028 vbs->stride = 0;
1029 vbs->offset = 0;
1030 } else {
1031 vbs->sid = biv->bi.res->id;
1032 vbs->stride = biv->stride;
1033 vbs->offset = biv->offset;
1034 }
1035 cbs->bind_cmd_count++;
1036 if (next_bit == i) {
1037 next_bit = find_next_bit(dirty, max_num, i + 1);
1038 if (next_bit >= max_num)
1039 break;
1040 }
1041 }
1042}
1043
1044/**
1045 * vmw_emit_set_vb - Issue delayed vertex buffer binding commands
1046 *
1047 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
1048 *
1049 */
1050static int vmw_emit_set_vb(struct vmw_ctx_binding_state *cbs)
1051{
1052 const struct vmw_ctx_bindinfo *loc =
1053 &cbs->vertex_buffers[0].bi;
1054 struct {
1055 SVGA3dCmdHeader header;
1056 SVGA3dCmdDXSetVertexBuffers body;
1057 } *cmd;
1058 size_t cmd_size, set_vb_size;
1059 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1060
1061 vmw_collect_dirty_vbs(cbs, loc, cbs->dirty_vb,
1062 SVGA3D_DX_MAX_VERTEXBUFFERS);
1063 if (cbs->bind_cmd_count == 0)
1064 return 0;
1065
1066 set_vb_size = cbs->bind_cmd_count*sizeof(SVGA3dVertexBuffer);
1067 cmd_size = sizeof(*cmd) + set_vb_size;
1068 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
1069 if (unlikely(cmd == NULL))
1070 return -ENOMEM;
1071
1072 cmd->header.id = SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS;
1073 cmd->header.size = sizeof(cmd->body) + set_vb_size;
1074 cmd->body.startBuffer = cbs->bind_first_slot;
1075
1076 memcpy(&cmd[1], cbs->bind_cmd_buffer, set_vb_size);
1077
1078 vmw_cmd_commit(ctx->dev_priv, cmd_size);
1079 bitmap_clear(cbs->dirty_vb,
1080 cbs->bind_first_slot, cbs->bind_cmd_count);
1081
1082 return 0;
1083}
1084
1085static int vmw_emit_set_uav(struct vmw_ctx_binding_state *cbs)
1086{
1087 const struct vmw_ctx_bindinfo_view *loc = &cbs->ua_views[0].views[0];
1088 struct {
1089 SVGA3dCmdHeader header;
1090 SVGA3dCmdDXSetUAViews body;
1091 } *cmd;
1092 size_t cmd_size, view_id_size;
1093 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1094
1095 vmw_collect_view_ids(cbs, loc, vmw_max_num_uavs(cbs->dev_priv));
1096 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
1097 cmd_size = sizeof(*cmd) + view_id_size;
1098 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
1099 if (!cmd)
1100 return -ENOMEM;
1101
1102 cmd->header.id = SVGA_3D_CMD_DX_SET_UA_VIEWS;
1103 cmd->header.size = sizeof(cmd->body) + view_id_size;
1104
1105 /* Splice index is specified user-space */
1106 cmd->body.uavSpliceIndex = cbs->ua_views[0].index;
1107
1108 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
1109
1110 vmw_cmd_commit(ctx->dev_priv, cmd_size);
1111
1112 return 0;
1113}
1114
1115static int vmw_emit_set_cs_uav(struct vmw_ctx_binding_state *cbs)
1116{
1117 const struct vmw_ctx_bindinfo_view *loc = &cbs->ua_views[1].views[0];
1118 struct {
1119 SVGA3dCmdHeader header;
1120 SVGA3dCmdDXSetCSUAViews body;
1121 } *cmd;
1122 size_t cmd_size, view_id_size;
1123 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1124
1125 vmw_collect_view_ids(cbs, loc, vmw_max_num_uavs(cbs->dev_priv));
1126 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
1127 cmd_size = sizeof(*cmd) + view_id_size;
1128 cmd = VMW_CMD_CTX_RESERVE(ctx->dev_priv, cmd_size, ctx->id);
1129 if (!cmd)
1130 return -ENOMEM;
1131
1132 cmd->header.id = SVGA_3D_CMD_DX_SET_CS_UA_VIEWS;
1133 cmd->header.size = sizeof(cmd->body) + view_id_size;
1134
1135 /* Start index is specified user-space */
1136 cmd->body.startIndex = cbs->ua_views[1].index;
1137
1138 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
1139
1140 vmw_cmd_commit(ctx->dev_priv, cmd_size);
1141
1142 return 0;
1143}
1144
1145/**
1146 * vmw_binding_emit_dirty - Issue delayed binding commands
1147 *
1148 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
1149 *
1150 * This function issues the delayed binding commands that arise from
1151 * previous scrub / unscrub calls. These binding commands are typically
1152 * commands that batch a number of bindings and therefore it makes sense
1153 * to delay them.
1154 */
1155static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs)
1156{
1157 int ret = 0;
1158 unsigned long hit = 0;
1159
1160 while ((hit = find_next_bit(&cbs->dirty, VMW_BINDING_NUM_BITS, hit))
1161 < VMW_BINDING_NUM_BITS) {
1162
1163 switch (hit) {
1164 case VMW_BINDING_RT_BIT:
1165 ret = vmw_emit_set_rt(cbs);
1166 break;
1167 case VMW_BINDING_PS_BIT:
1168 ret = vmw_binding_emit_dirty_ps(cbs);
1169 break;
1170 case VMW_BINDING_SO_T_BIT:
1171 ret = vmw_emit_set_so_target(cbs);
1172 break;
1173 case VMW_BINDING_VB_BIT:
1174 ret = vmw_emit_set_vb(cbs);
1175 break;
1176 case VMW_BINDING_UAV_BIT:
1177 ret = vmw_emit_set_uav(cbs);
1178 break;
1179 case VMW_BINDING_CS_UAV_BIT:
1180 ret = vmw_emit_set_cs_uav(cbs);
1181 break;
1182 default:
1183 BUG();
1184 }
1185 if (ret)
1186 return ret;
1187
1188 __clear_bit(hit, &cbs->dirty);
1189 hit++;
1190 }
1191
1192 return 0;
1193}
1194
1195/**
1196 * vmw_binding_scrub_sr - Schedule a dx shaderresource binding
1197 * scrub from a context
1198 *
1199 * @bi: single binding information.
1200 * @rebind: Whether to issue a bind instead of scrub command.
1201 */
1202static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind)
1203{
1204 struct vmw_ctx_bindinfo_view *biv =
1205 container_of(bi, struct vmw_ctx_bindinfo_view, bi);
1206 struct vmw_ctx_binding_state *cbs =
1207 vmw_context_binding_state(bi->ctx);
1208
1209 __set_bit(biv->slot, cbs->per_shader[biv->shader_slot].dirty_sr);
1210 __set_bit(VMW_BINDING_PS_SR_BIT,
1211 &cbs->per_shader[biv->shader_slot].dirty);
1212 __set_bit(VMW_BINDING_PS_BIT, &cbs->dirty);
1213
1214 return 0;
1215}
1216
1217/**
1218 * vmw_binding_scrub_dx_rt - Schedule a dx rendertarget binding
1219 * scrub from a context
1220 *
1221 * @bi: single binding information.
1222 * @rebind: Whether to issue a bind instead of scrub command.
1223 */
1224static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind)
1225{
1226 struct vmw_ctx_binding_state *cbs =
1227 vmw_context_binding_state(bi->ctx);
1228
1229 __set_bit(VMW_BINDING_RT_BIT, &cbs->dirty);
1230
1231 return 0;
1232}
1233
1234/**
1235 * vmw_binding_scrub_so_target - Schedule a dx streamoutput buffer binding
1236 * scrub from a context
1237 *
1238 * @bi: single binding information.
1239 * @rebind: Whether to issue a bind instead of scrub command.
1240 */
1241static int vmw_binding_scrub_so_target(struct vmw_ctx_bindinfo *bi, bool rebind)
1242{
1243 struct vmw_ctx_binding_state *cbs =
1244 vmw_context_binding_state(bi->ctx);
1245
1246 __set_bit(VMW_BINDING_SO_T_BIT, &cbs->dirty);
1247
1248 return 0;
1249}
1250
1251/**
1252 * vmw_binding_scrub_vb - Schedule a dx vertex buffer binding
1253 * scrub from a context
1254 *
1255 * @bi: single binding information.
1256 * @rebind: Whether to issue a bind instead of scrub command.
1257 */
1258static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind)
1259{
1260 struct vmw_ctx_bindinfo_vb *bivb =
1261 container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
1262 struct vmw_ctx_binding_state *cbs =
1263 vmw_context_binding_state(bi->ctx);
1264
1265 __set_bit(bivb->slot, cbs->dirty_vb);
1266 __set_bit(VMW_BINDING_VB_BIT, &cbs->dirty);
1267
1268 return 0;
1269}
1270
1271/**
1272 * vmw_binding_scrub_ib - scrub a dx index buffer binding from a context
1273 *
1274 * @bi: single binding information.
1275 * @rebind: Whether to issue a bind instead of scrub command.
1276 */
1277static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind)
1278{
1279 struct vmw_ctx_bindinfo_ib *binding =
1280 container_of(bi, typeof(*binding), bi);
1281 struct vmw_private *dev_priv = bi->ctx->dev_priv;
1282 struct {
1283 SVGA3dCmdHeader header;
1284 SVGA3dCmdDXSetIndexBuffer body;
1285 } *cmd;
1286
1287 cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);
1288 if (unlikely(cmd == NULL))
1289 return -ENOMEM;
1290
1291 cmd->header.id = SVGA_3D_CMD_DX_SET_INDEX_BUFFER;
1292 cmd->header.size = sizeof(cmd->body);
1293 if (rebind) {
1294 cmd->body.sid = bi->res->id;
1295 cmd->body.format = binding->format;
1296 cmd->body.offset = binding->offset;
1297 } else {
1298 cmd->body.sid = SVGA3D_INVALID_ID;
1299 cmd->body.format = 0;
1300 cmd->body.offset = 0;
1301 }
1302
1303 vmw_cmd_commit(dev_priv, sizeof(*cmd));
1304
1305 return 0;
1306}
1307
1308static int vmw_binding_scrub_uav(struct vmw_ctx_bindinfo *bi, bool rebind)
1309{
1310 struct vmw_ctx_binding_state *cbs = vmw_context_binding_state(bi->ctx);
1311
1312 __set_bit(VMW_BINDING_UAV_BIT, &cbs->dirty);
1313 return 0;
1314}
1315
1316static int vmw_binding_scrub_cs_uav(struct vmw_ctx_bindinfo *bi, bool rebind)
1317{
1318 struct vmw_ctx_binding_state *cbs = vmw_context_binding_state(bi->ctx);
1319
1320 __set_bit(VMW_BINDING_CS_UAV_BIT, &cbs->dirty);
1321 return 0;
1322}
1323
1324/**
1325 * vmw_binding_scrub_so - Scrub a streamoutput binding from context.
1326 * @bi: Single binding information.
1327 * @rebind: Whether to issue a bind instead of scrub command.
1328 */
1329static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind)
1330{
1331 struct vmw_ctx_bindinfo_so *binding =
1332 container_of(bi, typeof(*binding), bi);
1333 struct vmw_private *dev_priv = bi->ctx->dev_priv;
1334 struct {
1335 SVGA3dCmdHeader header;
1336 SVGA3dCmdDXSetStreamOutput body;
1337 } *cmd;
1338
1339 cmd = VMW_CMD_CTX_RESERVE(dev_priv, sizeof(*cmd), bi->ctx->id);
1340 if (!cmd)
1341 return -ENOMEM;
1342
1343 cmd->header.id = SVGA_3D_CMD_DX_SET_STREAMOUTPUT;
1344 cmd->header.size = sizeof(cmd->body);
1345 cmd->body.soid = rebind ? bi->res->id : SVGA3D_INVALID_ID;
1346 vmw_cmd_commit(dev_priv, sizeof(*cmd));
1347
1348 return 0;
1349}
1350
1351/**
1352 * vmw_binding_state_alloc - Allocate a struct vmw_ctx_binding_state.
1353 *
1354 * @dev_priv: Pointer to a device private structure.
1355 *
1356 * Returns a pointer to a newly allocated struct or an error pointer on error.
1357 */
1358struct vmw_ctx_binding_state *
1359vmw_binding_state_alloc(struct vmw_private *dev_priv)
1360{
1361 struct vmw_ctx_binding_state *cbs;
1362
1363 cbs = vzalloc(sizeof(*cbs));
1364 if (!cbs) {
1365 return ERR_PTR(-ENOMEM);
1366 }
1367
1368 cbs->dev_priv = dev_priv;
1369 INIT_LIST_HEAD(&cbs->list);
1370
1371 return cbs;
1372}
1373
1374/**
1375 * vmw_binding_state_free - Free a struct vmw_ctx_binding_state.
1376 *
1377 * @cbs: Pointer to the struct vmw_ctx_binding_state to be freed.
1378 */
1379void vmw_binding_state_free(struct vmw_ctx_binding_state *cbs)
1380{
1381 vfree(cbs);
1382}
1383
1384/**
1385 * vmw_binding_state_list - Get the binding list of a
1386 * struct vmw_ctx_binding_state
1387 *
1388 * @cbs: Pointer to the struct vmw_ctx_binding_state
1389 *
1390 * Returns the binding list which can be used to traverse through the bindings
1391 * and access the resource information of all bindings.
1392 */
1393struct list_head *vmw_binding_state_list(struct vmw_ctx_binding_state *cbs)
1394{
1395 return &cbs->list;
1396}
1397
1398/**
1399 * vmw_binding_state_reset - clear a struct vmw_ctx_binding_state
1400 *
1401 * @cbs: Pointer to the struct vmw_ctx_binding_state to be cleared
1402 *
1403 * Drops all bindings registered in @cbs. No device binding actions are
1404 * performed.
1405 */
1406void vmw_binding_state_reset(struct vmw_ctx_binding_state *cbs)
1407{
1408 struct vmw_ctx_bindinfo *entry, *next;
1409
1410 list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
1411 vmw_binding_drop(entry);
1412}
1413
1414/**
1415 * vmw_binding_dirtying - Return whether a binding type is dirtying its resource
1416 * @binding_type: The binding type
1417 *
1418 * Each time a resource is put on the validation list as the result of a
1419 * context binding referencing it, we need to determine whether that resource
1420 * will be dirtied (written to by the GPU) as a result of the corresponding
1421 * GPU operation. Currently rendertarget-, depth-stencil-, stream-output-target
1422 * and unordered access view bindings are capable of dirtying its resource.
1423 *
1424 * Return: Whether the binding type dirties the resource its binding points to.
1425 */
1426u32 vmw_binding_dirtying(enum vmw_ctx_binding_type binding_type)
1427{
1428 static u32 is_binding_dirtying[vmw_ctx_binding_max] = {
1429 [vmw_ctx_binding_rt] = VMW_RES_DIRTY_SET,
1430 [vmw_ctx_binding_dx_rt] = VMW_RES_DIRTY_SET,
1431 [vmw_ctx_binding_ds] = VMW_RES_DIRTY_SET,
1432 [vmw_ctx_binding_so_target] = VMW_RES_DIRTY_SET,
1433 [vmw_ctx_binding_uav] = VMW_RES_DIRTY_SET,
1434 [vmw_ctx_binding_cs_uav] = VMW_RES_DIRTY_SET,
1435 };
1436
1437 /* Review this function as new bindings are added. */
1438 BUILD_BUG_ON(vmw_ctx_binding_max != 14);
1439 return is_binding_dirtying[binding_type];
1440}
1441
1442/*
1443 * This function is unused at run-time, and only used to hold various build
1444 * asserts important for code optimization assumptions.
1445 */
1446static void vmw_binding_build_asserts(void)
1447{
1448 BUILD_BUG_ON(SVGA3D_NUM_SHADERTYPE_DX10 != 3);
1449 BUILD_BUG_ON(SVGA3D_DX_MAX_RENDER_TARGETS > SVGA3D_RT_MAX);
1450 BUILD_BUG_ON(sizeof(uint32) != sizeof(u32));
1451
1452 /*
1453 * struct vmw_ctx_binding_state::bind_cmd_buffer is used for various
1454 * view id arrays.
1455 */
1456 BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_RT_MAX);
1457 BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_SRVIEWS);
1458 BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_CONSTBUFFERS);
1459
1460 /*
1461 * struct vmw_ctx_binding_state::bind_cmd_buffer is used for
1462 * u32 view ids, SVGA3dSoTargets and SVGA3dVertexBuffers
1463 */
1464 BUILD_BUG_ON(SVGA3D_DX_MAX_SOTARGETS*sizeof(SVGA3dSoTarget) >
1465 VMW_MAX_VIEW_BINDINGS*sizeof(u32));
1466 BUILD_BUG_ON(SVGA3D_DX_MAX_VERTEXBUFFERS*sizeof(SVGA3dVertexBuffer) >
1467 VMW_MAX_VIEW_BINDINGS*sizeof(u32));
1468}
1/**************************************************************************
2 *
3 * Copyright © 2015 VMware, Inc., Palo Alto, CA., USA
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27/*
28 * This file implements the vmwgfx context binding manager,
29 * The sole reason for having to use this code is that vmware guest
30 * backed contexts can be swapped out to their backing mobs by the device
31 * at any time, also swapped in at any time. At swapin time, the device
32 * validates the context bindings to make sure they point to valid resources.
33 * It's this outside-of-drawcall validation (that can happen at any time),
34 * that makes this code necessary.
35 *
36 * We therefore need to kill any context bindings pointing to a resource
37 * when the resource is swapped out. Furthermore, if the vmwgfx driver has
38 * swapped out the context we can't swap it in again to kill bindings because
39 * of backing mob reservation lockdep violations, so as part of
40 * context swapout, also kill all bindings of a context, so that they are
41 * already killed if a resource to which a binding points
42 * needs to be swapped out.
43 *
44 * Note that a resource can be pointed to by bindings from multiple contexts,
45 * Therefore we can't easily protect this data by a per context mutex
46 * (unless we use deadlock-safe WW mutexes). So we use a global binding_mutex
47 * to protect all binding manager data.
48 *
49 * Finally, any association between a context and a global resource
50 * (surface, shader or even DX query) is conceptually a context binding that
51 * needs to be tracked by this code.
52 */
53
54#include "vmwgfx_drv.h"
55#include "vmwgfx_binding.h"
56#include "device_include/svga3d_reg.h"
57
58#define VMW_BINDING_RT_BIT 0
59#define VMW_BINDING_PS_BIT 1
60#define VMW_BINDING_SO_BIT 2
61#define VMW_BINDING_VB_BIT 3
62#define VMW_BINDING_NUM_BITS 4
63
64#define VMW_BINDING_PS_SR_BIT 0
65
66/**
67 * struct vmw_ctx_binding_state - per context binding state
68 *
69 * @dev_priv: Pointer to device private structure.
70 * @list: linked list of individual active bindings.
71 * @render_targets: Render target bindings.
72 * @texture_units: Texture units bindings.
73 * @ds_view: Depth-stencil view binding.
74 * @so_targets: StreamOutput target bindings.
75 * @vertex_buffers: Vertex buffer bindings.
76 * @index_buffer: Index buffer binding.
77 * @per_shader: Per shader-type bindings.
78 * @dirty: Bitmap tracking per binding-type changes that have not yet
79 * been emitted to the device.
80 * @dirty_vb: Bitmap tracking individual vertex buffer binding changes that
81 * have not yet been emitted to the device.
82 * @bind_cmd_buffer: Scratch space used to construct binding commands.
83 * @bind_cmd_count: Number of binding command data entries in @bind_cmd_buffer
84 * @bind_first_slot: Used together with @bind_cmd_buffer to indicate the
85 * device binding slot of the first command data entry in @bind_cmd_buffer.
86 *
87 * Note that this structure also provides storage space for the individual
88 * struct vmw_ctx_binding objects, so that no dynamic allocation is needed
89 * for individual bindings.
90 *
91 */
92struct vmw_ctx_binding_state {
93 struct vmw_private *dev_priv;
94 struct list_head list;
95 struct vmw_ctx_bindinfo_view render_targets[SVGA3D_RT_MAX];
96 struct vmw_ctx_bindinfo_tex texture_units[SVGA3D_NUM_TEXTURE_UNITS];
97 struct vmw_ctx_bindinfo_view ds_view;
98 struct vmw_ctx_bindinfo_so so_targets[SVGA3D_DX_MAX_SOTARGETS];
99 struct vmw_ctx_bindinfo_vb vertex_buffers[SVGA3D_DX_MAX_VERTEXBUFFERS];
100 struct vmw_ctx_bindinfo_ib index_buffer;
101 struct vmw_dx_shader_bindings per_shader[SVGA3D_NUM_SHADERTYPE_DX10];
102
103 unsigned long dirty;
104 DECLARE_BITMAP(dirty_vb, SVGA3D_DX_MAX_VERTEXBUFFERS);
105
106 u32 bind_cmd_buffer[VMW_MAX_VIEW_BINDINGS];
107 u32 bind_cmd_count;
108 u32 bind_first_slot;
109};
110
111static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind);
112static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
113 bool rebind);
114static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi, bool rebind);
115static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind);
116static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind);
117static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind);
118static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind);
119static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs);
120static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi,
121 bool rebind);
122static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind);
123static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind);
124static void vmw_binding_build_asserts(void) __attribute__ ((unused));
125
126typedef int (*vmw_scrub_func)(struct vmw_ctx_bindinfo *, bool);
127
128/**
129 * struct vmw_binding_info - Per binding type information for the binding
130 * manager
131 *
132 * @size: The size of the struct binding derived from a struct vmw_ctx_bindinfo.
133 * @offsets: array[shader_slot] of offsets to the array[slot]
134 * of struct bindings for the binding type.
135 * @scrub_func: Pointer to the scrub function for this binding type.
136 *
137 * Holds static information to help optimize the binding manager and avoid
138 * an excessive amount of switch statements.
139 */
140struct vmw_binding_info {
141 size_t size;
142 const size_t *offsets;
143 vmw_scrub_func scrub_func;
144};
145
146/*
147 * A number of static variables that help determine the scrub func and the
148 * location of the struct vmw_ctx_bindinfo slots for each binding type.
149 */
150static const size_t vmw_binding_shader_offsets[] = {
151 offsetof(struct vmw_ctx_binding_state, per_shader[0].shader),
152 offsetof(struct vmw_ctx_binding_state, per_shader[1].shader),
153 offsetof(struct vmw_ctx_binding_state, per_shader[2].shader),
154};
155static const size_t vmw_binding_rt_offsets[] = {
156 offsetof(struct vmw_ctx_binding_state, render_targets),
157};
158static const size_t vmw_binding_tex_offsets[] = {
159 offsetof(struct vmw_ctx_binding_state, texture_units),
160};
161static const size_t vmw_binding_cb_offsets[] = {
162 offsetof(struct vmw_ctx_binding_state, per_shader[0].const_buffers),
163 offsetof(struct vmw_ctx_binding_state, per_shader[1].const_buffers),
164 offsetof(struct vmw_ctx_binding_state, per_shader[2].const_buffers),
165};
166static const size_t vmw_binding_dx_ds_offsets[] = {
167 offsetof(struct vmw_ctx_binding_state, ds_view),
168};
169static const size_t vmw_binding_sr_offsets[] = {
170 offsetof(struct vmw_ctx_binding_state, per_shader[0].shader_res),
171 offsetof(struct vmw_ctx_binding_state, per_shader[1].shader_res),
172 offsetof(struct vmw_ctx_binding_state, per_shader[2].shader_res),
173};
174static const size_t vmw_binding_so_offsets[] = {
175 offsetof(struct vmw_ctx_binding_state, so_targets),
176};
177static const size_t vmw_binding_vb_offsets[] = {
178 offsetof(struct vmw_ctx_binding_state, vertex_buffers),
179};
180static const size_t vmw_binding_ib_offsets[] = {
181 offsetof(struct vmw_ctx_binding_state, index_buffer),
182};
183
184static const struct vmw_binding_info vmw_binding_infos[] = {
185 [vmw_ctx_binding_shader] = {
186 .size = sizeof(struct vmw_ctx_bindinfo_shader),
187 .offsets = vmw_binding_shader_offsets,
188 .scrub_func = vmw_binding_scrub_shader},
189 [vmw_ctx_binding_rt] = {
190 .size = sizeof(struct vmw_ctx_bindinfo_view),
191 .offsets = vmw_binding_rt_offsets,
192 .scrub_func = vmw_binding_scrub_render_target},
193 [vmw_ctx_binding_tex] = {
194 .size = sizeof(struct vmw_ctx_bindinfo_tex),
195 .offsets = vmw_binding_tex_offsets,
196 .scrub_func = vmw_binding_scrub_texture},
197 [vmw_ctx_binding_cb] = {
198 .size = sizeof(struct vmw_ctx_bindinfo_cb),
199 .offsets = vmw_binding_cb_offsets,
200 .scrub_func = vmw_binding_scrub_cb},
201 [vmw_ctx_binding_dx_shader] = {
202 .size = sizeof(struct vmw_ctx_bindinfo_shader),
203 .offsets = vmw_binding_shader_offsets,
204 .scrub_func = vmw_binding_scrub_dx_shader},
205 [vmw_ctx_binding_dx_rt] = {
206 .size = sizeof(struct vmw_ctx_bindinfo_view),
207 .offsets = vmw_binding_rt_offsets,
208 .scrub_func = vmw_binding_scrub_dx_rt},
209 [vmw_ctx_binding_sr] = {
210 .size = sizeof(struct vmw_ctx_bindinfo_view),
211 .offsets = vmw_binding_sr_offsets,
212 .scrub_func = vmw_binding_scrub_sr},
213 [vmw_ctx_binding_ds] = {
214 .size = sizeof(struct vmw_ctx_bindinfo_view),
215 .offsets = vmw_binding_dx_ds_offsets,
216 .scrub_func = vmw_binding_scrub_dx_rt},
217 [vmw_ctx_binding_so] = {
218 .size = sizeof(struct vmw_ctx_bindinfo_so),
219 .offsets = vmw_binding_so_offsets,
220 .scrub_func = vmw_binding_scrub_so},
221 [vmw_ctx_binding_vb] = {
222 .size = sizeof(struct vmw_ctx_bindinfo_vb),
223 .offsets = vmw_binding_vb_offsets,
224 .scrub_func = vmw_binding_scrub_vb},
225 [vmw_ctx_binding_ib] = {
226 .size = sizeof(struct vmw_ctx_bindinfo_ib),
227 .offsets = vmw_binding_ib_offsets,
228 .scrub_func = vmw_binding_scrub_ib},
229};
230
231/**
232 * vmw_cbs_context - Return a pointer to the context resource of a
233 * context binding state tracker.
234 *
235 * @cbs: The context binding state tracker.
236 *
237 * Provided there are any active bindings, this function will return an
238 * unreferenced pointer to the context resource that owns the context
239 * binding state tracker. If there are no active bindings, this function
240 * will return NULL. Note that the caller must somehow ensure that a reference
241 * is held on the context resource prior to calling this function.
242 */
243static const struct vmw_resource *
244vmw_cbs_context(const struct vmw_ctx_binding_state *cbs)
245{
246 if (list_empty(&cbs->list))
247 return NULL;
248
249 return list_first_entry(&cbs->list, struct vmw_ctx_bindinfo,
250 ctx_list)->ctx;
251}
252
253/**
254 * vmw_binding_loc - determine the struct vmw_ctx_bindinfo slot location.
255 *
256 * @cbs: Pointer to a struct vmw_ctx_binding state which holds the slot.
257 * @bt: The binding type.
258 * @shader_slot: The shader slot of the binding. If none, then set to 0.
259 * @slot: The slot of the binding.
260 */
261static struct vmw_ctx_bindinfo *
262vmw_binding_loc(struct vmw_ctx_binding_state *cbs,
263 enum vmw_ctx_binding_type bt, u32 shader_slot, u32 slot)
264{
265 const struct vmw_binding_info *b = &vmw_binding_infos[bt];
266 size_t offset = b->offsets[shader_slot] + b->size*slot;
267
268 return (struct vmw_ctx_bindinfo *)((u8 *) cbs + offset);
269}
270
271/**
272 * vmw_binding_drop: Stop tracking a context binding
273 *
274 * @bi: Pointer to binding tracker storage.
275 *
276 * Stops tracking a context binding, and re-initializes its storage.
277 * Typically used when the context binding is replaced with a binding to
278 * another (or the same, for that matter) resource.
279 */
280static void vmw_binding_drop(struct vmw_ctx_bindinfo *bi)
281{
282 list_del(&bi->ctx_list);
283 if (!list_empty(&bi->res_list))
284 list_del(&bi->res_list);
285 bi->ctx = NULL;
286}
287
288/**
289 * vmw_binding_add: Start tracking a context binding
290 *
291 * @cbs: Pointer to the context binding state tracker.
292 * @bi: Information about the binding to track.
293 *
294 * Starts tracking the binding in the context binding
295 * state structure @cbs.
296 */
297void vmw_binding_add(struct vmw_ctx_binding_state *cbs,
298 const struct vmw_ctx_bindinfo *bi,
299 u32 shader_slot, u32 slot)
300{
301 struct vmw_ctx_bindinfo *loc =
302 vmw_binding_loc(cbs, bi->bt, shader_slot, slot);
303 const struct vmw_binding_info *b = &vmw_binding_infos[bi->bt];
304
305 if (loc->ctx != NULL)
306 vmw_binding_drop(loc);
307
308 memcpy(loc, bi, b->size);
309 loc->scrubbed = false;
310 list_add(&loc->ctx_list, &cbs->list);
311 INIT_LIST_HEAD(&loc->res_list);
312}
313
314/**
315 * vmw_binding_transfer: Transfer a context binding tracking entry.
316 *
317 * @cbs: Pointer to the persistent context binding state tracker.
318 * @bi: Information about the binding to track.
319 *
320 */
321static void vmw_binding_transfer(struct vmw_ctx_binding_state *cbs,
322 const struct vmw_ctx_binding_state *from,
323 const struct vmw_ctx_bindinfo *bi)
324{
325 size_t offset = (unsigned long)bi - (unsigned long)from;
326 struct vmw_ctx_bindinfo *loc = (struct vmw_ctx_bindinfo *)
327 ((unsigned long) cbs + offset);
328
329 if (loc->ctx != NULL) {
330 WARN_ON(bi->scrubbed);
331
332 vmw_binding_drop(loc);
333 }
334
335 if (bi->res != NULL) {
336 memcpy(loc, bi, vmw_binding_infos[bi->bt].size);
337 list_add_tail(&loc->ctx_list, &cbs->list);
338 list_add_tail(&loc->res_list, &loc->res->binding_head);
339 }
340}
341
342/**
343 * vmw_binding_state_kill - Kill all bindings associated with a
344 * struct vmw_ctx_binding state structure, and re-initialize the structure.
345 *
346 * @cbs: Pointer to the context binding state tracker.
347 *
348 * Emits commands to scrub all bindings associated with the
349 * context binding state tracker. Then re-initializes the whole structure.
350 */
351void vmw_binding_state_kill(struct vmw_ctx_binding_state *cbs)
352{
353 struct vmw_ctx_bindinfo *entry, *next;
354
355 vmw_binding_state_scrub(cbs);
356 list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
357 vmw_binding_drop(entry);
358}
359
360/**
361 * vmw_binding_state_scrub - Scrub all bindings associated with a
362 * struct vmw_ctx_binding state structure.
363 *
364 * @cbs: Pointer to the context binding state tracker.
365 *
366 * Emits commands to scrub all bindings associated with the
367 * context binding state tracker.
368 */
369void vmw_binding_state_scrub(struct vmw_ctx_binding_state *cbs)
370{
371 struct vmw_ctx_bindinfo *entry;
372
373 list_for_each_entry(entry, &cbs->list, ctx_list) {
374 if (!entry->scrubbed) {
375 (void) vmw_binding_infos[entry->bt].scrub_func
376 (entry, false);
377 entry->scrubbed = true;
378 }
379 }
380
381 (void) vmw_binding_emit_dirty(cbs);
382}
383
384/**
385 * vmw_binding_res_list_kill - Kill all bindings on a
386 * resource binding list
387 *
388 * @head: list head of resource binding list
389 *
390 * Kills all bindings associated with a specific resource. Typically
391 * called before the resource is destroyed.
392 */
393void vmw_binding_res_list_kill(struct list_head *head)
394{
395 struct vmw_ctx_bindinfo *entry, *next;
396
397 vmw_binding_res_list_scrub(head);
398 list_for_each_entry_safe(entry, next, head, res_list)
399 vmw_binding_drop(entry);
400}
401
402/**
403 * vmw_binding_res_list_scrub - Scrub all bindings on a
404 * resource binding list
405 *
406 * @head: list head of resource binding list
407 *
408 * Scrub all bindings associated with a specific resource. Typically
409 * called before the resource is evicted.
410 */
411void vmw_binding_res_list_scrub(struct list_head *head)
412{
413 struct vmw_ctx_bindinfo *entry;
414
415 list_for_each_entry(entry, head, res_list) {
416 if (!entry->scrubbed) {
417 (void) vmw_binding_infos[entry->bt].scrub_func
418 (entry, false);
419 entry->scrubbed = true;
420 }
421 }
422
423 list_for_each_entry(entry, head, res_list) {
424 struct vmw_ctx_binding_state *cbs =
425 vmw_context_binding_state(entry->ctx);
426
427 (void) vmw_binding_emit_dirty(cbs);
428 }
429}
430
431
432/**
433 * vmw_binding_state_commit - Commit staged binding info
434 *
435 * @ctx: Pointer to context to commit the staged binding info to.
436 * @from: Staged binding info built during execbuf.
437 * @scrubbed: Transfer only scrubbed bindings.
438 *
439 * Transfers binding info from a temporary structure
440 * (typically used by execbuf) to the persistent
441 * structure in the context. This can be done once commands have been
442 * submitted to hardware
443 */
444void vmw_binding_state_commit(struct vmw_ctx_binding_state *to,
445 struct vmw_ctx_binding_state *from)
446{
447 struct vmw_ctx_bindinfo *entry, *next;
448
449 list_for_each_entry_safe(entry, next, &from->list, ctx_list) {
450 vmw_binding_transfer(to, from, entry);
451 vmw_binding_drop(entry);
452 }
453}
454
455/**
456 * vmw_binding_rebind_all - Rebind all scrubbed bindings of a context
457 *
458 * @ctx: The context resource
459 *
460 * Walks through the context binding list and rebinds all scrubbed
461 * resources.
462 */
463int vmw_binding_rebind_all(struct vmw_ctx_binding_state *cbs)
464{
465 struct vmw_ctx_bindinfo *entry;
466 int ret;
467
468 list_for_each_entry(entry, &cbs->list, ctx_list) {
469 if (likely(!entry->scrubbed))
470 continue;
471
472 if ((entry->res == NULL || entry->res->id ==
473 SVGA3D_INVALID_ID))
474 continue;
475
476 ret = vmw_binding_infos[entry->bt].scrub_func(entry, true);
477 if (unlikely(ret != 0))
478 return ret;
479
480 entry->scrubbed = false;
481 }
482
483 return vmw_binding_emit_dirty(cbs);
484}
485
486/**
487 * vmw_binding_scrub_shader - scrub a shader binding from a context.
488 *
489 * @bi: single binding information.
490 * @rebind: Whether to issue a bind instead of scrub command.
491 */
492static int vmw_binding_scrub_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
493{
494 struct vmw_ctx_bindinfo_shader *binding =
495 container_of(bi, typeof(*binding), bi);
496 struct vmw_private *dev_priv = bi->ctx->dev_priv;
497 struct {
498 SVGA3dCmdHeader header;
499 SVGA3dCmdSetShader body;
500 } *cmd;
501
502 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
503 if (unlikely(cmd == NULL)) {
504 DRM_ERROR("Failed reserving FIFO space for shader "
505 "unbinding.\n");
506 return -ENOMEM;
507 }
508
509 cmd->header.id = SVGA_3D_CMD_SET_SHADER;
510 cmd->header.size = sizeof(cmd->body);
511 cmd->body.cid = bi->ctx->id;
512 cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
513 cmd->body.shid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
514 vmw_fifo_commit(dev_priv, sizeof(*cmd));
515
516 return 0;
517}
518
519/**
520 * vmw_binding_scrub_render_target - scrub a render target binding
521 * from a context.
522 *
523 * @bi: single binding information.
524 * @rebind: Whether to issue a bind instead of scrub command.
525 */
526static int vmw_binding_scrub_render_target(struct vmw_ctx_bindinfo *bi,
527 bool rebind)
528{
529 struct vmw_ctx_bindinfo_view *binding =
530 container_of(bi, typeof(*binding), bi);
531 struct vmw_private *dev_priv = bi->ctx->dev_priv;
532 struct {
533 SVGA3dCmdHeader header;
534 SVGA3dCmdSetRenderTarget body;
535 } *cmd;
536
537 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
538 if (unlikely(cmd == NULL)) {
539 DRM_ERROR("Failed reserving FIFO space for render target "
540 "unbinding.\n");
541 return -ENOMEM;
542 }
543
544 cmd->header.id = SVGA_3D_CMD_SETRENDERTARGET;
545 cmd->header.size = sizeof(cmd->body);
546 cmd->body.cid = bi->ctx->id;
547 cmd->body.type = binding->slot;
548 cmd->body.target.sid = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
549 cmd->body.target.face = 0;
550 cmd->body.target.mipmap = 0;
551 vmw_fifo_commit(dev_priv, sizeof(*cmd));
552
553 return 0;
554}
555
556/**
557 * vmw_binding_scrub_texture - scrub a texture binding from a context.
558 *
559 * @bi: single binding information.
560 * @rebind: Whether to issue a bind instead of scrub command.
561 *
562 * TODO: Possibly complement this function with a function that takes
563 * a list of texture bindings and combines them to a single command.
564 */
565static int vmw_binding_scrub_texture(struct vmw_ctx_bindinfo *bi,
566 bool rebind)
567{
568 struct vmw_ctx_bindinfo_tex *binding =
569 container_of(bi, typeof(*binding), bi);
570 struct vmw_private *dev_priv = bi->ctx->dev_priv;
571 struct {
572 SVGA3dCmdHeader header;
573 struct {
574 SVGA3dCmdSetTextureState c;
575 SVGA3dTextureState s1;
576 } body;
577 } *cmd;
578
579 cmd = vmw_fifo_reserve(dev_priv, sizeof(*cmd));
580 if (unlikely(cmd == NULL)) {
581 DRM_ERROR("Failed reserving FIFO space for texture "
582 "unbinding.\n");
583 return -ENOMEM;
584 }
585
586 cmd->header.id = SVGA_3D_CMD_SETTEXTURESTATE;
587 cmd->header.size = sizeof(cmd->body);
588 cmd->body.c.cid = bi->ctx->id;
589 cmd->body.s1.stage = binding->texture_stage;
590 cmd->body.s1.name = SVGA3D_TS_BIND_TEXTURE;
591 cmd->body.s1.value = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
592 vmw_fifo_commit(dev_priv, sizeof(*cmd));
593
594 return 0;
595}
596
597/**
598 * vmw_binding_scrub_dx_shader - scrub a dx shader binding from a context.
599 *
600 * @bi: single binding information.
601 * @rebind: Whether to issue a bind instead of scrub command.
602 */
603static int vmw_binding_scrub_dx_shader(struct vmw_ctx_bindinfo *bi, bool rebind)
604{
605 struct vmw_ctx_bindinfo_shader *binding =
606 container_of(bi, typeof(*binding), bi);
607 struct vmw_private *dev_priv = bi->ctx->dev_priv;
608 struct {
609 SVGA3dCmdHeader header;
610 SVGA3dCmdDXSetShader body;
611 } *cmd;
612
613 cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd), bi->ctx->id);
614 if (unlikely(cmd == NULL)) {
615 DRM_ERROR("Failed reserving FIFO space for DX shader "
616 "unbinding.\n");
617 return -ENOMEM;
618 }
619 cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER;
620 cmd->header.size = sizeof(cmd->body);
621 cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
622 cmd->body.shaderId = ((rebind) ? bi->res->id : SVGA3D_INVALID_ID);
623 vmw_fifo_commit(dev_priv, sizeof(*cmd));
624
625 return 0;
626}
627
628/**
629 * vmw_binding_scrub_cb - scrub a constant buffer binding from a context.
630 *
631 * @bi: single binding information.
632 * @rebind: Whether to issue a bind instead of scrub command.
633 */
634static int vmw_binding_scrub_cb(struct vmw_ctx_bindinfo *bi, bool rebind)
635{
636 struct vmw_ctx_bindinfo_cb *binding =
637 container_of(bi, typeof(*binding), bi);
638 struct vmw_private *dev_priv = bi->ctx->dev_priv;
639 struct {
640 SVGA3dCmdHeader header;
641 SVGA3dCmdDXSetSingleConstantBuffer body;
642 } *cmd;
643
644 cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd), bi->ctx->id);
645 if (unlikely(cmd == NULL)) {
646 DRM_ERROR("Failed reserving FIFO space for DX shader "
647 "unbinding.\n");
648 return -ENOMEM;
649 }
650
651 cmd->header.id = SVGA_3D_CMD_DX_SET_SINGLE_CONSTANT_BUFFER;
652 cmd->header.size = sizeof(cmd->body);
653 cmd->body.slot = binding->slot;
654 cmd->body.type = binding->shader_slot + SVGA3D_SHADERTYPE_MIN;
655 if (rebind) {
656 cmd->body.offsetInBytes = binding->offset;
657 cmd->body.sizeInBytes = binding->size;
658 cmd->body.sid = bi->res->id;
659 } else {
660 cmd->body.offsetInBytes = 0;
661 cmd->body.sizeInBytes = 0;
662 cmd->body.sid = SVGA3D_INVALID_ID;
663 }
664 vmw_fifo_commit(dev_priv, sizeof(*cmd));
665
666 return 0;
667}
668
669/**
670 * vmw_collect_view_ids - Build view id data for a view binding command
671 * without checking which bindings actually need to be emitted
672 *
673 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
674 * @bi: Pointer to where the binding info array is stored in @cbs
675 * @max_num: Maximum number of entries in the @bi array.
676 *
677 * Scans the @bi array for bindings and builds a buffer of view id data.
678 * Stops at the first non-existing binding in the @bi array.
679 * On output, @cbs->bind_cmd_count contains the number of bindings to be
680 * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
681 * contains the command data.
682 */
683static void vmw_collect_view_ids(struct vmw_ctx_binding_state *cbs,
684 const struct vmw_ctx_bindinfo *bi,
685 u32 max_num)
686{
687 const struct vmw_ctx_bindinfo_view *biv =
688 container_of(bi, struct vmw_ctx_bindinfo_view, bi);
689 unsigned long i;
690
691 cbs->bind_cmd_count = 0;
692 cbs->bind_first_slot = 0;
693
694 for (i = 0; i < max_num; ++i, ++biv) {
695 if (!biv->bi.ctx)
696 break;
697
698 cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
699 ((biv->bi.scrubbed) ?
700 SVGA3D_INVALID_ID : biv->bi.res->id);
701 }
702}
703
704/**
705 * vmw_collect_dirty_view_ids - Build view id data for a view binding command
706 *
707 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
708 * @bi: Pointer to where the binding info array is stored in @cbs
709 * @dirty: Bitmap indicating which bindings need to be emitted.
710 * @max_num: Maximum number of entries in the @bi array.
711 *
712 * Scans the @bi array for bindings that need to be emitted and
713 * builds a buffer of view id data.
714 * On output, @cbs->bind_cmd_count contains the number of bindings to be
715 * emitted, @cbs->bind_first_slot indicates the index of the first emitted
716 * binding, and @cbs->bind_cmd_buffer contains the command data.
717 */
718static void vmw_collect_dirty_view_ids(struct vmw_ctx_binding_state *cbs,
719 const struct vmw_ctx_bindinfo *bi,
720 unsigned long *dirty,
721 u32 max_num)
722{
723 const struct vmw_ctx_bindinfo_view *biv =
724 container_of(bi, struct vmw_ctx_bindinfo_view, bi);
725 unsigned long i, next_bit;
726
727 cbs->bind_cmd_count = 0;
728 i = find_first_bit(dirty, max_num);
729 next_bit = i;
730 cbs->bind_first_slot = i;
731
732 biv += i;
733 for (; i < max_num; ++i, ++biv) {
734 cbs->bind_cmd_buffer[cbs->bind_cmd_count++] =
735 ((!biv->bi.ctx || biv->bi.scrubbed) ?
736 SVGA3D_INVALID_ID : biv->bi.res->id);
737
738 if (next_bit == i) {
739 next_bit = find_next_bit(dirty, max_num, i + 1);
740 if (next_bit >= max_num)
741 break;
742 }
743 }
744}
745
746/**
747 * vmw_binding_emit_set_sr - Issue delayed DX shader resource binding commands
748 *
749 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
750 */
751static int vmw_emit_set_sr(struct vmw_ctx_binding_state *cbs,
752 int shader_slot)
753{
754 const struct vmw_ctx_bindinfo *loc =
755 &cbs->per_shader[shader_slot].shader_res[0].bi;
756 struct {
757 SVGA3dCmdHeader header;
758 SVGA3dCmdDXSetShaderResources body;
759 } *cmd;
760 size_t cmd_size, view_id_size;
761 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
762
763 vmw_collect_dirty_view_ids(cbs, loc,
764 cbs->per_shader[shader_slot].dirty_sr,
765 SVGA3D_DX_MAX_SRVIEWS);
766 if (cbs->bind_cmd_count == 0)
767 return 0;
768
769 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
770 cmd_size = sizeof(*cmd) + view_id_size;
771 cmd = vmw_fifo_reserve_dx(ctx->dev_priv, cmd_size, ctx->id);
772 if (unlikely(cmd == NULL)) {
773 DRM_ERROR("Failed reserving FIFO space for DX shader"
774 " resource binding.\n");
775 return -ENOMEM;
776 }
777
778 cmd->header.id = SVGA_3D_CMD_DX_SET_SHADER_RESOURCES;
779 cmd->header.size = sizeof(cmd->body) + view_id_size;
780 cmd->body.type = shader_slot + SVGA3D_SHADERTYPE_MIN;
781 cmd->body.startView = cbs->bind_first_slot;
782
783 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
784
785 vmw_fifo_commit(ctx->dev_priv, cmd_size);
786 bitmap_clear(cbs->per_shader[shader_slot].dirty_sr,
787 cbs->bind_first_slot, cbs->bind_cmd_count);
788
789 return 0;
790}
791
792/**
793 * vmw_binding_emit_set_rt - Issue delayed DX rendertarget binding commands
794 *
795 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
796 */
797static int vmw_emit_set_rt(struct vmw_ctx_binding_state *cbs)
798{
799 const struct vmw_ctx_bindinfo *loc = &cbs->render_targets[0].bi;
800 struct {
801 SVGA3dCmdHeader header;
802 SVGA3dCmdDXSetRenderTargets body;
803 } *cmd;
804 size_t cmd_size, view_id_size;
805 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
806
807 vmw_collect_view_ids(cbs, loc, SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS);
808 view_id_size = cbs->bind_cmd_count*sizeof(uint32);
809 cmd_size = sizeof(*cmd) + view_id_size;
810 cmd = vmw_fifo_reserve_dx(ctx->dev_priv, cmd_size, ctx->id);
811 if (unlikely(cmd == NULL)) {
812 DRM_ERROR("Failed reserving FIFO space for DX render-target"
813 " binding.\n");
814 return -ENOMEM;
815 }
816
817 cmd->header.id = SVGA_3D_CMD_DX_SET_RENDERTARGETS;
818 cmd->header.size = sizeof(cmd->body) + view_id_size;
819
820 if (cbs->ds_view.bi.ctx && !cbs->ds_view.bi.scrubbed)
821 cmd->body.depthStencilViewId = cbs->ds_view.bi.res->id;
822 else
823 cmd->body.depthStencilViewId = SVGA3D_INVALID_ID;
824
825 memcpy(&cmd[1], cbs->bind_cmd_buffer, view_id_size);
826
827 vmw_fifo_commit(ctx->dev_priv, cmd_size);
828
829 return 0;
830
831}
832
833/**
834 * vmw_collect_so_targets - Build SVGA3dSoTarget data for a binding command
835 * without checking which bindings actually need to be emitted
836 *
837 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
838 * @bi: Pointer to where the binding info array is stored in @cbs
839 * @max_num: Maximum number of entries in the @bi array.
840 *
841 * Scans the @bi array for bindings and builds a buffer of SVGA3dSoTarget data.
842 * Stops at the first non-existing binding in the @bi array.
843 * On output, @cbs->bind_cmd_count contains the number of bindings to be
844 * emitted, @cbs->bind_first_slot is set to zero, and @cbs->bind_cmd_buffer
845 * contains the command data.
846 */
847static void vmw_collect_so_targets(struct vmw_ctx_binding_state *cbs,
848 const struct vmw_ctx_bindinfo *bi,
849 u32 max_num)
850{
851 const struct vmw_ctx_bindinfo_so *biso =
852 container_of(bi, struct vmw_ctx_bindinfo_so, bi);
853 unsigned long i;
854 SVGA3dSoTarget *so_buffer = (SVGA3dSoTarget *) cbs->bind_cmd_buffer;
855
856 cbs->bind_cmd_count = 0;
857 cbs->bind_first_slot = 0;
858
859 for (i = 0; i < max_num; ++i, ++biso, ++so_buffer,
860 ++cbs->bind_cmd_count) {
861 if (!biso->bi.ctx)
862 break;
863
864 if (!biso->bi.scrubbed) {
865 so_buffer->sid = biso->bi.res->id;
866 so_buffer->offset = biso->offset;
867 so_buffer->sizeInBytes = biso->size;
868 } else {
869 so_buffer->sid = SVGA3D_INVALID_ID;
870 so_buffer->offset = 0;
871 so_buffer->sizeInBytes = 0;
872 }
873 }
874}
875
876/**
877 * vmw_binding_emit_set_so - Issue delayed streamout binding commands
878 *
879 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
880 */
881static int vmw_emit_set_so(struct vmw_ctx_binding_state *cbs)
882{
883 const struct vmw_ctx_bindinfo *loc = &cbs->so_targets[0].bi;
884 struct {
885 SVGA3dCmdHeader header;
886 SVGA3dCmdDXSetSOTargets body;
887 } *cmd;
888 size_t cmd_size, so_target_size;
889 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
890
891 vmw_collect_so_targets(cbs, loc, SVGA3D_DX_MAX_SOTARGETS);
892 if (cbs->bind_cmd_count == 0)
893 return 0;
894
895 so_target_size = cbs->bind_cmd_count*sizeof(SVGA3dSoTarget);
896 cmd_size = sizeof(*cmd) + so_target_size;
897 cmd = vmw_fifo_reserve_dx(ctx->dev_priv, cmd_size, ctx->id);
898 if (unlikely(cmd == NULL)) {
899 DRM_ERROR("Failed reserving FIFO space for DX SO target"
900 " binding.\n");
901 return -ENOMEM;
902 }
903
904 cmd->header.id = SVGA_3D_CMD_DX_SET_SOTARGETS;
905 cmd->header.size = sizeof(cmd->body) + so_target_size;
906 memcpy(&cmd[1], cbs->bind_cmd_buffer, so_target_size);
907
908 vmw_fifo_commit(ctx->dev_priv, cmd_size);
909
910 return 0;
911
912}
913
914/**
915 * vmw_binding_emit_dirty_ps - Issue delayed per shader binding commands
916 *
917 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
918 *
919 */
920static int vmw_binding_emit_dirty_ps(struct vmw_ctx_binding_state *cbs)
921{
922 struct vmw_dx_shader_bindings *sb = &cbs->per_shader[0];
923 u32 i;
924 int ret;
925
926 for (i = 0; i < SVGA3D_NUM_SHADERTYPE_DX10; ++i, ++sb) {
927 if (!test_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty))
928 continue;
929
930 ret = vmw_emit_set_sr(cbs, i);
931 if (ret)
932 break;
933
934 __clear_bit(VMW_BINDING_PS_SR_BIT, &sb->dirty);
935 }
936
937 return 0;
938}
939
940/**
941 * vmw_collect_dirty_vbs - Build SVGA3dVertexBuffer data for a
942 * SVGA3dCmdDXSetVertexBuffers command
943 *
944 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
945 * @bi: Pointer to where the binding info array is stored in @cbs
946 * @dirty: Bitmap indicating which bindings need to be emitted.
947 * @max_num: Maximum number of entries in the @bi array.
948 *
949 * Scans the @bi array for bindings that need to be emitted and
950 * builds a buffer of SVGA3dVertexBuffer data.
951 * On output, @cbs->bind_cmd_count contains the number of bindings to be
952 * emitted, @cbs->bind_first_slot indicates the index of the first emitted
953 * binding, and @cbs->bind_cmd_buffer contains the command data.
954 */
955static void vmw_collect_dirty_vbs(struct vmw_ctx_binding_state *cbs,
956 const struct vmw_ctx_bindinfo *bi,
957 unsigned long *dirty,
958 u32 max_num)
959{
960 const struct vmw_ctx_bindinfo_vb *biv =
961 container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
962 unsigned long i, next_bit;
963 SVGA3dVertexBuffer *vbs = (SVGA3dVertexBuffer *) &cbs->bind_cmd_buffer;
964
965 cbs->bind_cmd_count = 0;
966 i = find_first_bit(dirty, max_num);
967 next_bit = i;
968 cbs->bind_first_slot = i;
969
970 biv += i;
971 for (; i < max_num; ++i, ++biv, ++vbs) {
972 if (!biv->bi.ctx || biv->bi.scrubbed) {
973 vbs->sid = SVGA3D_INVALID_ID;
974 vbs->stride = 0;
975 vbs->offset = 0;
976 } else {
977 vbs->sid = biv->bi.res->id;
978 vbs->stride = biv->stride;
979 vbs->offset = biv->offset;
980 }
981 cbs->bind_cmd_count++;
982 if (next_bit == i) {
983 next_bit = find_next_bit(dirty, max_num, i + 1);
984 if (next_bit >= max_num)
985 break;
986 }
987 }
988}
989
990/**
991 * vmw_binding_emit_set_vb - Issue delayed vertex buffer binding commands
992 *
993 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
994 *
995 */
996static int vmw_emit_set_vb(struct vmw_ctx_binding_state *cbs)
997{
998 const struct vmw_ctx_bindinfo *loc =
999 &cbs->vertex_buffers[0].bi;
1000 struct {
1001 SVGA3dCmdHeader header;
1002 SVGA3dCmdDXSetVertexBuffers body;
1003 } *cmd;
1004 size_t cmd_size, set_vb_size;
1005 const struct vmw_resource *ctx = vmw_cbs_context(cbs);
1006
1007 vmw_collect_dirty_vbs(cbs, loc, cbs->dirty_vb,
1008 SVGA3D_DX_MAX_VERTEXBUFFERS);
1009 if (cbs->bind_cmd_count == 0)
1010 return 0;
1011
1012 set_vb_size = cbs->bind_cmd_count*sizeof(SVGA3dVertexBuffer);
1013 cmd_size = sizeof(*cmd) + set_vb_size;
1014 cmd = vmw_fifo_reserve_dx(ctx->dev_priv, cmd_size, ctx->id);
1015 if (unlikely(cmd == NULL)) {
1016 DRM_ERROR("Failed reserving FIFO space for DX vertex buffer"
1017 " binding.\n");
1018 return -ENOMEM;
1019 }
1020
1021 cmd->header.id = SVGA_3D_CMD_DX_SET_VERTEX_BUFFERS;
1022 cmd->header.size = sizeof(cmd->body) + set_vb_size;
1023 cmd->body.startBuffer = cbs->bind_first_slot;
1024
1025 memcpy(&cmd[1], cbs->bind_cmd_buffer, set_vb_size);
1026
1027 vmw_fifo_commit(ctx->dev_priv, cmd_size);
1028 bitmap_clear(cbs->dirty_vb,
1029 cbs->bind_first_slot, cbs->bind_cmd_count);
1030
1031 return 0;
1032}
1033
1034/**
1035 * vmw_binding_emit_dirty - Issue delayed binding commands
1036 *
1037 * @cbs: Pointer to the context's struct vmw_ctx_binding_state
1038 *
1039 * This function issues the delayed binding commands that arise from
1040 * previous scrub / unscrub calls. These binding commands are typically
1041 * commands that batch a number of bindings and therefore it makes sense
1042 * to delay them.
1043 */
1044static int vmw_binding_emit_dirty(struct vmw_ctx_binding_state *cbs)
1045{
1046 int ret = 0;
1047 unsigned long hit = 0;
1048
1049 while ((hit = find_next_bit(&cbs->dirty, VMW_BINDING_NUM_BITS, hit))
1050 < VMW_BINDING_NUM_BITS) {
1051
1052 switch (hit) {
1053 case VMW_BINDING_RT_BIT:
1054 ret = vmw_emit_set_rt(cbs);
1055 break;
1056 case VMW_BINDING_PS_BIT:
1057 ret = vmw_binding_emit_dirty_ps(cbs);
1058 break;
1059 case VMW_BINDING_SO_BIT:
1060 ret = vmw_emit_set_so(cbs);
1061 break;
1062 case VMW_BINDING_VB_BIT:
1063 ret = vmw_emit_set_vb(cbs);
1064 break;
1065 default:
1066 BUG();
1067 }
1068 if (ret)
1069 return ret;
1070
1071 __clear_bit(hit, &cbs->dirty);
1072 hit++;
1073 }
1074
1075 return 0;
1076}
1077
1078/**
1079 * vmw_binding_scrub_sr - Schedule a dx shaderresource binding
1080 * scrub from a context
1081 *
1082 * @bi: single binding information.
1083 * @rebind: Whether to issue a bind instead of scrub command.
1084 */
1085static int vmw_binding_scrub_sr(struct vmw_ctx_bindinfo *bi, bool rebind)
1086{
1087 struct vmw_ctx_bindinfo_view *biv =
1088 container_of(bi, struct vmw_ctx_bindinfo_view, bi);
1089 struct vmw_ctx_binding_state *cbs =
1090 vmw_context_binding_state(bi->ctx);
1091
1092 __set_bit(biv->slot, cbs->per_shader[biv->shader_slot].dirty_sr);
1093 __set_bit(VMW_BINDING_PS_SR_BIT,
1094 &cbs->per_shader[biv->shader_slot].dirty);
1095 __set_bit(VMW_BINDING_PS_BIT, &cbs->dirty);
1096
1097 return 0;
1098}
1099
1100/**
1101 * vmw_binding_scrub_dx_rt - Schedule a dx rendertarget binding
1102 * scrub from a context
1103 *
1104 * @bi: single binding information.
1105 * @rebind: Whether to issue a bind instead of scrub command.
1106 */
1107static int vmw_binding_scrub_dx_rt(struct vmw_ctx_bindinfo *bi, bool rebind)
1108{
1109 struct vmw_ctx_binding_state *cbs =
1110 vmw_context_binding_state(bi->ctx);
1111
1112 __set_bit(VMW_BINDING_RT_BIT, &cbs->dirty);
1113
1114 return 0;
1115}
1116
1117/**
1118 * vmw_binding_scrub_so - Schedule a dx streamoutput buffer binding
1119 * scrub from a context
1120 *
1121 * @bi: single binding information.
1122 * @rebind: Whether to issue a bind instead of scrub command.
1123 */
1124static int vmw_binding_scrub_so(struct vmw_ctx_bindinfo *bi, bool rebind)
1125{
1126 struct vmw_ctx_binding_state *cbs =
1127 vmw_context_binding_state(bi->ctx);
1128
1129 __set_bit(VMW_BINDING_SO_BIT, &cbs->dirty);
1130
1131 return 0;
1132}
1133
1134/**
1135 * vmw_binding_scrub_vb - Schedule a dx vertex buffer binding
1136 * scrub from a context
1137 *
1138 * @bi: single binding information.
1139 * @rebind: Whether to issue a bind instead of scrub command.
1140 */
1141static int vmw_binding_scrub_vb(struct vmw_ctx_bindinfo *bi, bool rebind)
1142{
1143 struct vmw_ctx_bindinfo_vb *bivb =
1144 container_of(bi, struct vmw_ctx_bindinfo_vb, bi);
1145 struct vmw_ctx_binding_state *cbs =
1146 vmw_context_binding_state(bi->ctx);
1147
1148 __set_bit(bivb->slot, cbs->dirty_vb);
1149 __set_bit(VMW_BINDING_VB_BIT, &cbs->dirty);
1150
1151 return 0;
1152}
1153
1154/**
1155 * vmw_binding_scrub_ib - scrub a dx index buffer binding from a context
1156 *
1157 * @bi: single binding information.
1158 * @rebind: Whether to issue a bind instead of scrub command.
1159 */
1160static int vmw_binding_scrub_ib(struct vmw_ctx_bindinfo *bi, bool rebind)
1161{
1162 struct vmw_ctx_bindinfo_ib *binding =
1163 container_of(bi, typeof(*binding), bi);
1164 struct vmw_private *dev_priv = bi->ctx->dev_priv;
1165 struct {
1166 SVGA3dCmdHeader header;
1167 SVGA3dCmdDXSetIndexBuffer body;
1168 } *cmd;
1169
1170 cmd = vmw_fifo_reserve_dx(dev_priv, sizeof(*cmd), bi->ctx->id);
1171 if (unlikely(cmd == NULL)) {
1172 DRM_ERROR("Failed reserving FIFO space for DX index buffer "
1173 "binding.\n");
1174 return -ENOMEM;
1175 }
1176 cmd->header.id = SVGA_3D_CMD_DX_SET_INDEX_BUFFER;
1177 cmd->header.size = sizeof(cmd->body);
1178 if (rebind) {
1179 cmd->body.sid = bi->res->id;
1180 cmd->body.format = binding->format;
1181 cmd->body.offset = binding->offset;
1182 } else {
1183 cmd->body.sid = SVGA3D_INVALID_ID;
1184 cmd->body.format = 0;
1185 cmd->body.offset = 0;
1186 }
1187
1188 vmw_fifo_commit(dev_priv, sizeof(*cmd));
1189
1190 return 0;
1191}
1192
1193/**
1194 * vmw_binding_state_alloc - Allocate a struct vmw_ctx_binding_state with
1195 * memory accounting.
1196 *
1197 * @dev_priv: Pointer to a device private structure.
1198 *
1199 * Returns a pointer to a newly allocated struct or an error pointer on error.
1200 */
1201struct vmw_ctx_binding_state *
1202vmw_binding_state_alloc(struct vmw_private *dev_priv)
1203{
1204 struct vmw_ctx_binding_state *cbs;
1205 struct ttm_operation_ctx ctx = {
1206 .interruptible = false,
1207 .no_wait_gpu = false
1208 };
1209 int ret;
1210
1211 ret = ttm_mem_global_alloc(vmw_mem_glob(dev_priv), sizeof(*cbs),
1212 &ctx);
1213 if (ret)
1214 return ERR_PTR(ret);
1215
1216 cbs = vzalloc(sizeof(*cbs));
1217 if (!cbs) {
1218 ttm_mem_global_free(vmw_mem_glob(dev_priv), sizeof(*cbs));
1219 return ERR_PTR(-ENOMEM);
1220 }
1221
1222 cbs->dev_priv = dev_priv;
1223 INIT_LIST_HEAD(&cbs->list);
1224
1225 return cbs;
1226}
1227
1228/**
1229 * vmw_binding_state_free - Free a struct vmw_ctx_binding_state and its
1230 * memory accounting info.
1231 *
1232 * @cbs: Pointer to the struct vmw_ctx_binding_state to be freed.
1233 */
1234void vmw_binding_state_free(struct vmw_ctx_binding_state *cbs)
1235{
1236 struct vmw_private *dev_priv = cbs->dev_priv;
1237
1238 vfree(cbs);
1239 ttm_mem_global_free(vmw_mem_glob(dev_priv), sizeof(*cbs));
1240}
1241
1242/**
1243 * vmw_binding_state_list - Get the binding list of a
1244 * struct vmw_ctx_binding_state
1245 *
1246 * @cbs: Pointer to the struct vmw_ctx_binding_state
1247 *
1248 * Returns the binding list which can be used to traverse through the bindings
1249 * and access the resource information of all bindings.
1250 */
1251struct list_head *vmw_binding_state_list(struct vmw_ctx_binding_state *cbs)
1252{
1253 return &cbs->list;
1254}
1255
1256/**
1257 * vmwgfx_binding_state_reset - clear a struct vmw_ctx_binding_state
1258 *
1259 * @cbs: Pointer to the struct vmw_ctx_binding_state to be cleared
1260 *
1261 * Drops all bindings registered in @cbs. No device binding actions are
1262 * performed.
1263 */
1264void vmw_binding_state_reset(struct vmw_ctx_binding_state *cbs)
1265{
1266 struct vmw_ctx_bindinfo *entry, *next;
1267
1268 list_for_each_entry_safe(entry, next, &cbs->list, ctx_list)
1269 vmw_binding_drop(entry);
1270}
1271
1272/*
1273 * This function is unused at run-time, and only used to hold various build
1274 * asserts important for code optimization assumptions.
1275 */
1276static void vmw_binding_build_asserts(void)
1277{
1278 BUILD_BUG_ON(SVGA3D_NUM_SHADERTYPE_DX10 != 3);
1279 BUILD_BUG_ON(SVGA3D_MAX_SIMULTANEOUS_RENDER_TARGETS > SVGA3D_RT_MAX);
1280 BUILD_BUG_ON(sizeof(uint32) != sizeof(u32));
1281
1282 /*
1283 * struct vmw_ctx_binding_state::bind_cmd_buffer is used for various
1284 * view id arrays.
1285 */
1286 BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_RT_MAX);
1287 BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_SRVIEWS);
1288 BUILD_BUG_ON(VMW_MAX_VIEW_BINDINGS < SVGA3D_DX_MAX_CONSTBUFFERS);
1289
1290 /*
1291 * struct vmw_ctx_binding_state::bind_cmd_buffer is used for
1292 * u32 view ids, SVGA3dSoTargets and SVGA3dVertexBuffers
1293 */
1294 BUILD_BUG_ON(SVGA3D_DX_MAX_SOTARGETS*sizeof(SVGA3dSoTarget) >
1295 VMW_MAX_VIEW_BINDINGS*sizeof(u32));
1296 BUILD_BUG_ON(SVGA3D_DX_MAX_VERTEXBUFFERS*sizeof(SVGA3dVertexBuffer) >
1297 VMW_MAX_VIEW_BINDINGS*sizeof(u32));
1298}