1# SPDX-License-Identifier: MIT
 2# Copyright © 2019-2024 Advanced Micro Devices, Inc. All rights reserved.
 3
 4menu "Display Engine Configuration"
 5	depends on DRM && DRM_AMDGPU
 6
 7config DRM_AMD_DC
 8	bool "AMD DC - Enable new display engine"
 9	default y
10	depends on BROKEN || !CC_IS_CLANG || ARM64 || LOONGARCH || RISCV || SPARC64 || X86_64
11	select SND_HDA_COMPONENT if SND_HDA_CORE
12	# !CC_IS_CLANG: https://github.com/ClangBuiltLinux/linux/issues/1752
13	select DRM_AMD_DC_FP if ARCH_HAS_KERNEL_FPU_SUPPORT && !(CC_IS_CLANG && (ARM64 || LOONGARCH || RISCV))
14	help
15	  Choose this option if you want to use the new display engine
16	  support for AMDGPU. This adds required support for Vega and
17	  Raven ASICs.
18
19	  calculate_bandwidth() is presently broken on all !(X86_64 || SPARC64 ||
20	  ARM64 || LOONGARCH || RISCV) architectures built with Clang (all released
21	  versions), whereby the stack frame gets blown up to well over 5k.  This
22	  would cause an immediate kernel panic on most architectures.  We'll revert
23	  this when the following bug report has been resolved:
24	  https://github.com/llvm/llvm-project/issues/41896.
25
26config DRM_AMD_DC_FP
27	def_bool n
28	help
29	  Floating point support, required for DCN-based SoCs
 
 
30
31config DRM_AMD_DC_SI
32	bool "AMD DC support for Southern Islands ASICs"
33	depends on DRM_AMDGPU_SI
34	depends on DRM_AMD_DC
35	help
36	  Choose this option to enable new AMD DC support for SI asics
37	  by default. This includes Tahiti, Pitcairn, Cape Verde, Oland.
38	  Hainan is not supported by AMD DC and it has no physical DCE6.
 
 
 
 
 
 
 
 
 
39
40config DEBUG_KERNEL_DC
41	bool "Enable kgdb break in DC"
42	depends on DRM_AMD_DC
43	depends on KGDB
44	help
45	  Choose this option if you want to hit kdgb_break in assert.
46
47config DRM_AMD_SECURE_DISPLAY
48	bool "Enable secure display support"
49	depends on DEBUG_FS
50	depends on DRM_AMD_DC_FP
51	help
52	  Choose this option if you want to support secure display
53
54	  This option enables the calculation of crc of specific region via
55	  debugfs. Cooperate with specific DMCU FW.
56
57endmenu

 
 
 
 1menu "Display Engine Configuration"
 2	depends on DRM && DRM_AMDGPU
 3
 4config DRM_AMD_DC
 5	bool "AMD DC - Enable new display engine"
 6	default y
 
 
 
 
 7	help
 8	  Choose this option if you want to use the new display engine
 9	  support for AMDGPU. This adds required support for Vega and
10	  Raven ASICs.
11
12config DRM_AMD_DC_PRE_VEGA
13	bool "DC support for Polaris and older ASICs"
14	default y
 
 
 
 
 
 
15	help
16	  Choose this option to enable the new DC support for older asics
17	  by default. This includes Polaris, Carrizo, Tonga, Bonaire,
18	  and Hawaii.
19
20config DRM_AMD_DC_FBC
21	bool "AMD FBC - Enable Frame Buffer Compression"
 
22	depends on DRM_AMD_DC
23	help
24	  Choose this option if you want to use frame buffer compression
25	  support.
26	  This is a power optimisation feature, check its availability
27	  on your hardware before enabling this option.
28
29
30config DRM_AMD_DC_DCN1_0
31	bool "DCN 1.0 Raven family"
32	depends on DRM_AMD_DC && X86
33	help
34	  Choose this option if you want to have
35	  RV family for display engine
36
37config DEBUG_KERNEL_DC
38	bool "Enable kgdb break in DC"
39	depends on DRM_AMD_DC
 
 
 
 
 
 
 
 
40	help
41	  Choose this option
42	  if you want to hit
43	  kdgb_break in assert.
 
44
45endmenu