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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
4 *
5 * Copyright (C) 2009 VIA Technologies, Inc.
6 * Copyright (C) 2010 One Laptop per Child
7 * Author: Harald Welte <HaraldWelte@viatech.com>
8 * All rights reserved.
9 */
10#include <linux/kernel.h>
11#include <linux/module.h>
12#include <linux/gpio/driver.h>
13#include <linux/slab.h>
14#include <linux/device.h>
15#include <linux/platform_device.h>
16#include <linux/pci.h>
17#include <linux/io.h>
18
19#define MODULE_NAME "vx855_gpio"
20
21/* The VX855 south bridge has the following GPIO pins:
22 * GPI 0...13 General Purpose Input
23 * GPO 0...12 General Purpose Output
24 * GPIO 0...14 General Purpose I/O (Open-Drain)
25 */
26
27#define NR_VX855_GPI 14
28#define NR_VX855_GPO 13
29#define NR_VX855_GPIO 15
30
31#define NR_VX855_GPInO (NR_VX855_GPI + NR_VX855_GPO)
32#define NR_VX855_GP (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
33
34struct vx855_gpio {
35 struct gpio_chip gpio;
36 spinlock_t lock;
37 u32 io_gpi;
38 u32 io_gpo;
39};
40
41/* resolve a GPIx into the corresponding bit position */
42static inline u_int32_t gpi_i_bit(int i)
43{
44 if (i < 10)
45 return 1 << i;
46 else
47 return 1 << (i + 14);
48}
49
50static inline u_int32_t gpo_o_bit(int i)
51{
52 if (i < 11)
53 return 1 << i;
54 else
55 return 1 << (i + 14);
56}
57
58static inline u_int32_t gpio_i_bit(int i)
59{
60 if (i < 14)
61 return 1 << (i + 10);
62 else
63 return 1 << (i + 14);
64}
65
66static inline u_int32_t gpio_o_bit(int i)
67{
68 if (i < 14)
69 return 1 << (i + 11);
70 else
71 return 1 << (i + 13);
72}
73
74/* Mapping between numeric GPIO ID and the actual GPIO hardware numbering:
75 * 0..13 GPI 0..13
76 * 14..26 GPO 0..12
77 * 27..41 GPIO 0..14
78 */
79
80static int vx855gpio_direction_input(struct gpio_chip *gpio,
81 unsigned int nr)
82{
83 struct vx855_gpio *vg = gpiochip_get_data(gpio);
84 unsigned long flags;
85 u_int32_t reg_out;
86
87 /* Real GPI bits are always in input direction */
88 if (nr < NR_VX855_GPI)
89 return 0;
90
91 /* Real GPO bits cannot be put in output direction */
92 if (nr < NR_VX855_GPInO)
93 return -EINVAL;
94
95 /* Open Drain GPIO have to be set to one */
96 spin_lock_irqsave(&vg->lock, flags);
97 reg_out = inl(vg->io_gpo);
98 reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
99 outl(reg_out, vg->io_gpo);
100 spin_unlock_irqrestore(&vg->lock, flags);
101
102 return 0;
103}
104
105static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
106{
107 struct vx855_gpio *vg = gpiochip_get_data(gpio);
108 u_int32_t reg_in;
109 int ret = 0;
110
111 if (nr < NR_VX855_GPI) {
112 reg_in = inl(vg->io_gpi);
113 if (reg_in & gpi_i_bit(nr))
114 ret = 1;
115 } else if (nr < NR_VX855_GPInO) {
116 /* GPO don't have an input bit, we need to read it
117 * back from the output register */
118 reg_in = inl(vg->io_gpo);
119 if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
120 ret = 1;
121 } else {
122 reg_in = inl(vg->io_gpi);
123 if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
124 ret = 1;
125 }
126
127 return ret;
128}
129
130static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
131 int val)
132{
133 struct vx855_gpio *vg = gpiochip_get_data(gpio);
134 unsigned long flags;
135 u_int32_t reg_out;
136
137 /* True GPI cannot be switched to output mode */
138 if (nr < NR_VX855_GPI)
139 return;
140
141 spin_lock_irqsave(&vg->lock, flags);
142 reg_out = inl(vg->io_gpo);
143 if (nr < NR_VX855_GPInO) {
144 if (val)
145 reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
146 else
147 reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
148 } else {
149 if (val)
150 reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
151 else
152 reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
153 }
154 outl(reg_out, vg->io_gpo);
155 spin_unlock_irqrestore(&vg->lock, flags);
156}
157
158static int vx855gpio_direction_output(struct gpio_chip *gpio,
159 unsigned int nr, int val)
160{
161 /* True GPI cannot be switched to output mode */
162 if (nr < NR_VX855_GPI)
163 return -EINVAL;
164
165 /* True GPO don't need to be switched to output mode,
166 * and GPIO are open-drain, i.e. also need no switching,
167 * so all we do is set the level */
168 vx855gpio_set(gpio, nr, val);
169
170 return 0;
171}
172
173static int vx855gpio_set_config(struct gpio_chip *gpio, unsigned int nr,
174 unsigned long config)
175{
176 enum pin_config_param param = pinconf_to_config_param(config);
177
178 /* The GPI cannot be single-ended */
179 if (nr < NR_VX855_GPI)
180 return -EINVAL;
181
182 /* The GPO's are push-pull */
183 if (nr < NR_VX855_GPInO) {
184 if (param != PIN_CONFIG_DRIVE_PUSH_PULL)
185 return -ENOTSUPP;
186 return 0;
187 }
188
189 /* The GPIO's are open drain */
190 if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN)
191 return -ENOTSUPP;
192
193 return 0;
194}
195
196static const char *vx855gpio_names[NR_VX855_GP] = {
197 "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
198 "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
199 "VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
200 "VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
201 "VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
202 "VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
203 "VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
204 "VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
205 "VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
206 "VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
207};
208
209static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
210{
211 struct gpio_chip *c = &vg->gpio;
212
213 c->label = "VX855 South Bridge";
214 c->owner = THIS_MODULE;
215 c->direction_input = vx855gpio_direction_input;
216 c->direction_output = vx855gpio_direction_output;
217 c->get = vx855gpio_get;
218 c->set = vx855gpio_set;
219 c->set_config = vx855gpio_set_config;
220 c->dbg_show = NULL;
221 c->base = 0;
222 c->ngpio = NR_VX855_GP;
223 c->can_sleep = false;
224 c->names = vx855gpio_names;
225}
226
227/* This platform device is ordinarily registered by the vx855 mfd driver */
228static int vx855gpio_probe(struct platform_device *pdev)
229{
230 struct resource *res_gpi;
231 struct resource *res_gpo;
232 struct vx855_gpio *vg;
233
234 res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
235 res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
236 if (!res_gpi || !res_gpo)
237 return -EBUSY;
238
239 vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL);
240 if (!vg)
241 return -ENOMEM;
242
243 dev_info(&pdev->dev, "found VX855 GPIO controller\n");
244 vg->io_gpi = res_gpi->start;
245 vg->io_gpo = res_gpo->start;
246 spin_lock_init(&vg->lock);
247
248 /*
249 * A single byte is used to control various GPIO ports on the VX855,
250 * and in the case of the OLPC XO-1.5, some of those ports are used
251 * for switches that are interpreted and exposed through ACPI. ACPI
252 * will have reserved the region, so our own reservation will not
253 * succeed. Ignore and continue.
254 */
255
256 if (!devm_request_region(&pdev->dev, res_gpi->start,
257 resource_size(res_gpi), MODULE_NAME "_gpi"))
258 dev_warn(&pdev->dev,
259 "GPI I/O resource busy, probably claimed by ACPI\n");
260
261 if (!devm_request_region(&pdev->dev, res_gpo->start,
262 resource_size(res_gpo), MODULE_NAME "_gpo"))
263 dev_warn(&pdev->dev,
264 "GPO I/O resource busy, probably claimed by ACPI\n");
265
266 vx855gpio_gpio_setup(vg);
267
268 return devm_gpiochip_add_data(&pdev->dev, &vg->gpio, vg);
269}
270
271static struct platform_driver vx855gpio_driver = {
272 .driver = {
273 .name = MODULE_NAME,
274 },
275 .probe = vx855gpio_probe,
276};
277
278module_platform_driver(vx855gpio_driver);
279
280MODULE_LICENSE("GPL");
281MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
282MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
283MODULE_ALIAS("platform:vx855_gpio");
1/*
2 * Linux GPIOlib driver for the VIA VX855 integrated southbridge GPIO
3 *
4 * Copyright (C) 2009 VIA Technologies, Inc.
5 * Copyright (C) 2010 One Laptop per Child
6 * Author: Harald Welte <HaraldWelte@viatech.com>
7 * All rights reserved.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
22 * MA 02111-1307 USA
23 *
24 */
25
26#include <linux/kernel.h>
27#include <linux/module.h>
28#include <linux/gpio.h>
29#include <linux/slab.h>
30#include <linux/device.h>
31#include <linux/platform_device.h>
32#include <linux/pci.h>
33#include <linux/io.h>
34
35#define MODULE_NAME "vx855_gpio"
36
37/* The VX855 south bridge has the following GPIO pins:
38 * GPI 0...13 General Purpose Input
39 * GPO 0...12 General Purpose Output
40 * GPIO 0...14 General Purpose I/O (Open-Drain)
41 */
42
43#define NR_VX855_GPI 14
44#define NR_VX855_GPO 13
45#define NR_VX855_GPIO 15
46
47#define NR_VX855_GPInO (NR_VX855_GPI + NR_VX855_GPO)
48#define NR_VX855_GP (NR_VX855_GPI + NR_VX855_GPO + NR_VX855_GPIO)
49
50struct vx855_gpio {
51 struct gpio_chip gpio;
52 spinlock_t lock;
53 u32 io_gpi;
54 u32 io_gpo;
55};
56
57/* resolve a GPIx into the corresponding bit position */
58static inline u_int32_t gpi_i_bit(int i)
59{
60 if (i < 10)
61 return 1 << i;
62 else
63 return 1 << (i + 14);
64}
65
66static inline u_int32_t gpo_o_bit(int i)
67{
68 if (i < 11)
69 return 1 << i;
70 else
71 return 1 << (i + 14);
72}
73
74static inline u_int32_t gpio_i_bit(int i)
75{
76 if (i < 14)
77 return 1 << (i + 10);
78 else
79 return 1 << (i + 14);
80}
81
82static inline u_int32_t gpio_o_bit(int i)
83{
84 if (i < 14)
85 return 1 << (i + 11);
86 else
87 return 1 << (i + 13);
88}
89
90/* Mapping betwee numeric GPIO ID and the actual GPIO hardware numbering:
91 * 0..13 GPI 0..13
92 * 14..26 GPO 0..12
93 * 27..41 GPIO 0..14
94 */
95
96static int vx855gpio_direction_input(struct gpio_chip *gpio,
97 unsigned int nr)
98{
99 struct vx855_gpio *vg = gpiochip_get_data(gpio);
100 unsigned long flags;
101 u_int32_t reg_out;
102
103 /* Real GPI bits are always in input direction */
104 if (nr < NR_VX855_GPI)
105 return 0;
106
107 /* Real GPO bits cannot be put in output direction */
108 if (nr < NR_VX855_GPInO)
109 return -EINVAL;
110
111 /* Open Drain GPIO have to be set to one */
112 spin_lock_irqsave(&vg->lock, flags);
113 reg_out = inl(vg->io_gpo);
114 reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
115 outl(reg_out, vg->io_gpo);
116 spin_unlock_irqrestore(&vg->lock, flags);
117
118 return 0;
119}
120
121static int vx855gpio_get(struct gpio_chip *gpio, unsigned int nr)
122{
123 struct vx855_gpio *vg = gpiochip_get_data(gpio);
124 u_int32_t reg_in;
125 int ret = 0;
126
127 if (nr < NR_VX855_GPI) {
128 reg_in = inl(vg->io_gpi);
129 if (reg_in & gpi_i_bit(nr))
130 ret = 1;
131 } else if (nr < NR_VX855_GPInO) {
132 /* GPO don't have an input bit, we need to read it
133 * back from the output register */
134 reg_in = inl(vg->io_gpo);
135 if (reg_in & gpo_o_bit(nr - NR_VX855_GPI))
136 ret = 1;
137 } else {
138 reg_in = inl(vg->io_gpi);
139 if (reg_in & gpio_i_bit(nr - NR_VX855_GPInO))
140 ret = 1;
141 }
142
143 return ret;
144}
145
146static void vx855gpio_set(struct gpio_chip *gpio, unsigned int nr,
147 int val)
148{
149 struct vx855_gpio *vg = gpiochip_get_data(gpio);
150 unsigned long flags;
151 u_int32_t reg_out;
152
153 /* True GPI cannot be switched to output mode */
154 if (nr < NR_VX855_GPI)
155 return;
156
157 spin_lock_irqsave(&vg->lock, flags);
158 reg_out = inl(vg->io_gpo);
159 if (nr < NR_VX855_GPInO) {
160 if (val)
161 reg_out |= gpo_o_bit(nr - NR_VX855_GPI);
162 else
163 reg_out &= ~gpo_o_bit(nr - NR_VX855_GPI);
164 } else {
165 if (val)
166 reg_out |= gpio_o_bit(nr - NR_VX855_GPInO);
167 else
168 reg_out &= ~gpio_o_bit(nr - NR_VX855_GPInO);
169 }
170 outl(reg_out, vg->io_gpo);
171 spin_unlock_irqrestore(&vg->lock, flags);
172}
173
174static int vx855gpio_direction_output(struct gpio_chip *gpio,
175 unsigned int nr, int val)
176{
177 /* True GPI cannot be switched to output mode */
178 if (nr < NR_VX855_GPI)
179 return -EINVAL;
180
181 /* True GPO don't need to be switched to output mode,
182 * and GPIO are open-drain, i.e. also need no switching,
183 * so all we do is set the level */
184 vx855gpio_set(gpio, nr, val);
185
186 return 0;
187}
188
189static int vx855gpio_set_config(struct gpio_chip *gpio, unsigned int nr,
190 unsigned long config)
191{
192 enum pin_config_param param = pinconf_to_config_param(config);
193
194 /* The GPI cannot be single-ended */
195 if (nr < NR_VX855_GPI)
196 return -EINVAL;
197
198 /* The GPO's are push-pull */
199 if (nr < NR_VX855_GPInO) {
200 if (param != PIN_CONFIG_DRIVE_PUSH_PULL)
201 return -ENOTSUPP;
202 return 0;
203 }
204
205 /* The GPIO's are open drain */
206 if (param != PIN_CONFIG_DRIVE_OPEN_DRAIN)
207 return -ENOTSUPP;
208
209 return 0;
210}
211
212static const char *vx855gpio_names[NR_VX855_GP] = {
213 "VX855_GPI0", "VX855_GPI1", "VX855_GPI2", "VX855_GPI3", "VX855_GPI4",
214 "VX855_GPI5", "VX855_GPI6", "VX855_GPI7", "VX855_GPI8", "VX855_GPI9",
215 "VX855_GPI10", "VX855_GPI11", "VX855_GPI12", "VX855_GPI13",
216 "VX855_GPO0", "VX855_GPO1", "VX855_GPO2", "VX855_GPO3", "VX855_GPO4",
217 "VX855_GPO5", "VX855_GPO6", "VX855_GPO7", "VX855_GPO8", "VX855_GPO9",
218 "VX855_GPO10", "VX855_GPO11", "VX855_GPO12",
219 "VX855_GPIO0", "VX855_GPIO1", "VX855_GPIO2", "VX855_GPIO3",
220 "VX855_GPIO4", "VX855_GPIO5", "VX855_GPIO6", "VX855_GPIO7",
221 "VX855_GPIO8", "VX855_GPIO9", "VX855_GPIO10", "VX855_GPIO11",
222 "VX855_GPIO12", "VX855_GPIO13", "VX855_GPIO14"
223};
224
225static void vx855gpio_gpio_setup(struct vx855_gpio *vg)
226{
227 struct gpio_chip *c = &vg->gpio;
228
229 c->label = "VX855 South Bridge";
230 c->owner = THIS_MODULE;
231 c->direction_input = vx855gpio_direction_input;
232 c->direction_output = vx855gpio_direction_output;
233 c->get = vx855gpio_get;
234 c->set = vx855gpio_set;
235 c->set_config = vx855gpio_set_config,
236 c->dbg_show = NULL;
237 c->base = 0;
238 c->ngpio = NR_VX855_GP;
239 c->can_sleep = false;
240 c->names = vx855gpio_names;
241}
242
243/* This platform device is ordinarily registered by the vx855 mfd driver */
244static int vx855gpio_probe(struct platform_device *pdev)
245{
246 struct resource *res_gpi;
247 struct resource *res_gpo;
248 struct vx855_gpio *vg;
249
250 res_gpi = platform_get_resource(pdev, IORESOURCE_IO, 0);
251 res_gpo = platform_get_resource(pdev, IORESOURCE_IO, 1);
252 if (!res_gpi || !res_gpo)
253 return -EBUSY;
254
255 vg = devm_kzalloc(&pdev->dev, sizeof(*vg), GFP_KERNEL);
256 if (!vg)
257 return -ENOMEM;
258
259 platform_set_drvdata(pdev, vg);
260
261 dev_info(&pdev->dev, "found VX855 GPIO controller\n");
262 vg->io_gpi = res_gpi->start;
263 vg->io_gpo = res_gpo->start;
264 spin_lock_init(&vg->lock);
265
266 /*
267 * A single byte is used to control various GPIO ports on the VX855,
268 * and in the case of the OLPC XO-1.5, some of those ports are used
269 * for switches that are interpreted and exposed through ACPI. ACPI
270 * will have reserved the region, so our own reservation will not
271 * succeed. Ignore and continue.
272 */
273
274 if (!devm_request_region(&pdev->dev, res_gpi->start,
275 resource_size(res_gpi), MODULE_NAME "_gpi"))
276 dev_warn(&pdev->dev,
277 "GPI I/O resource busy, probably claimed by ACPI\n");
278
279 if (!devm_request_region(&pdev->dev, res_gpo->start,
280 resource_size(res_gpo), MODULE_NAME "_gpo"))
281 dev_warn(&pdev->dev,
282 "GPO I/O resource busy, probably claimed by ACPI\n");
283
284 vx855gpio_gpio_setup(vg);
285
286 return devm_gpiochip_add_data(&pdev->dev, &vg->gpio, vg);
287}
288
289static struct platform_driver vx855gpio_driver = {
290 .driver = {
291 .name = MODULE_NAME,
292 },
293 .probe = vx855gpio_probe,
294};
295
296module_platform_driver(vx855gpio_driver);
297
298MODULE_LICENSE("GPL");
299MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>");
300MODULE_DESCRIPTION("GPIO driver for the VIA VX855 chipset");
301MODULE_ALIAS("platform:vx855_gpio");