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1# SPDX-License-Identifier: GPL-2.0-only
2menu "TI OMAP/AM/DM/DRA Family"
3 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
4
5config OMAP_HWMOD
6 bool
7
8config ARCH_OMAP2
9 bool "TI OMAP2"
10 depends on ARCH_MULTI_V6
11 select ARCH_OMAP2PLUS
12 select CPU_V6
13 select OMAP_HWMOD
14 select SOC_HAS_OMAP2_SDRC
15
16config ARCH_OMAP3
17 bool "TI OMAP3"
18 depends on ARCH_MULTI_V7
19 select ARCH_OMAP2PLUS
20 select ARM_CPU_SUSPEND
21 select OMAP_HWMOD
22 select OMAP_INTERCONNECT
23 select PM_OPP
24 select SOC_HAS_OMAP2_SDRC
25 select ARM_ERRATA_430973
26
27config ARCH_OMAP4
28 bool "TI OMAP4"
29 depends on ARCH_MULTI_V7
30 select ARCH_OMAP2PLUS
31 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
32 select ARM_CPU_SUSPEND
33 select ARM_ERRATA_720789
34 select ARM_GIC
35 select HAVE_ARM_SCU if SMP
36 select HAVE_ARM_TWD if SMP
37 select OMAP_INTERCONNECT
38 select OMAP_INTERCONNECT_BARRIER
39 select PL310_ERRATA_588369 if CACHE_L2X0
40 select PL310_ERRATA_727915 if CACHE_L2X0
41 select PM_OPP
42 select PM if CPU_IDLE
43 select ARM_ERRATA_754322
44 select ARM_ERRATA_775420
45 select OMAP_INTERCONNECT
46
47config SOC_OMAP5
48 bool "TI OMAP5"
49 depends on ARCH_MULTI_V7
50 select ARCH_OMAP2PLUS
51 select ARM_CPU_SUSPEND
52 select ARM_GIC
53 select HAVE_ARM_SCU if SMP
54 select HAVE_ARM_ARCH_TIMER
55 select ARM_ERRATA_798181 if SMP
56 select OMAP_INTERCONNECT
57 select OMAP_INTERCONNECT_BARRIER
58 select PM_OPP
59 select ZONE_DMA if ARM_LPAE
60
61config SOC_AM33XX
62 bool "TI AM33XX"
63 depends on ARCH_MULTI_V7
64 select ARCH_OMAP2PLUS
65 select ARM_CPU_SUSPEND
66
67config SOC_AM43XX
68 bool "TI AM43x"
69 depends on ARCH_MULTI_V7
70 select ARCH_OMAP2PLUS
71 select ARM_GIC
72 select MACH_OMAP_GENERIC
73 select HAVE_ARM_SCU
74 select GENERIC_CLOCKEVENTS_BROADCAST
75 select HAVE_ARM_TWD
76 select ARM_ERRATA_754322
77 select ARM_ERRATA_775420
78 select OMAP_INTERCONNECT
79 select ARM_CPU_SUSPEND
80
81config SOC_DRA7XX
82 bool "TI DRA7XX"
83 depends on ARCH_MULTI_V7
84 select ARCH_OMAP2PLUS
85 select ARM_CPU_SUSPEND
86 select ARM_GIC
87 select HAVE_ARM_SCU if SMP
88 select HAVE_ARM_ARCH_TIMER
89 select IRQ_CROSSBAR
90 select ARM_ERRATA_798181 if SMP
91 select OMAP_INTERCONNECT
92 select OMAP_INTERCONNECT_BARRIER
93 select PM_OPP
94 select ZONE_DMA if ARM_LPAE
95 select PINCTRL_TI_IODELAY if OF && PINCTRL
96
97config ARCH_OMAP2PLUS
98 bool
99 select ARCH_HAS_BANDGAP
100 select ARCH_HAS_RESET_CONTROLLER
101 select ARCH_OMAP
102 select CLKSRC_MMIO
103 select GENERIC_IRQ_CHIP
104 select GPIOLIB
105 select MACH_OMAP_GENERIC
106 select MEMORY
107 select MFD_SYSCON
108 select OMAP_DM_SYSTIMER
109 select OMAP_DM_TIMER
110 select OMAP_GPMC
111 select PINCTRL
112 select PM
113 select PM_GENERIC_DOMAINS
114 select PM_GENERIC_DOMAINS_OF
115 select RESET_CONTROLLER
116 select SOC_BUS
117 select TI_SYSC
118 select OMAP_IRQCHIP
119 select CLKSRC_TI_32K
120 help
121 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
122
123config OMAP_INTERCONNECT_BARRIER
124 bool
125 select ARM_HEAVY_MB
126
127config ARCH_OMAP
128 bool
129
130if ARCH_OMAP2PLUS
131
132menu "TI OMAP2/3/4 Specific Features"
133
134config ARCH_OMAP2PLUS_TYPICAL
135 bool "Typical OMAP configuration"
136 default y
137 select AEABI
138 select HIGHMEM
139 select I2C
140 select I2C_OMAP
141 select MENELAUS if ARCH_OMAP2
142 select NEON if CPU_V7
143 select REGULATOR
144 select REGULATOR_FIXED_VOLTAGE
145 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
146 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
147 select VFP
148 help
149 Compile a kernel suitable for booting most boards
150
151config SOC_HAS_OMAP2_SDRC
152 bool "OMAP2 SDRAM Controller support"
153
154config SOC_HAS_REALTIME_COUNTER
155 bool "Real time free running counter"
156 depends on SOC_OMAP5 || SOC_DRA7XX
157 default y
158
159config POWER_AVS_OMAP
160 bool "AVS(Adaptive Voltage Scaling) support for OMAP IP versions 1&2"
161 depends on (ARCH_OMAP3 || ARCH_OMAP4) && PM
162 select POWER_SUPPLY
163 help
164 Say Y to enable AVS(Adaptive Voltage Scaling)
165 support on OMAP containing the version 1 or
166 version 2 of the SmartReflex IP.
167 V1 is the 65nm version used in OMAP3430.
168 V2 is the update for the 45nm version of the IP used in OMAP3630
169 and OMAP4430
170
171 Please note, that by default SmartReflex is only
172 initialized and not enabled. To enable the automatic voltage
173 compensation for vdd mpu and vdd core from user space,
174 user must write 1 to
175 /debug/smartreflex/sr_<X>/autocomp,
176 where X is mpu_iva or core for OMAP3.
177 Optionally autocompensation can be enabled in the kernel
178 by default during system init via the enable_on_init flag
179 which an be passed as platform data to the smartreflex driver.
180
181config POWER_AVS_OMAP_CLASS3
182 bool "Class 3 mode of Smartreflex Implementation"
183 depends on POWER_AVS_OMAP && TWL4030_CORE
184 help
185 Say Y to enable Class 3 implementation of Smartreflex
186
187 Class 3 implementation of Smartreflex employs continuous hardware
188 voltage calibration.
189
190config OMAP3_L2_AUX_SECURE_SAVE_RESTORE
191 bool "OMAP3 HS/EMU save and restore for L2 AUX control register"
192 depends on ARCH_OMAP3 && PM
193 help
194 Without this option, L2 Auxiliary control register contents are
195 lost during off-mode entry on HS/EMU devices. This feature
196 requires support from PPA / boot-loader in HS/EMU devices, which
197 currently does not exist by default.
198
199config OMAP3_L2_AUX_SECURE_SERVICE_SET_ID
200 int "Service ID for the support routine to set L2 AUX control"
201 depends on OMAP3_L2_AUX_SECURE_SAVE_RESTORE
202 default 43
203 help
204 PPA routine service ID for setting L2 auxiliary control register.
205
206comment "OMAP Core Type"
207 depends on ARCH_OMAP2
208
209config SOC_OMAP2420
210 bool "OMAP2420 support"
211 depends on ARCH_OMAP2
212 default y
213 select OMAP_DM_SYSTIMER
214 select OMAP_DM_TIMER
215 select SOC_HAS_OMAP2_SDRC
216
217config SOC_OMAP2430
218 bool "OMAP2430 support"
219 depends on ARCH_OMAP2
220 default y
221 select SOC_HAS_OMAP2_SDRC
222
223config SOC_OMAP3430
224 bool "OMAP3430 support"
225 depends on ARCH_OMAP3
226 default y
227 select SOC_HAS_OMAP2_SDRC
228
229config SOC_TI81XX
230 bool "TI81XX support"
231 depends on ARCH_OMAP3
232 default y
233
234comment "OMAP Legacy Platform Data Board Type"
235 depends on ARCH_OMAP2PLUS
236
237config MACH_OMAP_GENERIC
238 bool
239
240config MACH_OMAP2_TUSB6010
241 bool
242 depends on ARCH_OMAP2 && SOC_OMAP2420
243 default y if MACH_NOKIA_N8X0
244
245config MACH_NOKIA_N810
246 bool
247
248config MACH_NOKIA_N810_WIMAX
249 bool
250
251config MACH_NOKIA_N8X0
252 bool "Nokia N800/N810"
253 depends on SOC_OMAP2420
254 default y
255 select MACH_NOKIA_N810
256 select MACH_NOKIA_N810_WIMAX
257
258endmenu
259
260endif
261
262config OMAP5_ERRATA_801819
263 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
264 depends on SOC_OMAP5 || SOC_DRA7XX
265 help
266 A livelock can occur in the L2 cache arbitration that might prevent
267 a snoop from completing. Under certain conditions this can cause the
268 system to deadlock.
269
270endmenu
1menu "TI OMAP/AM/DM/DRA Family"
2 depends on ARCH_MULTI_V6 || ARCH_MULTI_V7
3
4config ARCH_OMAP2
5 bool "TI OMAP2"
6 depends on ARCH_MULTI_V6
7 select ARCH_OMAP2PLUS
8 select CPU_V6
9 select SOC_HAS_OMAP2_SDRC
10
11config ARCH_OMAP3
12 bool "TI OMAP3"
13 depends on ARCH_MULTI_V7
14 select ARCH_OMAP2PLUS
15 select ARM_CPU_SUSPEND if PM
16 select OMAP_INTERCONNECT
17 select PM_OPP if PM
18 select PM if CPU_IDLE
19 select SOC_HAS_OMAP2_SDRC
20 select ARM_ERRATA_430973
21
22config ARCH_OMAP4
23 bool "TI OMAP4"
24 depends on ARCH_MULTI_V7
25 select ARCH_OMAP2PLUS
26 select ARCH_NEEDS_CPU_IDLE_COUPLED if SMP
27 select ARM_CPU_SUSPEND if PM
28 select ARM_ERRATA_720789
29 select ARM_GIC
30 select HAVE_ARM_SCU if SMP
31 select HAVE_ARM_TWD if SMP
32 select OMAP_INTERCONNECT
33 select OMAP_INTERCONNECT_BARRIER
34 select PL310_ERRATA_588369 if CACHE_L2X0
35 select PL310_ERRATA_727915 if CACHE_L2X0
36 select PM_OPP if PM
37 select PM if CPU_IDLE
38 select ARM_ERRATA_754322
39 select ARM_ERRATA_775420
40 select OMAP_INTERCONNECT
41
42config SOC_OMAP5
43 bool "TI OMAP5"
44 depends on ARCH_MULTI_V7
45 select ARCH_OMAP2PLUS
46 select ARM_CPU_SUSPEND if PM
47 select ARM_GIC
48 select HAVE_ARM_SCU if SMP
49 select HAVE_ARM_ARCH_TIMER
50 select ARM_ERRATA_798181 if SMP
51 select OMAP_INTERCONNECT
52 select OMAP_INTERCONNECT_BARRIER
53 select PM_OPP if PM
54 select ZONE_DMA if ARM_LPAE
55
56config SOC_AM33XX
57 bool "TI AM33XX"
58 depends on ARCH_MULTI_V7
59 select ARCH_OMAP2PLUS
60 select ARM_CPU_SUSPEND if PM
61
62config SOC_AM43XX
63 bool "TI AM43x"
64 depends on ARCH_MULTI_V7
65 select ARCH_OMAP2PLUS
66 select ARM_GIC
67 select MACH_OMAP_GENERIC
68 select MIGHT_HAVE_CACHE_L2X0
69 select HAVE_ARM_SCU
70 select GENERIC_CLOCKEVENTS_BROADCAST
71 select HAVE_ARM_TWD
72 select ARM_ERRATA_754322
73 select ARM_ERRATA_775420
74 select OMAP_INTERCONNECT
75 select ARM_CPU_SUSPEND if PM
76
77config SOC_DRA7XX
78 bool "TI DRA7XX"
79 depends on ARCH_MULTI_V7
80 select ARCH_OMAP2PLUS
81 select ARM_CPU_SUSPEND if PM
82 select ARM_GIC
83 select HAVE_ARM_SCU if SMP
84 select HAVE_ARM_ARCH_TIMER
85 select IRQ_CROSSBAR
86 select ARM_ERRATA_798181 if SMP
87 select OMAP_INTERCONNECT
88 select OMAP_INTERCONNECT_BARRIER
89 select PM_OPP if PM
90 select ZONE_DMA if ARM_LPAE
91 select PINCTRL_TI_IODELAY if OF && PINCTRL
92
93config ARCH_OMAP2PLUS
94 bool
95 select ARCH_HAS_BANDGAP
96 select ARCH_HAS_HOLES_MEMORYMODEL
97 select ARCH_OMAP
98 select CLKSRC_MMIO
99 select GENERIC_IRQ_CHIP
100 select GPIOLIB
101 select MACH_OMAP_GENERIC
102 select MEMORY
103 select MFD_SYSCON
104 select OMAP_DM_TIMER
105 select OMAP_GPMC
106 select PINCTRL
107 select SOC_BUS
108 select TI_SYSC
109 select OMAP_IRQCHIP
110 select CLKSRC_TI_32K
111 help
112 Systems based on OMAP2, OMAP3, OMAP4 or OMAP5
113
114config OMAP_INTERCONNECT_BARRIER
115 bool
116 select ARM_HEAVY_MB
117
118
119if ARCH_OMAP2PLUS
120
121menu "TI OMAP2/3/4 Specific Features"
122
123config ARCH_OMAP2PLUS_TYPICAL
124 bool "Typical OMAP configuration"
125 default y
126 select AEABI
127 select HIGHMEM
128 select I2C
129 select I2C_OMAP
130 select MENELAUS if ARCH_OMAP2
131 select NEON if CPU_V7
132 select PM
133 select REGULATOR
134 select REGULATOR_FIXED_VOLTAGE
135 select TWL4030_CORE if ARCH_OMAP3 || ARCH_OMAP4
136 select TWL4030_POWER if ARCH_OMAP3 || ARCH_OMAP4
137 select VFP
138 help
139 Compile a kernel suitable for booting most boards
140
141config SOC_HAS_OMAP2_SDRC
142 bool "OMAP2 SDRAM Controller support"
143
144config SOC_HAS_REALTIME_COUNTER
145 bool "Real time free running counter"
146 depends on SOC_OMAP5 || SOC_DRA7XX
147 default y
148
149comment "OMAP Core Type"
150 depends on ARCH_OMAP2
151
152config SOC_OMAP2420
153 bool "OMAP2420 support"
154 depends on ARCH_OMAP2
155 default y
156 select OMAP_DM_TIMER
157 select SOC_HAS_OMAP2_SDRC
158
159config SOC_OMAP2430
160 bool "OMAP2430 support"
161 depends on ARCH_OMAP2
162 default y
163 select SOC_HAS_OMAP2_SDRC
164
165config SOC_OMAP3430
166 bool "OMAP3430 support"
167 depends on ARCH_OMAP3
168 default y
169 select SOC_HAS_OMAP2_SDRC
170
171config SOC_TI81XX
172 bool "TI81XX support"
173 depends on ARCH_OMAP3
174 default y
175
176config OMAP_PACKAGE_CBC
177 bool
178
179config OMAP_PACKAGE_CBB
180 bool
181
182config OMAP_PACKAGE_CUS
183 bool
184
185config OMAP_PACKAGE_CBP
186 bool
187
188comment "OMAP Legacy Platform Data Board Type"
189 depends on ARCH_OMAP2PLUS
190
191config MACH_OMAP_GENERIC
192 bool
193
194config MACH_OMAP2_TUSB6010
195 bool
196 depends on ARCH_OMAP2 && SOC_OMAP2420
197 default y if MACH_NOKIA_N8X0
198
199config MACH_OMAP3517EVM
200 bool "OMAP3517/ AM3517 EVM board"
201 depends on ARCH_OMAP3
202 default y
203
204config MACH_OMAP3_PANDORA
205 bool "OMAP3 Pandora"
206 depends on ARCH_OMAP3
207 default y
208 select OMAP_PACKAGE_CBB
209
210config MACH_NOKIA_N810
211 bool
212
213config MACH_NOKIA_N810_WIMAX
214 bool
215
216config MACH_NOKIA_N8X0
217 bool "Nokia N800/N810"
218 depends on SOC_OMAP2420
219 default y
220 select MACH_NOKIA_N810
221 select MACH_NOKIA_N810_WIMAX
222
223config OMAP3_SDRC_AC_TIMING
224 bool "Enable SDRC AC timing register changes"
225 depends on ARCH_OMAP3
226 default n
227 help
228 If you know that none of your system initiators will attempt to
229 access SDRAM during CORE DVFS, select Y here. This should boost
230 SDRAM performance at lower CORE OPPs. There are relatively few
231 users who will wish to say yes at this point - almost everyone will
232 wish to say no. Selecting yes without understanding what is
233 going on could result in system crashes;
234
235endmenu
236
237endif
238
239config OMAP5_ERRATA_801819
240 bool "Errata 801819: An eviction from L1 data cache might stall indefinitely"
241 depends on SOC_OMAP5 || SOC_DRA7XX
242 help
243 A livelock can occur in the L2 cache arbitration that might prevent
244 a snoop from completing. Under certain conditions this can cause the
245 system to deadlock.
246
247endmenu