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1/*
2 * at91-tse850-3.dts - Device Tree file for the Axentia TSE-850 3.0 board
3 *
4 * Copyright (C) 2017 Axentia Technologies AB
5 *
6 * Author: Peter Rosin <peda@axentia.se>
7 *
8 * Licensed under GPLv2 or later.
9 */
10/dts-v1/;
11#include <dt-bindings/pwm/pwm.h>
12#include "at91-linea.dtsi"
13
14/ {
15 model = "Axentia TSE-850 3.0";
16 compatible = "axentia,tse850v3", "axentia,linea",
17 "atmel,sama5d31", "atmel,sama5d3", "atmel,sama5";
18
19 ahb {
20 apb {
21 pinctrl@fffff200 {
22 tse850 {
23 pinctrl_usba_vbus: usba-vbus {
24 atmel,pins =
25 <AT91_PIOC 31
26 AT91_PERIPH_GPIO
27 AT91_PINCTRL_DEGLITCH>;
28 };
29 };
30 };
31
32 watchdog@fffffe40 {
33 status = "okay";
34 };
35 };
36 };
37
38 sck: oscillator {
39 compatible = "fixed-clock";
40
41 #clock-cells = <0>;
42 clock-frequency = <16000000>;
43 clock-output-names = "sck";
44 };
45
46 reg_3v3: regulator {
47 compatible = "regulator-fixed";
48
49 regulator-name = "3v3-supply";
50 regulator-min-microvolt = <3300000>;
51 regulator-max-microvolt = <3300000>;
52 };
53
54 ana: reg-ana {
55 compatible = "pwm-regulator";
56
57 regulator-name = "ANA";
58
59 pwms = <&pwm0 2 1000 PWM_POLARITY_INVERTED>;
60 pwm-dutycycle-unit = <1000>;
61 pwm-dutycycle-range = <100 1000>;
62
63 regulator-min-microvolt = <2000000>;
64 regulator-max-microvolt = <20000000>;
65 regulator-ramp-delay = <1000>;
66 };
67
68 sound {
69 compatible = "axentia,tse850-pcm5142";
70
71 axentia,cpu-dai = <&ssc0>;
72 axentia,audio-codec = <&pcm5142>;
73
74 axentia,add-gpios = <&pioA 8 GPIO_ACTIVE_LOW>;
75 axentia,loop1-gpios = <&pioA 10 GPIO_ACTIVE_LOW>;
76 axentia,loop2-gpios = <&pioA 11 GPIO_ACTIVE_LOW>;
77
78 axentia,ana-supply = <&ana>;
79 };
80
81 dac: dpot-dac {
82 compatible = "dpot-dac";
83 vref-supply = <®_3v3>;
84 io-channels = <&dpot 0>;
85 io-channel-names = "dpot";
86 #io-channel-cells = <1>;
87 };
88
89 env_det: envelope-detector {
90 compatible = "axentia,tse850-envelope-detector";
91 io-channels = <&dac 0>;
92 io-channel-names = "dac";
93 #io-channel-cells = <1>;
94
95 interrupt-parent = <&pioA>;
96 interrupts = <3 IRQ_TYPE_EDGE_RISING>;
97 interrupt-names = "comp";
98 };
99
100 mux: mux-controller {
101 compatible = "gpio-mux";
102 #mux-control-cells = <0>;
103
104 mux-gpios = <&pioA 0 GPIO_ACTIVE_HIGH>,
105 <&pioA 1 GPIO_ACTIVE_HIGH>,
106 <&pioA 2 GPIO_ACTIVE_HIGH>;
107 idle-state = <0>;
108 };
109
110 envelope-detector-mux {
111 compatible = "io-channel-mux";
112 io-channels = <&env_det 0>;
113 io-channel-names = "parent";
114
115 mux-controls = <&mux>;
116
117 channels = "", "",
118 "sync-1",
119 "in",
120 "out",
121 "sync-2",
122 "sys-reg",
123 "ana-reg";
124 };
125
126 leds {
127 compatible = "gpio-leds";
128
129 ch1-red {
130 label = "ch-1:red";
131 gpios = <&pioA 23 GPIO_ACTIVE_LOW>;
132 };
133 ch1-green {
134 label = "ch-1:green";
135 gpios = <&pioA 22 GPIO_ACTIVE_LOW>;
136 };
137 ch2-red {
138 label = "ch-2:red";
139 gpios = <&pioA 21 GPIO_ACTIVE_LOW>;
140 };
141 ch2-green {
142 label = "ch-2:green";
143 gpios = <&pioA 20 GPIO_ACTIVE_LOW>;
144 };
145 data-red {
146 label = "data:red";
147 gpios = <&pioA 19 GPIO_ACTIVE_LOW>;
148 };
149 data-green {
150 label = "data:green";
151 gpios = <&pioA 18 GPIO_ACTIVE_LOW>;
152 };
153 alarm-red {
154 label = "alarm:red";
155 gpios = <&pioA 17 GPIO_ACTIVE_LOW>;
156 };
157 alarm-green {
158 label = "alarm:green";
159 gpios = <&pioA 16 GPIO_ACTIVE_LOW>;
160 };
161 };
162};
163
164&nand {
165 partitions {
166 compatible = "fixed-partitions";
167 #address-cells = <1>;
168 #size-cells = <1>;
169
170 at91bootstrap@0 {
171 label = "at91bootstrap";
172 reg = <0x0 0x40000>;
173 };
174
175 barebox@40000 {
176 label = "bootloader";
177 reg = <0x40000 0x60000>;
178 };
179
180 bareboxenv@c0000 {
181 label = "bareboxenv";
182 reg = <0xc0000 0x40000>;
183 };
184
185 bareboxenv2@100000 {
186 label = "bareboxenv2";
187 reg = <0x100000 0x40000>;
188 };
189
190 oftree@180000 {
191 label = "oftree";
192 reg = <0x180000 0x20000>;
193 };
194
195 kernel@200000 {
196 label = "kernel";
197 reg = <0x200000 0x500000>;
198 };
199
200 rootfs@800000 {
201 label = "rootfs";
202 reg = <0x800000 0x0f800000>;
203 };
204
205 ovlfs@10000000 {
206 label = "ovlfs";
207 reg = <0x10000000 0x10000000>;
208 };
209 };
210};
211
212&ssc0 {
213 #sound-dai-cells = <0>;
214
215 status = "okay";
216};
217
218&i2c0 {
219 status = "okay";
220
221 jc42@18 {
222 compatible = "nxp,se97b", "jedec,jc-42.4-temp";
223 reg = <0x18>;
224 smbus-timeout-disable;
225 };
226
227 dpot: mcp4651-104@28 {
228 compatible = "microchip,mcp4651-104";
229 reg = <0x28>;
230 #io-channel-cells = <1>;
231 };
232
233 pcm5142: pcm5142@4c {
234 compatible = "ti,pcm5142";
235
236 reg = <0x4c>;
237 #sound-dai-cells = <0>;
238
239 AVDD-supply = <®_3v3>;
240 DVDD-supply = <®_3v3>;
241 CPVDD-supply = <®_3v3>;
242
243 clocks = <&sck>;
244
245 pll-in = <3>;
246 pll-out = <6>;
247 };
248
249 eeprom@50 {
250 compatible = "nxp,se97b", "atmel,24c02";
251 reg = <0x50>;
252 pagesize = <16>;
253 };
254};
255
256&usart0 {
257 status = "okay";
258
259 atmel,use-dma-rx;
260};
261
262&pwm0 {
263 status = "okay";
264
265 pinctrl-0 = <&pinctrl_pwm0_pwml2_1>;
266 pinctrl-names = "default";
267};
268
269&macb1 {
270 status = "okay";
271
272 phy-mode = "rgmii";
273
274 #address-cells = <1>;
275 #size-cells = <0>;
276
277 phy0: ethernet-phy@3 {
278 reg = <3>;
279
280 interrupt-parent = <&pioE>;
281 interrupts = <31 IRQ_TYPE_EDGE_FALLING>;
282 };
283};
284
285&usb0 {
286 status = "okay";
287
288 pinctrl-names = "default";
289 pinctrl-0 = <&pinctrl_usba_vbus>;
290 atmel,vbus-gpio = <&pioC 31 GPIO_ACTIVE_HIGH>;
291};
292
293&usb1 {
294 status = "okay";
295
296 num-ports = <1>;
297 atmel,vbus-gpio = <&pioD 29 GPIO_ACTIVE_HIGH>;
298 atmel,oc-gpio = <&pioC 15 GPIO_ACTIVE_LOW>;
299};
300
301&usb2 {
302 status = "okay";
303};
304
305&dbgu {
306 status = "okay";
307
308 dmas = <0>, <0>; /* Do not use DMA for dbgu */
309};