1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
  2/*
  3 * Device Tree file for Marvell Armada 390 Development Board
  4 * (DB-88F6920)
  5 *
  6 * Copyright (C) 2016 Marvell
  7 *
  8 * Grzegorz Jaszczyk <jaz@semihalf.com>
  9 */
 10
 11/dts-v1/;
 12#include "armada-390.dtsi"
 13
 14/ {
 15	model = "Marvell Armada 390 Development Board";
 16	compatible = "marvell,a390-db", "marvell,armada390";
 17
 18	chosen {
 19		stdout-path = "serial0:115200n8";
 20	};
 21
 22	memory {
 23		device_type = "memory";
 24		reg = <0x00000000 0x80000000>; /* 2 GB */
 25	};
 26
 27	soc {
 28		ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000
 29			  MBUS_ID(0x01, 0x1d) 0 0xfff00000 0x100000>;
 30
 31		internal-regs {
 32			i2c@11000 {
 33				status = "okay";
 34				clock-frequency = <100000>;
 35
 36				eeprom@50 {
 37					compatible = "atmel,24c64";
 38					reg = <0x50>;
 39				};
 40			};
 41
 42			/* CON104 */
 43			serial@12000 {
 44				status = "okay";
 45			};
 46
 47			/* CON97 */
 48			usb@58000 {
 49				status = "okay";
 50			};
 51
 52			flash@d0000 {
 53				status = "okay";
 54				pinctrl-0 = <&nand_pins>;
 55				pinctrl-names = "default";
 56				num-cs = <1>;
 57				marvell,nand-keep-config;
 58				marvell,nand-enable-arbiter;
 59				nand-on-flash-bbt;
 60				nand-ecc-strength = <8>;
 61				nand-ecc-step-size = <512>;
 62
 63				partitions {
 64					compatible = "fixed-partitions";
 65					#address-cells = <1>;
 66					#size-cells = <1>;
 67
 68					partition@0 {
 69						label = "U-Boot";
 70						reg = <0 0x800000>;
 71					};
 72					partition@800000 {
 73						label = "Linux";
 74						reg = <0x800000 0x800000>;
 75					};
 76					partition@1000000 {
 77						label = "Filesystem";
 78						reg = <0x1000000 0x3f000000>;
 79					};
 80				};
 81			};
 82
 83			/* CON98 */
 84			usb3@f8000 {
 85				status = "okay";
 86			};
 87		};
 88
 89		pcie {
 90			status = "okay";
 91
 92			/* CON30 */
 93			pcie@1,0 {
 94				status = "okay";
 95			};
 96
 97			/* CON44 */
 98			pcie@2,0 {
 99				status = "okay";
100			};
101
102			/* CON61 */
103			pcie@3,0 {
104				status = "okay";
105			};
106		};
107	};
108};
109
110&spi1 {
111	status = "okay";
112	pinctrl-0 = <&spi1_pins>;
113	pinctrl-names = "default";
114
115	spi-flash@1 {
116		#address-cells = <1>;
117		#size-cells = <1>;
118		compatible = "n25q128a13",
119			     "jedec,spi-nor";
120		reg = <0>; /* Chip select 0 */
121		spi-max-frequency = <108000000>;
122
123		partitions {
124			compatible = "fixed-partitions";
125			#address-cells = <1>;
126			#size-cells = <1>;
127
128			partition@0 {
129				label = "U-Boot";
130				reg = <0 0x400000>;
131			};
132			partition@400000 {
133				label = "Filesystem";
134				reg = <0x400000 0xc00000>;
135			};
136		};
137	};
138};