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1/*
2 * Copyright (C) 2015-2016 Texas Instruments Incorporated - http://www.ti.com/
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8
9#include "am57xx-industrial-grade.dtsi"
10
11/ {
12 aliases {
13 rtc0 = &tps659038_rtc;
14 rtc1 = &rtc;
15 };
16
17 chosen {
18 stdout-path = &uart3;
19 };
20
21 vmain: fixedregulator-vmain {
22 compatible = "regulator-fixed";
23 regulator-name = "VMAIN";
24 regulator-min-microvolt = <5000000>;
25 regulator-max-microvolt = <5000000>;
26 regulator-always-on;
27 regulator-boot-on;
28 };
29
30 v3_3d: fixedregulator-v3_3d {
31 compatible = "regulator-fixed";
32 regulator-name = "V3_3D";
33 vin-supply = <&smps9_reg>;
34 regulator-min-microvolt = <3300000>;
35 regulator-max-microvolt = <3300000>;
36 regulator-always-on;
37 regulator-boot-on;
38 };
39
40 vtt_fixed: fixedregulator-vtt {
41 /* TPS51200 */
42 compatible = "regulator-fixed";
43 regulator-name = "vtt_fixed";
44 vin-supply = <&v3_3d>;
45 regulator-min-microvolt = <3300000>;
46 regulator-max-microvolt = <3300000>;
47 regulator-always-on;
48 regulator-boot-on;
49 };
50
51 leds-iio {
52 status = "disabled";
53 compatible = "gpio-leds";
54 led-out0 {
55 label = "out0";
56 gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
57 default-state = "off";
58 };
59
60 led-out1 {
61 label = "out1";
62 gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
63 default-state = "off";
64 };
65
66 led-out2 {
67 label = "out2";
68 gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
69 default-state = "off";
70 };
71
72 led-out3 {
73 label = "out3";
74 gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
75 default-state = "off";
76 };
77
78 led-out4 {
79 label = "out4";
80 gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
81 default-state = "off";
82 };
83
84 led-out5 {
85 label = "out5";
86 gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
87 default-state = "off";
88 };
89
90 led-out6 {
91 label = "out6";
92 gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
93 default-state = "off";
94 };
95
96 led-out7 {
97 label = "out7";
98 gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
99 default-state = "off";
100 };
101 };
102};
103
104&dra7_pmx_core {
105 dcan1_pins_default: dcan1_pins_default {
106 pinctrl-single,pins = <
107 DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
108 DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0) /* dcan1_rx */
109 >;
110 };
111
112 dcan1_pins_sleep: dcan1_pins_sleep {
113 pinctrl-single,pins = <
114 DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
115 DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP) /* dcan1_rx.off */
116 >;
117 };
118
119 mmc1_pins_default: mmc1_pins_default {
120 pinctrl-single,pins = <
121 DRA7XX_CORE_IOPAD(0x3754, PIN_INPUT_PULLDOWN | MUX_MODE0) /* mmc1_clk.clk */
122 DRA7XX_CORE_IOPAD(0x3758, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_cmd.cmd */
123 DRA7XX_CORE_IOPAD(0x375c, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat0.dat0 */
124 DRA7XX_CORE_IOPAD(0x3760, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat1.dat1 */
125 DRA7XX_CORE_IOPAD(0x3764, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat2.dat2 */
126 DRA7XX_CORE_IOPAD(0x3768, PIN_INPUT_PULLUP | MUX_MODE0) /* mmc1_dat3.dat3 */
127 >;
128 };
129};
130
131&i2c1 {
132 status = "okay";
133 clock-frequency = <400000>;
134
135 tps659038: tps659038@58 {
136 compatible = "ti,tps659038";
137 reg = <0x58>;
138 interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
139 &dra7_pmx_core 0x418>;
140 #interrupt-cells = <2>;
141 interrupt-controller;
142 ti,system-power-controller;
143 ti,palmas-override-powerhold;
144
145 tps659038_pmic {
146 compatible = "ti,tps659038-pmic";
147
148 smps12-in-supply = <&vmain>;
149 smps3-in-supply = <&vmain>;
150 smps45-in-supply = <&vmain>;
151 smps6-in-supply = <&vmain>;
152 smps7-in-supply = <&vmain>;
153 smps8-in-supply = <&vmain>;
154 smps9-in-supply = <&vmain>;
155 ldo1-in-supply = <&vmain>;
156 ldo2-in-supply = <&vmain>;
157 ldo3-in-supply = <&vmain>;
158 ldo4-in-supply = <&vmain>;
159 ldo9-in-supply = <&vmain>;
160 ldoln-in-supply = <&vmain>;
161 ldousb-in-supply = <&vmain>;
162 ldortc-in-supply = <&vmain>;
163
164 regulators {
165 smps12_reg: smps12 {
166 /* VDD_MPU */
167 regulator-name = "smps12";
168 regulator-min-microvolt = <850000>;
169 regulator-max-microvolt = <1250000>;
170 regulator-always-on;
171 regulator-boot-on;
172 };
173
174 smps3_reg: smps3 {
175 /* VDD_DDR EMIF1 EMIF2 */
176 regulator-name = "smps3";
177 regulator-min-microvolt = <1350000>;
178 regulator-max-microvolt = <1350000>;
179 regulator-always-on;
180 regulator-boot-on;
181 };
182
183 smps45_reg: smps45 {
184 /* VDD_DSPEVE on AM572 */
185 /* VDD_IVA + VDD_DSP on AM571 */
186 regulator-name = "smps45";
187 regulator-min-microvolt = <850000>;
188 regulator-max-microvolt = <1250000>;
189 regulator-always-on;
190 regulator-boot-on;
191 };
192
193 smps6_reg: smps6 {
194 /* VDD_GPU */
195 regulator-name = "smps6";
196 regulator-min-microvolt = <850000>;
197 regulator-max-microvolt = <1250000>;
198 regulator-always-on;
199 regulator-boot-on;
200 };
201
202 smps7_reg: smps7 {
203 /* VDD_CORE */
204 regulator-name = "smps7";
205 regulator-min-microvolt = <850000>;
206 regulator-max-microvolt = <1150000>;
207 regulator-always-on;
208 regulator-boot-on;
209 };
210
211 smps8_reg: smps8 {
212 /* 5728 - VDD_IVAHD */
213 /* 5718 - N.C. test point */
214 regulator-name = "smps8";
215 };
216
217 smps9_reg: smps9 {
218 /* VDD_3_3D */
219 regulator-name = "smps9";
220 regulator-min-microvolt = <3300000>;
221 regulator-max-microvolt = <3300000>;
222 regulator-always-on;
223 regulator-boot-on;
224 };
225
226 ldo1_reg: ldo1 {
227 /* VDDSHV8 - VSDMMC */
228 /* NOTE: on rev 1.3a, data supply */
229 regulator-name = "ldo1";
230 regulator-min-microvolt = <1800000>;
231 regulator-max-microvolt = <3300000>;
232 regulator-boot-on;
233 regulator-always-on;
234 };
235
236 ldo2_reg: ldo2 {
237 /* VDDSH18V */
238 regulator-name = "ldo2";
239 regulator-min-microvolt = <1800000>;
240 regulator-max-microvolt = <1800000>;
241 regulator-always-on;
242 regulator-boot-on;
243 };
244
245 ldo3_reg: ldo3 {
246 /* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
247 regulator-name = "ldo3";
248 regulator-min-microvolt = <1800000>;
249 regulator-max-microvolt = <1800000>;
250 regulator-always-on;
251 regulator-boot-on;
252 };
253
254 ldo4_reg: ldo4 {
255 /* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
256 regulator-name = "ldo4";
257 regulator-min-microvolt = <1800000>;
258 regulator-max-microvolt = <1800000>;
259 regulator-always-on;
260 regulator-boot-on;
261 };
262
263 /* LDO5-8 unused */
264
265 ldo9_reg: ldo9 {
266 /* VDD_RTC */
267 regulator-name = "ldo9";
268 regulator-min-microvolt = <840000>;
269 regulator-max-microvolt = <1160000>;
270 regulator-always-on;
271 regulator-boot-on;
272 };
273
274 ldoln_reg: ldoln {
275 /* VDDA_1V8_PLL */
276 regulator-name = "ldoln";
277 regulator-min-microvolt = <1800000>;
278 regulator-max-microvolt = <1800000>;
279 regulator-always-on;
280 regulator-boot-on;
281 };
282
283 ldousb_reg: ldousb {
284 /* VDDA_3V_USB: VDDA_USBHS33 */
285 regulator-name = "ldousb";
286 regulator-min-microvolt = <3300000>;
287 regulator-max-microvolt = <3300000>;
288 regulator-always-on;
289 regulator-boot-on;
290 };
291
292 ldortc_reg: ldortc {
293 /* VDDA_RTC */
294 regulator-name = "ldortc";
295 regulator-min-microvolt = <1800000>;
296 regulator-max-microvolt = <1800000>;
297 regulator-always-on;
298 regulator-boot-on;
299 };
300
301 regen1: regen1 {
302 /* VDD_3V3_ON */
303 regulator-name = "regen1";
304 regulator-boot-on;
305 regulator-always-on;
306 };
307
308 regen2: regen2 {
309 /* Needed for PMIC internal resource */
310 regulator-name = "regen2";
311 regulator-boot-on;
312 regulator-always-on;
313 };
314 };
315 };
316
317 tps659038_rtc: tps659038_rtc {
318 compatible = "ti,palmas-rtc";
319 interrupt-parent = <&tps659038>;
320 interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
321 wakeup-source;
322 };
323
324 tps659038_pwr_button: tps659038_pwr_button {
325 compatible = "ti,palmas-pwrbutton";
326 interrupt-parent = <&tps659038>;
327 interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
328 wakeup-source;
329 ti,palmas-long-press-seconds = <12>;
330 };
331
332 tps659038_gpio: tps659038_gpio {
333 compatible = "ti,palmas-gpio";
334 gpio-controller;
335 #gpio-cells = <2>;
336 };
337
338 extcon_usb2: tps659038_usb {
339 compatible = "ti,palmas-usb-vid";
340 ti,enable-vbus-detection;
341 ti,enable-id-detection;
342 /* ID & VBUS GPIOs provided in board dts */
343 };
344 };
345
346 tpic2810: tpic2810@60 {
347 compatible = "ti,tpic2810";
348 reg = <0x60>;
349 gpio-controller;
350 #gpio-cells = <2>;
351 };
352};
353
354&mcspi3 {
355 status = "okay";
356 ti,pindir-d0-out-d1-in;
357
358 sn65hvs882: sn65hvs882@0 {
359 compatible = "pisosr-gpio";
360 gpio-controller;
361 #gpio-cells = <2>;
362
363 reg = <0>;
364 spi-max-frequency = <1000000>;
365 spi-cpol;
366 };
367};
368
369&uart3 {
370 status = "okay";
371 interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
372 &dra7_pmx_core 0x248>;
373};
374
375&rtc {
376 status = "okay";
377 ext-clk-src;
378};
379
380&mac {
381 status = "okay";
382 dual_emac;
383};
384
385&cpsw_emac0 {
386 phy_id = <&davinci_mdio>, <0>;
387 phy-mode = "rgmii";
388 dual_emac_res_vlan = <1>;
389};
390
391&cpsw_emac1 {
392 phy_id = <&davinci_mdio>, <1>;
393 phy-mode = "rgmii";
394 dual_emac_res_vlan = <2>;
395};
396
397&usb2_phy1 {
398 phy-supply = <&ldousb_reg>;
399};
400
401&usb2_phy2 {
402 phy-supply = <&ldousb_reg>;
403};
404
405&usb1 {
406 dr_mode = "host";
407};
408
409&usb2 {
410 dr_mode = "peripheral";
411};
412
413&mmc1 {
414 status = "okay";
415 vmmc-supply = <&v3_3d>;
416 vqmmc-supply = <&ldo1_reg>;
417 bus-width = <4>;
418 cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
419};
420
421&mmc2 {
422 status = "okay";
423 vmmc-supply = <&v3_3d>;
424 vqmmc-supply = <&v3_3d>;
425 bus-width = <8>;
426 ti,non-removable;
427 max-frequency = <96000000>;
428};
429
430&dcan1 {
431 status = "okay";
432 pinctrl-names = "default", "sleep", "active";
433 pinctrl-0 = <&dcan1_pins_sleep>;
434 pinctrl-1 = <&dcan1_pins_sleep>;
435 pinctrl-2 = <&dcan1_pins_default>;
436};
437
438&qspi {
439 status = "okay";
440
441 spi-max-frequency = <76800000>;
442 m25p80@0 {
443 compatible = "s25fl256s1", "jedec,spi-nor";
444 spi-max-frequency = <76800000>;
445 reg = <0>;
446 spi-tx-bus-width = <1>;
447 spi-rx-bus-width = <4>;
448 #address-cells = <1>;
449 #size-cells = <1>;
450
451 /* MTD partition table.
452 * The ROM checks the first four physical blocks
453 * for a valid file to boot and the flash here is
454 * 64KiB block size.
455 */
456 partition@0 {
457 label = "QSPI.SPL";
458 reg = <0x00000000 0x000040000>;
459 };
460 partition@1 {
461 label = "QSPI.u-boot";
462 reg = <0x00040000 0x00100000>;
463 };
464 partition@2 {
465 label = "QSPI.u-boot-spl-os";
466 reg = <0x00140000 0x00080000>;
467 };
468 partition@3 {
469 label = "QSPI.u-boot-env";
470 reg = <0x001c0000 0x00010000>;
471 };
472 partition@4 {
473 label = "QSPI.u-boot-env.backup1";
474 reg = <0x001d0000 0x0010000>;
475 };
476 partition@5 {
477 label = "QSPI.kernel";
478 reg = <0x001e0000 0x0800000>;
479 };
480 partition@6 {
481 label = "QSPI.file-system";
482 reg = <0x009e0000 0x01620000>;
483 };
484 };
485};