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1/*
2 * Marvell Berlin PWM driver
3 *
4 * Copyright (C) 2015 Marvell Technology Group Ltd.
5 *
6 * Author: Antoine Tenart <antoine.tenart@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/clk.h>
14#include <linux/io.h>
15#include <linux/kernel.h>
16#include <linux/mod_devicetable.h>
17#include <linux/module.h>
18#include <linux/platform_device.h>
19#include <linux/pwm.h>
20#include <linux/slab.h>
21
22#define BERLIN_PWM_EN 0x0
23#define BERLIN_PWM_ENABLE BIT(0)
24#define BERLIN_PWM_CONTROL 0x4
25/*
26 * The prescaler claims to support 8 different moduli, configured using the
27 * low three bits of PWM_CONTROL. (Sequentially, they are 1, 4, 8, 16, 64,
28 * 256, 1024, and 4096.) However, the moduli from 4 to 1024 appear to be
29 * implemented by internally shifting TCNT left without adding additional
30 * bits. So, the max TCNT that actually works for a modulus of 4 is 0x3fff;
31 * for 8, 0x1fff; and so on. This means that those moduli are entirely
32 * useless, as we could just do the shift ourselves. The 4096 modulus is
33 * implemented with a real prescaler, so we do use that, but we treat it
34 * as a flag instead of pretending the modulus is actually configurable.
35 */
36#define BERLIN_PWM_PRESCALE_4096 0x7
37#define BERLIN_PWM_INVERT_POLARITY BIT(3)
38#define BERLIN_PWM_DUTY 0x8
39#define BERLIN_PWM_TCNT 0xc
40#define BERLIN_PWM_MAX_TCNT 65535
41
42#define BERLIN_PWM_NUMPWMS 4
43
44struct berlin_pwm_channel {
45 u32 enable;
46 u32 ctrl;
47 u32 duty;
48 u32 tcnt;
49};
50
51struct berlin_pwm_chip {
52 struct clk *clk;
53 void __iomem *base;
54 struct berlin_pwm_channel channel[BERLIN_PWM_NUMPWMS];
55};
56
57static inline struct berlin_pwm_chip *to_berlin_pwm_chip(struct pwm_chip *chip)
58{
59 return pwmchip_get_drvdata(chip);
60}
61
62static inline u32 berlin_pwm_readl(struct berlin_pwm_chip *bpc,
63 unsigned int channel, unsigned long offset)
64{
65 return readl_relaxed(bpc->base + channel * 0x10 + offset);
66}
67
68static inline void berlin_pwm_writel(struct berlin_pwm_chip *bpc,
69 unsigned int channel, u32 value,
70 unsigned long offset)
71{
72 writel_relaxed(value, bpc->base + channel * 0x10 + offset);
73}
74
75static int berlin_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
76 u64 duty_ns, u64 period_ns)
77{
78 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
79 bool prescale_4096 = false;
80 u32 value, duty, period;
81 u64 cycles;
82
83 cycles = clk_get_rate(bpc->clk);
84 cycles *= period_ns;
85 do_div(cycles, NSEC_PER_SEC);
86
87 if (cycles > BERLIN_PWM_MAX_TCNT) {
88 prescale_4096 = true;
89 cycles >>= 12; // Prescaled by 4096
90
91 if (cycles > BERLIN_PWM_MAX_TCNT)
92 return -ERANGE;
93 }
94
95 period = cycles;
96 cycles *= duty_ns;
97 do_div(cycles, period_ns);
98 duty = cycles;
99
100 value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_CONTROL);
101 if (prescale_4096)
102 value |= BERLIN_PWM_PRESCALE_4096;
103 else
104 value &= ~BERLIN_PWM_PRESCALE_4096;
105 berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_CONTROL);
106
107 berlin_pwm_writel(bpc, pwm->hwpwm, duty, BERLIN_PWM_DUTY);
108 berlin_pwm_writel(bpc, pwm->hwpwm, period, BERLIN_PWM_TCNT);
109
110 return 0;
111}
112
113static int berlin_pwm_set_polarity(struct pwm_chip *chip,
114 struct pwm_device *pwm,
115 enum pwm_polarity polarity)
116{
117 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
118 u32 value;
119
120 value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_CONTROL);
121
122 if (polarity == PWM_POLARITY_NORMAL)
123 value &= ~BERLIN_PWM_INVERT_POLARITY;
124 else
125 value |= BERLIN_PWM_INVERT_POLARITY;
126
127 berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_CONTROL);
128
129 return 0;
130}
131
132static int berlin_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
133{
134 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
135 u32 value;
136
137 value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_EN);
138 value |= BERLIN_PWM_ENABLE;
139 berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_EN);
140
141 return 0;
142}
143
144static void berlin_pwm_disable(struct pwm_chip *chip,
145 struct pwm_device *pwm)
146{
147 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
148 u32 value;
149
150 value = berlin_pwm_readl(bpc, pwm->hwpwm, BERLIN_PWM_EN);
151 value &= ~BERLIN_PWM_ENABLE;
152 berlin_pwm_writel(bpc, pwm->hwpwm, value, BERLIN_PWM_EN);
153}
154
155static int berlin_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
156 const struct pwm_state *state)
157{
158 int err;
159 bool enabled = pwm->state.enabled;
160
161 if (state->polarity != pwm->state.polarity) {
162 if (enabled) {
163 berlin_pwm_disable(chip, pwm);
164 enabled = false;
165 }
166
167 err = berlin_pwm_set_polarity(chip, pwm, state->polarity);
168 if (err)
169 return err;
170 }
171
172 if (!state->enabled) {
173 if (enabled)
174 berlin_pwm_disable(chip, pwm);
175 return 0;
176 }
177
178 err = berlin_pwm_config(chip, pwm, state->duty_cycle, state->period);
179 if (err)
180 return err;
181
182 if (!enabled)
183 return berlin_pwm_enable(chip, pwm);
184
185 return 0;
186}
187
188static const struct pwm_ops berlin_pwm_ops = {
189 .apply = berlin_pwm_apply,
190};
191
192static const struct of_device_id berlin_pwm_match[] = {
193 { .compatible = "marvell,berlin-pwm" },
194 { },
195};
196MODULE_DEVICE_TABLE(of, berlin_pwm_match);
197
198static int berlin_pwm_probe(struct platform_device *pdev)
199{
200 struct pwm_chip *chip;
201 struct berlin_pwm_chip *bpc;
202 int ret;
203
204 chip = devm_pwmchip_alloc(&pdev->dev, BERLIN_PWM_NUMPWMS, sizeof(*bpc));
205 if (IS_ERR(chip))
206 return PTR_ERR(chip);
207 bpc = to_berlin_pwm_chip(chip);
208
209 bpc->base = devm_platform_ioremap_resource(pdev, 0);
210 if (IS_ERR(bpc->base))
211 return PTR_ERR(bpc->base);
212
213 bpc->clk = devm_clk_get_enabled(&pdev->dev, NULL);
214 if (IS_ERR(bpc->clk))
215 return PTR_ERR(bpc->clk);
216
217 chip->ops = &berlin_pwm_ops;
218
219 ret = devm_pwmchip_add(&pdev->dev, chip);
220 if (ret < 0)
221 return dev_err_probe(&pdev->dev, ret, "failed to add PWM chip\n");
222
223 platform_set_drvdata(pdev, chip);
224
225 return 0;
226}
227
228static int berlin_pwm_suspend(struct device *dev)
229{
230 struct pwm_chip *chip = dev_get_drvdata(dev);
231 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
232 unsigned int i;
233
234 for (i = 0; i < chip->npwm; i++) {
235 struct berlin_pwm_channel *channel = &bpc->channel[i];
236
237 channel->enable = berlin_pwm_readl(bpc, i, BERLIN_PWM_ENABLE);
238 channel->ctrl = berlin_pwm_readl(bpc, i, BERLIN_PWM_CONTROL);
239 channel->duty = berlin_pwm_readl(bpc, i, BERLIN_PWM_DUTY);
240 channel->tcnt = berlin_pwm_readl(bpc, i, BERLIN_PWM_TCNT);
241 }
242
243 clk_disable_unprepare(bpc->clk);
244
245 return 0;
246}
247
248static int berlin_pwm_resume(struct device *dev)
249{
250 struct pwm_chip *chip = dev_get_drvdata(dev);
251 struct berlin_pwm_chip *bpc = to_berlin_pwm_chip(chip);
252 unsigned int i;
253 int ret;
254
255 ret = clk_prepare_enable(bpc->clk);
256 if (ret)
257 return ret;
258
259 for (i = 0; i < chip->npwm; i++) {
260 struct berlin_pwm_channel *channel = &bpc->channel[i];
261
262 berlin_pwm_writel(bpc, i, channel->ctrl, BERLIN_PWM_CONTROL);
263 berlin_pwm_writel(bpc, i, channel->duty, BERLIN_PWM_DUTY);
264 berlin_pwm_writel(bpc, i, channel->tcnt, BERLIN_PWM_TCNT);
265 berlin_pwm_writel(bpc, i, channel->enable, BERLIN_PWM_ENABLE);
266 }
267
268 return 0;
269}
270
271static DEFINE_SIMPLE_DEV_PM_OPS(berlin_pwm_pm_ops, berlin_pwm_suspend,
272 berlin_pwm_resume);
273
274static struct platform_driver berlin_pwm_driver = {
275 .probe = berlin_pwm_probe,
276 .driver = {
277 .name = "berlin-pwm",
278 .of_match_table = berlin_pwm_match,
279 .pm = pm_ptr(&berlin_pwm_pm_ops),
280 },
281};
282module_platform_driver(berlin_pwm_driver);
283
284MODULE_AUTHOR("Antoine Tenart <antoine.tenart@free-electrons.com>");
285MODULE_DESCRIPTION("Marvell Berlin PWM driver");
286MODULE_LICENSE("GPL v2");
1/*
2 * Marvell Berlin PWM driver
3 *
4 * Copyright (C) 2015 Marvell Technology Group Ltd.
5 *
6 * Author: Antoine Tenart <antoine.tenart@free-electrons.com>
7 *
8 * This file is licensed under the terms of the GNU General Public
9 * License version 2. This program is licensed "as is" without any
10 * warranty of any kind, whether express or implied.
11 */
12
13#include <linux/clk.h>
14#include <linux/io.h>
15#include <linux/kernel.h>
16#include <linux/module.h>
17#include <linux/platform_device.h>
18#include <linux/pwm.h>
19#include <linux/slab.h>
20
21#define BERLIN_PWM_EN 0x0
22#define BERLIN_PWM_ENABLE BIT(0)
23#define BERLIN_PWM_CONTROL 0x4
24#define BERLIN_PWM_PRESCALE_MASK 0x7
25#define BERLIN_PWM_PRESCALE_MAX 4096
26#define BERLIN_PWM_INVERT_POLARITY BIT(3)
27#define BERLIN_PWM_DUTY 0x8
28#define BERLIN_PWM_TCNT 0xc
29#define BERLIN_PWM_MAX_TCNT 65535
30
31struct berlin_pwm_channel {
32 u32 enable;
33 u32 ctrl;
34 u32 duty;
35 u32 tcnt;
36};
37
38struct berlin_pwm_chip {
39 struct pwm_chip chip;
40 struct clk *clk;
41 void __iomem *base;
42};
43
44static inline struct berlin_pwm_chip *to_berlin_pwm_chip(struct pwm_chip *chip)
45{
46 return container_of(chip, struct berlin_pwm_chip, chip);
47}
48
49static const u32 prescaler_table[] = {
50 1, 4, 8, 16, 64, 256, 1024, 4096
51};
52
53static inline u32 berlin_pwm_readl(struct berlin_pwm_chip *chip,
54 unsigned int channel, unsigned long offset)
55{
56 return readl_relaxed(chip->base + channel * 0x10 + offset);
57}
58
59static inline void berlin_pwm_writel(struct berlin_pwm_chip *chip,
60 unsigned int channel, u32 value,
61 unsigned long offset)
62{
63 writel_relaxed(value, chip->base + channel * 0x10 + offset);
64}
65
66static int berlin_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm)
67{
68 struct berlin_pwm_channel *channel;
69
70 channel = kzalloc(sizeof(*channel), GFP_KERNEL);
71 if (!channel)
72 return -ENOMEM;
73
74 return pwm_set_chip_data(pwm, channel);
75}
76
77static void berlin_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
78{
79 struct berlin_pwm_channel *channel = pwm_get_chip_data(pwm);
80
81 pwm_set_chip_data(pwm, NULL);
82 kfree(channel);
83}
84
85static int berlin_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm_dev,
86 int duty_ns, int period_ns)
87{
88 struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip);
89 unsigned int prescale;
90 u32 value, duty, period;
91 u64 cycles, tmp;
92
93 cycles = clk_get_rate(pwm->clk);
94 cycles *= period_ns;
95 do_div(cycles, NSEC_PER_SEC);
96
97 for (prescale = 0; prescale < ARRAY_SIZE(prescaler_table); prescale++) {
98 tmp = cycles;
99 do_div(tmp, prescaler_table[prescale]);
100
101 if (tmp <= BERLIN_PWM_MAX_TCNT)
102 break;
103 }
104
105 if (tmp > BERLIN_PWM_MAX_TCNT)
106 return -ERANGE;
107
108 period = tmp;
109 cycles = tmp * duty_ns;
110 do_div(cycles, period_ns);
111 duty = cycles;
112
113 value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_CONTROL);
114 value &= ~BERLIN_PWM_PRESCALE_MASK;
115 value |= prescale;
116 berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_CONTROL);
117
118 berlin_pwm_writel(pwm, pwm_dev->hwpwm, duty, BERLIN_PWM_DUTY);
119 berlin_pwm_writel(pwm, pwm_dev->hwpwm, period, BERLIN_PWM_TCNT);
120
121 return 0;
122}
123
124static int berlin_pwm_set_polarity(struct pwm_chip *chip,
125 struct pwm_device *pwm_dev,
126 enum pwm_polarity polarity)
127{
128 struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip);
129 u32 value;
130
131 value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_CONTROL);
132
133 if (polarity == PWM_POLARITY_NORMAL)
134 value &= ~BERLIN_PWM_INVERT_POLARITY;
135 else
136 value |= BERLIN_PWM_INVERT_POLARITY;
137
138 berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_CONTROL);
139
140 return 0;
141}
142
143static int berlin_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm_dev)
144{
145 struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip);
146 u32 value;
147
148 value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_EN);
149 value |= BERLIN_PWM_ENABLE;
150 berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_EN);
151
152 return 0;
153}
154
155static void berlin_pwm_disable(struct pwm_chip *chip,
156 struct pwm_device *pwm_dev)
157{
158 struct berlin_pwm_chip *pwm = to_berlin_pwm_chip(chip);
159 u32 value;
160
161 value = berlin_pwm_readl(pwm, pwm_dev->hwpwm, BERLIN_PWM_EN);
162 value &= ~BERLIN_PWM_ENABLE;
163 berlin_pwm_writel(pwm, pwm_dev->hwpwm, value, BERLIN_PWM_EN);
164}
165
166static const struct pwm_ops berlin_pwm_ops = {
167 .request = berlin_pwm_request,
168 .free = berlin_pwm_free,
169 .config = berlin_pwm_config,
170 .set_polarity = berlin_pwm_set_polarity,
171 .enable = berlin_pwm_enable,
172 .disable = berlin_pwm_disable,
173 .owner = THIS_MODULE,
174};
175
176static const struct of_device_id berlin_pwm_match[] = {
177 { .compatible = "marvell,berlin-pwm" },
178 { },
179};
180MODULE_DEVICE_TABLE(of, berlin_pwm_match);
181
182static int berlin_pwm_probe(struct platform_device *pdev)
183{
184 struct berlin_pwm_chip *pwm;
185 struct resource *res;
186 int ret;
187
188 pwm = devm_kzalloc(&pdev->dev, sizeof(*pwm), GFP_KERNEL);
189 if (!pwm)
190 return -ENOMEM;
191
192 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
193 pwm->base = devm_ioremap_resource(&pdev->dev, res);
194 if (IS_ERR(pwm->base))
195 return PTR_ERR(pwm->base);
196
197 pwm->clk = devm_clk_get(&pdev->dev, NULL);
198 if (IS_ERR(pwm->clk))
199 return PTR_ERR(pwm->clk);
200
201 ret = clk_prepare_enable(pwm->clk);
202 if (ret)
203 return ret;
204
205 pwm->chip.dev = &pdev->dev;
206 pwm->chip.ops = &berlin_pwm_ops;
207 pwm->chip.base = -1;
208 pwm->chip.npwm = 4;
209 pwm->chip.of_xlate = of_pwm_xlate_with_flags;
210 pwm->chip.of_pwm_n_cells = 3;
211
212 ret = pwmchip_add(&pwm->chip);
213 if (ret < 0) {
214 dev_err(&pdev->dev, "failed to add PWM chip: %d\n", ret);
215 clk_disable_unprepare(pwm->clk);
216 return ret;
217 }
218
219 platform_set_drvdata(pdev, pwm);
220
221 return 0;
222}
223
224static int berlin_pwm_remove(struct platform_device *pdev)
225{
226 struct berlin_pwm_chip *pwm = platform_get_drvdata(pdev);
227 int ret;
228
229 ret = pwmchip_remove(&pwm->chip);
230 clk_disable_unprepare(pwm->clk);
231
232 return ret;
233}
234
235#ifdef CONFIG_PM_SLEEP
236static int berlin_pwm_suspend(struct device *dev)
237{
238 struct berlin_pwm_chip *pwm = dev_get_drvdata(dev);
239 unsigned int i;
240
241 for (i = 0; i < pwm->chip.npwm; i++) {
242 struct berlin_pwm_channel *channel;
243
244 channel = pwm_get_chip_data(&pwm->chip.pwms[i]);
245 if (!channel)
246 continue;
247
248 channel->enable = berlin_pwm_readl(pwm, i, BERLIN_PWM_ENABLE);
249 channel->ctrl = berlin_pwm_readl(pwm, i, BERLIN_PWM_CONTROL);
250 channel->duty = berlin_pwm_readl(pwm, i, BERLIN_PWM_DUTY);
251 channel->tcnt = berlin_pwm_readl(pwm, i, BERLIN_PWM_TCNT);
252 }
253
254 clk_disable_unprepare(pwm->clk);
255
256 return 0;
257}
258
259static int berlin_pwm_resume(struct device *dev)
260{
261 struct berlin_pwm_chip *pwm = dev_get_drvdata(dev);
262 unsigned int i;
263 int ret;
264
265 ret = clk_prepare_enable(pwm->clk);
266 if (ret)
267 return ret;
268
269 for (i = 0; i < pwm->chip.npwm; i++) {
270 struct berlin_pwm_channel *channel;
271
272 channel = pwm_get_chip_data(&pwm->chip.pwms[i]);
273 if (!channel)
274 continue;
275
276 berlin_pwm_writel(pwm, i, channel->ctrl, BERLIN_PWM_CONTROL);
277 berlin_pwm_writel(pwm, i, channel->duty, BERLIN_PWM_DUTY);
278 berlin_pwm_writel(pwm, i, channel->tcnt, BERLIN_PWM_TCNT);
279 berlin_pwm_writel(pwm, i, channel->enable, BERLIN_PWM_ENABLE);
280 }
281
282 return 0;
283}
284#endif
285
286static SIMPLE_DEV_PM_OPS(berlin_pwm_pm_ops, berlin_pwm_suspend,
287 berlin_pwm_resume);
288
289static struct platform_driver berlin_pwm_driver = {
290 .probe = berlin_pwm_probe,
291 .remove = berlin_pwm_remove,
292 .driver = {
293 .name = "berlin-pwm",
294 .of_match_table = berlin_pwm_match,
295 .pm = &berlin_pwm_pm_ops,
296 },
297};
298module_platform_driver(berlin_pwm_driver);
299
300MODULE_AUTHOR("Antoine Tenart <antoine.tenart@free-electrons.com>");
301MODULE_DESCRIPTION("Marvell Berlin PWM driver");
302MODULE_LICENSE("GPL v2");