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v6.13.7
  1// SPDX-License-Identifier: GPL-2.0-only
  2/*
  3 * Copyright (C) 2016 Broadcom Limited
 
 
 
 
 
 
 
 
 
 
 
 
  4 */
  5
  6/**
  7 * DOC: VC4 DPI module
  8 *
  9 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
 10 * signals.  On BCM2835, these can be routed out to GPIO0-27 with the
 11 * ALT2 function.
 12 */
 13
 14#include <drm/drm_atomic_helper.h>
 15#include <drm/drm_bridge.h>
 16#include <drm/drm_drv.h>
 17#include <drm/drm_edid.h>
 18#include <drm/drm_of.h>
 19#include <drm/drm_panel.h>
 20#include <drm/drm_probe_helper.h>
 21#include <drm/drm_simple_kms_helper.h>
 22#include <linux/clk.h>
 23#include <linux/component.h>
 24#include <linux/media-bus-format.h>
 25#include <linux/mod_devicetable.h>
 26#include <linux/platform_device.h>
 27#include "vc4_drv.h"
 28#include "vc4_regs.h"
 29
 30#define DPI_C			0x00
 31# define DPI_OUTPUT_ENABLE_MODE		BIT(16)
 32
 33/* The order field takes the incoming 24 bit RGB from the pixel valve
 34 * and shuffles the 3 channels.
 35 */
 36# define DPI_ORDER_MASK			VC4_MASK(15, 14)
 37# define DPI_ORDER_SHIFT		14
 38# define DPI_ORDER_RGB			0
 39# define DPI_ORDER_BGR			1
 40# define DPI_ORDER_GRB			2
 41# define DPI_ORDER_BRG			3
 42
 43/* The format field takes the ORDER-shuffled pixel valve data and
 44 * formats it onto the output lines.
 45 */
 46# define DPI_FORMAT_MASK		VC4_MASK(13, 11)
 47# define DPI_FORMAT_SHIFT		11
 48/* This define is named in the hardware, but actually just outputs 0. */
 49# define DPI_FORMAT_9BIT_666_RGB	0
 50/* Outputs 00000000rrrrrggggggbbbbb */
 51# define DPI_FORMAT_16BIT_565_RGB_1	1
 52/* Outputs 000rrrrr00gggggg000bbbbb */
 53# define DPI_FORMAT_16BIT_565_RGB_2	2
 54/* Outputs 00rrrrr000gggggg00bbbbb0 */
 55# define DPI_FORMAT_16BIT_565_RGB_3	3
 56/* Outputs 000000rrrrrrggggggbbbbbb */
 57# define DPI_FORMAT_18BIT_666_RGB_1	4
 58/* Outputs 00rrrrrr00gggggg00bbbbbb */
 59# define DPI_FORMAT_18BIT_666_RGB_2	5
 60/* Outputs rrrrrrrrggggggggbbbbbbbb */
 61# define DPI_FORMAT_24BIT_888_RGB	6
 62
 63/* Reverses the polarity of the corresponding signal */
 64# define DPI_PIXEL_CLK_INVERT		BIT(10)
 65# define DPI_HSYNC_INVERT		BIT(9)
 66# define DPI_VSYNC_INVERT		BIT(8)
 67# define DPI_OUTPUT_ENABLE_INVERT	BIT(7)
 68
 69/* Outputs the signal the falling clock edge instead of rising. */
 70# define DPI_HSYNC_NEGATE		BIT(6)
 71# define DPI_VSYNC_NEGATE		BIT(5)
 72# define DPI_OUTPUT_ENABLE_NEGATE	BIT(4)
 73
 74/* Disables the signal */
 75# define DPI_HSYNC_DISABLE		BIT(3)
 76# define DPI_VSYNC_DISABLE		BIT(2)
 77# define DPI_OUTPUT_ENABLE_DISABLE	BIT(1)
 78
 79/* Power gate to the device, full reset at 0 -> 1 transition */
 80# define DPI_ENABLE			BIT(0)
 81
 82/* All other registers besides DPI_C return the ID */
 83#define DPI_ID			0x04
 84# define DPI_ID_VALUE		0x00647069
 85
 86/* General DPI hardware state. */
 87struct vc4_dpi {
 88	struct vc4_encoder encoder;
 89
 90	struct platform_device *pdev;
 91
 
 
 92	void __iomem *regs;
 93
 94	struct clk *pixel_clock;
 95	struct clk *core_clock;
 
 
 
 
 96
 97	struct debugfs_regset32 regset;
 
 
 
 98};
 99
100#define to_vc4_dpi(_encoder)						\
101	container_of_const(_encoder, struct vc4_dpi, encoder.base)
 
 
 
102
103#define DPI_READ(offset)								\
104	({										\
105		kunit_fail_current_test("Accessing a register in a unit test!\n");	\
106		readl(dpi->regs + (offset));						\
107	})
108
109#define DPI_WRITE(offset, val)								\
110	do {										\
111		kunit_fail_current_test("Accessing a register in a unit test!\n");	\
112		writel(val, dpi->regs + (offset));					\
113	} while (0)
114
115static const struct debugfs_reg32 dpi_regs[] = {
116	VC4_REG32(DPI_C),
117	VC4_REG32(DPI_ID),
118};
119
120static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
 
121{
122	struct drm_device *dev = encoder->dev;
123	struct vc4_dpi *dpi = to_vc4_dpi(encoder);
124	int idx;
 
 
125
126	if (!drm_dev_enter(dev, &idx))
127		return;
128
129	clk_disable_unprepare(dpi->pixel_clock);
 
 
 
 
130
131	drm_dev_exit(idx);
 
 
 
 
 
 
 
 
 
 
 
 
 
132}
133
134static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
135{
136	struct drm_device *dev = encoder->dev;
137	struct drm_display_mode *mode = &encoder->crtc->mode;
138	struct vc4_dpi *dpi = to_vc4_dpi(encoder);
 
139	struct drm_connector_list_iter conn_iter;
140	struct drm_connector *connector = NULL, *connector_scan;
141	u32 dpi_c = DPI_ENABLE;
142	int idx;
143	int ret;
144
145	/* Look up the connector attached to DPI so we can get the
146	 * bus_format.  Ideally the bridge would tell us the
147	 * bus_format we want, but it doesn't yet, so assume that it's
148	 * uniform throughout the bridge chain.
149	 */
150	drm_connector_list_iter_begin(dev, &conn_iter);
151	drm_for_each_connector_iter(connector_scan, &conn_iter) {
152		if (connector_scan->encoder == encoder) {
153			connector = connector_scan;
154			break;
155		}
156	}
157	drm_connector_list_iter_end(&conn_iter);
158
159	/* Default to 18bit if no connector or format found. */
160	dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1, DPI_FORMAT);
161
162	if (connector) {
163		if (connector->display_info.num_bus_formats) {
164			u32 bus_format = connector->display_info.bus_formats[0];
165
166			dpi_c &= ~DPI_FORMAT_MASK;
167
168			switch (bus_format) {
169			case MEDIA_BUS_FMT_RGB888_1X24:
170				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
171						       DPI_FORMAT);
172				break;
173			case MEDIA_BUS_FMT_BGR888_1X24:
174				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
175						       DPI_FORMAT);
176				dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR,
177						       DPI_ORDER);
178				break;
179			case MEDIA_BUS_FMT_BGR666_1X24_CPADHI:
180				dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
181				fallthrough;
182			case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
183				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
184						       DPI_FORMAT);
185				break;
186			case MEDIA_BUS_FMT_BGR666_1X18:
187				dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
188				fallthrough;
189			case MEDIA_BUS_FMT_RGB666_1X18:
190				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
191						       DPI_FORMAT);
192				break;
193			case MEDIA_BUS_FMT_RGB565_1X16:
194				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_1,
195						       DPI_FORMAT);
196				break;
197			case MEDIA_BUS_FMT_RGB565_1X24_CPADHI:
198				dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_2,
199						       DPI_FORMAT);
200				break;
201			default:
202				drm_err(dev, "Unknown media bus format %d\n",
203					bus_format);
204				break;
205			}
206		}
207
208		if (connector->display_info.bus_flags & DRM_BUS_FLAG_PIXDATA_DRIVE_NEGEDGE)
209			dpi_c |= DPI_PIXEL_CLK_INVERT;
210
211		if (connector->display_info.bus_flags & DRM_BUS_FLAG_DE_LOW)
212			dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
213	}
214
215	if (mode->flags & DRM_MODE_FLAG_CSYNC) {
216		if (mode->flags & DRM_MODE_FLAG_NCSYNC)
217			dpi_c |= DPI_OUTPUT_ENABLE_INVERT;
218	} else {
219		dpi_c |= DPI_OUTPUT_ENABLE_MODE;
220
221		if (mode->flags & DRM_MODE_FLAG_NHSYNC)
222			dpi_c |= DPI_HSYNC_INVERT;
223		else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
224			dpi_c |= DPI_HSYNC_DISABLE;
225
226		if (mode->flags & DRM_MODE_FLAG_NVSYNC)
227			dpi_c |= DPI_VSYNC_INVERT;
228		else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
229			dpi_c |= DPI_VSYNC_DISABLE;
230	}
231
232	if (!drm_dev_enter(dev, &idx))
233		return;
 
 
 
 
 
 
 
234
235	DPI_WRITE(DPI_C, dpi_c);
236
237	ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
238	if (ret)
239		drm_err(dev, "Failed to set clock rate: %d\n", ret);
240
241	ret = clk_prepare_enable(dpi->pixel_clock);
242	if (ret)
243		drm_err(dev, "Failed to set clock rate: %d\n", ret);
244
245	drm_dev_exit(idx);
246}
247
248static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
249						       const struct drm_display_mode *mode)
250{
251	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
252		return MODE_NO_INTERLACE;
253
254	return MODE_OK;
255}
256
257static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
258	.disable = vc4_dpi_encoder_disable,
259	.enable = vc4_dpi_encoder_enable,
260	.mode_valid = vc4_dpi_encoder_mode_valid,
261};
262
263static int vc4_dpi_late_register(struct drm_encoder *encoder)
264{
265	struct drm_device *drm = encoder->dev;
266	struct vc4_dpi *dpi = to_vc4_dpi(encoder);
267
268	vc4_debugfs_add_regset32(drm, "dpi_regs", &dpi->regset);
269
270	return 0;
271}
272
273static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
274	.late_register = vc4_dpi_late_register,
275};
276
277static const struct of_device_id vc4_dpi_dt_match[] = {
278	{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
279	{}
280};
281
282/* Sets up the next link in the display chain, whether it's a panel or
283 * a bridge.
284 */
285static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
286{
287	struct drm_device *drm = dpi->encoder.base.dev;
288	struct device *dev = &dpi->pdev->dev;
 
289	struct drm_bridge *bridge;
 
290
291	bridge = drmm_of_get_bridge(drm, dev->of_node, 0, 0);
292	if (IS_ERR(bridge)) {
 
293		/* If nothing was connected in the DT, that's not an
294		 * error.
295		 */
296		if (PTR_ERR(bridge) == -ENODEV)
297			return 0;
298		else
299			return PTR_ERR(bridge);
300	}
301
302	return drm_bridge_attach(&dpi->encoder.base, bridge, NULL, 0);
303}
304
305static void vc4_dpi_disable_clock(void *ptr)
306{
307	struct vc4_dpi *dpi = ptr;
308
309	clk_disable_unprepare(dpi->core_clock);
310}
311
312static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
313{
314	struct platform_device *pdev = to_platform_device(dev);
315	struct drm_device *drm = dev_get_drvdata(master);
 
316	struct vc4_dpi *dpi;
 
317	int ret;
318
319	dpi = drmm_kzalloc(drm, sizeof(*dpi), GFP_KERNEL);
320	if (!dpi)
321		return -ENOMEM;
322
323	dpi->encoder.type = VC4_ENCODER_TYPE_DPI;
 
 
 
 
 
 
 
324	dpi->pdev = pdev;
325	dpi->regs = vc4_ioremap_regs(pdev, 0);
326	if (IS_ERR(dpi->regs))
327		return PTR_ERR(dpi->regs);
328	dpi->regset.base = dpi->regs;
329	dpi->regset.regs = dpi_regs;
330	dpi->regset.nregs = ARRAY_SIZE(dpi_regs);
331
332	if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
333		dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
334			DPI_READ(DPI_ID), DPI_ID_VALUE);
335		return -ENODEV;
336	}
337
338	dpi->core_clock = devm_clk_get(dev, "core");
339	if (IS_ERR(dpi->core_clock)) {
340		ret = PTR_ERR(dpi->core_clock);
341		if (ret != -EPROBE_DEFER)
342			drm_err(drm, "Failed to get core clock: %d\n", ret);
343		return ret;
344	}
345
346	dpi->pixel_clock = devm_clk_get(dev, "pixel");
347	if (IS_ERR(dpi->pixel_clock)) {
348		ret = PTR_ERR(dpi->pixel_clock);
349		if (ret != -EPROBE_DEFER)
350			drm_err(drm, "Failed to get pixel clock: %d\n", ret);
351		return ret;
352	}
353
354	ret = clk_prepare_enable(dpi->core_clock);
355	if (ret) {
356		drm_err(drm, "Failed to turn on core clock: %d\n", ret);
357		return ret;
358	}
359
360	ret = devm_add_action_or_reset(dev, vc4_dpi_disable_clock, dpi);
361	if (ret)
362		return ret;
363
364	ret = drmm_encoder_init(drm, &dpi->encoder.base,
365				&vc4_dpi_encoder_funcs,
366				DRM_MODE_ENCODER_DPI,
367				NULL);
368	if (ret)
369		return ret;
370
371	drm_encoder_helper_add(&dpi->encoder.base, &vc4_dpi_encoder_helper_funcs);
 
 
372
373	ret = vc4_dpi_init_bridge(dpi);
374	if (ret)
375		return ret;
376
377	dev_set_drvdata(dev, dpi);
378
 
 
379	return 0;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
380}
381
382static const struct component_ops vc4_dpi_ops = {
383	.bind   = vc4_dpi_bind,
 
384};
385
386static int vc4_dpi_dev_probe(struct platform_device *pdev)
387{
388	return component_add(&pdev->dev, &vc4_dpi_ops);
389}
390
391static void vc4_dpi_dev_remove(struct platform_device *pdev)
392{
393	component_del(&pdev->dev, &vc4_dpi_ops);
 
394}
395
396struct platform_driver vc4_dpi_driver = {
397	.probe = vc4_dpi_dev_probe,
398	.remove = vc4_dpi_dev_remove,
399	.driver = {
400		.name = "vc4_dpi",
401		.of_match_table = vc4_dpi_dt_match,
402	},
403};
v4.17
 
  1/*
  2 * Copyright (C) 2016 Broadcom Limited
  3 *
  4 * This program is free software; you can redistribute it and/or modify it
  5 * under the terms of the GNU General Public License version 2 as published by
  6 * the Free Software Foundation.
  7 *
  8 * This program is distributed in the hope that it will be useful, but WITHOUT
  9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 10 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 11 * more details.
 12 *
 13 * You should have received a copy of the GNU General Public License along with
 14 * this program.  If not, see <http://www.gnu.org/licenses/>.
 15 */
 16
 17/**
 18 * DOC: VC4 DPI module
 19 *
 20 * The VC4 DPI hardware supports MIPI DPI type 4 and Nokia ViSSI
 21 * signals.  On BCM2835, these can be routed out to GPIO0-27 with the
 22 * ALT2 function.
 23 */
 24
 25#include <drm/drm_atomic_helper.h>
 26#include <drm/drm_bridge.h>
 27#include <drm/drm_crtc_helper.h>
 28#include <drm/drm_edid.h>
 29#include <drm/drm_of.h>
 30#include <drm/drm_panel.h>
 
 
 31#include <linux/clk.h>
 32#include <linux/component.h>
 33#include <linux/of_graph.h>
 34#include <linux/of_platform.h>
 
 35#include "vc4_drv.h"
 36#include "vc4_regs.h"
 37
 38#define DPI_C			0x00
 39# define DPI_OUTPUT_ENABLE_MODE		BIT(16)
 40
 41/* The order field takes the incoming 24 bit RGB from the pixel valve
 42 * and shuffles the 3 channels.
 43 */
 44# define DPI_ORDER_MASK			VC4_MASK(15, 14)
 45# define DPI_ORDER_SHIFT		14
 46# define DPI_ORDER_RGB			0
 47# define DPI_ORDER_BGR			1
 48# define DPI_ORDER_GRB			2
 49# define DPI_ORDER_BRG			3
 50
 51/* The format field takes the ORDER-shuffled pixel valve data and
 52 * formats it onto the output lines.
 53 */
 54# define DPI_FORMAT_MASK		VC4_MASK(13, 11)
 55# define DPI_FORMAT_SHIFT		11
 56/* This define is named in the hardware, but actually just outputs 0. */
 57# define DPI_FORMAT_9BIT_666_RGB	0
 58/* Outputs 00000000rrrrrggggggbbbbb */
 59# define DPI_FORMAT_16BIT_565_RGB_1	1
 60/* Outputs 000rrrrr00gggggg000bbbbb */
 61# define DPI_FORMAT_16BIT_565_RGB_2	2
 62/* Outputs 00rrrrr000gggggg00bbbbb0 */
 63# define DPI_FORMAT_16BIT_565_RGB_3	3
 64/* Outputs 000000rrrrrrggggggbbbbbb */
 65# define DPI_FORMAT_18BIT_666_RGB_1	4
 66/* Outputs 00rrrrrr00gggggg00bbbbbb */
 67# define DPI_FORMAT_18BIT_666_RGB_2	5
 68/* Outputs rrrrrrrrggggggggbbbbbbbb */
 69# define DPI_FORMAT_24BIT_888_RGB	6
 70
 71/* Reverses the polarity of the corresponding signal */
 72# define DPI_PIXEL_CLK_INVERT		BIT(10)
 73# define DPI_HSYNC_INVERT		BIT(9)
 74# define DPI_VSYNC_INVERT		BIT(8)
 75# define DPI_OUTPUT_ENABLE_INVERT	BIT(7)
 76
 77/* Outputs the signal the falling clock edge instead of rising. */
 78# define DPI_HSYNC_NEGATE		BIT(6)
 79# define DPI_VSYNC_NEGATE		BIT(5)
 80# define DPI_OUTPUT_ENABLE_NEGATE	BIT(4)
 81
 82/* Disables the signal */
 83# define DPI_HSYNC_DISABLE		BIT(3)
 84# define DPI_VSYNC_DISABLE		BIT(2)
 85# define DPI_OUTPUT_ENABLE_DISABLE	BIT(1)
 86
 87/* Power gate to the device, full reset at 0 -> 1 transition */
 88# define DPI_ENABLE			BIT(0)
 89
 90/* All other registers besides DPI_C return the ID */
 91#define DPI_ID			0x04
 92# define DPI_ID_VALUE		0x00647069
 93
 94/* General DPI hardware state. */
 95struct vc4_dpi {
 
 
 96	struct platform_device *pdev;
 97
 98	struct drm_encoder *encoder;
 99
100	void __iomem *regs;
101
102	struct clk *pixel_clock;
103	struct clk *core_clock;
104};
105
106#define DPI_READ(offset) readl(dpi->regs + (offset))
107#define DPI_WRITE(offset, val) writel(val, dpi->regs + (offset))
108
109/* VC4 DPI encoder KMS struct */
110struct vc4_dpi_encoder {
111	struct vc4_encoder base;
112	struct vc4_dpi *dpi;
113};
114
115static inline struct vc4_dpi_encoder *
116to_vc4_dpi_encoder(struct drm_encoder *encoder)
117{
118	return container_of(encoder, struct vc4_dpi_encoder, base.base);
119}
120
121#define DPI_REG(reg) { reg, #reg }
122static const struct {
123	u32 reg;
124	const char *name;
125} dpi_regs[] = {
126	DPI_REG(DPI_C),
127	DPI_REG(DPI_ID),
 
 
 
 
 
 
 
 
128};
129
130#ifdef CONFIG_DEBUG_FS
131int vc4_dpi_debugfs_regs(struct seq_file *m, void *unused)
132{
133	struct drm_info_node *node = (struct drm_info_node *)m->private;
134	struct drm_device *dev = node->minor->dev;
135	struct vc4_dev *vc4 = to_vc4_dev(dev);
136	struct vc4_dpi *dpi = vc4->dpi;
137	int i;
138
139	if (!dpi)
140		return 0;
141
142	for (i = 0; i < ARRAY_SIZE(dpi_regs); i++) {
143		seq_printf(m, "%s (0x%04x): 0x%08x\n",
144			   dpi_regs[i].name, dpi_regs[i].reg,
145			   DPI_READ(dpi_regs[i].reg));
146	}
147
148	return 0;
149}
150#endif
151
152static const struct drm_encoder_funcs vc4_dpi_encoder_funcs = {
153	.destroy = drm_encoder_cleanup,
154};
155
156static void vc4_dpi_encoder_disable(struct drm_encoder *encoder)
157{
158	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
159	struct vc4_dpi *dpi = vc4_encoder->dpi;
160
161	clk_disable_unprepare(dpi->pixel_clock);
162}
163
164static void vc4_dpi_encoder_enable(struct drm_encoder *encoder)
165{
166	struct drm_device *dev = encoder->dev;
167	struct drm_display_mode *mode = &encoder->crtc->mode;
168	struct vc4_dpi_encoder *vc4_encoder = to_vc4_dpi_encoder(encoder);
169	struct vc4_dpi *dpi = vc4_encoder->dpi;
170	struct drm_connector_list_iter conn_iter;
171	struct drm_connector *connector = NULL, *connector_scan;
172	u32 dpi_c = DPI_ENABLE | DPI_OUTPUT_ENABLE_MODE;
 
173	int ret;
174
175	/* Look up the connector attached to DPI so we can get the
176	 * bus_format.  Ideally the bridge would tell us the
177	 * bus_format we want, but it doesn't yet, so assume that it's
178	 * uniform throughout the bridge chain.
179	 */
180	drm_connector_list_iter_begin(dev, &conn_iter);
181	drm_for_each_connector_iter(connector_scan, &conn_iter) {
182		if (connector_scan->encoder == encoder) {
183			connector = connector_scan;
184			break;
185		}
186	}
187	drm_connector_list_iter_end(&conn_iter);
188
189	if (connector && connector->display_info.num_bus_formats) {
190		u32 bus_format = connector->display_info.bus_formats[0];
191
192		switch (bus_format) {
193		case MEDIA_BUS_FMT_RGB888_1X24:
194			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
195					       DPI_FORMAT);
196			break;
197		case MEDIA_BUS_FMT_BGR888_1X24:
198			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB,
199					       DPI_FORMAT);
200			dpi_c |= VC4_SET_FIELD(DPI_ORDER_BGR, DPI_ORDER);
201			break;
202		case MEDIA_BUS_FMT_RGB666_1X24_CPADHI:
203			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_2,
204					       DPI_FORMAT);
205			break;
206		case MEDIA_BUS_FMT_RGB666_1X18:
207			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_18BIT_666_RGB_1,
208					       DPI_FORMAT);
209			break;
210		case MEDIA_BUS_FMT_RGB565_1X16:
211			dpi_c |= VC4_SET_FIELD(DPI_FORMAT_16BIT_565_RGB_3,
212					       DPI_FORMAT);
213			break;
214		default:
215			DRM_ERROR("Unknown media bus format %d\n", bus_format);
216			break;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
217		}
 
 
 
 
 
 
 
 
 
 
 
218	} else {
219		/* Default to 24bit if no connector found. */
220		dpi_c |= VC4_SET_FIELD(DPI_FORMAT_24BIT_888_RGB, DPI_FORMAT);
 
 
 
 
 
 
 
 
 
221	}
222
223	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
224		dpi_c |= DPI_HSYNC_INVERT;
225	else if (!(mode->flags & DRM_MODE_FLAG_PHSYNC))
226		dpi_c |= DPI_HSYNC_DISABLE;
227
228	if (mode->flags & DRM_MODE_FLAG_NVSYNC)
229		dpi_c |= DPI_VSYNC_INVERT;
230	else if (!(mode->flags & DRM_MODE_FLAG_PVSYNC))
231		dpi_c |= DPI_VSYNC_DISABLE;
232
233	DPI_WRITE(DPI_C, dpi_c);
234
235	ret = clk_set_rate(dpi->pixel_clock, mode->clock * 1000);
236	if (ret)
237		DRM_ERROR("Failed to set clock rate: %d\n", ret);
238
239	ret = clk_prepare_enable(dpi->pixel_clock);
240	if (ret)
241		DRM_ERROR("Failed to set clock rate: %d\n", ret);
 
 
242}
243
244static enum drm_mode_status vc4_dpi_encoder_mode_valid(struct drm_encoder *encoder,
245						       const struct drm_display_mode *mode)
246{
247	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
248		return MODE_NO_INTERLACE;
249
250	return MODE_OK;
251}
252
253static const struct drm_encoder_helper_funcs vc4_dpi_encoder_helper_funcs = {
254	.disable = vc4_dpi_encoder_disable,
255	.enable = vc4_dpi_encoder_enable,
256	.mode_valid = vc4_dpi_encoder_mode_valid,
257};
258
 
 
 
 
 
 
 
 
 
 
 
 
 
 
259static const struct of_device_id vc4_dpi_dt_match[] = {
260	{ .compatible = "brcm,bcm2835-dpi", .data = NULL },
261	{}
262};
263
264/* Sets up the next link in the display chain, whether it's a panel or
265 * a bridge.
266 */
267static int vc4_dpi_init_bridge(struct vc4_dpi *dpi)
268{
 
269	struct device *dev = &dpi->pdev->dev;
270	struct drm_panel *panel;
271	struct drm_bridge *bridge;
272	int ret;
273
274	ret = drm_of_find_panel_or_bridge(dev->of_node, 0, 0,
275					  &panel, &bridge);
276	if (ret) {
277		/* If nothing was connected in the DT, that's not an
278		 * error.
279		 */
280		if (ret == -ENODEV)
281			return 0;
282		else
283			return ret;
284	}
285
286	if (panel)
287		bridge = drm_panel_bridge_add(panel, DRM_MODE_CONNECTOR_DPI);
288
289	return drm_bridge_attach(dpi->encoder, bridge, NULL);
 
 
 
 
290}
291
292static int vc4_dpi_bind(struct device *dev, struct device *master, void *data)
293{
294	struct platform_device *pdev = to_platform_device(dev);
295	struct drm_device *drm = dev_get_drvdata(master);
296	struct vc4_dev *vc4 = to_vc4_dev(drm);
297	struct vc4_dpi *dpi;
298	struct vc4_dpi_encoder *vc4_dpi_encoder;
299	int ret;
300
301	dpi = devm_kzalloc(dev, sizeof(*dpi), GFP_KERNEL);
302	if (!dpi)
303		return -ENOMEM;
304
305	vc4_dpi_encoder = devm_kzalloc(dev, sizeof(*vc4_dpi_encoder),
306				       GFP_KERNEL);
307	if (!vc4_dpi_encoder)
308		return -ENOMEM;
309	vc4_dpi_encoder->base.type = VC4_ENCODER_TYPE_DPI;
310	vc4_dpi_encoder->dpi = dpi;
311	dpi->encoder = &vc4_dpi_encoder->base.base;
312
313	dpi->pdev = pdev;
314	dpi->regs = vc4_ioremap_regs(pdev, 0);
315	if (IS_ERR(dpi->regs))
316		return PTR_ERR(dpi->regs);
 
 
 
317
318	if (DPI_READ(DPI_ID) != DPI_ID_VALUE) {
319		dev_err(dev, "Port returned 0x%08x for ID instead of 0x%08x\n",
320			DPI_READ(DPI_ID), DPI_ID_VALUE);
321		return -ENODEV;
322	}
323
324	dpi->core_clock = devm_clk_get(dev, "core");
325	if (IS_ERR(dpi->core_clock)) {
326		ret = PTR_ERR(dpi->core_clock);
327		if (ret != -EPROBE_DEFER)
328			DRM_ERROR("Failed to get core clock: %d\n", ret);
329		return ret;
330	}
 
331	dpi->pixel_clock = devm_clk_get(dev, "pixel");
332	if (IS_ERR(dpi->pixel_clock)) {
333		ret = PTR_ERR(dpi->pixel_clock);
334		if (ret != -EPROBE_DEFER)
335			DRM_ERROR("Failed to get pixel clock: %d\n", ret);
336		return ret;
337	}
338
339	ret = clk_prepare_enable(dpi->core_clock);
 
 
 
 
 
 
340	if (ret)
341		DRM_ERROR("Failed to turn on core clock: %d\n", ret);
 
 
 
 
 
 
 
342
343	drm_encoder_init(drm, dpi->encoder, &vc4_dpi_encoder_funcs,
344			 DRM_MODE_ENCODER_DPI, NULL);
345	drm_encoder_helper_add(dpi->encoder, &vc4_dpi_encoder_helper_funcs);
346
347	ret = vc4_dpi_init_bridge(dpi);
348	if (ret)
349		goto err_destroy_encoder;
350
351	dev_set_drvdata(dev, dpi);
352
353	vc4->dpi = dpi;
354
355	return 0;
356
357err_destroy_encoder:
358	drm_encoder_cleanup(dpi->encoder);
359	clk_disable_unprepare(dpi->core_clock);
360	return ret;
361}
362
363static void vc4_dpi_unbind(struct device *dev, struct device *master,
364			   void *data)
365{
366	struct drm_device *drm = dev_get_drvdata(master);
367	struct vc4_dev *vc4 = to_vc4_dev(drm);
368	struct vc4_dpi *dpi = dev_get_drvdata(dev);
369
370	drm_of_panel_bridge_remove(dev->of_node, 0, 0);
371
372	drm_encoder_cleanup(dpi->encoder);
373
374	clk_disable_unprepare(dpi->core_clock);
375
376	vc4->dpi = NULL;
377}
378
379static const struct component_ops vc4_dpi_ops = {
380	.bind   = vc4_dpi_bind,
381	.unbind = vc4_dpi_unbind,
382};
383
384static int vc4_dpi_dev_probe(struct platform_device *pdev)
385{
386	return component_add(&pdev->dev, &vc4_dpi_ops);
387}
388
389static int vc4_dpi_dev_remove(struct platform_device *pdev)
390{
391	component_del(&pdev->dev, &vc4_dpi_ops);
392	return 0;
393}
394
395struct platform_driver vc4_dpi_driver = {
396	.probe = vc4_dpi_dev_probe,
397	.remove = vc4_dpi_dev_remove,
398	.driver = {
399		.name = "vc4_dpi",
400		.of_match_table = vc4_dpi_dt_match,
401	},
402};