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1// SPDX-License-Identifier: GPL-2.0-only
2/**************************************************************************
3 * Copyright (c) 2011, Intel Corporation.
4 * All Rights Reserved.
5 *
6 **************************************************************************/
7
8#include "psb_drv.h"
9#include "gma_device.h"
10
11void gma_get_core_freq(struct drm_device *dev)
12{
13 uint32_t clock;
14 struct pci_dev *pdev = to_pci_dev(dev->dev);
15 struct pci_dev *pci_root =
16 pci_get_domain_bus_and_slot(pci_domain_nr(pdev->bus),
17 0, 0);
18 struct drm_psb_private *dev_priv = to_drm_psb_private(dev);
19
20 /*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/
21 /*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/
22
23 pci_write_config_dword(pci_root, 0xD0, 0xD0050300);
24 pci_read_config_dword(pci_root, 0xD4, &clock);
25 pci_dev_put(pci_root);
26
27 switch (clock & 0x07) {
28 case 0:
29 dev_priv->core_freq = 100;
30 break;
31 case 1:
32 dev_priv->core_freq = 133;
33 break;
34 case 2:
35 dev_priv->core_freq = 150;
36 break;
37 case 3:
38 dev_priv->core_freq = 178;
39 break;
40 case 4:
41 dev_priv->core_freq = 200;
42 break;
43 case 5:
44 case 6:
45 case 7:
46 dev_priv->core_freq = 266;
47 break;
48 default:
49 dev_priv->core_freq = 0;
50 }
51}
1/**************************************************************************
2 * Copyright (c) 2011, Intel Corporation.
3 * All Rights Reserved.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 *
14 **************************************************************************/
15
16#include <drm/drmP.h>
17#include "psb_drv.h"
18
19void gma_get_core_freq(struct drm_device *dev)
20{
21 uint32_t clock;
22 struct pci_dev *pci_root =
23 pci_get_domain_bus_and_slot(pci_domain_nr(dev->pdev->bus),
24 0, 0);
25 struct drm_psb_private *dev_priv = dev->dev_private;
26
27 /*pci_write_config_dword(pci_root, 0xD4, 0x00C32004);*/
28 /*pci_write_config_dword(pci_root, 0xD0, 0xE0033000);*/
29
30 pci_write_config_dword(pci_root, 0xD0, 0xD0050300);
31 pci_read_config_dword(pci_root, 0xD4, &clock);
32 pci_dev_put(pci_root);
33
34 switch (clock & 0x07) {
35 case 0:
36 dev_priv->core_freq = 100;
37 break;
38 case 1:
39 dev_priv->core_freq = 133;
40 break;
41 case 2:
42 dev_priv->core_freq = 150;
43 break;
44 case 3:
45 dev_priv->core_freq = 178;
46 break;
47 case 4:
48 dev_priv->core_freq = 200;
49 break;
50 case 5:
51 case 6:
52 case 7:
53 dev_priv->core_freq = 266;
54 break;
55 default:
56 dev_priv->core_freq = 0;
57 }
58}