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1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
4 *
5 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
6 * Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
7 */
8
9#include <linux/bitops.h>
10#include <linux/gpio/consumer.h>
11#include <linux/gpio/driver.h>
12#include <linux/module.h>
13#include <linux/mutex.h>
14#include <linux/property.h>
15#include <linux/slab.h>
16#include <linux/spi/spi.h>
17
18#define GEN_74X164_NUMBER_GPIOS 8
19
20struct gen_74x164_chip {
21 struct gpio_chip gpio_chip;
22 struct mutex lock;
23 struct gpio_desc *gpiod_oe;
24 u32 registers;
25 /*
26 * Since the registers are chained, every byte sent will make
27 * the previous byte shift to the next register in the
28 * chain. Thus, the first byte sent will end up in the last
29 * register at the end of the transfer. So, to have a logical
30 * numbering, store the bytes in reverse order.
31 */
32 u8 buffer[];
33};
34
35static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
36{
37 return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer,
38 chip->registers);
39}
40
41static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
42{
43 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
44 u8 bank = chip->registers - 1 - offset / 8;
45 u8 pin = offset % 8;
46 int ret;
47
48 mutex_lock(&chip->lock);
49 ret = (chip->buffer[bank] >> pin) & 0x1;
50 mutex_unlock(&chip->lock);
51
52 return ret;
53}
54
55static void gen_74x164_set_value(struct gpio_chip *gc,
56 unsigned offset, int val)
57{
58 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
59 u8 bank = chip->registers - 1 - offset / 8;
60 u8 pin = offset % 8;
61
62 mutex_lock(&chip->lock);
63 if (val)
64 chip->buffer[bank] |= (1 << pin);
65 else
66 chip->buffer[bank] &= ~(1 << pin);
67
68 __gen_74x164_write_config(chip);
69 mutex_unlock(&chip->lock);
70}
71
72static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
73 unsigned long *bits)
74{
75 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
76 unsigned long offset;
77 unsigned long bankmask;
78 size_t bank;
79 unsigned long bitmask;
80
81 mutex_lock(&chip->lock);
82 for_each_set_clump8(offset, bankmask, mask, chip->registers * 8) {
83 bank = chip->registers - 1 - offset / 8;
84 bitmask = bitmap_get_value8(bits, offset) & bankmask;
85
86 chip->buffer[bank] &= ~bankmask;
87 chip->buffer[bank] |= bitmask;
88 }
89 __gen_74x164_write_config(chip);
90 mutex_unlock(&chip->lock);
91}
92
93static int gen_74x164_direction_output(struct gpio_chip *gc,
94 unsigned offset, int val)
95{
96 gen_74x164_set_value(gc, offset, val);
97 return 0;
98}
99
100static int gen_74x164_probe(struct spi_device *spi)
101{
102 struct gen_74x164_chip *chip;
103 u32 nregs;
104 int ret;
105
106 /*
107 * bits_per_word cannot be configured in platform data
108 */
109 spi->bits_per_word = 8;
110
111 ret = spi_setup(spi);
112 if (ret < 0)
113 return ret;
114
115 ret = device_property_read_u32(&spi->dev, "registers-number", &nregs);
116 if (ret) {
117 dev_err(&spi->dev, "Missing 'registers-number' property.\n");
118 return -EINVAL;
119 }
120
121 chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
122 if (!chip)
123 return -ENOMEM;
124
125 chip->gpiod_oe = devm_gpiod_get_optional(&spi->dev, "enable",
126 GPIOD_OUT_LOW);
127 if (IS_ERR(chip->gpiod_oe))
128 return PTR_ERR(chip->gpiod_oe);
129
130 spi_set_drvdata(spi, chip);
131
132 chip->gpio_chip.label = spi->modalias;
133 chip->gpio_chip.direction_output = gen_74x164_direction_output;
134 chip->gpio_chip.get = gen_74x164_get_value;
135 chip->gpio_chip.set = gen_74x164_set_value;
136 chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
137 chip->gpio_chip.base = -1;
138
139 chip->registers = nregs;
140 chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
141
142 chip->gpio_chip.can_sleep = true;
143 chip->gpio_chip.parent = &spi->dev;
144 chip->gpio_chip.owner = THIS_MODULE;
145
146 ret = devm_mutex_init(&spi->dev, &chip->lock);
147 if (ret)
148 return ret;
149
150 ret = __gen_74x164_write_config(chip);
151 if (ret)
152 return dev_err_probe(&spi->dev, ret, "Config write failed\n");
153
154 gpiod_set_value_cansleep(chip->gpiod_oe, 1);
155
156 return devm_gpiochip_add_data(&spi->dev, &chip->gpio_chip, chip);
157}
158
159static void gen_74x164_remove(struct spi_device *spi)
160{
161 struct gen_74x164_chip *chip = spi_get_drvdata(spi);
162
163 gpiod_set_value_cansleep(chip->gpiod_oe, 0);
164}
165
166static const struct spi_device_id gen_74x164_spi_ids[] = {
167 { .name = "74hc595" },
168 { .name = "74lvc594" },
169 {},
170};
171MODULE_DEVICE_TABLE(spi, gen_74x164_spi_ids);
172
173static const struct of_device_id gen_74x164_dt_ids[] = {
174 { .compatible = "fairchild,74hc595" },
175 { .compatible = "nxp,74lvc594" },
176 {},
177};
178MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
179
180static struct spi_driver gen_74x164_driver = {
181 .driver = {
182 .name = "74x164",
183 .of_match_table = gen_74x164_dt_ids,
184 },
185 .probe = gen_74x164_probe,
186 .remove = gen_74x164_remove,
187 .id_table = gen_74x164_spi_ids,
188};
189module_spi_driver(gen_74x164_driver);
190
191MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
192MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
193MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
194MODULE_LICENSE("GPL v2");
1/*
2 * 74Hx164 - Generic serial-in/parallel-out 8-bits shift register GPIO driver
3 *
4 * Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
5 * Copyright (C) 2010 Miguel Gaio <miguel.gaio@efixo.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/mutex.h>
14#include <linux/spi/spi.h>
15#include <linux/gpio/driver.h>
16#include <linux/gpio/consumer.h>
17#include <linux/slab.h>
18#include <linux/module.h>
19
20#define GEN_74X164_NUMBER_GPIOS 8
21
22struct gen_74x164_chip {
23 struct gpio_chip gpio_chip;
24 struct mutex lock;
25 struct gpio_desc *gpiod_oe;
26 u32 registers;
27 /*
28 * Since the registers are chained, every byte sent will make
29 * the previous byte shift to the next register in the
30 * chain. Thus, the first byte sent will end up in the last
31 * register at the end of the transfer. So, to have a logical
32 * numbering, store the bytes in reverse order.
33 */
34 u8 buffer[];
35};
36
37static int __gen_74x164_write_config(struct gen_74x164_chip *chip)
38{
39 return spi_write(to_spi_device(chip->gpio_chip.parent), chip->buffer,
40 chip->registers);
41}
42
43static int gen_74x164_get_value(struct gpio_chip *gc, unsigned offset)
44{
45 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
46 u8 bank = chip->registers - 1 - offset / 8;
47 u8 pin = offset % 8;
48 int ret;
49
50 mutex_lock(&chip->lock);
51 ret = (chip->buffer[bank] >> pin) & 0x1;
52 mutex_unlock(&chip->lock);
53
54 return ret;
55}
56
57static void gen_74x164_set_value(struct gpio_chip *gc,
58 unsigned offset, int val)
59{
60 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
61 u8 bank = chip->registers - 1 - offset / 8;
62 u8 pin = offset % 8;
63
64 mutex_lock(&chip->lock);
65 if (val)
66 chip->buffer[bank] |= (1 << pin);
67 else
68 chip->buffer[bank] &= ~(1 << pin);
69
70 __gen_74x164_write_config(chip);
71 mutex_unlock(&chip->lock);
72}
73
74static void gen_74x164_set_multiple(struct gpio_chip *gc, unsigned long *mask,
75 unsigned long *bits)
76{
77 struct gen_74x164_chip *chip = gpiochip_get_data(gc);
78 unsigned int i, idx, shift;
79 u8 bank, bankmask;
80
81 mutex_lock(&chip->lock);
82 for (i = 0, bank = chip->registers - 1; i < chip->registers;
83 i++, bank--) {
84 idx = i / sizeof(*mask);
85 shift = i % sizeof(*mask) * BITS_PER_BYTE;
86 bankmask = mask[idx] >> shift;
87 if (!bankmask)
88 continue;
89
90 chip->buffer[bank] &= ~bankmask;
91 chip->buffer[bank] |= bankmask & (bits[idx] >> shift);
92 }
93 __gen_74x164_write_config(chip);
94 mutex_unlock(&chip->lock);
95}
96
97static int gen_74x164_direction_output(struct gpio_chip *gc,
98 unsigned offset, int val)
99{
100 gen_74x164_set_value(gc, offset, val);
101 return 0;
102}
103
104static int gen_74x164_probe(struct spi_device *spi)
105{
106 struct gen_74x164_chip *chip;
107 u32 nregs;
108 int ret;
109
110 /*
111 * bits_per_word cannot be configured in platform data
112 */
113 spi->bits_per_word = 8;
114
115 ret = spi_setup(spi);
116 if (ret < 0)
117 return ret;
118
119 if (of_property_read_u32(spi->dev.of_node, "registers-number",
120 &nregs)) {
121 dev_err(&spi->dev,
122 "Missing registers-number property in the DT.\n");
123 return -EINVAL;
124 }
125
126 chip = devm_kzalloc(&spi->dev, sizeof(*chip) + nregs, GFP_KERNEL);
127 if (!chip)
128 return -ENOMEM;
129
130 chip->gpiod_oe = devm_gpiod_get_optional(&spi->dev, "enable",
131 GPIOD_OUT_LOW);
132 if (IS_ERR(chip->gpiod_oe))
133 return PTR_ERR(chip->gpiod_oe);
134
135 gpiod_set_value_cansleep(chip->gpiod_oe, 1);
136
137 spi_set_drvdata(spi, chip);
138
139 chip->gpio_chip.label = spi->modalias;
140 chip->gpio_chip.direction_output = gen_74x164_direction_output;
141 chip->gpio_chip.get = gen_74x164_get_value;
142 chip->gpio_chip.set = gen_74x164_set_value;
143 chip->gpio_chip.set_multiple = gen_74x164_set_multiple;
144 chip->gpio_chip.base = -1;
145
146 chip->registers = nregs;
147 chip->gpio_chip.ngpio = GEN_74X164_NUMBER_GPIOS * chip->registers;
148
149 chip->gpio_chip.can_sleep = true;
150 chip->gpio_chip.parent = &spi->dev;
151 chip->gpio_chip.owner = THIS_MODULE;
152
153 mutex_init(&chip->lock);
154
155 ret = __gen_74x164_write_config(chip);
156 if (ret) {
157 dev_err(&spi->dev, "Failed writing: %d\n", ret);
158 goto exit_destroy;
159 }
160
161 ret = gpiochip_add_data(&chip->gpio_chip, chip);
162 if (!ret)
163 return 0;
164
165exit_destroy:
166 mutex_destroy(&chip->lock);
167
168 return ret;
169}
170
171static int gen_74x164_remove(struct spi_device *spi)
172{
173 struct gen_74x164_chip *chip = spi_get_drvdata(spi);
174
175 gpiod_set_value_cansleep(chip->gpiod_oe, 0);
176 gpiochip_remove(&chip->gpio_chip);
177 mutex_destroy(&chip->lock);
178
179 return 0;
180}
181
182static const struct of_device_id gen_74x164_dt_ids[] = {
183 { .compatible = "fairchild,74hc595" },
184 { .compatible = "nxp,74lvc594" },
185 {},
186};
187MODULE_DEVICE_TABLE(of, gen_74x164_dt_ids);
188
189static struct spi_driver gen_74x164_driver = {
190 .driver = {
191 .name = "74x164",
192 .of_match_table = gen_74x164_dt_ids,
193 },
194 .probe = gen_74x164_probe,
195 .remove = gen_74x164_remove,
196};
197module_spi_driver(gen_74x164_driver);
198
199MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
200MODULE_AUTHOR("Miguel Gaio <miguel.gaio@efixo.com>");
201MODULE_DESCRIPTION("GPIO expander driver for 74X164 8-bits shift register");
202MODULE_LICENSE("GPL v2");