Loading...
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright (C) 2012 STMicroelectronics Limited
4 *
5 * Authors: Francesco Virlinzi <francesco.virlinzi@st.com>
6 * Alexandre Torgue <alexandre.torgue@st.com>
7 */
8
9#include <linux/init.h>
10#include <linux/module.h>
11#include <linux/export.h>
12#include <linux/platform_device.h>
13#include <linux/clk.h>
14#include <linux/of.h>
15#include <linux/ahci_platform.h>
16#include <linux/libata.h>
17#include <linux/reset.h>
18#include <linux/io.h>
19#include <linux/dma-mapping.h>
20
21#include "ahci.h"
22
23#define DRV_NAME "st_ahci"
24
25#define ST_AHCI_OOBR 0xbc
26#define ST_AHCI_OOBR_WE BIT(31)
27#define ST_AHCI_OOBR_CWMIN_SHIFT 24
28#define ST_AHCI_OOBR_CWMAX_SHIFT 16
29#define ST_AHCI_OOBR_CIMIN_SHIFT 8
30#define ST_AHCI_OOBR_CIMAX_SHIFT 0
31
32struct st_ahci_drv_data {
33 struct reset_control *pwr;
34 struct reset_control *sw_rst;
35 struct reset_control *pwr_rst;
36};
37
38static void st_ahci_configure_oob(void __iomem *mmio)
39{
40 unsigned long old_val, new_val;
41
42 new_val = (0x02 << ST_AHCI_OOBR_CWMIN_SHIFT) |
43 (0x04 << ST_AHCI_OOBR_CWMAX_SHIFT) |
44 (0x08 << ST_AHCI_OOBR_CIMIN_SHIFT) |
45 (0x0C << ST_AHCI_OOBR_CIMAX_SHIFT);
46
47 old_val = readl(mmio + ST_AHCI_OOBR);
48 writel(old_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
49 writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
50 writel(new_val, mmio + ST_AHCI_OOBR);
51}
52
53static int st_ahci_deassert_resets(struct ahci_host_priv *hpriv,
54 struct device *dev)
55{
56 struct st_ahci_drv_data *drv_data = hpriv->plat_data;
57 int err;
58
59 if (drv_data->pwr) {
60 err = reset_control_deassert(drv_data->pwr);
61 if (err) {
62 dev_err(dev, "unable to bring out of pwrdwn\n");
63 return err;
64 }
65 }
66
67 if (drv_data->sw_rst) {
68 err = reset_control_deassert(drv_data->sw_rst);
69 if (err) {
70 dev_err(dev, "unable to bring out of sw-rst\n");
71 return err;
72 }
73 }
74
75 if (drv_data->pwr_rst) {
76 err = reset_control_deassert(drv_data->pwr_rst);
77 if (err) {
78 dev_err(dev, "unable to bring out of pwr-rst\n");
79 return err;
80 }
81 }
82
83 return 0;
84}
85
86static void st_ahci_host_stop(struct ata_host *host)
87{
88 struct ahci_host_priv *hpriv = host->private_data;
89 struct st_ahci_drv_data *drv_data = hpriv->plat_data;
90 struct device *dev = host->dev;
91 int err;
92
93 if (drv_data->pwr) {
94 err = reset_control_assert(drv_data->pwr);
95 if (err)
96 dev_err(dev, "unable to pwrdwn\n");
97 }
98
99 ahci_platform_disable_resources(hpriv);
100}
101
102static int st_ahci_probe_resets(struct ahci_host_priv *hpriv,
103 struct device *dev)
104{
105 struct st_ahci_drv_data *drv_data = hpriv->plat_data;
106
107 drv_data->pwr = devm_reset_control_get(dev, "pwr-dwn");
108 if (IS_ERR(drv_data->pwr)) {
109 dev_info(dev, "power reset control not defined\n");
110 drv_data->pwr = NULL;
111 }
112
113 drv_data->sw_rst = devm_reset_control_get(dev, "sw-rst");
114 if (IS_ERR(drv_data->sw_rst)) {
115 dev_info(dev, "soft reset control not defined\n");
116 drv_data->sw_rst = NULL;
117 }
118
119 drv_data->pwr_rst = devm_reset_control_get(dev, "pwr-rst");
120 if (IS_ERR(drv_data->pwr_rst)) {
121 dev_dbg(dev, "power soft reset control not defined\n");
122 drv_data->pwr_rst = NULL;
123 }
124
125 return st_ahci_deassert_resets(hpriv, dev);
126}
127
128static struct ata_port_operations st_ahci_port_ops = {
129 .inherits = &ahci_platform_ops,
130 .host_stop = st_ahci_host_stop,
131};
132
133static const struct ata_port_info st_ahci_port_info = {
134 .flags = AHCI_FLAG_COMMON,
135 .pio_mask = ATA_PIO4,
136 .udma_mask = ATA_UDMA6,
137 .port_ops = &st_ahci_port_ops,
138};
139
140static const struct scsi_host_template ahci_platform_sht = {
141 AHCI_SHT(DRV_NAME),
142};
143
144static int st_ahci_probe(struct platform_device *pdev)
145{
146 struct st_ahci_drv_data *drv_data;
147 struct ahci_host_priv *hpriv;
148 int err;
149
150 drv_data = devm_kzalloc(&pdev->dev, sizeof(*drv_data), GFP_KERNEL);
151 if (!drv_data)
152 return -ENOMEM;
153
154 hpriv = ahci_platform_get_resources(pdev, 0);
155 if (IS_ERR(hpriv))
156 return PTR_ERR(hpriv);
157 hpriv->plat_data = drv_data;
158
159 err = st_ahci_probe_resets(hpriv, &pdev->dev);
160 if (err)
161 return err;
162
163 err = ahci_platform_enable_resources(hpriv);
164 if (err)
165 return err;
166
167 st_ahci_configure_oob(hpriv->mmio);
168
169 err = ahci_platform_init_host(pdev, hpriv, &st_ahci_port_info,
170 &ahci_platform_sht);
171 if (err) {
172 ahci_platform_disable_resources(hpriv);
173 return err;
174 }
175
176 return 0;
177}
178
179#ifdef CONFIG_PM_SLEEP
180static int st_ahci_suspend(struct device *dev)
181{
182 struct ata_host *host = dev_get_drvdata(dev);
183 struct ahci_host_priv *hpriv = host->private_data;
184 struct st_ahci_drv_data *drv_data = hpriv->plat_data;
185 int err;
186
187 err = ahci_platform_suspend_host(dev);
188 if (err)
189 return err;
190
191 if (drv_data->pwr) {
192 err = reset_control_assert(drv_data->pwr);
193 if (err) {
194 dev_err(dev, "unable to pwrdwn");
195 return err;
196 }
197 }
198
199 ahci_platform_disable_resources(hpriv);
200
201 return 0;
202}
203
204static int st_ahci_resume(struct device *dev)
205{
206 struct ata_host *host = dev_get_drvdata(dev);
207 struct ahci_host_priv *hpriv = host->private_data;
208 int err;
209
210 err = ahci_platform_enable_resources(hpriv);
211 if (err)
212 return err;
213
214 err = st_ahci_deassert_resets(hpriv, dev);
215 if (err) {
216 ahci_platform_disable_resources(hpriv);
217 return err;
218 }
219
220 st_ahci_configure_oob(hpriv->mmio);
221
222 return ahci_platform_resume_host(dev);
223}
224#endif
225
226static SIMPLE_DEV_PM_OPS(st_ahci_pm_ops, st_ahci_suspend, st_ahci_resume);
227
228static const struct of_device_id st_ahci_match[] = {
229 { .compatible = "st,ahci", },
230 { /* sentinel */ }
231};
232MODULE_DEVICE_TABLE(of, st_ahci_match);
233
234static struct platform_driver st_ahci_driver = {
235 .driver = {
236 .name = DRV_NAME,
237 .pm = &st_ahci_pm_ops,
238 .of_match_table = st_ahci_match,
239 },
240 .probe = st_ahci_probe,
241 .remove = ata_platform_remove_one,
242};
243module_platform_driver(st_ahci_driver);
244
245MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@st.com>");
246MODULE_AUTHOR("Francesco Virlinzi <francesco.virlinzi@st.com>");
247MODULE_DESCRIPTION("STMicroelectronics SATA AHCI Driver");
248MODULE_LICENSE("GPL v2");
1/*
2 * Copyright (C) 2012 STMicroelectronics Limited
3 *
4 * Authors: Francesco Virlinzi <francesco.virlinzi@st.com>
5 * Alexandre Torgue <alexandre.torgue@st.com>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11
12#include <linux/init.h>
13#include <linux/module.h>
14#include <linux/export.h>
15#include <linux/platform_device.h>
16#include <linux/clk.h>
17#include <linux/of.h>
18#include <linux/ahci_platform.h>
19#include <linux/libata.h>
20#include <linux/reset.h>
21#include <linux/io.h>
22#include <linux/dma-mapping.h>
23
24#include "ahci.h"
25
26#define DRV_NAME "st_ahci"
27
28#define ST_AHCI_OOBR 0xbc
29#define ST_AHCI_OOBR_WE BIT(31)
30#define ST_AHCI_OOBR_CWMIN_SHIFT 24
31#define ST_AHCI_OOBR_CWMAX_SHIFT 16
32#define ST_AHCI_OOBR_CIMIN_SHIFT 8
33#define ST_AHCI_OOBR_CIMAX_SHIFT 0
34
35struct st_ahci_drv_data {
36 struct platform_device *ahci;
37 struct reset_control *pwr;
38 struct reset_control *sw_rst;
39 struct reset_control *pwr_rst;
40};
41
42static void st_ahci_configure_oob(void __iomem *mmio)
43{
44 unsigned long old_val, new_val;
45
46 new_val = (0x02 << ST_AHCI_OOBR_CWMIN_SHIFT) |
47 (0x04 << ST_AHCI_OOBR_CWMAX_SHIFT) |
48 (0x08 << ST_AHCI_OOBR_CIMIN_SHIFT) |
49 (0x0C << ST_AHCI_OOBR_CIMAX_SHIFT);
50
51 old_val = readl(mmio + ST_AHCI_OOBR);
52 writel(old_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
53 writel(new_val | ST_AHCI_OOBR_WE, mmio + ST_AHCI_OOBR);
54 writel(new_val, mmio + ST_AHCI_OOBR);
55}
56
57static int st_ahci_deassert_resets(struct ahci_host_priv *hpriv,
58 struct device *dev)
59{
60 struct st_ahci_drv_data *drv_data = hpriv->plat_data;
61 int err;
62
63 if (drv_data->pwr) {
64 err = reset_control_deassert(drv_data->pwr);
65 if (err) {
66 dev_err(dev, "unable to bring out of pwrdwn\n");
67 return err;
68 }
69 }
70
71 if (drv_data->sw_rst) {
72 err = reset_control_deassert(drv_data->sw_rst);
73 if (err) {
74 dev_err(dev, "unable to bring out of sw-rst\n");
75 return err;
76 }
77 }
78
79 if (drv_data->pwr_rst) {
80 err = reset_control_deassert(drv_data->pwr_rst);
81 if (err) {
82 dev_err(dev, "unable to bring out of pwr-rst\n");
83 return err;
84 }
85 }
86
87 return 0;
88}
89
90static void st_ahci_host_stop(struct ata_host *host)
91{
92 struct ahci_host_priv *hpriv = host->private_data;
93 struct st_ahci_drv_data *drv_data = hpriv->plat_data;
94 struct device *dev = host->dev;
95 int err;
96
97 if (drv_data->pwr) {
98 err = reset_control_assert(drv_data->pwr);
99 if (err)
100 dev_err(dev, "unable to pwrdwn\n");
101 }
102
103 ahci_platform_disable_resources(hpriv);
104}
105
106static int st_ahci_probe_resets(struct ahci_host_priv *hpriv,
107 struct device *dev)
108{
109 struct st_ahci_drv_data *drv_data = hpriv->plat_data;
110
111 drv_data->pwr = devm_reset_control_get(dev, "pwr-dwn");
112 if (IS_ERR(drv_data->pwr)) {
113 dev_info(dev, "power reset control not defined\n");
114 drv_data->pwr = NULL;
115 }
116
117 drv_data->sw_rst = devm_reset_control_get(dev, "sw-rst");
118 if (IS_ERR(drv_data->sw_rst)) {
119 dev_info(dev, "soft reset control not defined\n");
120 drv_data->sw_rst = NULL;
121 }
122
123 drv_data->pwr_rst = devm_reset_control_get(dev, "pwr-rst");
124 if (IS_ERR(drv_data->pwr_rst)) {
125 dev_dbg(dev, "power soft reset control not defined\n");
126 drv_data->pwr_rst = NULL;
127 }
128
129 return st_ahci_deassert_resets(hpriv, dev);
130}
131
132static struct ata_port_operations st_ahci_port_ops = {
133 .inherits = &ahci_platform_ops,
134 .host_stop = st_ahci_host_stop,
135};
136
137static const struct ata_port_info st_ahci_port_info = {
138 .flags = AHCI_FLAG_COMMON,
139 .pio_mask = ATA_PIO4,
140 .udma_mask = ATA_UDMA6,
141 .port_ops = &st_ahci_port_ops,
142};
143
144static struct scsi_host_template ahci_platform_sht = {
145 AHCI_SHT(DRV_NAME),
146};
147
148static int st_ahci_probe(struct platform_device *pdev)
149{
150 struct device *dev = &pdev->dev;
151 struct st_ahci_drv_data *drv_data;
152 struct ahci_host_priv *hpriv;
153 int err;
154
155 drv_data = devm_kzalloc(&pdev->dev, sizeof(*drv_data), GFP_KERNEL);
156 if (!drv_data)
157 return -ENOMEM;
158
159 hpriv = ahci_platform_get_resources(pdev);
160 if (IS_ERR(hpriv))
161 return PTR_ERR(hpriv);
162 hpriv->plat_data = drv_data;
163
164 err = st_ahci_probe_resets(hpriv, &pdev->dev);
165 if (err)
166 return err;
167
168 err = ahci_platform_enable_resources(hpriv);
169 if (err)
170 return err;
171
172 st_ahci_configure_oob(hpriv->mmio);
173
174 of_property_read_u32(dev->of_node,
175 "ports-implemented", &hpriv->force_port_map);
176
177 err = ahci_platform_init_host(pdev, hpriv, &st_ahci_port_info,
178 &ahci_platform_sht);
179 if (err) {
180 ahci_platform_disable_resources(hpriv);
181 return err;
182 }
183
184 return 0;
185}
186
187#ifdef CONFIG_PM_SLEEP
188static int st_ahci_suspend(struct device *dev)
189{
190 struct ata_host *host = dev_get_drvdata(dev);
191 struct ahci_host_priv *hpriv = host->private_data;
192 struct st_ahci_drv_data *drv_data = hpriv->plat_data;
193 int err;
194
195 err = ahci_platform_suspend_host(dev);
196 if (err)
197 return err;
198
199 if (drv_data->pwr) {
200 err = reset_control_assert(drv_data->pwr);
201 if (err) {
202 dev_err(dev, "unable to pwrdwn");
203 return err;
204 }
205 }
206
207 ahci_platform_disable_resources(hpriv);
208
209 return 0;
210}
211
212static int st_ahci_resume(struct device *dev)
213{
214 struct ata_host *host = dev_get_drvdata(dev);
215 struct ahci_host_priv *hpriv = host->private_data;
216 int err;
217
218 err = ahci_platform_enable_resources(hpriv);
219 if (err)
220 return err;
221
222 err = st_ahci_deassert_resets(hpriv, dev);
223 if (err) {
224 ahci_platform_disable_resources(hpriv);
225 return err;
226 }
227
228 st_ahci_configure_oob(hpriv->mmio);
229
230 return ahci_platform_resume_host(dev);
231}
232#endif
233
234static SIMPLE_DEV_PM_OPS(st_ahci_pm_ops, st_ahci_suspend, st_ahci_resume);
235
236static const struct of_device_id st_ahci_match[] = {
237 { .compatible = "st,ahci", },
238 {},
239};
240MODULE_DEVICE_TABLE(of, st_ahci_match);
241
242static struct platform_driver st_ahci_driver = {
243 .driver = {
244 .name = DRV_NAME,
245 .pm = &st_ahci_pm_ops,
246 .of_match_table = of_match_ptr(st_ahci_match),
247 },
248 .probe = st_ahci_probe,
249 .remove = ata_platform_remove_one,
250};
251module_platform_driver(st_ahci_driver);
252
253MODULE_AUTHOR("Alexandre Torgue <alexandre.torgue@st.com>");
254MODULE_AUTHOR("Francesco Virlinzi <francesco.virlinzi@st.com>");
255MODULE_DESCRIPTION("STMicroelectronics SATA AHCI Driver");
256MODULE_LICENSE("GPL v2");