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1/* SPDX-License-Identifier: GPL-2.0-only */
2/*
3 * ALSA SoC CS4349 codec driver
4 *
5 * Copyright 2015 Cirrus Logic, Inc.
6 *
7 * Author: Tim Howe <Tim.Howe@cirrus.com>
8 */
9
10#ifndef __CS4349_H__
11#define __CS4349_H__
12
13/* CS4349 registers addresses */
14#define CS4349_CHIPID 0x01 /* Device and Rev ID, Read Only */
15#define CS4349_MODE 0x02 /* Mode Control */
16#define CS4349_VMI 0x03 /* Volume, Mixing, Inversion Control */
17#define CS4349_MUTE 0x04 /* Mute Control */
18#define CS4349_VOLA 0x05 /* DAC Channel A Volume Control */
19#define CS4349_VOLB 0x06 /* DAC Channel B Volume Control */
20#define CS4349_RMPFLT 0x07 /* Ramp and Filter Control */
21#define CS4349_MISC 0x08 /* Power Down,Freeze Control,Pop Stop*/
22
23#define CS4349_I2C_INCR 0x80
24
25
26/* Device and Revision ID */
27#define CS4349_REVA 0xF0 /* Rev A */
28#define CS4349_REVB 0xF1 /* Rev B */
29#define CS4349_REVC2 0xFF /* Rev C2 */
30
31
32/* PDN_DONE Poll Maximum
33 * If soft ramp is set it will take much longer to power down
34 * the system.
35 */
36#define PDN_POLL_MAX 900
37
38
39/* Bitfield Definitions */
40
41/* CS4349_MODE */
42/* (Digital Interface Format, De-Emphasis Control, Functional Mode */
43#define DIF2 (1 << 6)
44#define DIF1 (1 << 5)
45#define DIF0 (1 << 4)
46#define DEM1 (1 << 3)
47#define DEM0 (1 << 2)
48#define FM1 (1 << 1)
49#define DIF_LEFT_JST 0x00
50#define DIF_I2S 0x01
51#define DIF_RGHT_JST16 0x02
52#define DIF_RGHT_JST24 0x03
53#define DIF_TDM0 0x04
54#define DIF_TDM1 0x05
55#define DIF_TDM2 0x06
56#define DIF_TDM3 0x07
57#define DIF_MASK 0x70
58#define MODE_FORMAT(x) (((x)&7)<<4)
59#define DEM_MASK 0x0C
60#define NO_DEM 0x00
61#define DEM_441 0x04
62#define DEM_48K 0x08
63#define DEM_32K 0x0C
64#define FM_AUTO 0x00
65#define FM_SNGL 0x01
66#define FM_DBL 0x02
67#define FM_QUAD 0x03
68#define FM_SNGL_MIN 30000
69#define FM_SNGL_MAX 54000
70#define FM_DBL_MAX 108000
71#define FM_QUAD_MAX 216000
72#define FM_MASK 0x03
73
74/* CS4349_VMI (VMI = Volume, Mixing and Inversion Controls) */
75#define VOLBISA (1 << 7)
76#define VOLAISB (1 << 7)
77/* INVERT_A only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
78#define INVERT_A (1 << 6)
79/* INVERT_B only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
80#define INVERT_B (1 << 5)
81#define ATAPI3 (1 << 3)
82#define ATAPI2 (1 << 2)
83#define ATAPI1 (1 << 1)
84#define ATAPI0 (1 << 0)
85#define MUTEAB 0x00
86#define MUTEA_RIGHTB 0x01
87#define MUTEA_LEFTB 0x02
88#define MUTEA_SUMLRDIV2B 0x03
89#define RIGHTA_MUTEB 0x04
90#define RIGHTA_RIGHTB 0x05
91#define RIGHTA_LEFTB 0x06
92#define RIGHTA_SUMLRDIV2B 0x07
93#define LEFTA_MUTEB 0x08
94#define LEFTA_RIGHTB 0x09 /* Default */
95#define LEFTA_LEFTB 0x0A
96#define LEFTA_SUMLRDIV2B 0x0B
97#define SUMLRDIV2A_MUTEB 0x0C
98#define SUMLRDIV2A_RIGHTB 0x0D
99#define SUMLRDIV2A_LEFTB 0x0E
100#define SUMLRDIV2_AB 0x0F
101#define CHMIX_MASK 0x0F
102
103/* CS4349_MUTE */
104#define AUTOMUTE (1 << 7)
105#define MUTEC_AB (1 << 5)
106#define MUTE_A (1 << 4)
107#define MUTE_B (1 << 3)
108#define MUTE_AB_MASK 0x18
109
110/* CS4349_RMPFLT (Ramp and Filter Control) */
111#define SCZ1 (1 << 7)
112#define SCZ0 (1 << 6)
113#define RMP_UP (1 << 5)
114#define RMP_DN (1 << 4)
115#define FILT_SEL (1 << 2)
116#define IMMDT_CHNG 0x31
117#define ZEROCRSS 0x71
118#define SOFT_RMP 0xB1
119#define SFTRMP_ZEROCRSS 0xF1
120#define SR_ZC_MASK 0xC0
121
122/* CS4349_MISC */
123#define PWR_DWN (1 << 7)
124#define FREEZE (1 << 5)
125#define POPG_EN (1 << 4)
126
127#endif /* __CS4349_H__ */
1/*
2 * ALSA SoC CS4349 codec driver
3 *
4 * Copyright 2015 Cirrus Logic, Inc.
5 *
6 * Author: Tim Howe <Tim.Howe@cirrus.com>
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License
10 * version 2 as published by the Free Software Foundation.
11 *
12 * This program is distributed in the hope that it will be useful, but
13 * WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
15 * General Public License for more details.
16 *
17 */
18
19#ifndef __CS4349_H__
20#define __CS4349_H__
21
22/* CS4349 registers addresses */
23#define CS4349_CHIPID 0x01 /* Device and Rev ID, Read Only */
24#define CS4349_MODE 0x02 /* Mode Control */
25#define CS4349_VMI 0x03 /* Volume, Mixing, Inversion Control */
26#define CS4349_MUTE 0x04 /* Mute Control */
27#define CS4349_VOLA 0x05 /* DAC Channel A Volume Control */
28#define CS4349_VOLB 0x06 /* DAC Channel B Volume Control */
29#define CS4349_RMPFLT 0x07 /* Ramp and Filter Control */
30#define CS4349_MISC 0x08 /* Power Down,Freeze Control,Pop Stop*/
31
32#define CS4349_I2C_INCR 0x80
33
34
35/* Device and Revision ID */
36#define CS4349_REVA 0xF0 /* Rev A */
37#define CS4349_REVB 0xF1 /* Rev B */
38#define CS4349_REVC2 0xFF /* Rev C2 */
39
40
41/* PDN_DONE Poll Maximum
42 * If soft ramp is set it will take much longer to power down
43 * the system.
44 */
45#define PDN_POLL_MAX 900
46
47
48/* Bitfield Definitions */
49
50/* CS4349_MODE */
51/* (Digital Interface Format, De-Emphasis Control, Functional Mode */
52#define DIF2 (1 << 6)
53#define DIF1 (1 << 5)
54#define DIF0 (1 << 4)
55#define DEM1 (1 << 3)
56#define DEM0 (1 << 2)
57#define FM1 (1 << 1)
58#define DIF_LEFT_JST 0x00
59#define DIF_I2S 0x01
60#define DIF_RGHT_JST16 0x02
61#define DIF_RGHT_JST24 0x03
62#define DIF_TDM0 0x04
63#define DIF_TDM1 0x05
64#define DIF_TDM2 0x06
65#define DIF_TDM3 0x07
66#define DIF_MASK 0x70
67#define MODE_FORMAT(x) (((x)&7)<<4)
68#define DEM_MASK 0x0C
69#define NO_DEM 0x00
70#define DEM_441 0x04
71#define DEM_48K 0x08
72#define DEM_32K 0x0C
73#define FM_AUTO 0x00
74#define FM_SNGL 0x01
75#define FM_DBL 0x02
76#define FM_QUAD 0x03
77#define FM_SNGL_MIN 30000
78#define FM_SNGL_MAX 54000
79#define FM_DBL_MAX 108000
80#define FM_QUAD_MAX 216000
81#define FM_MASK 0x03
82
83/* CS4349_VMI (VMI = Volume, Mixing and Inversion Controls) */
84#define VOLBISA (1 << 7)
85#define VOLAISB (1 << 7)
86/* INVERT_A only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
87#define INVERT_A (1 << 6)
88/* INVERT_B only available for Left Jstfd, Right Jstfd16 and Right Jstfd24 */
89#define INVERT_B (1 << 5)
90#define ATAPI3 (1 << 3)
91#define ATAPI2 (1 << 2)
92#define ATAPI1 (1 << 1)
93#define ATAPI0 (1 << 0)
94#define MUTEAB 0x00
95#define MUTEA_RIGHTB 0x01
96#define MUTEA_LEFTB 0x02
97#define MUTEA_SUMLRDIV2B 0x03
98#define RIGHTA_MUTEB 0x04
99#define RIGHTA_RIGHTB 0x05
100#define RIGHTA_LEFTB 0x06
101#define RIGHTA_SUMLRDIV2B 0x07
102#define LEFTA_MUTEB 0x08
103#define LEFTA_RIGHTB 0x09 /* Default */
104#define LEFTA_LEFTB 0x0A
105#define LEFTA_SUMLRDIV2B 0x0B
106#define SUMLRDIV2A_MUTEB 0x0C
107#define SUMLRDIV2A_RIGHTB 0x0D
108#define SUMLRDIV2A_LEFTB 0x0E
109#define SUMLRDIV2_AB 0x0F
110#define CHMIX_MASK 0x0F
111
112/* CS4349_MUTE */
113#define AUTOMUTE (1 << 7)
114#define MUTEC_AB (1 << 5)
115#define MUTE_A (1 << 4)
116#define MUTE_B (1 << 3)
117#define MUTE_AB_MASK 0x18
118
119/* CS4349_RMPFLT (Ramp and Filter Control) */
120#define SCZ1 (1 << 7)
121#define SCZ0 (1 << 6)
122#define RMP_UP (1 << 5)
123#define RMP_DN (1 << 4)
124#define FILT_SEL (1 << 2)
125#define IMMDT_CHNG 0x31
126#define ZEROCRSS 0x71
127#define SOFT_RMP 0xB1
128#define SFTRMP_ZEROCRSS 0xF1
129#define SR_ZC_MASK 0xC0
130
131/* CS4349_MISC */
132#define PWR_DWN (1 << 7)
133#define FREEZE (1 << 5)
134#define POPG_EN (1 << 4)
135
136#endif /* __CS4349_H__ */