1// SPDX-License-Identifier: GPL-2.0-only
  2//
  3// CS35L56 ALSA SoC audio driver SoundWire binding
  4//
  5// Copyright (C) 2023 Cirrus Logic, Inc. and
  6//                    Cirrus Logic International Semiconductor Ltd.
  7
  8#include <linux/delay.h>
  9#include <linux/device.h>
 10#include <linux/err.h>
 11#include <linux/module.h>
 12#include <linux/pm_runtime.h>
 13#include <linux/regmap.h>
 14#include <linux/soundwire/sdw.h>
 15#include <linux/soundwire/sdw_registers.h>
 16#include <linux/soundwire/sdw_type.h>
 17#include <linux/swab.h>
 18#include <linux/types.h>
 19#include <linux/workqueue.h>
 20
 21#include "cs35l56.h"
 22
 23/* Register addresses are offset when sent over SoundWire */
 24#define CS35L56_SDW_ADDR_OFFSET		0x8000
 25
 26/* Cirrus bus bridge registers */
 27#define CS35L56_SDW_MEM_ACCESS_STATUS	0xd0
 28#define CS35L56_SDW_MEM_READ_DATA	0xd8
 29
 30#define CS35L56_SDW_LAST_LATE		BIT(3)
 31#define CS35L56_SDW_CMD_IN_PROGRESS	BIT(2)
 32#define CS35L56_SDW_RDATA_RDY		BIT(0)
 33
 34#define CS35L56_LATE_READ_POLL_US	10
 35#define CS35L56_LATE_READ_TIMEOUT_US	1000
 36
 37static int cs35l56_sdw_poll_mem_status(struct sdw_slave *peripheral,
 38				       unsigned int mask,
 39				       unsigned int match)
 40{
 41	int ret, val;
 42
 43	ret = read_poll_timeout(sdw_read_no_pm, val,
 44				(val < 0) || ((val & mask) == match),
 45				CS35L56_LATE_READ_POLL_US, CS35L56_LATE_READ_TIMEOUT_US,
 46				false, peripheral, CS35L56_SDW_MEM_ACCESS_STATUS);
 47	if (ret < 0)
 48		return ret;
 49
 50	if (val < 0)
 51		return val;
 52
 53	return 0;
 54}
 55
 56static int cs35l56_sdw_slow_read(struct sdw_slave *peripheral, unsigned int reg,
 57				 u8 *buf, size_t val_size)
 58{
 59	int ret, i;
 60
 61	reg += CS35L56_SDW_ADDR_OFFSET;
 62
 63	for (i = 0; i < val_size; i += sizeof(u32)) {
 64		/* Poll for bus bridge idle */
 65		ret = cs35l56_sdw_poll_mem_status(peripheral,
 66						  CS35L56_SDW_CMD_IN_PROGRESS,
 67						  0);
 68		if (ret < 0) {
 69			dev_err(&peripheral->dev, "!CMD_IN_PROGRESS fail: %d\n", ret);
 70			return ret;
 71		}
 72
 73		/* Reading LSByte triggers read of register to holding buffer */
 74		sdw_read_no_pm(peripheral, reg + i);
 75
 76		/* Wait for data available */
 77		ret = cs35l56_sdw_poll_mem_status(peripheral,
 78						  CS35L56_SDW_RDATA_RDY,
 79						  CS35L56_SDW_RDATA_RDY);
 80		if (ret < 0) {
 81			dev_err(&peripheral->dev, "RDATA_RDY fail: %d\n", ret);
 82			return ret;
 83		}
 84
 85		/* Read data from buffer */
 86		ret = sdw_nread_no_pm(peripheral, CS35L56_SDW_MEM_READ_DATA,
 87				      sizeof(u32), &buf[i]);
 88		if (ret) {
 89			dev_err(&peripheral->dev, "Late read @%#x failed: %d\n", reg + i, ret);
 90			return ret;
 91		}
 92
 93		swab32s((u32 *)&buf[i]);
 94	}
 95
 96	return 0;
 97}
 98
 99static int cs35l56_sdw_read_one(struct sdw_slave *peripheral, unsigned int reg, void *buf)
100{
101	int ret;
102
103	ret = sdw_nread_no_pm(peripheral, reg, 4, (u8 *)buf);
104	if (ret != 0) {
105		dev_err(&peripheral->dev, "Read failed @%#x:%d\n", reg, ret);
106		return ret;
107	}
108
109	swab32s((u32 *)buf);
110
111	return 0;
112}
113
114static int cs35l56_sdw_read(void *context, const void *reg_buf,
115			    const size_t reg_size, void *val_buf,
116			    size_t val_size)
117{
118	struct sdw_slave *peripheral = context;
119	u8 *buf8 = val_buf;
120	unsigned int reg, bytes;
121	int ret;
122
123	reg = le32_to_cpu(*(const __le32 *)reg_buf);
124
125	if (cs35l56_is_otp_register(reg))
126		return cs35l56_sdw_slow_read(peripheral, reg, buf8, val_size);
127
128	reg += CS35L56_SDW_ADDR_OFFSET;
129
130	if (val_size == 4)
131		return cs35l56_sdw_read_one(peripheral, reg, val_buf);
132
133	while (val_size) {
134		bytes = SDW_REG_NO_PAGE - (reg & SDW_REGADDR); /* to end of page */
135		if (bytes > val_size)
136			bytes = val_size;
137
138		ret = sdw_nread_no_pm(peripheral, reg, bytes, buf8);
139		if (ret != 0) {
140			dev_err(&peripheral->dev, "Read failed @%#x..%#x:%d\n",
141				reg, reg + bytes - 1, ret);
142			return ret;
143		}
144
145		swab32_array((u32 *)buf8, bytes / 4);
146		val_size -= bytes;
147		reg += bytes;
148		buf8 += bytes;
149	}
150
151	return 0;
152}
153
154static inline void cs35l56_swab_copy(void *dest, const void *src, size_t nbytes)
155{
156	u32 *dest32 = dest;
157	const u32 *src32 = src;
158
159	for (; nbytes > 0; nbytes -= 4)
160		*dest32++ = swab32(*src32++);
161}
162
163static int cs35l56_sdw_write_one(struct sdw_slave *peripheral, unsigned int reg, const void *buf)
164{
165	u32 val_le = swab32(*(u32 *)buf);
166	int ret;
167
168	ret = sdw_nwrite_no_pm(peripheral, reg, 4, (u8 *)&val_le);
169	if (ret != 0) {
170		dev_err(&peripheral->dev, "Write failed @%#x:%d\n", reg, ret);
171		return ret;
172	}
173
174	return 0;
175}
176
177static int cs35l56_sdw_gather_write(void *context,
178				    const void *reg_buf, size_t reg_size,
179				    const void *val_buf, size_t val_size)
180{
181	struct sdw_slave *peripheral = context;
182	const u8 *src_be = val_buf;
183	u32 val_le_buf[64];	/* Define u32 so it is 32-bit aligned */
184	unsigned int reg, bytes;
185	int ret;
186
187	reg = le32_to_cpu(*(const __le32 *)reg_buf);
188	reg += CS35L56_SDW_ADDR_OFFSET;
189
190	if (val_size == 4)
191		return cs35l56_sdw_write_one(peripheral, reg, src_be);
192
193	while (val_size) {
194		bytes = SDW_REG_NO_PAGE - (reg & SDW_REGADDR); /* to end of page */
195		if (bytes > val_size)
196			bytes = val_size;
197		if (bytes > sizeof(val_le_buf))
198			bytes = sizeof(val_le_buf);
199
200		cs35l56_swab_copy(val_le_buf, src_be, bytes);
201
202		ret = sdw_nwrite_no_pm(peripheral, reg, bytes, (u8 *)val_le_buf);
203		if (ret != 0) {
204			dev_err(&peripheral->dev, "Write failed @%#x..%#x:%d\n",
205				reg, reg + bytes - 1, ret);
206			return ret;
207		}
208
209		val_size -= bytes;
210		reg += bytes;
211		src_be += bytes;
212	}
213
214	return 0;
215}
216
217static int cs35l56_sdw_write(void *context, const void *val_buf, size_t val_size)
218{
219	const u8 *src_buf = val_buf;
220
221	/* First word of val_buf contains the destination address */
222	return cs35l56_sdw_gather_write(context, &src_buf[0], 4, &src_buf[4], val_size - 4);
223}
224
225/*
226 * Registers are big-endian on I2C and SPI but little-endian on SoundWire.
227 * Exported firmware controls are big-endian on I2C/SPI but little-endian on
228 * SoundWire. Firmware files are always big-endian and are opaque blobs.
229 * Present a big-endian regmap and hide the endianness swap, so that the ALSA
230 * byte controls always have the same byte order, and firmware file blobs
231 * can be written verbatim.
232 */
233static const struct regmap_bus cs35l56_regmap_bus_sdw = {
234	.read = cs35l56_sdw_read,
235	.write = cs35l56_sdw_write,
236	.gather_write = cs35l56_sdw_gather_write,
237	.reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
238	.val_format_endian_default = REGMAP_ENDIAN_BIG,
239};
240
241static int cs35l56_sdw_set_cal_index(struct cs35l56_private *cs35l56)
242{
243	int ret;
244
245	/* SoundWire UniqueId is used to index the calibration array */
246	ret = sdw_read_no_pm(cs35l56->sdw_peripheral, SDW_SCP_DEVID_0);
247	if (ret < 0)
248		return ret;
249
250	cs35l56->base.cal_index = ret & 0xf;
251
252	return 0;
253}
254
255static void cs35l56_sdw_init(struct sdw_slave *peripheral)
256{
257	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
258	int ret;
259
260	pm_runtime_get_noresume(cs35l56->base.dev);
261
262	if (cs35l56->base.cal_index < 0) {
263		ret = cs35l56_sdw_set_cal_index(cs35l56);
264		if (ret < 0)
265			goto out;
266	}
267
268	ret = cs35l56_init(cs35l56);
269	if (ret < 0) {
270		regcache_cache_only(cs35l56->base.regmap, true);
271		goto out;
272	}
273
274	/*
275	 * cs35l56_init can return with !init_done if it triggered
276	 * a soft reset.
277	 */
278	if (cs35l56->base.init_done) {
279		/* Enable SoundWire interrupts */
280		sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1,
281				CS35L56_SDW_INT_MASK_CODEC_IRQ);
282	}
283
284out:
285	pm_runtime_mark_last_busy(cs35l56->base.dev);
286	pm_runtime_put_autosuspend(cs35l56->base.dev);
287}
288
289static int cs35l56_sdw_interrupt(struct sdw_slave *peripheral,
290				 struct sdw_slave_intr_status *status)
291{
292	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
293
294	/* SoundWire core holds our pm_runtime when calling this function. */
295
296	dev_dbg(cs35l56->base.dev, "int control_port=%#x\n", status->control_port);
297
298	if ((status->control_port & SDW_SCP_INT1_IMPL_DEF) == 0)
299		return 0;
300
301	/*
302	 * Prevent bus manager suspending and possibly issuing a
303	 * bus-reset before the queued work has run.
304	 */
305	pm_runtime_get_noresume(cs35l56->base.dev);
306
307	/*
308	 * Mask and clear until it has been handled. The read of GEN_INT_STAT_1
309	 * is required as per the SoundWire spec for interrupt status bits
310	 * to clear. GEN_INT_MASK_1 masks the _inputs_ to GEN_INT_STAT1.
311	 * None of the interrupts are time-critical so use the
312	 * power-efficient queue.
313	 */
314	sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
315	sdw_read_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1);
316	sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
317	queue_work(system_power_efficient_wq, &cs35l56->sdw_irq_work);
318
319	return 0;
320}
321
322static void cs35l56_sdw_irq_work(struct work_struct *work)
323{
324	struct cs35l56_private *cs35l56 = container_of(work,
325						       struct cs35l56_private,
326						       sdw_irq_work);
327
328	cs35l56_irq(-1, &cs35l56->base);
329
330	/* unmask interrupts */
331	if (!cs35l56->sdw_irq_no_unmask)
332		sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1,
333				CS35L56_SDW_INT_MASK_CODEC_IRQ);
334
335	pm_runtime_put_autosuspend(cs35l56->base.dev);
336}
337
338static int cs35l56_sdw_read_prop(struct sdw_slave *peripheral)
339{
340	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
341	struct sdw_slave_prop *prop = &peripheral->prop;
342	struct sdw_dpn_prop *ports;
343
344	ports = devm_kcalloc(cs35l56->base.dev, 2, sizeof(*ports), GFP_KERNEL);
345	if (!ports)
346		return -ENOMEM;
347
348	prop->source_ports = BIT(CS35L56_SDW1_CAPTURE_PORT);
349	prop->sink_ports = BIT(CS35L56_SDW1_PLAYBACK_PORT);
350	prop->paging_support = true;
351	prop->quirks = SDW_SLAVE_QUIRKS_INVALID_INITIAL_PARITY;
352	prop->scp_int1_mask = SDW_SCP_INT1_BUS_CLASH | SDW_SCP_INT1_PARITY | SDW_SCP_INT1_IMPL_DEF;
353
354	/* DP1 - playback */
355	ports[0].num = CS35L56_SDW1_PLAYBACK_PORT;
356	ports[0].type = SDW_DPN_FULL;
357	ports[0].ch_prep_timeout = 10;
358	prop->sink_dpn_prop = &ports[0];
359
360	/* DP3 - capture */
361	ports[1].num = CS35L56_SDW1_CAPTURE_PORT;
362	ports[1].type = SDW_DPN_FULL;
363	ports[1].ch_prep_timeout = 10;
364	prop->src_dpn_prop = &ports[1];
365
366	return 0;
367}
368
369static int cs35l56_sdw_update_status(struct sdw_slave *peripheral,
370				     enum sdw_slave_status status)
371{
372	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
373
374	switch (status) {
375	case SDW_SLAVE_ATTACHED:
376		dev_dbg(cs35l56->base.dev, "%s: ATTACHED\n", __func__);
377		if (cs35l56->sdw_attached)
378			break;
379
380		if (!cs35l56->base.init_done || cs35l56->soft_resetting)
381			cs35l56_sdw_init(peripheral);
382
383		cs35l56->sdw_attached = true;
384		break;
385	case SDW_SLAVE_UNATTACHED:
386		dev_dbg(cs35l56->base.dev, "%s: UNATTACHED\n", __func__);
387		cs35l56->sdw_attached = false;
388		break;
389	default:
390		break;
391	}
392
393	return 0;
394}
395
396static int __maybe_unused cs35l56_sdw_clk_stop(struct sdw_slave *peripheral,
397					       enum sdw_clk_stop_mode mode,
398					       enum sdw_clk_stop_type type)
399{
400	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
401
402	dev_dbg(cs35l56->base.dev, "%s: mode:%d type:%d\n", __func__, mode, type);
403
404	return 0;
405}
406
407static const struct sdw_slave_ops cs35l56_sdw_ops = {
408	.read_prop = cs35l56_sdw_read_prop,
409	.interrupt_callback = cs35l56_sdw_interrupt,
410	.update_status = cs35l56_sdw_update_status,
411#ifdef DEBUG
412	.clk_stop = cs35l56_sdw_clk_stop,
413#endif
414};
415
416static int __maybe_unused cs35l56_sdw_handle_unattach(struct cs35l56_private *cs35l56)
417{
418	struct sdw_slave *peripheral = cs35l56->sdw_peripheral;
419
420	if (peripheral->unattach_request) {
421		/* Cannot access registers until bus is re-initialized. */
422		dev_dbg(cs35l56->base.dev, "Wait for initialization_complete\n");
423		if (!wait_for_completion_timeout(&peripheral->initialization_complete,
424						 msecs_to_jiffies(5000))) {
425			dev_err(cs35l56->base.dev, "initialization_complete timed out\n");
426			return -ETIMEDOUT;
427		}
428
429		peripheral->unattach_request = 0;
430
431		/*
432		 * Don't call regcache_mark_dirty(), we can't be sure that the
433		 * Manager really did issue a Bus Reset.
434		 */
435	}
436
437	return 0;
438}
439
440static int __maybe_unused cs35l56_sdw_runtime_suspend(struct device *dev)
441{
442	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
443
444	if (!cs35l56->base.init_done)
445		return 0;
446
447	return cs35l56_runtime_suspend_common(&cs35l56->base);
448}
449
450static int __maybe_unused cs35l56_sdw_runtime_resume(struct device *dev)
451{
452	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
453	int ret;
454
455	dev_dbg(dev, "Runtime resume\n");
456
457	if (!cs35l56->base.init_done)
458		return 0;
459
460	ret = cs35l56_sdw_handle_unattach(cs35l56);
461	if (ret < 0)
462		return ret;
463
464	ret = cs35l56_runtime_resume_common(&cs35l56->base, true);
465	if (ret)
466		return ret;
467
468	/* Re-enable SoundWire interrupts */
469	sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1,
470			CS35L56_SDW_INT_MASK_CODEC_IRQ);
471
472	return 0;
473}
474
475static int __maybe_unused cs35l56_sdw_system_suspend(struct device *dev)
476{
477	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
478
479	if (!cs35l56->base.init_done)
480		return 0;
481
482	/*
483	 * Disable SoundWire interrupts.
484	 * Flush - don't cancel because that could leave an unbalanced pm_runtime_get.
485	 */
486	cs35l56->sdw_irq_no_unmask = true;
487	flush_work(&cs35l56->sdw_irq_work);
488
489	/* Mask interrupts and flush in case sdw_irq_work was queued again */
490	sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
491	sdw_read_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1);
492	sdw_write_no_pm(cs35l56->sdw_peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
493	flush_work(&cs35l56->sdw_irq_work);
494
495	return cs35l56_system_suspend(dev);
496}
497
498static int __maybe_unused cs35l56_sdw_system_resume(struct device *dev)
499{
500	struct cs35l56_private *cs35l56 = dev_get_drvdata(dev);
501
502	cs35l56->sdw_irq_no_unmask = false;
503	/* runtime_resume re-enables the interrupt */
504
505	return cs35l56_system_resume(dev);
506}
507
508static int cs35l56_sdw_probe(struct sdw_slave *peripheral, const struct sdw_device_id *id)
509{
510	struct device *dev = &peripheral->dev;
511	struct cs35l56_private *cs35l56;
512	int ret;
513
514	cs35l56 = devm_kzalloc(dev, sizeof(*cs35l56), GFP_KERNEL);
515	if (!cs35l56)
516		return -ENOMEM;
517
518	cs35l56->base.dev = dev;
519	cs35l56->sdw_peripheral = peripheral;
520	INIT_WORK(&cs35l56->sdw_irq_work, cs35l56_sdw_irq_work);
521
522	dev_set_drvdata(dev, cs35l56);
523
524	cs35l56->base.regmap = devm_regmap_init(dev, &cs35l56_regmap_bus_sdw,
525					   peripheral, &cs35l56_regmap_sdw);
526	if (IS_ERR(cs35l56->base.regmap)) {
527		ret = PTR_ERR(cs35l56->base.regmap);
528		return dev_err_probe(dev, ret, "Failed to allocate register map\n");
529	}
530
531	/* Start in cache-only until device is enumerated */
532	regcache_cache_only(cs35l56->base.regmap, true);
533
534	ret = cs35l56_common_probe(cs35l56);
535	if (ret != 0)
536		return ret;
537
538	return 0;
539}
540
541static int cs35l56_sdw_remove(struct sdw_slave *peripheral)
542{
543	struct cs35l56_private *cs35l56 = dev_get_drvdata(&peripheral->dev);
544
545	/* Disable SoundWire interrupts */
546	cs35l56->sdw_irq_no_unmask = true;
547	cancel_work_sync(&cs35l56->sdw_irq_work);
548	sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_MASK_1, 0);
549	sdw_read_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1);
550	sdw_write_no_pm(peripheral, CS35L56_SDW_GEN_INT_STAT_1, 0xFF);
551
552	cs35l56_remove(cs35l56);
553
554	return 0;
555}
556
557static const struct dev_pm_ops cs35l56_sdw_pm = {
558	SET_RUNTIME_PM_OPS(cs35l56_sdw_runtime_suspend, cs35l56_sdw_runtime_resume, NULL)
559	SYSTEM_SLEEP_PM_OPS(cs35l56_sdw_system_suspend, cs35l56_sdw_system_resume)
560	LATE_SYSTEM_SLEEP_PM_OPS(cs35l56_system_suspend_late, cs35l56_system_resume_early)
561	/* NOIRQ stage not needed, SoundWire doesn't use a hard IRQ */
562};
563
564static const struct sdw_device_id cs35l56_sdw_id[] = {
565	SDW_SLAVE_ENTRY(0x01FA, 0x3556, 0),
566	SDW_SLAVE_ENTRY(0x01FA, 0x3557, 0),
567	{},
568};
569MODULE_DEVICE_TABLE(sdw, cs35l56_sdw_id);
570
571static struct sdw_driver cs35l56_sdw_driver = {
572	.driver = {
573		.name = "cs35l56",
574		.pm = pm_ptr(&cs35l56_sdw_pm),
575	},
576	.probe = cs35l56_sdw_probe,
577	.remove = cs35l56_sdw_remove,
578	.ops = &cs35l56_sdw_ops,
579	.id_table = cs35l56_sdw_id,
580};
581
582module_sdw_driver(cs35l56_sdw_driver);
583
584MODULE_DESCRIPTION("ASoC CS35L56 SoundWire driver");
585MODULE_IMPORT_NS("SND_SOC_CS35L56_CORE");
586MODULE_IMPORT_NS("SND_SOC_CS35L56_SHARED");
587MODULE_AUTHOR("Richard Fitzgerald <rf@opensource.cirrus.com>");
588MODULE_AUTHOR("Simon Trimmer <simont@opensource.cirrus.com>");
589MODULE_LICENSE("GPL");