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1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Based on drivers/serial/8250.c by Russell King.
4 *
5 * Author: Nicolas Pitre
6 * Created: Feb 20, 2003
7 * Copyright: (C) 2003 Monta Vista Software, Inc.
8 *
9 * Note 1: This driver is made separate from the already too overloaded
10 * 8250.c because it needs some kirks of its own and that'll make it
11 * easier to add DMA support.
12 *
13 * Note 2: I'm too sick of device allocation policies for serial ports.
14 * If someone else wants to request an "official" allocation of major/minor
15 * for this driver please be my guest. And don't forget that new hardware
16 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
17 * hope for a better port registration and dynamic device allocation scheme
18 * with the serial core maintainer satisfaction to appear soon.
19 */
20
21
22#include <linux/ioport.h>
23#include <linux/init.h>
24#include <linux/console.h>
25#include <linux/sysrq.h>
26#include <linux/serial.h>
27#include <linux/serial_reg.h>
28#include <linux/circ_buf.h>
29#include <linux/delay.h>
30#include <linux/interrupt.h>
31#include <linux/of.h>
32#include <linux/platform_device.h>
33#include <linux/tty.h>
34#include <linux/tty_flip.h>
35#include <linux/serial_core.h>
36#include <linux/clk.h>
37#include <linux/io.h>
38#include <linux/slab.h>
39
40#define PXA_NAME_LEN 8
41
42struct uart_pxa_port {
43 struct uart_port port;
44 unsigned char ier;
45 unsigned char lcr;
46 unsigned char mcr;
47 unsigned int lsr_break_flag;
48 struct clk *clk;
49 char name[PXA_NAME_LEN];
50};
51
52static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
53{
54 offset <<= 2;
55 return readl(up->port.membase + offset);
56}
57
58static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
59{
60 offset <<= 2;
61 writel(value, up->port.membase + offset);
62}
63
64static void serial_pxa_enable_ms(struct uart_port *port)
65{
66 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
67
68 up->ier |= UART_IER_MSI;
69 serial_out(up, UART_IER, up->ier);
70}
71
72static void serial_pxa_stop_tx(struct uart_port *port)
73{
74 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
75
76 if (up->ier & UART_IER_THRI) {
77 up->ier &= ~UART_IER_THRI;
78 serial_out(up, UART_IER, up->ier);
79 }
80}
81
82static void serial_pxa_stop_rx(struct uart_port *port)
83{
84 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
85
86 up->ier &= ~UART_IER_RLSI;
87 up->port.read_status_mask &= ~UART_LSR_DR;
88 serial_out(up, UART_IER, up->ier);
89}
90
91static inline void receive_chars(struct uart_pxa_port *up, int *status)
92{
93 u8 ch, flag;
94 int max_count = 256;
95
96 do {
97 /* work around Errata #20 according to
98 * Intel(R) PXA27x Processor Family
99 * Specification Update (May 2005)
100 *
101 * Step 2
102 * Disable the Reciever Time Out Interrupt via IER[RTOEI]
103 */
104 up->ier &= ~UART_IER_RTOIE;
105 serial_out(up, UART_IER, up->ier);
106
107 ch = serial_in(up, UART_RX);
108 flag = TTY_NORMAL;
109 up->port.icount.rx++;
110
111 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
112 UART_LSR_FE | UART_LSR_OE))) {
113 /*
114 * For statistics only
115 */
116 if (*status & UART_LSR_BI) {
117 *status &= ~(UART_LSR_FE | UART_LSR_PE);
118 up->port.icount.brk++;
119 /*
120 * We do the SysRQ and SAK checking
121 * here because otherwise the break
122 * may get masked by ignore_status_mask
123 * or read_status_mask.
124 */
125 if (uart_handle_break(&up->port))
126 goto ignore_char;
127 } else if (*status & UART_LSR_PE)
128 up->port.icount.parity++;
129 else if (*status & UART_LSR_FE)
130 up->port.icount.frame++;
131 if (*status & UART_LSR_OE)
132 up->port.icount.overrun++;
133
134 /*
135 * Mask off conditions which should be ignored.
136 */
137 *status &= up->port.read_status_mask;
138
139#ifdef CONFIG_SERIAL_PXA_CONSOLE
140 if (up->port.line == up->port.cons->index) {
141 /* Recover the break flag from console xmit */
142 *status |= up->lsr_break_flag;
143 up->lsr_break_flag = 0;
144 }
145#endif
146 if (*status & UART_LSR_BI) {
147 flag = TTY_BREAK;
148 } else if (*status & UART_LSR_PE)
149 flag = TTY_PARITY;
150 else if (*status & UART_LSR_FE)
151 flag = TTY_FRAME;
152 }
153
154 if (uart_prepare_sysrq_char(&up->port, ch))
155 goto ignore_char;
156
157 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
158
159 ignore_char:
160 *status = serial_in(up, UART_LSR);
161 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
162 tty_flip_buffer_push(&up->port.state->port);
163
164 /* work around Errata #20 according to
165 * Intel(R) PXA27x Processor Family
166 * Specification Update (May 2005)
167 *
168 * Step 6:
169 * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE]
170 */
171 up->ier |= UART_IER_RTOIE;
172 serial_out(up, UART_IER, up->ier);
173}
174
175static void transmit_chars(struct uart_pxa_port *up)
176{
177 u8 ch;
178
179 uart_port_tx_limited(&up->port, ch, up->port.fifosize / 2,
180 true,
181 serial_out(up, UART_TX, ch),
182 ({}));
183}
184
185static void serial_pxa_start_tx(struct uart_port *port)
186{
187 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
188
189 if (!(up->ier & UART_IER_THRI)) {
190 up->ier |= UART_IER_THRI;
191 serial_out(up, UART_IER, up->ier);
192 }
193}
194
195/* should hold up->port.lock */
196static inline void check_modem_status(struct uart_pxa_port *up)
197{
198 int status;
199
200 status = serial_in(up, UART_MSR);
201
202 if ((status & UART_MSR_ANY_DELTA) == 0)
203 return;
204
205 if (status & UART_MSR_TERI)
206 up->port.icount.rng++;
207 if (status & UART_MSR_DDSR)
208 up->port.icount.dsr++;
209 if (status & UART_MSR_DDCD)
210 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
211 if (status & UART_MSR_DCTS)
212 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
213
214 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
215}
216
217/*
218 * This handles the interrupt from one port.
219 */
220static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
221{
222 struct uart_pxa_port *up = dev_id;
223 unsigned int iir, lsr;
224
225 iir = serial_in(up, UART_IIR);
226 if (iir & UART_IIR_NO_INT)
227 return IRQ_NONE;
228 uart_port_lock(&up->port);
229 lsr = serial_in(up, UART_LSR);
230 if (lsr & UART_LSR_DR)
231 receive_chars(up, &lsr);
232 check_modem_status(up);
233 if (lsr & UART_LSR_THRE)
234 transmit_chars(up);
235 uart_unlock_and_check_sysrq(&up->port);
236 return IRQ_HANDLED;
237}
238
239static unsigned int serial_pxa_tx_empty(struct uart_port *port)
240{
241 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
242 unsigned long flags;
243 unsigned int ret;
244
245 uart_port_lock_irqsave(&up->port, &flags);
246 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
247 uart_port_unlock_irqrestore(&up->port, flags);
248
249 return ret;
250}
251
252static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
253{
254 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
255 unsigned char status;
256 unsigned int ret;
257
258 status = serial_in(up, UART_MSR);
259
260 ret = 0;
261 if (status & UART_MSR_DCD)
262 ret |= TIOCM_CAR;
263 if (status & UART_MSR_RI)
264 ret |= TIOCM_RNG;
265 if (status & UART_MSR_DSR)
266 ret |= TIOCM_DSR;
267 if (status & UART_MSR_CTS)
268 ret |= TIOCM_CTS;
269 return ret;
270}
271
272static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
273{
274 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
275 unsigned char mcr = 0;
276
277 if (mctrl & TIOCM_RTS)
278 mcr |= UART_MCR_RTS;
279 if (mctrl & TIOCM_DTR)
280 mcr |= UART_MCR_DTR;
281 if (mctrl & TIOCM_OUT1)
282 mcr |= UART_MCR_OUT1;
283 if (mctrl & TIOCM_OUT2)
284 mcr |= UART_MCR_OUT2;
285 if (mctrl & TIOCM_LOOP)
286 mcr |= UART_MCR_LOOP;
287
288 mcr |= up->mcr;
289
290 serial_out(up, UART_MCR, mcr);
291}
292
293static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
294{
295 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
296 unsigned long flags;
297
298 uart_port_lock_irqsave(&up->port, &flags);
299 if (break_state == -1)
300 up->lcr |= UART_LCR_SBC;
301 else
302 up->lcr &= ~UART_LCR_SBC;
303 serial_out(up, UART_LCR, up->lcr);
304 uart_port_unlock_irqrestore(&up->port, flags);
305}
306
307static int serial_pxa_startup(struct uart_port *port)
308{
309 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
310 unsigned long flags;
311 int retval;
312
313 if (port->line == 3) /* HWUART */
314 up->mcr |= UART_MCR_AFE;
315 else
316 up->mcr = 0;
317
318 up->port.uartclk = clk_get_rate(up->clk);
319
320 /*
321 * Allocate the IRQ
322 */
323 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
324 if (retval)
325 return retval;
326
327 /*
328 * Clear the FIFO buffers and disable them.
329 * (they will be reenabled in set_termios())
330 */
331 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
332 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
333 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
334 serial_out(up, UART_FCR, 0);
335
336 /*
337 * Clear the interrupt registers.
338 */
339 (void) serial_in(up, UART_LSR);
340 (void) serial_in(up, UART_RX);
341 (void) serial_in(up, UART_IIR);
342 (void) serial_in(up, UART_MSR);
343
344 /*
345 * Now, initialize the UART
346 */
347 serial_out(up, UART_LCR, UART_LCR_WLEN8);
348
349 uart_port_lock_irqsave(&up->port, &flags);
350 up->port.mctrl |= TIOCM_OUT2;
351 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
352 uart_port_unlock_irqrestore(&up->port, flags);
353
354 /*
355 * Finally, enable interrupts. Note: Modem status interrupts
356 * are set via set_termios(), which will be occurring imminently
357 * anyway, so we don't enable them here.
358 */
359 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
360 serial_out(up, UART_IER, up->ier);
361
362 /*
363 * And clear the interrupt registers again for luck.
364 */
365 (void) serial_in(up, UART_LSR);
366 (void) serial_in(up, UART_RX);
367 (void) serial_in(up, UART_IIR);
368 (void) serial_in(up, UART_MSR);
369
370 return 0;
371}
372
373static void serial_pxa_shutdown(struct uart_port *port)
374{
375 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
376 unsigned long flags;
377
378 free_irq(up->port.irq, up);
379
380 /*
381 * Disable interrupts from this port
382 */
383 up->ier = 0;
384 serial_out(up, UART_IER, 0);
385
386 uart_port_lock_irqsave(&up->port, &flags);
387 up->port.mctrl &= ~TIOCM_OUT2;
388 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
389 uart_port_unlock_irqrestore(&up->port, flags);
390
391 /*
392 * Disable break condition and FIFOs
393 */
394 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
395 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
396 UART_FCR_CLEAR_RCVR |
397 UART_FCR_CLEAR_XMIT);
398 serial_out(up, UART_FCR, 0);
399}
400
401static void
402serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
403 const struct ktermios *old)
404{
405 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
406 unsigned char cval, fcr = 0;
407 unsigned long flags;
408 unsigned int baud, quot;
409 unsigned int dll;
410
411 cval = UART_LCR_WLEN(tty_get_char_size(termios->c_cflag));
412
413 if (termios->c_cflag & CSTOPB)
414 cval |= UART_LCR_STOP;
415 if (termios->c_cflag & PARENB)
416 cval |= UART_LCR_PARITY;
417 if (!(termios->c_cflag & PARODD))
418 cval |= UART_LCR_EPAR;
419
420 /*
421 * Ask the core to calculate the divisor for us.
422 */
423 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
424 quot = uart_get_divisor(port, baud);
425
426 if ((up->port.uartclk / quot) < (2400 * 16))
427 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
428 else if ((up->port.uartclk / quot) < (230400 * 16))
429 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
430 else
431 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
432
433 /*
434 * Ok, we're now changing the port state. Do it with
435 * interrupts disabled.
436 */
437 uart_port_lock_irqsave(&up->port, &flags);
438
439 /*
440 * Ensure the port will be enabled.
441 * This is required especially for serial console.
442 */
443 up->ier |= UART_IER_UUE;
444
445 /*
446 * Update the per-port timeout.
447 */
448 uart_update_timeout(port, termios->c_cflag, baud);
449
450 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
451 if (termios->c_iflag & INPCK)
452 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
453 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
454 up->port.read_status_mask |= UART_LSR_BI;
455
456 /*
457 * Characters to ignore
458 */
459 up->port.ignore_status_mask = 0;
460 if (termios->c_iflag & IGNPAR)
461 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
462 if (termios->c_iflag & IGNBRK) {
463 up->port.ignore_status_mask |= UART_LSR_BI;
464 /*
465 * If we're ignoring parity and break indicators,
466 * ignore overruns too (for real raw support).
467 */
468 if (termios->c_iflag & IGNPAR)
469 up->port.ignore_status_mask |= UART_LSR_OE;
470 }
471
472 /*
473 * ignore all characters if CREAD is not set
474 */
475 if ((termios->c_cflag & CREAD) == 0)
476 up->port.ignore_status_mask |= UART_LSR_DR;
477
478 /*
479 * CTS flow control flag and modem status interrupts
480 */
481 up->ier &= ~UART_IER_MSI;
482 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
483 up->ier |= UART_IER_MSI;
484
485 serial_out(up, UART_IER, up->ier);
486
487 if (termios->c_cflag & CRTSCTS)
488 up->mcr |= UART_MCR_AFE;
489 else
490 up->mcr &= ~UART_MCR_AFE;
491
492 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
493 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
494
495 /*
496 * work around Errata #75 according to Intel(R) PXA27x Processor Family
497 * Specification Update (Nov 2005)
498 */
499 dll = serial_in(up, UART_DLL);
500 WARN_ON(dll != (quot & 0xff));
501
502 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
503 serial_out(up, UART_LCR, cval); /* reset DLAB */
504 up->lcr = cval; /* Save LCR */
505 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
506 serial_out(up, UART_FCR, fcr);
507 uart_port_unlock_irqrestore(&up->port, flags);
508}
509
510static void
511serial_pxa_pm(struct uart_port *port, unsigned int state,
512 unsigned int oldstate)
513{
514 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
515
516 if (!state)
517 clk_prepare_enable(up->clk);
518 else
519 clk_disable_unprepare(up->clk);
520}
521
522static void serial_pxa_release_port(struct uart_port *port)
523{
524}
525
526static int serial_pxa_request_port(struct uart_port *port)
527{
528 return 0;
529}
530
531static void serial_pxa_config_port(struct uart_port *port, int flags)
532{
533 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
534 up->port.type = PORT_PXA;
535}
536
537static int
538serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
539{
540 /* we don't want the core code to modify any port params */
541 return -EINVAL;
542}
543
544static const char *
545serial_pxa_type(struct uart_port *port)
546{
547 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
548 return up->name;
549}
550
551static struct uart_pxa_port *serial_pxa_ports[4];
552static struct uart_driver serial_pxa_reg;
553
554#ifdef CONFIG_SERIAL_PXA_CONSOLE
555
556/*
557 * Wait for transmitter & holding register to empty
558 */
559static void wait_for_xmitr(struct uart_pxa_port *up)
560{
561 unsigned int status, tmout = 10000;
562
563 /* Wait up to 10ms for the character(s) to be sent. */
564 do {
565 status = serial_in(up, UART_LSR);
566
567 if (status & UART_LSR_BI)
568 up->lsr_break_flag = UART_LSR_BI;
569
570 if (--tmout == 0)
571 break;
572 udelay(1);
573 } while (!uart_lsr_tx_empty(status));
574
575 /* Wait up to 1s for flow control if necessary */
576 if (up->port.flags & UPF_CONS_FLOW) {
577 tmout = 1000000;
578 while (--tmout &&
579 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
580 udelay(1);
581 }
582}
583
584static void serial_pxa_console_putchar(struct uart_port *port, unsigned char ch)
585{
586 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
587
588 wait_for_xmitr(up);
589 serial_out(up, UART_TX, ch);
590}
591
592/*
593 * Print a string to the serial port trying not to disturb
594 * any possible real use of the port...
595 *
596 * The console_lock must be held when we get here.
597 */
598static void
599serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
600{
601 struct uart_pxa_port *up = serial_pxa_ports[co->index];
602 unsigned int ier;
603 unsigned long flags;
604 int locked = 1;
605
606 clk_enable(up->clk);
607 if (oops_in_progress)
608 locked = uart_port_trylock_irqsave(&up->port, &flags);
609 else
610 uart_port_lock_irqsave(&up->port, &flags);
611
612 /*
613 * First save the IER then disable the interrupts
614 */
615 ier = serial_in(up, UART_IER);
616 serial_out(up, UART_IER, UART_IER_UUE);
617
618 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
619
620 /*
621 * Finally, wait for transmitter to become empty
622 * and restore the IER
623 */
624 wait_for_xmitr(up);
625 serial_out(up, UART_IER, ier);
626
627 if (locked)
628 uart_port_unlock_irqrestore(&up->port, flags);
629 clk_disable(up->clk);
630}
631
632#ifdef CONFIG_CONSOLE_POLL
633/*
634 * Console polling routines for writing and reading from the uart while
635 * in an interrupt or debug context.
636 */
637
638static int serial_pxa_get_poll_char(struct uart_port *port)
639{
640 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
641 unsigned char lsr = serial_in(up, UART_LSR);
642
643 while (!(lsr & UART_LSR_DR))
644 lsr = serial_in(up, UART_LSR);
645
646 return serial_in(up, UART_RX);
647}
648
649
650static void serial_pxa_put_poll_char(struct uart_port *port,
651 unsigned char c)
652{
653 unsigned int ier;
654 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
655
656 /*
657 * First save the IER then disable the interrupts
658 */
659 ier = serial_in(up, UART_IER);
660 serial_out(up, UART_IER, UART_IER_UUE);
661
662 wait_for_xmitr(up);
663 /*
664 * Send the character out.
665 */
666 serial_out(up, UART_TX, c);
667
668 /*
669 * Finally, wait for transmitter to become empty
670 * and restore the IER
671 */
672 wait_for_xmitr(up);
673 serial_out(up, UART_IER, ier);
674}
675
676#endif /* CONFIG_CONSOLE_POLL */
677
678static int __init
679serial_pxa_console_setup(struct console *co, char *options)
680{
681 struct uart_pxa_port *up;
682 int baud = 9600;
683 int bits = 8;
684 int parity = 'n';
685 int flow = 'n';
686
687 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
688 co->index = 0;
689 up = serial_pxa_ports[co->index];
690 if (!up)
691 return -ENODEV;
692
693 if (options)
694 uart_parse_options(options, &baud, &parity, &bits, &flow);
695
696 return uart_set_options(&up->port, co, baud, parity, bits, flow);
697}
698
699static struct console serial_pxa_console = {
700 .name = "ttyS",
701 .write = serial_pxa_console_write,
702 .device = uart_console_device,
703 .setup = serial_pxa_console_setup,
704 .flags = CON_PRINTBUFFER,
705 .index = -1,
706 .data = &serial_pxa_reg,
707};
708
709#define PXA_CONSOLE &serial_pxa_console
710#else
711#define PXA_CONSOLE NULL
712#endif
713
714static const struct uart_ops serial_pxa_pops = {
715 .tx_empty = serial_pxa_tx_empty,
716 .set_mctrl = serial_pxa_set_mctrl,
717 .get_mctrl = serial_pxa_get_mctrl,
718 .stop_tx = serial_pxa_stop_tx,
719 .start_tx = serial_pxa_start_tx,
720 .stop_rx = serial_pxa_stop_rx,
721 .enable_ms = serial_pxa_enable_ms,
722 .break_ctl = serial_pxa_break_ctl,
723 .startup = serial_pxa_startup,
724 .shutdown = serial_pxa_shutdown,
725 .set_termios = serial_pxa_set_termios,
726 .pm = serial_pxa_pm,
727 .type = serial_pxa_type,
728 .release_port = serial_pxa_release_port,
729 .request_port = serial_pxa_request_port,
730 .config_port = serial_pxa_config_port,
731 .verify_port = serial_pxa_verify_port,
732#if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_PXA_CONSOLE)
733 .poll_get_char = serial_pxa_get_poll_char,
734 .poll_put_char = serial_pxa_put_poll_char,
735#endif
736};
737
738static struct uart_driver serial_pxa_reg = {
739 .owner = THIS_MODULE,
740 .driver_name = "PXA serial",
741 .dev_name = "ttyS",
742 .major = TTY_MAJOR,
743 .minor = 64,
744 .nr = 4,
745 .cons = PXA_CONSOLE,
746};
747
748#ifdef CONFIG_PM
749static int serial_pxa_suspend(struct device *dev)
750{
751 struct uart_pxa_port *sport = dev_get_drvdata(dev);
752
753 if (sport)
754 uart_suspend_port(&serial_pxa_reg, &sport->port);
755
756 return 0;
757}
758
759static int serial_pxa_resume(struct device *dev)
760{
761 struct uart_pxa_port *sport = dev_get_drvdata(dev);
762
763 if (sport)
764 uart_resume_port(&serial_pxa_reg, &sport->port);
765
766 return 0;
767}
768
769static const struct dev_pm_ops serial_pxa_pm_ops = {
770 .suspend = serial_pxa_suspend,
771 .resume = serial_pxa_resume,
772};
773#endif
774
775static const struct of_device_id serial_pxa_dt_ids[] = {
776 { .compatible = "mrvl,pxa-uart", },
777 { .compatible = "mrvl,mmp-uart", },
778 {}
779};
780
781static int serial_pxa_probe_dt(struct platform_device *pdev,
782 struct uart_pxa_port *sport)
783{
784 struct device_node *np = pdev->dev.of_node;
785 int ret;
786
787 if (!np)
788 return 1;
789
790 ret = of_alias_get_id(np, "serial");
791 if (ret < 0) {
792 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
793 return ret;
794 }
795 sport->port.line = ret;
796 return 0;
797}
798
799static int serial_pxa_probe(struct platform_device *dev)
800{
801 struct uart_pxa_port *sport;
802 struct resource *mmres;
803 int ret;
804 int irq;
805
806 mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
807 if (!mmres)
808 return -ENODEV;
809
810 irq = platform_get_irq(dev, 0);
811 if (irq < 0)
812 return irq;
813
814 sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
815 if (!sport)
816 return -ENOMEM;
817
818 sport->clk = clk_get(&dev->dev, NULL);
819 if (IS_ERR(sport->clk)) {
820 ret = PTR_ERR(sport->clk);
821 goto err_free;
822 }
823
824 ret = clk_prepare(sport->clk);
825 if (ret) {
826 clk_put(sport->clk);
827 goto err_free;
828 }
829
830 sport->port.type = PORT_PXA;
831 sport->port.iotype = UPIO_MEM;
832 sport->port.mapbase = mmres->start;
833 sport->port.irq = irq;
834 sport->port.fifosize = 64;
835 sport->port.ops = &serial_pxa_pops;
836 sport->port.dev = &dev->dev;
837 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
838 sport->port.uartclk = clk_get_rate(sport->clk);
839 sport->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_PXA_CONSOLE);
840
841 ret = serial_pxa_probe_dt(dev, sport);
842 if (ret > 0)
843 sport->port.line = dev->id;
844 else if (ret < 0)
845 goto err_clk;
846 if (sport->port.line >= ARRAY_SIZE(serial_pxa_ports)) {
847 dev_err(&dev->dev, "serial%d out of range\n", sport->port.line);
848 ret = -EINVAL;
849 goto err_clk;
850 }
851 snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
852
853 sport->port.membase = ioremap(mmres->start, resource_size(mmres));
854 if (!sport->port.membase) {
855 ret = -ENOMEM;
856 goto err_clk;
857 }
858
859 serial_pxa_ports[sport->port.line] = sport;
860
861 uart_add_one_port(&serial_pxa_reg, &sport->port);
862 platform_set_drvdata(dev, sport);
863
864 return 0;
865
866 err_clk:
867 clk_unprepare(sport->clk);
868 clk_put(sport->clk);
869 err_free:
870 kfree(sport);
871 return ret;
872}
873
874static struct platform_driver serial_pxa_driver = {
875 .probe = serial_pxa_probe,
876
877 .driver = {
878 .name = "pxa2xx-uart",
879#ifdef CONFIG_PM
880 .pm = &serial_pxa_pm_ops,
881#endif
882 .suppress_bind_attrs = true,
883 .of_match_table = serial_pxa_dt_ids,
884 },
885};
886
887
888/* 8250 driver for PXA serial ports should be used */
889static int __init serial_pxa_init(void)
890{
891 int ret;
892
893 ret = uart_register_driver(&serial_pxa_reg);
894 if (ret != 0)
895 return ret;
896
897 ret = platform_driver_register(&serial_pxa_driver);
898 if (ret != 0)
899 uart_unregister_driver(&serial_pxa_reg);
900
901 return ret;
902}
903device_initcall(serial_pxa_init);
1/*
2 * Based on drivers/serial/8250.c by Russell King.
3 *
4 * Author: Nicolas Pitre
5 * Created: Feb 20, 2003
6 * Copyright: (C) 2003 Monta Vista Software, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * Note 1: This driver is made separate from the already too overloaded
14 * 8250.c because it needs some kirks of its own and that'll make it
15 * easier to add DMA support.
16 *
17 * Note 2: I'm too sick of device allocation policies for serial ports.
18 * If someone else wants to request an "official" allocation of major/minor
19 * for this driver please be my guest. And don't forget that new hardware
20 * to come from Intel might have more than 3 or 4 of those UARTs. Let's
21 * hope for a better port registration and dynamic device allocation scheme
22 * with the serial core maintainer satisfaction to appear soon.
23 */
24
25
26#if defined(CONFIG_SERIAL_PXA_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
27#define SUPPORT_SYSRQ
28#endif
29
30#include <linux/ioport.h>
31#include <linux/init.h>
32#include <linux/console.h>
33#include <linux/sysrq.h>
34#include <linux/serial_reg.h>
35#include <linux/circ_buf.h>
36#include <linux/delay.h>
37#include <linux/interrupt.h>
38#include <linux/of.h>
39#include <linux/platform_device.h>
40#include <linux/tty.h>
41#include <linux/tty_flip.h>
42#include <linux/serial_core.h>
43#include <linux/clk.h>
44#include <linux/io.h>
45#include <linux/slab.h>
46
47#define PXA_NAME_LEN 8
48
49struct uart_pxa_port {
50 struct uart_port port;
51 unsigned char ier;
52 unsigned char lcr;
53 unsigned char mcr;
54 unsigned int lsr_break_flag;
55 struct clk *clk;
56 char name[PXA_NAME_LEN];
57};
58
59static inline unsigned int serial_in(struct uart_pxa_port *up, int offset)
60{
61 offset <<= 2;
62 return readl(up->port.membase + offset);
63}
64
65static inline void serial_out(struct uart_pxa_port *up, int offset, int value)
66{
67 offset <<= 2;
68 writel(value, up->port.membase + offset);
69}
70
71static void serial_pxa_enable_ms(struct uart_port *port)
72{
73 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
74
75 up->ier |= UART_IER_MSI;
76 serial_out(up, UART_IER, up->ier);
77}
78
79static void serial_pxa_stop_tx(struct uart_port *port)
80{
81 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
82
83 if (up->ier & UART_IER_THRI) {
84 up->ier &= ~UART_IER_THRI;
85 serial_out(up, UART_IER, up->ier);
86 }
87}
88
89static void serial_pxa_stop_rx(struct uart_port *port)
90{
91 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
92
93 up->ier &= ~UART_IER_RLSI;
94 up->port.read_status_mask &= ~UART_LSR_DR;
95 serial_out(up, UART_IER, up->ier);
96}
97
98static inline void receive_chars(struct uart_pxa_port *up, int *status)
99{
100 unsigned int ch, flag;
101 int max_count = 256;
102
103 do {
104 /* work around Errata #20 according to
105 * Intel(R) PXA27x Processor Family
106 * Specification Update (May 2005)
107 *
108 * Step 2
109 * Disable the Reciever Time Out Interrupt via IER[RTOEI]
110 */
111 up->ier &= ~UART_IER_RTOIE;
112 serial_out(up, UART_IER, up->ier);
113
114 ch = serial_in(up, UART_RX);
115 flag = TTY_NORMAL;
116 up->port.icount.rx++;
117
118 if (unlikely(*status & (UART_LSR_BI | UART_LSR_PE |
119 UART_LSR_FE | UART_LSR_OE))) {
120 /*
121 * For statistics only
122 */
123 if (*status & UART_LSR_BI) {
124 *status &= ~(UART_LSR_FE | UART_LSR_PE);
125 up->port.icount.brk++;
126 /*
127 * We do the SysRQ and SAK checking
128 * here because otherwise the break
129 * may get masked by ignore_status_mask
130 * or read_status_mask.
131 */
132 if (uart_handle_break(&up->port))
133 goto ignore_char;
134 } else if (*status & UART_LSR_PE)
135 up->port.icount.parity++;
136 else if (*status & UART_LSR_FE)
137 up->port.icount.frame++;
138 if (*status & UART_LSR_OE)
139 up->port.icount.overrun++;
140
141 /*
142 * Mask off conditions which should be ignored.
143 */
144 *status &= up->port.read_status_mask;
145
146#ifdef CONFIG_SERIAL_PXA_CONSOLE
147 if (up->port.line == up->port.cons->index) {
148 /* Recover the break flag from console xmit */
149 *status |= up->lsr_break_flag;
150 up->lsr_break_flag = 0;
151 }
152#endif
153 if (*status & UART_LSR_BI) {
154 flag = TTY_BREAK;
155 } else if (*status & UART_LSR_PE)
156 flag = TTY_PARITY;
157 else if (*status & UART_LSR_FE)
158 flag = TTY_FRAME;
159 }
160
161 if (uart_handle_sysrq_char(&up->port, ch))
162 goto ignore_char;
163
164 uart_insert_char(&up->port, *status, UART_LSR_OE, ch, flag);
165
166 ignore_char:
167 *status = serial_in(up, UART_LSR);
168 } while ((*status & UART_LSR_DR) && (max_count-- > 0));
169 tty_flip_buffer_push(&up->port.state->port);
170
171 /* work around Errata #20 according to
172 * Intel(R) PXA27x Processor Family
173 * Specification Update (May 2005)
174 *
175 * Step 6:
176 * No more data in FIFO: Re-enable RTO interrupt via IER[RTOIE]
177 */
178 up->ier |= UART_IER_RTOIE;
179 serial_out(up, UART_IER, up->ier);
180}
181
182static void transmit_chars(struct uart_pxa_port *up)
183{
184 struct circ_buf *xmit = &up->port.state->xmit;
185 int count;
186
187 if (up->port.x_char) {
188 serial_out(up, UART_TX, up->port.x_char);
189 up->port.icount.tx++;
190 up->port.x_char = 0;
191 return;
192 }
193 if (uart_circ_empty(xmit) || uart_tx_stopped(&up->port)) {
194 serial_pxa_stop_tx(&up->port);
195 return;
196 }
197
198 count = up->port.fifosize / 2;
199 do {
200 serial_out(up, UART_TX, xmit->buf[xmit->tail]);
201 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
202 up->port.icount.tx++;
203 if (uart_circ_empty(xmit))
204 break;
205 } while (--count > 0);
206
207 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
208 uart_write_wakeup(&up->port);
209
210
211 if (uart_circ_empty(xmit))
212 serial_pxa_stop_tx(&up->port);
213}
214
215static void serial_pxa_start_tx(struct uart_port *port)
216{
217 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
218
219 if (!(up->ier & UART_IER_THRI)) {
220 up->ier |= UART_IER_THRI;
221 serial_out(up, UART_IER, up->ier);
222 }
223}
224
225/* should hold up->port.lock */
226static inline void check_modem_status(struct uart_pxa_port *up)
227{
228 int status;
229
230 status = serial_in(up, UART_MSR);
231
232 if ((status & UART_MSR_ANY_DELTA) == 0)
233 return;
234
235 if (status & UART_MSR_TERI)
236 up->port.icount.rng++;
237 if (status & UART_MSR_DDSR)
238 up->port.icount.dsr++;
239 if (status & UART_MSR_DDCD)
240 uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
241 if (status & UART_MSR_DCTS)
242 uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
243
244 wake_up_interruptible(&up->port.state->port.delta_msr_wait);
245}
246
247/*
248 * This handles the interrupt from one port.
249 */
250static inline irqreturn_t serial_pxa_irq(int irq, void *dev_id)
251{
252 struct uart_pxa_port *up = dev_id;
253 unsigned int iir, lsr;
254
255 iir = serial_in(up, UART_IIR);
256 if (iir & UART_IIR_NO_INT)
257 return IRQ_NONE;
258 spin_lock(&up->port.lock);
259 lsr = serial_in(up, UART_LSR);
260 if (lsr & UART_LSR_DR)
261 receive_chars(up, &lsr);
262 check_modem_status(up);
263 if (lsr & UART_LSR_THRE)
264 transmit_chars(up);
265 spin_unlock(&up->port.lock);
266 return IRQ_HANDLED;
267}
268
269static unsigned int serial_pxa_tx_empty(struct uart_port *port)
270{
271 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
272 unsigned long flags;
273 unsigned int ret;
274
275 spin_lock_irqsave(&up->port.lock, flags);
276 ret = serial_in(up, UART_LSR) & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
277 spin_unlock_irqrestore(&up->port.lock, flags);
278
279 return ret;
280}
281
282static unsigned int serial_pxa_get_mctrl(struct uart_port *port)
283{
284 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
285 unsigned char status;
286 unsigned int ret;
287
288 status = serial_in(up, UART_MSR);
289
290 ret = 0;
291 if (status & UART_MSR_DCD)
292 ret |= TIOCM_CAR;
293 if (status & UART_MSR_RI)
294 ret |= TIOCM_RNG;
295 if (status & UART_MSR_DSR)
296 ret |= TIOCM_DSR;
297 if (status & UART_MSR_CTS)
298 ret |= TIOCM_CTS;
299 return ret;
300}
301
302static void serial_pxa_set_mctrl(struct uart_port *port, unsigned int mctrl)
303{
304 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
305 unsigned char mcr = 0;
306
307 if (mctrl & TIOCM_RTS)
308 mcr |= UART_MCR_RTS;
309 if (mctrl & TIOCM_DTR)
310 mcr |= UART_MCR_DTR;
311 if (mctrl & TIOCM_OUT1)
312 mcr |= UART_MCR_OUT1;
313 if (mctrl & TIOCM_OUT2)
314 mcr |= UART_MCR_OUT2;
315 if (mctrl & TIOCM_LOOP)
316 mcr |= UART_MCR_LOOP;
317
318 mcr |= up->mcr;
319
320 serial_out(up, UART_MCR, mcr);
321}
322
323static void serial_pxa_break_ctl(struct uart_port *port, int break_state)
324{
325 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
326 unsigned long flags;
327
328 spin_lock_irqsave(&up->port.lock, flags);
329 if (break_state == -1)
330 up->lcr |= UART_LCR_SBC;
331 else
332 up->lcr &= ~UART_LCR_SBC;
333 serial_out(up, UART_LCR, up->lcr);
334 spin_unlock_irqrestore(&up->port.lock, flags);
335}
336
337static int serial_pxa_startup(struct uart_port *port)
338{
339 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
340 unsigned long flags;
341 int retval;
342
343 if (port->line == 3) /* HWUART */
344 up->mcr |= UART_MCR_AFE;
345 else
346 up->mcr = 0;
347
348 up->port.uartclk = clk_get_rate(up->clk);
349
350 /*
351 * Allocate the IRQ
352 */
353 retval = request_irq(up->port.irq, serial_pxa_irq, 0, up->name, up);
354 if (retval)
355 return retval;
356
357 /*
358 * Clear the FIFO buffers and disable them.
359 * (they will be reenabled in set_termios())
360 */
361 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO);
362 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
363 UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
364 serial_out(up, UART_FCR, 0);
365
366 /*
367 * Clear the interrupt registers.
368 */
369 (void) serial_in(up, UART_LSR);
370 (void) serial_in(up, UART_RX);
371 (void) serial_in(up, UART_IIR);
372 (void) serial_in(up, UART_MSR);
373
374 /*
375 * Now, initialize the UART
376 */
377 serial_out(up, UART_LCR, UART_LCR_WLEN8);
378
379 spin_lock_irqsave(&up->port.lock, flags);
380 up->port.mctrl |= TIOCM_OUT2;
381 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
382 spin_unlock_irqrestore(&up->port.lock, flags);
383
384 /*
385 * Finally, enable interrupts. Note: Modem status interrupts
386 * are set via set_termios(), which will be occurring imminently
387 * anyway, so we don't enable them here.
388 */
389 up->ier = UART_IER_RLSI | UART_IER_RDI | UART_IER_RTOIE | UART_IER_UUE;
390 serial_out(up, UART_IER, up->ier);
391
392 /*
393 * And clear the interrupt registers again for luck.
394 */
395 (void) serial_in(up, UART_LSR);
396 (void) serial_in(up, UART_RX);
397 (void) serial_in(up, UART_IIR);
398 (void) serial_in(up, UART_MSR);
399
400 return 0;
401}
402
403static void serial_pxa_shutdown(struct uart_port *port)
404{
405 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
406 unsigned long flags;
407
408 free_irq(up->port.irq, up);
409
410 /*
411 * Disable interrupts from this port
412 */
413 up->ier = 0;
414 serial_out(up, UART_IER, 0);
415
416 spin_lock_irqsave(&up->port.lock, flags);
417 up->port.mctrl &= ~TIOCM_OUT2;
418 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
419 spin_unlock_irqrestore(&up->port.lock, flags);
420
421 /*
422 * Disable break condition and FIFOs
423 */
424 serial_out(up, UART_LCR, serial_in(up, UART_LCR) & ~UART_LCR_SBC);
425 serial_out(up, UART_FCR, UART_FCR_ENABLE_FIFO |
426 UART_FCR_CLEAR_RCVR |
427 UART_FCR_CLEAR_XMIT);
428 serial_out(up, UART_FCR, 0);
429}
430
431static void
432serial_pxa_set_termios(struct uart_port *port, struct ktermios *termios,
433 struct ktermios *old)
434{
435 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
436 unsigned char cval, fcr = 0;
437 unsigned long flags;
438 unsigned int baud, quot;
439 unsigned int dll;
440
441 switch (termios->c_cflag & CSIZE) {
442 case CS5:
443 cval = UART_LCR_WLEN5;
444 break;
445 case CS6:
446 cval = UART_LCR_WLEN6;
447 break;
448 case CS7:
449 cval = UART_LCR_WLEN7;
450 break;
451 default:
452 case CS8:
453 cval = UART_LCR_WLEN8;
454 break;
455 }
456
457 if (termios->c_cflag & CSTOPB)
458 cval |= UART_LCR_STOP;
459 if (termios->c_cflag & PARENB)
460 cval |= UART_LCR_PARITY;
461 if (!(termios->c_cflag & PARODD))
462 cval |= UART_LCR_EPAR;
463
464 /*
465 * Ask the core to calculate the divisor for us.
466 */
467 baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
468 quot = uart_get_divisor(port, baud);
469
470 if ((up->port.uartclk / quot) < (2400 * 16))
471 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR1;
472 else if ((up->port.uartclk / quot) < (230400 * 16))
473 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR8;
474 else
475 fcr = UART_FCR_ENABLE_FIFO | UART_FCR_PXAR32;
476
477 /*
478 * Ok, we're now changing the port state. Do it with
479 * interrupts disabled.
480 */
481 spin_lock_irqsave(&up->port.lock, flags);
482
483 /*
484 * Ensure the port will be enabled.
485 * This is required especially for serial console.
486 */
487 up->ier |= UART_IER_UUE;
488
489 /*
490 * Update the per-port timeout.
491 */
492 uart_update_timeout(port, termios->c_cflag, baud);
493
494 up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
495 if (termios->c_iflag & INPCK)
496 up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
497 if (termios->c_iflag & (IGNBRK | BRKINT | PARMRK))
498 up->port.read_status_mask |= UART_LSR_BI;
499
500 /*
501 * Characters to ignore
502 */
503 up->port.ignore_status_mask = 0;
504 if (termios->c_iflag & IGNPAR)
505 up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
506 if (termios->c_iflag & IGNBRK) {
507 up->port.ignore_status_mask |= UART_LSR_BI;
508 /*
509 * If we're ignoring parity and break indicators,
510 * ignore overruns too (for real raw support).
511 */
512 if (termios->c_iflag & IGNPAR)
513 up->port.ignore_status_mask |= UART_LSR_OE;
514 }
515
516 /*
517 * ignore all characters if CREAD is not set
518 */
519 if ((termios->c_cflag & CREAD) == 0)
520 up->port.ignore_status_mask |= UART_LSR_DR;
521
522 /*
523 * CTS flow control flag and modem status interrupts
524 */
525 up->ier &= ~UART_IER_MSI;
526 if (UART_ENABLE_MS(&up->port, termios->c_cflag))
527 up->ier |= UART_IER_MSI;
528
529 serial_out(up, UART_IER, up->ier);
530
531 if (termios->c_cflag & CRTSCTS)
532 up->mcr |= UART_MCR_AFE;
533 else
534 up->mcr &= ~UART_MCR_AFE;
535
536 serial_out(up, UART_LCR, cval | UART_LCR_DLAB); /* set DLAB */
537 serial_out(up, UART_DLL, quot & 0xff); /* LS of divisor */
538
539 /*
540 * work around Errata #75 according to Intel(R) PXA27x Processor Family
541 * Specification Update (Nov 2005)
542 */
543 dll = serial_in(up, UART_DLL);
544 WARN_ON(dll != (quot & 0xff));
545
546 serial_out(up, UART_DLM, quot >> 8); /* MS of divisor */
547 serial_out(up, UART_LCR, cval); /* reset DLAB */
548 up->lcr = cval; /* Save LCR */
549 serial_pxa_set_mctrl(&up->port, up->port.mctrl);
550 serial_out(up, UART_FCR, fcr);
551 spin_unlock_irqrestore(&up->port.lock, flags);
552}
553
554static void
555serial_pxa_pm(struct uart_port *port, unsigned int state,
556 unsigned int oldstate)
557{
558 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
559
560 if (!state)
561 clk_prepare_enable(up->clk);
562 else
563 clk_disable_unprepare(up->clk);
564}
565
566static void serial_pxa_release_port(struct uart_port *port)
567{
568}
569
570static int serial_pxa_request_port(struct uart_port *port)
571{
572 return 0;
573}
574
575static void serial_pxa_config_port(struct uart_port *port, int flags)
576{
577 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
578 up->port.type = PORT_PXA;
579}
580
581static int
582serial_pxa_verify_port(struct uart_port *port, struct serial_struct *ser)
583{
584 /* we don't want the core code to modify any port params */
585 return -EINVAL;
586}
587
588static const char *
589serial_pxa_type(struct uart_port *port)
590{
591 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
592 return up->name;
593}
594
595static struct uart_pxa_port *serial_pxa_ports[4];
596static struct uart_driver serial_pxa_reg;
597
598#ifdef CONFIG_SERIAL_PXA_CONSOLE
599
600#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
601
602/*
603 * Wait for transmitter & holding register to empty
604 */
605static void wait_for_xmitr(struct uart_pxa_port *up)
606{
607 unsigned int status, tmout = 10000;
608
609 /* Wait up to 10ms for the character(s) to be sent. */
610 do {
611 status = serial_in(up, UART_LSR);
612
613 if (status & UART_LSR_BI)
614 up->lsr_break_flag = UART_LSR_BI;
615
616 if (--tmout == 0)
617 break;
618 udelay(1);
619 } while ((status & BOTH_EMPTY) != BOTH_EMPTY);
620
621 /* Wait up to 1s for flow control if necessary */
622 if (up->port.flags & UPF_CONS_FLOW) {
623 tmout = 1000000;
624 while (--tmout &&
625 ((serial_in(up, UART_MSR) & UART_MSR_CTS) == 0))
626 udelay(1);
627 }
628}
629
630static void serial_pxa_console_putchar(struct uart_port *port, int ch)
631{
632 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
633
634 wait_for_xmitr(up);
635 serial_out(up, UART_TX, ch);
636}
637
638/*
639 * Print a string to the serial port trying not to disturb
640 * any possible real use of the port...
641 *
642 * The console_lock must be held when we get here.
643 */
644static void
645serial_pxa_console_write(struct console *co, const char *s, unsigned int count)
646{
647 struct uart_pxa_port *up = serial_pxa_ports[co->index];
648 unsigned int ier;
649 unsigned long flags;
650 int locked = 1;
651
652 clk_enable(up->clk);
653 local_irq_save(flags);
654 if (up->port.sysrq)
655 locked = 0;
656 else if (oops_in_progress)
657 locked = spin_trylock(&up->port.lock);
658 else
659 spin_lock(&up->port.lock);
660
661 /*
662 * First save the IER then disable the interrupts
663 */
664 ier = serial_in(up, UART_IER);
665 serial_out(up, UART_IER, UART_IER_UUE);
666
667 uart_console_write(&up->port, s, count, serial_pxa_console_putchar);
668
669 /*
670 * Finally, wait for transmitter to become empty
671 * and restore the IER
672 */
673 wait_for_xmitr(up);
674 serial_out(up, UART_IER, ier);
675
676 if (locked)
677 spin_unlock(&up->port.lock);
678 local_irq_restore(flags);
679 clk_disable(up->clk);
680
681}
682
683#ifdef CONFIG_CONSOLE_POLL
684/*
685 * Console polling routines for writing and reading from the uart while
686 * in an interrupt or debug context.
687 */
688
689static int serial_pxa_get_poll_char(struct uart_port *port)
690{
691 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
692 unsigned char lsr = serial_in(up, UART_LSR);
693
694 while (!(lsr & UART_LSR_DR))
695 lsr = serial_in(up, UART_LSR);
696
697 return serial_in(up, UART_RX);
698}
699
700
701static void serial_pxa_put_poll_char(struct uart_port *port,
702 unsigned char c)
703{
704 unsigned int ier;
705 struct uart_pxa_port *up = (struct uart_pxa_port *)port;
706
707 /*
708 * First save the IER then disable the interrupts
709 */
710 ier = serial_in(up, UART_IER);
711 serial_out(up, UART_IER, UART_IER_UUE);
712
713 wait_for_xmitr(up);
714 /*
715 * Send the character out.
716 */
717 serial_out(up, UART_TX, c);
718
719 /*
720 * Finally, wait for transmitter to become empty
721 * and restore the IER
722 */
723 wait_for_xmitr(up);
724 serial_out(up, UART_IER, ier);
725}
726
727#endif /* CONFIG_CONSOLE_POLL */
728
729static int __init
730serial_pxa_console_setup(struct console *co, char *options)
731{
732 struct uart_pxa_port *up;
733 int baud = 9600;
734 int bits = 8;
735 int parity = 'n';
736 int flow = 'n';
737
738 if (co->index == -1 || co->index >= serial_pxa_reg.nr)
739 co->index = 0;
740 up = serial_pxa_ports[co->index];
741 if (!up)
742 return -ENODEV;
743
744 if (options)
745 uart_parse_options(options, &baud, &parity, &bits, &flow);
746
747 return uart_set_options(&up->port, co, baud, parity, bits, flow);
748}
749
750static struct console serial_pxa_console = {
751 .name = "ttyS",
752 .write = serial_pxa_console_write,
753 .device = uart_console_device,
754 .setup = serial_pxa_console_setup,
755 .flags = CON_PRINTBUFFER,
756 .index = -1,
757 .data = &serial_pxa_reg,
758};
759
760#define PXA_CONSOLE &serial_pxa_console
761#else
762#define PXA_CONSOLE NULL
763#endif
764
765static struct uart_ops serial_pxa_pops = {
766 .tx_empty = serial_pxa_tx_empty,
767 .set_mctrl = serial_pxa_set_mctrl,
768 .get_mctrl = serial_pxa_get_mctrl,
769 .stop_tx = serial_pxa_stop_tx,
770 .start_tx = serial_pxa_start_tx,
771 .stop_rx = serial_pxa_stop_rx,
772 .enable_ms = serial_pxa_enable_ms,
773 .break_ctl = serial_pxa_break_ctl,
774 .startup = serial_pxa_startup,
775 .shutdown = serial_pxa_shutdown,
776 .set_termios = serial_pxa_set_termios,
777 .pm = serial_pxa_pm,
778 .type = serial_pxa_type,
779 .release_port = serial_pxa_release_port,
780 .request_port = serial_pxa_request_port,
781 .config_port = serial_pxa_config_port,
782 .verify_port = serial_pxa_verify_port,
783#if defined(CONFIG_CONSOLE_POLL) && defined(CONFIG_SERIAL_PXA_CONSOLE)
784 .poll_get_char = serial_pxa_get_poll_char,
785 .poll_put_char = serial_pxa_put_poll_char,
786#endif
787};
788
789static struct uart_driver serial_pxa_reg = {
790 .owner = THIS_MODULE,
791 .driver_name = "PXA serial",
792 .dev_name = "ttyS",
793 .major = TTY_MAJOR,
794 .minor = 64,
795 .nr = 4,
796 .cons = PXA_CONSOLE,
797};
798
799#ifdef CONFIG_PM
800static int serial_pxa_suspend(struct device *dev)
801{
802 struct uart_pxa_port *sport = dev_get_drvdata(dev);
803
804 if (sport)
805 uart_suspend_port(&serial_pxa_reg, &sport->port);
806
807 return 0;
808}
809
810static int serial_pxa_resume(struct device *dev)
811{
812 struct uart_pxa_port *sport = dev_get_drvdata(dev);
813
814 if (sport)
815 uart_resume_port(&serial_pxa_reg, &sport->port);
816
817 return 0;
818}
819
820static const struct dev_pm_ops serial_pxa_pm_ops = {
821 .suspend = serial_pxa_suspend,
822 .resume = serial_pxa_resume,
823};
824#endif
825
826static const struct of_device_id serial_pxa_dt_ids[] = {
827 { .compatible = "mrvl,pxa-uart", },
828 { .compatible = "mrvl,mmp-uart", },
829 {}
830};
831
832static int serial_pxa_probe_dt(struct platform_device *pdev,
833 struct uart_pxa_port *sport)
834{
835 struct device_node *np = pdev->dev.of_node;
836 int ret;
837
838 if (!np)
839 return 1;
840
841 ret = of_alias_get_id(np, "serial");
842 if (ret < 0) {
843 dev_err(&pdev->dev, "failed to get alias id, errno %d\n", ret);
844 return ret;
845 }
846 sport->port.line = ret;
847 return 0;
848}
849
850static int serial_pxa_probe(struct platform_device *dev)
851{
852 struct uart_pxa_port *sport;
853 struct resource *mmres, *irqres;
854 int ret;
855
856 mmres = platform_get_resource(dev, IORESOURCE_MEM, 0);
857 irqres = platform_get_resource(dev, IORESOURCE_IRQ, 0);
858 if (!mmres || !irqres)
859 return -ENODEV;
860
861 sport = kzalloc(sizeof(struct uart_pxa_port), GFP_KERNEL);
862 if (!sport)
863 return -ENOMEM;
864
865 sport->clk = clk_get(&dev->dev, NULL);
866 if (IS_ERR(sport->clk)) {
867 ret = PTR_ERR(sport->clk);
868 goto err_free;
869 }
870
871 ret = clk_prepare(sport->clk);
872 if (ret) {
873 clk_put(sport->clk);
874 goto err_free;
875 }
876
877 sport->port.type = PORT_PXA;
878 sport->port.iotype = UPIO_MEM;
879 sport->port.mapbase = mmres->start;
880 sport->port.irq = irqres->start;
881 sport->port.fifosize = 64;
882 sport->port.ops = &serial_pxa_pops;
883 sport->port.dev = &dev->dev;
884 sport->port.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF;
885 sport->port.uartclk = clk_get_rate(sport->clk);
886
887 ret = serial_pxa_probe_dt(dev, sport);
888 if (ret > 0)
889 sport->port.line = dev->id;
890 else if (ret < 0)
891 goto err_clk;
892 snprintf(sport->name, PXA_NAME_LEN - 1, "UART%d", sport->port.line + 1);
893
894 sport->port.membase = ioremap(mmres->start, resource_size(mmres));
895 if (!sport->port.membase) {
896 ret = -ENOMEM;
897 goto err_clk;
898 }
899
900 serial_pxa_ports[sport->port.line] = sport;
901
902 uart_add_one_port(&serial_pxa_reg, &sport->port);
903 platform_set_drvdata(dev, sport);
904
905 return 0;
906
907 err_clk:
908 clk_unprepare(sport->clk);
909 clk_put(sport->clk);
910 err_free:
911 kfree(sport);
912 return ret;
913}
914
915static struct platform_driver serial_pxa_driver = {
916 .probe = serial_pxa_probe,
917
918 .driver = {
919 .name = "pxa2xx-uart",
920#ifdef CONFIG_PM
921 .pm = &serial_pxa_pm_ops,
922#endif
923 .suppress_bind_attrs = true,
924 .of_match_table = serial_pxa_dt_ids,
925 },
926};
927
928
929/* 8250 driver for PXA serial ports should be used */
930static int __init serial_pxa_init(void)
931{
932 int ret;
933
934 ret = uart_register_driver(&serial_pxa_reg);
935 if (ret != 0)
936 return ret;
937
938 ret = platform_driver_register(&serial_pxa_driver);
939 if (ret != 0)
940 uart_unregister_driver(&serial_pxa_reg);
941
942 return ret;
943}
944device_initcall(serial_pxa_init);