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v6.13.7
   1// SPDX-License-Identifier: GPL-2.0
   2/*
   3 * Texas Instruments Ethernet Switch Driver
   4 *
   5 * Copyright (C) 2012 Texas Instruments
   6 *
 
 
 
 
 
 
 
 
   7 */
   8
   9#include <linux/kernel.h>
  10#include <linux/io.h>
  11#include <linux/clk.h>
  12#include <linux/timer.h>
  13#include <linux/module.h>
  14#include <linux/platform_device.h>
  15#include <linux/irqreturn.h>
  16#include <linux/interrupt.h>
  17#include <linux/if_ether.h>
  18#include <linux/etherdevice.h>
  19#include <linux/netdevice.h>
  20#include <linux/net_tstamp.h>
  21#include <linux/phy.h>
  22#include <linux/phy/phy.h>
  23#include <linux/workqueue.h>
  24#include <linux/delay.h>
  25#include <linux/pm_runtime.h>
  26#include <linux/gpio/consumer.h>
  27#include <linux/of.h>
  28#include <linux/of_mdio.h>
  29#include <linux/of_net.h>
  30#include <linux/of_platform.h>
  31#include <linux/if_vlan.h>
  32#include <linux/kmemleak.h>
  33#include <linux/sys_soc.h>
  34#include <net/page_pool/helpers.h>
  35#include <linux/bpf.h>
  36#include <linux/bpf_trace.h>
  37
  38#include <linux/pinctrl/consumer.h>
  39#include <net/pkt_cls.h>
  40
  41#include "cpsw.h"
  42#include "cpsw_ale.h"
  43#include "cpsw_priv.h"
  44#include "cpsw_sl.h"
  45#include "cpts.h"
  46#include "davinci_cpdma.h"
  47
  48#include <net/pkt_sched.h>
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  49
  50static int debug_level;
  51module_param(debug_level, int, 0);
  52MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)");
  53
  54static int ale_ageout = 10;
  55module_param(ale_ageout, int, 0);
  56MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
  57
  58static int rx_packet_max = CPSW_MAX_PACKET_SIZE;
  59module_param(rx_packet_max, int, 0);
  60MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)");
  61
  62static int descs_pool_size = CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT;
  63module_param(descs_pool_size, int, 0444);
  64MODULE_PARM_DESC(descs_pool_size, "Number of CPDMA CPPI descriptors in pool");
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  65
 
 
  66#define for_each_slave(priv, func, arg...)				\
  67	do {								\
  68		struct cpsw_slave *slave;				\
  69		struct cpsw_common *cpsw = (priv)->cpsw;		\
  70		int n;							\
  71		if (cpsw->data.dual_emac)				\
  72			(func)((cpsw)->slaves + priv->emac_port, ##arg);\
  73		else							\
  74			for (n = cpsw->data.slaves,			\
  75					slave = cpsw->slaves;		\
  76					n; n--)				\
  77				(func)(slave++, ##arg);			\
  78	} while (0)
  79
  80static int cpsw_slave_index_priv(struct cpsw_common *cpsw,
  81				 struct cpsw_priv *priv)
  82{
  83	return cpsw->data.dual_emac ? priv->emac_port : cpsw->data.active_slave;
  84}
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
  85
  86static int cpsw_get_slave_port(u32 slave_num)
  87{
  88	return slave_num + 1;
  89}
  90
  91static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev,
  92				    __be16 proto, u16 vid);
  93
  94static void cpsw_set_promiscious(struct net_device *ndev, bool enable)
  95{
  96	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
  97	struct cpsw_ale *ale = cpsw->ale;
  98	int i;
  99
 100	if (cpsw->data.dual_emac) {
 101		bool flag = false;
 102
 103		/* Enabling promiscuous mode for one interface will be
 104		 * common for both the interface as the interface shares
 105		 * the same hardware resource.
 106		 */
 107		for (i = 0; i < cpsw->data.slaves; i++)
 108			if (cpsw->slaves[i].ndev->flags & IFF_PROMISC)
 109				flag = true;
 110
 111		if (!enable && flag) {
 112			enable = true;
 113			dev_err(&ndev->dev, "promiscuity not disabled as the other interface is still in promiscuity mode\n");
 114		}
 115
 116		if (enable) {
 117			/* Enable Bypass */
 118			cpsw_ale_control_set(ale, 0, ALE_BYPASS, 1);
 119
 120			dev_dbg(&ndev->dev, "promiscuity enabled\n");
 121		} else {
 122			/* Disable Bypass */
 123			cpsw_ale_control_set(ale, 0, ALE_BYPASS, 0);
 124			dev_dbg(&ndev->dev, "promiscuity disabled\n");
 125		}
 126	} else {
 127		if (enable) {
 128			unsigned long timeout = jiffies + HZ;
 129
 130			/* Disable Learn for all ports (host is port 0 and slaves are port 1 and up */
 131			for (i = 0; i <= cpsw->data.slaves; i++) {
 132				cpsw_ale_control_set(ale, i,
 133						     ALE_PORT_NOLEARN, 1);
 134				cpsw_ale_control_set(ale, i,
 135						     ALE_PORT_NO_SA_UPDATE, 1);
 136			}
 137
 138			/* Clear All Untouched entries */
 139			cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
 140			do {
 141				cpu_relax();
 142				if (cpsw_ale_control_get(ale, 0, ALE_AGEOUT))
 143					break;
 144			} while (time_after(timeout, jiffies));
 145			cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
 146
 147			/* Clear all mcast from ALE */
 148			cpsw_ale_flush_multicast(ale, ALE_ALL_PORTS, -1);
 149			__hw_addr_ref_unsync_dev(&ndev->mc, ndev, NULL);
 150
 151			/* Flood All Unicast Packets to Host port */
 152			cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 1);
 153			dev_dbg(&ndev->dev, "promiscuity enabled\n");
 154		} else {
 155			/* Don't Flood All Unicast Packets to Host port */
 156			cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 0);
 157
 158			/* Enable Learn for all ports (host is port 0 and slaves are port 1 and up */
 159			for (i = 0; i <= cpsw->data.slaves; i++) {
 160				cpsw_ale_control_set(ale, i,
 161						     ALE_PORT_NOLEARN, 0);
 162				cpsw_ale_control_set(ale, i,
 163						     ALE_PORT_NO_SA_UPDATE, 0);
 164			}
 165			dev_dbg(&ndev->dev, "promiscuity disabled\n");
 166		}
 167	}
 168}
 169
 170/**
 171 * cpsw_set_mc - adds multicast entry to the table if it's not added or deletes
 172 * if it's not deleted
 173 * @ndev: device to sync
 174 * @addr: address to be added or deleted
 175 * @vid: vlan id, if vid < 0 set/unset address for real device
 176 * @add: add address if the flag is set or remove otherwise
 177 */
 178static int cpsw_set_mc(struct net_device *ndev, const u8 *addr,
 179		       int vid, int add)
 180{
 181	struct cpsw_priv *priv = netdev_priv(ndev);
 182	struct cpsw_common *cpsw = priv->cpsw;
 183	int mask, flags, ret;
 184
 185	if (vid < 0) {
 186		if (cpsw->data.dual_emac)
 187			vid = cpsw->slaves[priv->emac_port].port_vlan;
 188		else
 189			vid = 0;
 190	}
 191
 192	mask = cpsw->data.dual_emac ? ALE_PORT_HOST : ALE_ALL_PORTS;
 193	flags = vid ? ALE_VLAN : 0;
 194
 195	if (add)
 196		ret = cpsw_ale_add_mcast(cpsw->ale, addr, mask, flags, vid, 0);
 197	else
 198		ret = cpsw_ale_del_mcast(cpsw->ale, addr, 0, flags, vid);
 199
 200	return ret;
 201}
 
 
 
 
 
 
 
 202
 203static int cpsw_update_vlan_mc(struct net_device *vdev, int vid, void *ctx)
 204{
 205	struct addr_sync_ctx *sync_ctx = ctx;
 206	struct netdev_hw_addr *ha;
 207	int found = 0, ret = 0;
 208
 209	if (!vdev || !(vdev->flags & IFF_UP))
 210		return 0;
 211
 212	/* vlan address is relevant if its sync_cnt != 0 */
 213	netdev_for_each_mc_addr(ha, vdev) {
 214		if (ether_addr_equal(ha->addr, sync_ctx->addr)) {
 215			found = ha->sync_cnt;
 216			break;
 217		}
 218	}
 219
 220	if (found)
 221		sync_ctx->consumed++;
 222
 223	if (sync_ctx->flush) {
 224		if (!found)
 225			cpsw_set_mc(sync_ctx->ndev, sync_ctx->addr, vid, 0);
 226		return 0;
 227	}
 
 228
 229	if (found)
 230		ret = cpsw_set_mc(sync_ctx->ndev, sync_ctx->addr, vid, 1);
 
 
 231
 232	return ret;
 
 233}
 234
 235static int cpsw_add_mc_addr(struct net_device *ndev, const u8 *addr, int num)
 236{
 237	struct addr_sync_ctx sync_ctx;
 238	int ret;
 239
 240	sync_ctx.consumed = 0;
 241	sync_ctx.addr = addr;
 242	sync_ctx.ndev = ndev;
 243	sync_ctx.flush = 0;
 244
 245	ret = vlan_for_each(ndev, cpsw_update_vlan_mc, &sync_ctx);
 246	if (sync_ctx.consumed < num && !ret)
 247		ret = cpsw_set_mc(ndev, addr, -1, 1);
 248
 249	return ret;
 250}
 251
 252static int cpsw_del_mc_addr(struct net_device *ndev, const u8 *addr, int num)
 253{
 254	struct addr_sync_ctx sync_ctx;
 
 
 
 255
 256	sync_ctx.consumed = 0;
 257	sync_ctx.addr = addr;
 258	sync_ctx.ndev = ndev;
 259	sync_ctx.flush = 1;
 260
 261	vlan_for_each(ndev, cpsw_update_vlan_mc, &sync_ctx);
 262	if (sync_ctx.consumed == num)
 263		cpsw_set_mc(ndev, addr, -1, 0);
 264
 265	return 0;
 
 
 
 266}
 267
 268static int cpsw_purge_vlan_mc(struct net_device *vdev, int vid, void *ctx)
 269{
 270	struct addr_sync_ctx *sync_ctx = ctx;
 271	struct netdev_hw_addr *ha;
 272	int found = 0;
 
 
 
 273
 274	if (!vdev || !(vdev->flags & IFF_UP))
 275		return 0;
 276
 277	/* vlan address is relevant if its sync_cnt != 0 */
 278	netdev_for_each_mc_addr(ha, vdev) {
 279		if (ether_addr_equal(ha->addr, sync_ctx->addr)) {
 280			found = ha->sync_cnt;
 281			break;
 
 
 
 
 
 282		}
 283	}
 284
 285	if (!found)
 286		return 0;
 287
 288	sync_ctx->consumed++;
 289	cpsw_set_mc(sync_ctx->ndev, sync_ctx->addr, vid, 0);
 290	return 0;
 291}
 
 
 
 292
 293static int cpsw_purge_all_mc(struct net_device *ndev, const u8 *addr, int num)
 294{
 295	struct addr_sync_ctx sync_ctx;
 
 296
 297	sync_ctx.addr = addr;
 298	sync_ctx.ndev = ndev;
 299	sync_ctx.consumed = 0;
 
 
 
 
 
 
 
 
 
 
 
 300
 301	vlan_for_each(ndev, cpsw_purge_vlan_mc, &sync_ctx);
 302	if (sync_ctx.consumed < num)
 303		cpsw_set_mc(ndev, addr, -1, 0);
 
 
 304
 305	return 0;
 
 
 
 
 306}
 307
 308static void cpsw_ndo_set_rx_mode(struct net_device *ndev)
 309{
 310	struct cpsw_priv *priv = netdev_priv(ndev);
 
 311	struct cpsw_common *cpsw = priv->cpsw;
 312	int slave_port = -1;
 
 
 
 
 
 
 
 
 
 313
 314	if (cpsw->data.dual_emac)
 315		slave_port = priv->emac_port + 1;
 
 316
 317	if (ndev->flags & IFF_PROMISC) {
 318		/* Enable promiscuous mode */
 319		cpsw_set_promiscious(ndev, true);
 320		cpsw_ale_set_allmulti(cpsw->ale, IFF_ALLMULTI, slave_port);
 321		return;
 
 322	} else {
 323		/* Disable promiscuous mode */
 324		cpsw_set_promiscious(ndev, false);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 325	}
 326
 327	/* Restore allmulti on vlans if necessary */
 328	cpsw_ale_set_allmulti(cpsw->ale,
 329			      ndev->flags & IFF_ALLMULTI, slave_port);
 330
 331	/* add/remove mcast address either for real netdev or for vlan */
 332	__hw_addr_ref_sync_dev(&ndev->mc, ndev, cpsw_add_mc_addr,
 333			       cpsw_del_mc_addr);
 
 
 
 
 
 
 
 334}
 335
 336static unsigned int cpsw_rxbuf_total_len(unsigned int len)
 337{
 338	len += CPSW_HEADROOM_NA;
 339	len += SKB_DATA_ALIGN(sizeof(struct skb_shared_info));
 
 
 
 
 
 
 
 340
 341	return SKB_DATA_ALIGN(len);
 
 342}
 343
 344static void cpsw_rx_handler(void *token, int len, int status)
 345{
 346	struct page		*new_page, *page = token;
 347	void			*pa = page_address(page);
 348	struct cpsw_meta_xdp	*xmeta = pa + CPSW_XMETA_OFFSET;
 349	struct cpsw_common	*cpsw = ndev_to_cpsw(xmeta->ndev);
 350	int			pkt_size = cpsw->rx_packet_max;
 351	int			ret = 0, port, ch = xmeta->ch;
 352	int			headroom = CPSW_HEADROOM_NA;
 353	struct net_device	*ndev = xmeta->ndev;
 354	struct cpsw_priv	*priv;
 355	struct page_pool	*pool;
 356	struct sk_buff		*skb;
 357	struct xdp_buff		xdp;
 358	dma_addr_t		dma;
 359
 360	if (cpsw->data.dual_emac && status >= 0) {
 361		port = CPDMA_RX_SOURCE_PORT(status);
 362		if (port)
 363			ndev = cpsw->slaves[--port].ndev;
 364	}
 365
 366	priv = netdev_priv(ndev);
 367	pool = cpsw->page_pool[ch];
 368	if (unlikely(status < 0) || unlikely(!netif_running(ndev))) {
 369		/* In dual emac mode check for all interfaces */
 370		if (cpsw->data.dual_emac && cpsw->usage_count &&
 371		    (status >= 0)) {
 372			/* The packet received is for the interface which
 373			 * is already down and the other interface is up
 374			 * and running, instead of freeing which results
 375			 * in reducing of the number of rx descriptor in
 376			 * DMA engine, requeue page back to cpdma.
 377			 */
 378			new_page = page;
 379			goto requeue;
 380		}
 381
 382		/* the interface is going down, pages are purged */
 383		page_pool_recycle_direct(pool, page);
 384		return;
 385	}
 386
 387	new_page = page_pool_dev_alloc_pages(pool);
 388	if (unlikely(!new_page)) {
 389		new_page = page;
 390		ndev->stats.rx_dropped++;
 391		goto requeue;
 392	}
 393
 394	if (priv->xdp_prog) {
 395		int size = len;
 
 
 
 
 396
 397		xdp_init_buff(&xdp, PAGE_SIZE, &priv->xdp_rxq[ch]);
 398		if (status & CPDMA_RX_VLAN_ENCAP) {
 399			headroom += CPSW_RX_VLAN_ENCAP_HDR_SIZE;
 400			size -= CPSW_RX_VLAN_ENCAP_HDR_SIZE;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 401		}
 
 402
 403		xdp_prepare_buff(&xdp, pa, headroom, size, false);
 
 404
 405		port = priv->emac_port + cpsw->data.dual_emac;
 406		ret = cpsw_run_xdp(priv, ch, &xdp, page, port, &len);
 407		if (ret != CPSW_XDP_PASS)
 408			goto requeue;
 
 
 409
 410		headroom = xdp.data - xdp.data_hard_start;
 
 
 
 
 
 
 
 
 
 
 411
 412		/* XDP prog can modify vlan tag, so can't use encap header */
 413		status &= ~CPDMA_RX_VLAN_ENCAP;
 
 414	}
 415
 416	/* pass skb to netstack if no XDP prog or returned XDP_PASS */
 417	skb = build_skb(pa, cpsw_rxbuf_total_len(pkt_size));
 418	if (!skb) {
 419		ndev->stats.rx_dropped++;
 420		page_pool_recycle_direct(pool, page);
 421		goto requeue;
 
 422	}
 423
 424	skb_reserve(skb, headroom);
 425	skb_put(skb, len);
 426	skb->dev = ndev;
 427	if (status & CPDMA_RX_VLAN_ENCAP)
 428		cpsw_rx_vlan_encap(skb);
 429	if (priv->rx_ts_enabled)
 430		cpts_rx_timestamp(cpsw->cpts, skb);
 431	skb->protocol = eth_type_trans(skb, ndev);
 432
 433	/* mark skb for recycling */
 434	skb_mark_for_recycle(skb);
 435	netif_receive_skb(skb);
 436
 437	ndev->stats.rx_bytes += len;
 438	ndev->stats.rx_packets++;
 
 
 439
 440requeue:
 441	xmeta = page_address(new_page) + CPSW_XMETA_OFFSET;
 442	xmeta->ndev = ndev;
 443	xmeta->ch = ch;
 444
 445	dma = page_pool_get_dma_addr(new_page) + CPSW_HEADROOM_NA;
 446	ret = cpdma_chan_submit_mapped(cpsw->rxv[ch].ch, new_page, dma,
 447				       pkt_size, 0);
 448	if (ret < 0) {
 449		WARN_ON(ret == -ENOMEM);
 450		page_pool_recycle_direct(pool, new_page);
 451	}
 452}
 453
 454static void _cpsw_adjust_link(struct cpsw_slave *slave,
 455			      struct cpsw_priv *priv, bool *link)
 456{
 457	struct phy_device	*phy = slave->phy;
 458	u32			mac_control = 0;
 459	u32			slave_port;
 460	struct cpsw_common *cpsw = priv->cpsw;
 461
 462	if (!phy)
 463		return;
 464
 465	slave_port = cpsw_get_slave_port(slave->slave_num);
 466
 467	if (phy->link) {
 468		mac_control = CPSW_SL_CTL_GMII_EN;
 
 
 
 
 469
 470		if (phy->speed == 1000)
 471			mac_control |= CPSW_SL_CTL_GIG;
 472		if (phy->duplex)
 473			mac_control |= CPSW_SL_CTL_FULLDUPLEX;
 474
 475		/* set speed_in input in case RMII mode is used in 100Mbps */
 476		if (phy->speed == 100)
 477			mac_control |= CPSW_SL_CTL_IFCTL_A;
 478		/* in band mode only works in 10Mbps RGMII mode */
 479		else if ((phy->speed == 10) && phy_interface_is_rgmii(phy))
 480			mac_control |= CPSW_SL_CTL_EXT_EN; /* In Band mode */
 481
 482		if (priv->rx_pause)
 483			mac_control |= CPSW_SL_CTL_RX_FLOW_EN;
 484
 485		if (priv->tx_pause)
 486			mac_control |= CPSW_SL_CTL_TX_FLOW_EN;
 487
 488		if (mac_control != slave->mac_control)
 489			cpsw_sl_ctl_set(slave->mac_sl, mac_control);
 490
 491		/* enable forwarding */
 492		cpsw_ale_control_set(cpsw->ale, slave_port,
 493				     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 494
 495		*link = true;
 496
 497		if (priv->shp_cfg_speed &&
 498		    priv->shp_cfg_speed != slave->phy->speed &&
 499		    !cpsw_shp_is_off(priv))
 500			dev_warn(priv->dev,
 501				 "Speed was changed, CBS shaper speeds are changed!");
 502	} else {
 503		mac_control = 0;
 504		/* disable forwarding */
 505		cpsw_ale_control_set(cpsw->ale, slave_port,
 506				     ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
 507
 508		cpsw_sl_wait_for_idle(slave->mac_sl, 100);
 509
 510		cpsw_sl_ctl_reset(slave->mac_sl);
 511	}
 512
 513	if (mac_control != slave->mac_control)
 514		phy_print_status(phy);
 
 
 515
 516	slave->mac_control = mac_control;
 517}
 518
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 519static void cpsw_adjust_link(struct net_device *ndev)
 520{
 521	struct cpsw_priv	*priv = netdev_priv(ndev);
 522	struct cpsw_common	*cpsw = priv->cpsw;
 523	bool			link = false;
 524
 525	for_each_slave(priv, _cpsw_adjust_link, priv, &link);
 526
 527	if (link) {
 528		if (cpsw_need_resplit(cpsw))
 529			cpsw_split_res(cpsw);
 530
 531		netif_carrier_on(ndev);
 532		if (netif_running(ndev))
 533			netif_tx_wake_all_queues(ndev);
 534	} else {
 535		netif_carrier_off(ndev);
 536		netif_tx_stop_all_queues(ndev);
 537	}
 538}
 539
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 540static inline void cpsw_add_dual_emac_def_ale_entries(
 541		struct cpsw_priv *priv, struct cpsw_slave *slave,
 542		u32 slave_port)
 543{
 544	struct cpsw_common *cpsw = priv->cpsw;
 545	u32 port_mask = 1 << slave_port | ALE_PORT_HOST;
 546
 547	if (cpsw->version == CPSW_VERSION_1)
 548		slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN);
 549	else
 550		slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN);
 551	cpsw_ale_add_vlan(cpsw->ale, slave->port_vlan, port_mask,
 552			  port_mask, port_mask, 0);
 553	cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
 554			   ALE_PORT_HOST, ALE_VLAN, slave->port_vlan, 0);
 555	cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr,
 556			   HOST_PORT_NUM, ALE_VLAN |
 557			   ALE_SECURE, slave->port_vlan);
 558	cpsw_ale_control_set(cpsw->ale, slave_port,
 559			     ALE_PORT_DROP_UNKNOWN_VLAN, 1);
 
 
 
 
 
 
 560}
 561
 562static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)
 563{
 564	u32 slave_port;
 565	struct phy_device *phy;
 566	struct cpsw_common *cpsw = priv->cpsw;
 567
 568	cpsw_sl_reset(slave->mac_sl, 100);
 569	cpsw_sl_ctl_reset(slave->mac_sl);
 570
 571	/* setup priority mapping */
 572	cpsw_sl_reg_write(slave->mac_sl, CPSW_SL_RX_PRI_MAP,
 573			  RX_PRIORITY_MAPPING);
 574
 575	switch (cpsw->version) {
 576	case CPSW_VERSION_1:
 577		slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP);
 578		/* Increase RX FIFO size to 5 for supporting fullduplex
 579		 * flow control mode
 580		 */
 581		slave_write(slave,
 582			    (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) |
 583			    CPSW_MAX_BLKS_RX, CPSW1_MAX_BLKS);
 584		break;
 585	case CPSW_VERSION_2:
 586	case CPSW_VERSION_3:
 587	case CPSW_VERSION_4:
 588		slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP);
 589		/* Increase RX FIFO size to 5 for supporting fullduplex
 590		 * flow control mode
 591		 */
 592		slave_write(slave,
 593			    (CPSW_MAX_BLKS_TX << CPSW_MAX_BLKS_TX_SHIFT) |
 594			    CPSW_MAX_BLKS_RX, CPSW2_MAX_BLKS);
 595		break;
 596	}
 597
 598	/* setup max packet size, and mac address */
 599	cpsw_sl_reg_write(slave->mac_sl, CPSW_SL_RX_MAXLEN,
 600			  cpsw->rx_packet_max);
 601	cpsw_set_slave_mac(slave, priv);
 602
 603	slave->mac_control = 0;	/* no link yet */
 604
 605	slave_port = cpsw_get_slave_port(slave->slave_num);
 606
 607	if (cpsw->data.dual_emac)
 608		cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port);
 609	else
 610		cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
 611				   1 << slave_port, 0, 0, ALE_MCAST_FWD_2);
 612
 613	if (slave->data->phy_node) {
 614		phy = of_phy_connect(priv->ndev, slave->data->phy_node,
 615				 &cpsw_adjust_link, 0, slave->data->phy_if);
 616		if (!phy) {
 617			dev_err(priv->dev, "phy \"%pOF\" not found on slave %d\n",
 618				slave->data->phy_node,
 619				slave->slave_num);
 620			return;
 621		}
 622	} else {
 623		phy = phy_connect(priv->ndev, slave->data->phy_id,
 624				 &cpsw_adjust_link, slave->data->phy_if);
 625		if (IS_ERR(phy)) {
 626			dev_err(priv->dev,
 627				"phy \"%s\" not found on slave %d, err %ld\n",
 628				slave->data->phy_id, slave->slave_num,
 629				PTR_ERR(phy));
 
 630			return;
 631		}
 632	}
 633
 634	phy->mac_managed_pm = true;
 635
 636	slave->phy = phy;
 637
 638	phy_attached_info(slave->phy);
 639
 640	phy_start(slave->phy);
 641
 642	/* Configure GMII_SEL register */
 643	if (!IS_ERR(slave->data->ifphy))
 644		phy_set_mode_ext(slave->data->ifphy, PHY_MODE_ETHERNET,
 645				 slave->data->phy_if);
 646	else
 647		cpsw_phy_sel(cpsw->dev, slave->phy->interface,
 648			     slave->slave_num);
 649}
 650
 651static inline void cpsw_add_default_vlan(struct cpsw_priv *priv)
 652{
 653	struct cpsw_common *cpsw = priv->cpsw;
 654	const int vlan = cpsw->data.default_vlan;
 655	u32 reg;
 656	int i;
 657	int unreg_mcast_mask;
 658
 659	reg = (cpsw->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN :
 660	       CPSW2_PORT_VLAN;
 661
 662	writel(vlan, &cpsw->host_port_regs->port_vlan);
 663
 664	for (i = 0; i < cpsw->data.slaves; i++)
 665		slave_write(cpsw->slaves + i, vlan, reg);
 666
 667	if (priv->ndev->flags & IFF_ALLMULTI)
 668		unreg_mcast_mask = ALE_ALL_PORTS;
 669	else
 670		unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2;
 671
 672	cpsw_ale_add_vlan(cpsw->ale, vlan, ALE_ALL_PORTS,
 673			  ALE_ALL_PORTS, ALE_ALL_PORTS,
 674			  unreg_mcast_mask);
 675}
 676
 677static void cpsw_init_host_port(struct cpsw_priv *priv)
 678{
 679	u32 fifo_mode;
 680	u32 control_reg;
 681	struct cpsw_common *cpsw = priv->cpsw;
 682
 683	/* soft reset the controller and initialize ale */
 684	soft_reset("cpsw", &cpsw->regs->soft_reset);
 685	cpsw_ale_start(cpsw->ale);
 686
 687	/* switch to vlan unaware mode */
 688	cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_VLAN_AWARE,
 689			     CPSW_ALE_VLAN_AWARE);
 690	control_reg = readl(&cpsw->regs->control);
 691	control_reg |= CPSW_VLAN_AWARE | CPSW_RX_VLAN_ENCAP;
 692	writel(control_reg, &cpsw->regs->control);
 693	fifo_mode = (cpsw->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE :
 694		     CPSW_FIFO_NORMAL_MODE;
 695	writel(fifo_mode, &cpsw->host_port_regs->tx_in_ctl);
 696
 697	/* setup host port priority mapping */
 698	writel_relaxed(CPDMA_TX_PRIORITY_MAP,
 699		       &cpsw->host_port_regs->cpdma_tx_pri_map);
 700	writel_relaxed(0, &cpsw->host_port_regs->cpdma_rx_chan_map);
 701
 702	cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM,
 703			     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 704
 705	if (!cpsw->data.dual_emac) {
 706		cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM,
 707				   0, 0);
 708		cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
 709				   ALE_PORT_HOST, 0, 0, ALE_MCAST_FWD_2);
 710	}
 711}
 712
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 713static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_common *cpsw)
 714{
 715	u32 slave_port;
 716
 717	slave_port = cpsw_get_slave_port(slave->slave_num);
 718
 719	if (!slave->phy)
 720		return;
 721	phy_stop(slave->phy);
 722	phy_disconnect(slave->phy);
 723	slave->phy = NULL;
 724	cpsw_ale_control_set(cpsw->ale, slave_port,
 725			     ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
 726	cpsw_sl_reset(slave->mac_sl, 100);
 727	cpsw_sl_ctl_reset(slave->mac_sl);
 728}
 729
 730static int cpsw_restore_vlans(struct net_device *vdev, int vid, void *arg)
 731{
 732	struct cpsw_priv *priv = arg;
 733
 734	if (!vdev)
 735		return 0;
 736
 737	cpsw_ndo_vlan_rx_add_vid(priv->ndev, 0, vid);
 738	return 0;
 739}
 740
 741/* restore resources after port reset */
 742static void cpsw_restore(struct cpsw_priv *priv)
 743{
 744	/* restore vlan configurations */
 745	vlan_for_each(priv->ndev, cpsw_restore_vlans, priv);
 746
 747	/* restore MQPRIO offload */
 748	for_each_slave(priv, cpsw_mqprio_resume, priv);
 749
 750	/* restore CBS offload */
 751	for_each_slave(priv, cpsw_cbs_resume, priv);
 752}
 753
 754static int cpsw_ndo_open(struct net_device *ndev)
 755{
 756	struct cpsw_priv *priv = netdev_priv(ndev);
 757	struct cpsw_common *cpsw = priv->cpsw;
 758	int ret;
 759	u32 reg;
 760
 761	ret = pm_runtime_resume_and_get(cpsw->dev);
 762	if (ret < 0)
 
 763		return ret;
 
 764
 
 
 765	netif_carrier_off(ndev);
 766
 767	/* Notify the stack of the actual queue counts. */
 768	ret = netif_set_real_num_tx_queues(ndev, cpsw->tx_ch_num);
 769	if (ret) {
 770		dev_err(priv->dev, "cannot set real number of tx queues\n");
 771		goto err_cleanup;
 772	}
 773
 774	ret = netif_set_real_num_rx_queues(ndev, cpsw->rx_ch_num);
 775	if (ret) {
 776		dev_err(priv->dev, "cannot set real number of rx queues\n");
 777		goto err_cleanup;
 778	}
 779
 780	reg = cpsw->version;
 781
 782	dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n",
 783		 CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg),
 784		 CPSW_RTL_VERSION(reg));
 785
 786	/* Initialize host and slave ports */
 787	if (!cpsw->usage_count)
 788		cpsw_init_host_port(priv);
 789	for_each_slave(priv, cpsw_slave_open, priv);
 790
 791	/* Add default VLAN */
 792	if (!cpsw->data.dual_emac)
 793		cpsw_add_default_vlan(priv);
 794	else
 795		cpsw_ale_add_vlan(cpsw->ale, cpsw->data.default_vlan,
 796				  ALE_ALL_PORTS, ALE_ALL_PORTS, 0, 0);
 797
 798	/* initialize shared resources for every ndev */
 799	if (!cpsw->usage_count) {
 800		/* disable priority elevation */
 801		writel_relaxed(0, &cpsw->regs->ptype);
 802
 803		/* enable statistics collection only on all ports */
 804		writel_relaxed(0x7, &cpsw->regs->stat_port_en);
 805
 806		/* Enable internal fifo flow control */
 807		writel(0x7, &cpsw->regs->flow_control);
 808
 809		napi_enable(&cpsw->napi_rx);
 810		napi_enable(&cpsw->napi_tx);
 811
 812		if (cpsw->tx_irq_disabled) {
 813			cpsw->tx_irq_disabled = false;
 814			enable_irq(cpsw->irqs_table[1]);
 815		}
 816
 817		if (cpsw->rx_irq_disabled) {
 818			cpsw->rx_irq_disabled = false;
 819			enable_irq(cpsw->irqs_table[0]);
 820		}
 821
 822		/* create rxqs for both infs in dual mac as they use same pool
 823		 * and must be destroyed together when no users.
 824		 */
 825		ret = cpsw_create_xdp_rxqs(cpsw);
 826		if (ret < 0)
 827			goto err_cleanup;
 828
 829		ret = cpsw_fill_rx_channels(priv);
 830		if (ret < 0)
 831			goto err_cleanup;
 832
 833		if (cpsw->cpts) {
 834			if (cpts_register(cpsw->cpts))
 835				dev_err(priv->dev, "error registering cpts device\n");
 836			else
 837				writel(0x10, &cpsw->wr_regs->misc_en);
 838		}
 839	}
 840
 841	cpsw_restore(priv);
 842
 843	/* Enable Interrupt pacing if configured */
 844	if (cpsw->coal_intvl != 0) {
 845		struct ethtool_coalesce coal;
 846
 847		coal.rx_coalesce_usecs = cpsw->coal_intvl;
 848		cpsw_set_coalesce(ndev, &coal, NULL, NULL);
 849	}
 850
 851	cpdma_ctlr_start(cpsw->dma);
 852	cpsw_intr_enable(cpsw);
 853	cpsw->usage_count++;
 
 
 854
 855	return 0;
 856
 857err_cleanup:
 858	if (!cpsw->usage_count) {
 859		napi_disable(&cpsw->napi_rx);
 860		napi_disable(&cpsw->napi_tx);
 861		cpdma_ctlr_stop(cpsw->dma);
 862		cpsw_destroy_xdp_rxqs(cpsw);
 863	}
 864
 865	for_each_slave(priv, cpsw_slave_stop, cpsw);
 866	pm_runtime_put_sync(cpsw->dev);
 867	netif_carrier_off(priv->ndev);
 868	return ret;
 869}
 870
 871static int cpsw_ndo_stop(struct net_device *ndev)
 872{
 873	struct cpsw_priv *priv = netdev_priv(ndev);
 874	struct cpsw_common *cpsw = priv->cpsw;
 875
 876	cpsw_info(priv, ifdown, "shutting down cpsw device\n");
 877	__hw_addr_ref_unsync_dev(&ndev->mc, ndev, cpsw_purge_all_mc);
 878	netif_tx_stop_all_queues(priv->ndev);
 879	netif_carrier_off(priv->ndev);
 880
 881	if (cpsw->usage_count <= 1) {
 882		napi_disable(&cpsw->napi_rx);
 883		napi_disable(&cpsw->napi_tx);
 884		cpts_unregister(cpsw->cpts);
 885		cpsw_intr_disable(cpsw);
 886		cpdma_ctlr_stop(cpsw->dma);
 887		cpsw_ale_stop(cpsw->ale);
 888		cpsw_destroy_xdp_rxqs(cpsw);
 889	}
 890	for_each_slave(priv, cpsw_slave_stop, cpsw);
 891
 892	if (cpsw_need_resplit(cpsw))
 893		cpsw_split_res(cpsw);
 894
 895	cpsw->usage_count--;
 896	pm_runtime_put_sync(cpsw->dev);
 
 
 897	return 0;
 898}
 899
 900static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb,
 901				       struct net_device *ndev)
 902{
 903	struct cpsw_priv *priv = netdev_priv(ndev);
 904	struct cpsw_common *cpsw = priv->cpsw;
 905	struct cpts *cpts = cpsw->cpts;
 906	struct netdev_queue *txq;
 907	struct cpdma_chan *txch;
 908	int ret, q_idx;
 909
 910	if (skb_put_padto(skb, CPSW_MIN_PACKET_SIZE)) {
 
 
 911		cpsw_err(priv, tx_err, "packet pad failed\n");
 912		ndev->stats.tx_dropped++;
 913		return NET_XMIT_DROP;
 914	}
 915
 916	if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
 917	    priv->tx_ts_enabled && cpts_can_timestamp(cpts, skb))
 918		skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
 919
 
 
 920	q_idx = skb_get_queue_mapping(skb);
 921	if (q_idx >= cpsw->tx_ch_num)
 922		q_idx = q_idx % cpsw->tx_ch_num;
 923
 924	txch = cpsw->txv[q_idx].ch;
 925	txq = netdev_get_tx_queue(ndev, q_idx);
 926	skb_tx_timestamp(skb);
 927	ret = cpdma_chan_submit(txch, skb, skb->data, skb->len,
 928				priv->emac_port + cpsw->data.dual_emac);
 929	if (unlikely(ret != 0)) {
 930		cpsw_err(priv, tx_err, "desc submit failed\n");
 931		goto fail;
 932	}
 933
 934	/* If there is no more tx desc left free then we need to
 935	 * tell the kernel to stop sending us tx frames.
 936	 */
 937	if (unlikely(!cpdma_check_free_tx_desc(txch))) {
 
 938		netif_tx_stop_queue(txq);
 939
 940		/* Barrier, so that stop_queue visible to other cpus */
 941		smp_mb__after_atomic();
 942
 943		if (cpdma_check_free_tx_desc(txch))
 944			netif_tx_wake_queue(txq);
 945	}
 946
 947	return NETDEV_TX_OK;
 948fail:
 949	ndev->stats.tx_dropped++;
 
 950	netif_tx_stop_queue(txq);
 
 
 951
 952	/* Barrier, so that stop_queue visible to other cpus */
 953	smp_mb__after_atomic();
 954
 955	if (cpdma_check_free_tx_desc(txch))
 956		netif_tx_wake_queue(txq);
 
 
 957
 958	return NETDEV_TX_BUSY;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 959}
 960
 961static int cpsw_ndo_set_mac_address(struct net_device *ndev, void *p)
 962{
 963	struct cpsw_priv *priv = netdev_priv(ndev);
 964	struct sockaddr *addr = (struct sockaddr *)p;
 965	struct cpsw_common *cpsw = priv->cpsw;
 966	int flags = 0;
 967	u16 vid = 0;
 968	int ret;
 969
 970	if (!is_valid_ether_addr(addr->sa_data))
 971		return -EADDRNOTAVAIL;
 972
 973	ret = pm_runtime_resume_and_get(cpsw->dev);
 974	if (ret < 0)
 
 975		return ret;
 
 976
 977	if (cpsw->data.dual_emac) {
 978		vid = cpsw->slaves[priv->emac_port].port_vlan;
 979		flags = ALE_VLAN;
 980	}
 981
 982	cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM,
 983			   flags, vid);
 984	cpsw_ale_add_ucast(cpsw->ale, addr->sa_data, HOST_PORT_NUM,
 985			   flags, vid);
 986
 987	memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN);
 988	eth_hw_addr_set(ndev, priv->mac_addr);
 989	for_each_slave(priv, cpsw_set_slave_mac, priv);
 990
 991	pm_runtime_put(cpsw->dev);
 992
 993	return 0;
 994}
 995
 
 
 
 
 
 
 
 
 
 
 
 
 996static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv,
 997				unsigned short vid)
 998{
 999	int ret;
1000	int unreg_mcast_mask = 0;
1001	int mcast_mask;
1002	u32 port_mask;
1003	struct cpsw_common *cpsw = priv->cpsw;
1004
1005	if (cpsw->data.dual_emac) {
1006		port_mask = (1 << (priv->emac_port + 1)) | ALE_PORT_HOST;
1007
1008		mcast_mask = ALE_PORT_HOST;
1009		if (priv->ndev->flags & IFF_ALLMULTI)
1010			unreg_mcast_mask = mcast_mask;
1011	} else {
1012		port_mask = ALE_ALL_PORTS;
1013		mcast_mask = port_mask;
1014
1015		if (priv->ndev->flags & IFF_ALLMULTI)
1016			unreg_mcast_mask = ALE_ALL_PORTS;
1017		else
1018			unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2;
1019	}
1020
1021	ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask,
1022				unreg_mcast_mask);
1023	if (ret != 0)
1024		return ret;
1025
1026	ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr,
1027				 HOST_PORT_NUM, ALE_VLAN, vid);
1028	if (ret != 0)
1029		goto clean_vid;
1030
1031	ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
1032				 mcast_mask, ALE_VLAN, vid, 0);
1033	if (ret != 0)
1034		goto clean_vlan_ucast;
1035	return 0;
1036
1037clean_vlan_ucast:
1038	cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr,
1039			   HOST_PORT_NUM, ALE_VLAN, vid);
1040clean_vid:
1041	cpsw_ale_del_vlan(cpsw->ale, vid, 0);
1042	return ret;
1043}
1044
1045static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev,
1046				    __be16 proto, u16 vid)
1047{
1048	struct cpsw_priv *priv = netdev_priv(ndev);
1049	struct cpsw_common *cpsw = priv->cpsw;
1050	int ret;
1051
1052	if (vid == cpsw->data.default_vlan)
1053		return 0;
1054
1055	ret = pm_runtime_resume_and_get(cpsw->dev);
1056	if (ret < 0)
 
1057		return ret;
 
1058
1059	if (cpsw->data.dual_emac) {
1060		/* In dual EMAC, reserved VLAN id should not be used for
1061		 * creating VLAN interfaces as this can break the dual
1062		 * EMAC port separation
1063		 */
1064		int i;
1065
1066		for (i = 0; i < cpsw->data.slaves; i++) {
1067			if (vid == cpsw->slaves[i].port_vlan) {
1068				ret = -EINVAL;
1069				goto err;
1070			}
1071		}
1072	}
1073
1074	dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid);
1075	ret = cpsw_add_vlan_ale_entry(priv, vid);
1076err:
1077	pm_runtime_put(cpsw->dev);
1078	return ret;
1079}
1080
1081static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev,
1082				     __be16 proto, u16 vid)
1083{
1084	struct cpsw_priv *priv = netdev_priv(ndev);
1085	struct cpsw_common *cpsw = priv->cpsw;
1086	int ret;
1087
1088	if (vid == cpsw->data.default_vlan)
1089		return 0;
1090
1091	ret = pm_runtime_resume_and_get(cpsw->dev);
1092	if (ret < 0)
 
1093		return ret;
 
1094
1095	if (cpsw->data.dual_emac) {
1096		int i;
1097
1098		for (i = 0; i < cpsw->data.slaves; i++) {
1099			if (vid == cpsw->slaves[i].port_vlan)
1100				goto err;
1101		}
1102	}
1103
1104	dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid);
1105	ret = cpsw_ale_del_vlan(cpsw->ale, vid, 0);
1106	ret |= cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr,
1107				  HOST_PORT_NUM, ALE_VLAN, vid);
1108	ret |= cpsw_ale_del_mcast(cpsw->ale, priv->ndev->broadcast,
1109				  0, ALE_VLAN, vid);
1110	ret |= cpsw_ale_flush_multicast(cpsw->ale, ALE_PORT_HOST, vid);
1111err:
 
 
 
 
1112	pm_runtime_put(cpsw->dev);
1113	return ret;
1114}
1115
1116static int cpsw_ndo_xdp_xmit(struct net_device *ndev, int n,
1117			     struct xdp_frame **frames, u32 flags)
1118{
1119	struct cpsw_priv *priv = netdev_priv(ndev);
1120	struct cpsw_common *cpsw = priv->cpsw;
1121	struct xdp_frame *xdpf;
1122	int i, nxmit = 0, port;
 
 
 
 
 
 
1123
1124	if (unlikely(flags & ~XDP_XMIT_FLAGS_MASK))
 
 
 
 
1125		return -EINVAL;
 
1126
1127	for (i = 0; i < n; i++) {
1128		xdpf = frames[i];
1129		if (xdpf->len < CPSW_MIN_PACKET_SIZE)
1130			break;
1131
1132		port = priv->emac_port + cpsw->data.dual_emac;
1133		if (cpsw_xdp_tx_frame(priv, xdpf, NULL, port))
1134			break;
1135		nxmit++;
1136	}
1137
1138	return nxmit;
1139}
1140
1141#ifdef CONFIG_NET_POLL_CONTROLLER
1142static void cpsw_ndo_poll_controller(struct net_device *ndev)
1143{
1144	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
1145
1146	cpsw_intr_disable(cpsw);
1147	cpsw_rx_interrupt(cpsw->irqs_table[0], cpsw);
1148	cpsw_tx_interrupt(cpsw->irqs_table[1], cpsw);
1149	cpsw_intr_enable(cpsw);
 
 
 
 
 
 
 
1150}
1151#endif
1152
1153static const struct net_device_ops cpsw_netdev_ops = {
1154	.ndo_open		= cpsw_ndo_open,
1155	.ndo_stop		= cpsw_ndo_stop,
1156	.ndo_start_xmit		= cpsw_ndo_start_xmit,
1157	.ndo_set_mac_address	= cpsw_ndo_set_mac_address,
1158	.ndo_eth_ioctl		= cpsw_ndo_ioctl,
1159	.ndo_validate_addr	= eth_validate_addr,
1160	.ndo_tx_timeout		= cpsw_ndo_tx_timeout,
1161	.ndo_set_rx_mode	= cpsw_ndo_set_rx_mode,
1162	.ndo_set_tx_maxrate	= cpsw_ndo_set_tx_maxrate,
1163#ifdef CONFIG_NET_POLL_CONTROLLER
1164	.ndo_poll_controller	= cpsw_ndo_poll_controller,
1165#endif
1166	.ndo_vlan_rx_add_vid	= cpsw_ndo_vlan_rx_add_vid,
1167	.ndo_vlan_rx_kill_vid	= cpsw_ndo_vlan_rx_kill_vid,
1168	.ndo_setup_tc           = cpsw_ndo_setup_tc,
1169	.ndo_bpf		= cpsw_ndo_bpf,
1170	.ndo_xdp_xmit		= cpsw_ndo_xdp_xmit,
1171};
1172
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1173static void cpsw_get_drvinfo(struct net_device *ndev,
1174			     struct ethtool_drvinfo *info)
1175{
1176	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
1177	struct platform_device	*pdev = to_platform_device(cpsw->dev);
1178
1179	strscpy(info->driver, "cpsw", sizeof(info->driver));
1180	strscpy(info->version, "1.0", sizeof(info->version));
1181	strscpy(info->bus_info, pdev->name, sizeof(info->bus_info));
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1182}
1183
1184static int cpsw_set_pauseparam(struct net_device *ndev,
1185			       struct ethtool_pauseparam *pause)
1186{
1187	struct cpsw_priv *priv = netdev_priv(ndev);
1188	bool link;
1189
1190	priv->rx_pause = pause->rx_pause ? true : false;
1191	priv->tx_pause = pause->tx_pause ? true : false;
1192
1193	for_each_slave(priv, _cpsw_adjust_link, priv, &link);
1194	return 0;
1195}
1196
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1197static int cpsw_set_channels(struct net_device *ndev,
1198			     struct ethtool_channels *chs)
1199{
1200	return cpsw_set_channels_common(ndev, chs, cpsw_rx_handler);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1201}
1202
1203static const struct ethtool_ops cpsw_ethtool_ops = {
1204	.supported_coalesce_params = ETHTOOL_COALESCE_RX_USECS,
1205	.get_drvinfo	= cpsw_get_drvinfo,
1206	.get_msglevel	= cpsw_get_msglevel,
1207	.set_msglevel	= cpsw_set_msglevel,
1208	.get_link	= ethtool_op_get_link,
1209	.get_ts_info	= cpsw_get_ts_info,
1210	.get_coalesce	= cpsw_get_coalesce,
1211	.set_coalesce	= cpsw_set_coalesce,
1212	.get_sset_count		= cpsw_get_sset_count,
1213	.get_strings		= cpsw_get_strings,
1214	.get_ethtool_stats	= cpsw_get_ethtool_stats,
1215	.get_pauseparam		= cpsw_get_pauseparam,
1216	.set_pauseparam		= cpsw_set_pauseparam,
1217	.get_wol	= cpsw_get_wol,
1218	.set_wol	= cpsw_set_wol,
1219	.get_regs_len	= cpsw_get_regs_len,
1220	.get_regs	= cpsw_get_regs,
1221	.begin		= cpsw_ethtool_op_begin,
1222	.complete	= cpsw_ethtool_op_complete,
1223	.get_channels	= cpsw_get_channels,
1224	.set_channels	= cpsw_set_channels,
1225	.get_link_ksettings	= cpsw_get_link_ksettings,
1226	.set_link_ksettings	= cpsw_set_link_ksettings,
1227	.get_eee	= cpsw_get_eee,
1228	.set_eee	= cpsw_set_eee,
1229	.nway_reset	= cpsw_nway_reset,
1230	.get_ringparam = cpsw_get_ringparam,
1231	.set_ringparam = cpsw_set_ringparam,
1232};
1233
 
 
 
 
 
 
 
 
 
 
 
 
 
1234static int cpsw_probe_dt(struct cpsw_platform_data *data,
1235			 struct platform_device *pdev)
1236{
1237	struct device_node *node = pdev->dev.of_node;
1238	struct device_node *slave_node;
1239	int i = 0, ret;
1240	u32 prop;
1241
1242	if (!node)
1243		return -EINVAL;
1244
1245	if (of_property_read_u32(node, "slaves", &prop)) {
1246		dev_err(&pdev->dev, "Missing slaves property in the DT.\n");
1247		return -EINVAL;
1248	}
1249	data->slaves = prop;
1250
1251	if (of_property_read_u32(node, "active_slave", &prop)) {
1252		dev_err(&pdev->dev, "Missing active_slave property in the DT.\n");
1253		return -EINVAL;
1254	}
1255	data->active_slave = prop;
1256
1257	data->slave_data = devm_kcalloc(&pdev->dev,
1258					data->slaves,
1259					sizeof(struct cpsw_slave_data),
1260					GFP_KERNEL);
1261	if (!data->slave_data)
1262		return -ENOMEM;
1263
1264	if (of_property_read_u32(node, "cpdma_channels", &prop)) {
1265		dev_err(&pdev->dev, "Missing cpdma_channels property in the DT.\n");
1266		return -EINVAL;
1267	}
1268	data->channels = prop;
1269
 
 
 
 
 
 
1270	if (of_property_read_u32(node, "bd_ram_size", &prop)) {
1271		dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n");
1272		return -EINVAL;
1273	}
1274	data->bd_ram_size = prop;
1275
1276	if (of_property_read_u32(node, "mac_control", &prop)) {
1277		dev_err(&pdev->dev, "Missing mac_control property in the DT.\n");
1278		return -EINVAL;
1279	}
1280	data->mac_control = prop;
1281
1282	if (of_property_read_bool(node, "dual_emac"))
1283		data->dual_emac = true;
1284
1285	/*
1286	 * Populate all the child nodes here...
1287	 */
1288	ret = of_platform_populate(node, NULL, NULL, &pdev->dev);
1289	/* We do not want to force this, as in some cases may not have child */
1290	if (ret)
1291		dev_warn(&pdev->dev, "Doesn't have any child node\n");
1292
1293	for_each_available_child_of_node(node, slave_node) {
1294		struct cpsw_slave_data *slave_data = data->slave_data + i;
 
1295		int lenp;
1296		const __be32 *parp;
1297
1298		/* This is no slave child node, continue */
1299		if (!of_node_name_eq(slave_node, "slave"))
1300			continue;
1301
1302		slave_data->ifphy = devm_of_phy_get(&pdev->dev, slave_node,
1303						    NULL);
1304		if (!IS_ENABLED(CONFIG_TI_CPSW_PHY_SEL) &&
1305		    IS_ERR(slave_data->ifphy)) {
1306			ret = PTR_ERR(slave_data->ifphy);
1307			dev_err(&pdev->dev,
1308				"%d: Error retrieving port phy: %d\n", i, ret);
1309			goto err_node_put;
1310		}
1311
1312		slave_data->slave_node = slave_node;
1313		slave_data->phy_node = of_parse_phandle(slave_node,
1314							"phy-handle", 0);
1315		parp = of_get_property(slave_node, "phy_id", &lenp);
1316		if (slave_data->phy_node) {
1317			dev_dbg(&pdev->dev,
1318				"slave[%d] using phy-handle=\"%pOF\"\n",
1319				i, slave_data->phy_node);
1320		} else if (of_phy_is_fixed_link(slave_node)) {
1321			/* In the case of a fixed PHY, the DT node associated
1322			 * to the PHY is the Ethernet MAC DT node.
1323			 */
1324			ret = of_phy_register_fixed_link(slave_node);
1325			if (ret) {
1326				dev_err_probe(&pdev->dev, ret, "failed to register fixed-link phy\n");
1327				goto err_node_put;
 
1328			}
1329			slave_data->phy_node = of_node_get(slave_node);
1330		} else if (parp) {
1331			u32 phyid;
1332			struct device_node *mdio_node;
1333			struct platform_device *mdio;
1334
1335			if (lenp != (sizeof(__be32) * 2)) {
1336				dev_err(&pdev->dev, "Invalid slave[%d] phy_id property\n", i);
1337				goto no_phy_slave;
1338			}
1339			mdio_node = of_find_node_by_phandle(be32_to_cpup(parp));
1340			phyid = be32_to_cpup(parp+1);
1341			mdio = of_find_device_by_node(mdio_node);
1342			of_node_put(mdio_node);
1343			if (!mdio) {
1344				dev_err(&pdev->dev, "Missing mdio platform device\n");
1345				ret = -EINVAL;
1346				goto err_node_put;
1347			}
1348			snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),
1349				 PHY_ID_FMT, mdio->name, phyid);
1350			put_device(&mdio->dev);
1351		} else {
1352			dev_err(&pdev->dev,
1353				"No slave[%d] phy_id, phy-handle, or fixed-link property\n",
1354				i);
1355			goto no_phy_slave;
1356		}
1357		ret = of_get_phy_mode(slave_node, &slave_data->phy_if);
1358		if (ret) {
1359			dev_err(&pdev->dev, "Missing or malformed slave[%d] phy-mode property\n",
1360				i);
1361			goto err_node_put;
1362		}
1363
1364no_phy_slave:
1365		ret = of_get_mac_address(slave_node, slave_data->mac_addr);
1366		if (ret) {
 
 
1367			ret = ti_cm_get_macid(&pdev->dev, i,
1368					      slave_data->mac_addr);
1369			if (ret)
1370				goto err_node_put;
1371		}
1372		if (data->dual_emac) {
1373			if (of_property_read_u32(slave_node, "dual_emac_res_vlan",
1374						 &prop)) {
1375				dev_err(&pdev->dev, "Missing dual_emac_res_vlan in DT.\n");
1376				slave_data->dual_emac_res_vlan = i+1;
1377				dev_err(&pdev->dev, "Using %d as Reserved VLAN for %d slave\n",
1378					slave_data->dual_emac_res_vlan, i);
1379			} else {
1380				slave_data->dual_emac_res_vlan = prop;
1381			}
1382		}
1383
1384		i++;
1385		if (i == data->slaves) {
1386			ret = 0;
1387			goto err_node_put;
1388		}
1389	}
1390
1391	return 0;
1392
1393err_node_put:
1394	of_node_put(slave_node);
1395	return ret;
1396}
1397
1398static void cpsw_remove_dt(struct platform_device *pdev)
1399{
1400	struct cpsw_common *cpsw = platform_get_drvdata(pdev);
 
1401	struct cpsw_platform_data *data = &cpsw->data;
1402	struct device_node *node = pdev->dev.of_node;
1403	struct device_node *slave_node;
1404	int i = 0;
1405
1406	for_each_available_child_of_node(node, slave_node) {
1407		struct cpsw_slave_data *slave_data = &data->slave_data[i];
1408
1409		if (!of_node_name_eq(slave_node, "slave"))
1410			continue;
1411
1412		if (of_phy_is_fixed_link(slave_node))
1413			of_phy_deregister_fixed_link(slave_node);
1414
1415		of_node_put(slave_data->phy_node);
1416
1417		i++;
1418		if (i == data->slaves) {
1419			of_node_put(slave_node);
1420			break;
1421		}
1422	}
1423
1424	of_platform_depopulate(&pdev->dev);
1425}
1426
1427static int cpsw_probe_dual_emac(struct cpsw_priv *priv)
1428{
1429	struct cpsw_common		*cpsw = priv->cpsw;
1430	struct cpsw_platform_data	*data = &cpsw->data;
1431	struct net_device		*ndev;
1432	struct cpsw_priv		*priv_sl2;
1433	int ret = 0;
1434
1435	ndev = devm_alloc_etherdev_mqs(cpsw->dev, sizeof(struct cpsw_priv),
1436				       CPSW_MAX_QUEUES, CPSW_MAX_QUEUES);
1437	if (!ndev) {
1438		dev_err(cpsw->dev, "cpsw: error allocating net_device\n");
1439		return -ENOMEM;
1440	}
1441
1442	priv_sl2 = netdev_priv(ndev);
1443	priv_sl2->cpsw = cpsw;
1444	priv_sl2->ndev = ndev;
1445	priv_sl2->dev  = &ndev->dev;
1446	priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
1447
1448	if (is_valid_ether_addr(data->slave_data[1].mac_addr)) {
1449		memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr,
1450			ETH_ALEN);
1451		dev_info(cpsw->dev, "cpsw: Detected MACID = %pM\n",
1452			 priv_sl2->mac_addr);
1453	} else {
1454		eth_random_addr(priv_sl2->mac_addr);
1455		dev_info(cpsw->dev, "cpsw: Random MACID = %pM\n",
1456			 priv_sl2->mac_addr);
1457	}
1458	eth_hw_addr_set(ndev, priv_sl2->mac_addr);
1459
1460	priv_sl2->emac_port = 1;
1461	cpsw->slaves[1].ndev = ndev;
1462	ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;
1463	ndev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |
1464			     NETDEV_XDP_ACT_NDO_XMIT;
1465
1466	ndev->netdev_ops = &cpsw_netdev_ops;
1467	ndev->ethtool_ops = &cpsw_ethtool_ops;
1468
1469	/* register the network device */
1470	SET_NETDEV_DEV(ndev, cpsw->dev);
1471	ndev->dev.of_node = cpsw->slaves[1].data->slave_node;
1472	ret = register_netdev(ndev);
1473	if (ret)
1474		dev_err(cpsw->dev, "cpsw: error registering net device\n");
 
 
 
1475
1476	return ret;
1477}
1478
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1479static const struct of_device_id cpsw_of_mtable[] = {
1480	{ .compatible = "ti,cpsw"},
1481	{ .compatible = "ti,am335x-cpsw"},
1482	{ .compatible = "ti,am4372-cpsw"},
1483	{ .compatible = "ti,dra7-cpsw"},
1484	{ /* sentinel */ },
1485};
1486MODULE_DEVICE_TABLE(of, cpsw_of_mtable);
1487
1488static const struct soc_device_attribute cpsw_soc_devices[] = {
1489	{ .family = "AM33xx", .revision = "ES1.0"},
1490	{ /* sentinel */ }
1491};
1492
1493static int cpsw_probe(struct platform_device *pdev)
1494{
1495	struct device			*dev = &pdev->dev;
1496	struct clk			*clk;
1497	struct cpsw_platform_data	*data;
1498	struct net_device		*ndev;
1499	struct cpsw_priv		*priv;
 
 
1500	void __iomem			*ss_regs;
1501	struct resource			*ss_res;
 
 
1502	struct gpio_descs		*mode;
1503	const struct soc_device_attribute *soc;
1504	struct cpsw_common		*cpsw;
1505	int ret = 0, ch;
1506	int irq;
1507
1508	cpsw = devm_kzalloc(dev, sizeof(struct cpsw_common), GFP_KERNEL);
1509	if (!cpsw)
1510		return -ENOMEM;
1511
1512	platform_set_drvdata(pdev, cpsw);
1513	cpsw_slave_index = cpsw_slave_index_priv;
 
 
 
 
 
1514
1515	cpsw->dev = dev;
 
 
 
 
 
 
1516
1517	mode = devm_gpiod_get_array_optional(dev, "mode", GPIOD_OUT_LOW);
1518	if (IS_ERR(mode)) {
1519		ret = PTR_ERR(mode);
1520		dev_err(dev, "gpio request failed, ret %d\n", ret);
1521		return ret;
1522	}
1523
1524	clk = devm_clk_get(dev, "fck");
1525	if (IS_ERR(clk)) {
1526		ret = PTR_ERR(clk);
1527		dev_err(dev, "fck is not found %d\n", ret);
1528		return ret;
1529	}
1530	cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000;
1531
1532	ss_regs = devm_platform_get_and_ioremap_resource(pdev, 0, &ss_res);
1533	if (IS_ERR(ss_regs))
1534		return PTR_ERR(ss_regs);
1535	cpsw->regs = ss_regs;
1536
1537	cpsw->wr_regs = devm_platform_ioremap_resource(pdev, 1);
1538	if (IS_ERR(cpsw->wr_regs))
1539		return PTR_ERR(cpsw->wr_regs);
1540
1541	/* RX IRQ */
1542	irq = platform_get_irq(pdev, 1);
1543	if (irq < 0)
1544		return irq;
1545	cpsw->irqs_table[0] = irq;
1546
1547	/* TX IRQ */
1548	irq = platform_get_irq(pdev, 2);
1549	if (irq < 0)
1550		return irq;
1551	cpsw->irqs_table[1] = irq;
1552
1553	/* get misc irq*/
1554	irq = platform_get_irq(pdev, 3);
1555	if (irq <= 0)
1556		return irq;
1557	cpsw->misc_irq = irq;
1558
1559	/*
1560	 * This may be required here for child devices.
1561	 */
1562	pm_runtime_enable(dev);
 
 
 
1563
1564	/* Need to enable clocks with runtime PM api to access module
1565	 * registers
1566	 */
1567	ret = pm_runtime_resume_and_get(dev);
1568	if (ret < 0)
 
1569		goto clean_runtime_disable_ret;
 
1570
1571	ret = cpsw_probe_dt(&cpsw->data, pdev);
1572	if (ret)
1573		goto clean_dt_ret;
1574
1575	soc = soc_device_match(cpsw_soc_devices);
1576	if (soc)
1577		cpsw->quirk_irq = true;
1578
1579	data = &cpsw->data;
1580	cpsw->slaves = devm_kcalloc(dev,
1581				    data->slaves, sizeof(struct cpsw_slave),
 
 
 
 
 
 
 
 
 
 
 
 
 
1582				    GFP_KERNEL);
1583	if (!cpsw->slaves) {
1584		ret = -ENOMEM;
1585		goto clean_dt_ret;
1586	}
 
 
1587
1588	cpsw->rx_packet_max = max(rx_packet_max, CPSW_MAX_PACKET_SIZE);
1589	cpsw->descs_pool_size = descs_pool_size;
1590
1591	ret = cpsw_init_common(cpsw, ss_regs, ale_ageout,
1592			       ss_res->start + CPSW2_BD_OFFSET,
1593			       descs_pool_size);
1594	if (ret)
1595		goto clean_dt_ret;
1596
1597	ch = cpsw->quirk_irq ? 0 : 7;
1598	cpsw->txv[0].ch = cpdma_chan_create(cpsw->dma, ch, cpsw_tx_handler, 0);
1599	if (IS_ERR(cpsw->txv[0].ch)) {
1600		dev_err(dev, "error initializing tx dma channel\n");
1601		ret = PTR_ERR(cpsw->txv[0].ch);
1602		goto clean_cpts;
1603	}
 
1604
1605	cpsw->rxv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_rx_handler, 1);
1606	if (IS_ERR(cpsw->rxv[0].ch)) {
1607		dev_err(dev, "error initializing rx dma channel\n");
1608		ret = PTR_ERR(cpsw->rxv[0].ch);
1609		goto clean_cpts;
1610	}
1611	cpsw_split_res(cpsw);
1612
1613	/* setup netdev */
1614	ndev = devm_alloc_etherdev_mqs(dev, sizeof(struct cpsw_priv),
1615				       CPSW_MAX_QUEUES, CPSW_MAX_QUEUES);
1616	if (!ndev) {
1617		dev_err(dev, "error allocating net_device\n");
1618		ret = -ENOMEM;
1619		goto clean_cpts;
1620	}
 
1621
1622	priv = netdev_priv(ndev);
1623	priv->cpsw = cpsw;
1624	priv->ndev = ndev;
1625	priv->dev  = dev;
1626	priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
1627	priv->emac_port = 0;
1628
1629	if (is_valid_ether_addr(data->slave_data[0].mac_addr)) {
1630		memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN);
1631		dev_info(dev, "Detected MACID = %pM\n", priv->mac_addr);
1632	} else {
1633		eth_random_addr(priv->mac_addr);
1634		dev_info(dev, "Random MACID = %pM\n", priv->mac_addr);
1635	}
1636
1637	eth_hw_addr_set(ndev, priv->mac_addr);
 
1638
1639	cpsw->slaves[0].ndev = ndev;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1640
1641	ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER | NETIF_F_HW_VLAN_CTAG_RX;
1642	ndev->xdp_features = NETDEV_XDP_ACT_BASIC | NETDEV_XDP_ACT_REDIRECT |
1643			     NETDEV_XDP_ACT_NDO_XMIT;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1644
1645	ndev->netdev_ops = &cpsw_netdev_ops;
1646	ndev->ethtool_ops = &cpsw_ethtool_ops;
1647	netif_napi_add(ndev, &cpsw->napi_rx,
1648		       cpsw->quirk_irq ? cpsw_rx_poll : cpsw_rx_mq_poll);
1649	netif_napi_add_tx(ndev, &cpsw->napi_tx,
1650			  cpsw->quirk_irq ? cpsw_tx_poll : cpsw_tx_mq_poll);
 
1651
1652	/* register the network device */
1653	SET_NETDEV_DEV(ndev, dev);
1654	ndev->dev.of_node = cpsw->slaves[0].data->slave_node;
1655	ret = register_netdev(ndev);
1656	if (ret) {
1657		dev_err(dev, "error registering net device\n");
 
 
1658		ret = -ENODEV;
1659		goto clean_cpts;
1660	}
1661
1662	if (cpsw->data.dual_emac) {
1663		ret = cpsw_probe_dual_emac(priv);
1664		if (ret) {
1665			cpsw_err(priv, probe, "error probe slave 2 emac interface\n");
1666			goto clean_unregister_netdev_ret;
1667		}
 
 
 
 
 
 
 
 
 
 
 
 
1668	}
1669
1670	/* Grab RX and TX IRQs. Note that we also have RX_THRESHOLD and
1671	 * MISC IRQs which are always kept disabled with this driver so
1672	 * we will not request them.
1673	 *
1674	 * If anyone wants to implement support for those, make sure to
1675	 * first request and append them to irqs_table array.
1676	 */
1677	ret = devm_request_irq(dev, cpsw->irqs_table[0], cpsw_rx_interrupt,
1678			       0, dev_name(dev), cpsw);
1679	if (ret < 0) {
1680		dev_err(dev, "error attaching irq (%d)\n", ret);
1681		goto clean_unregister_netdev_ret;
1682	}
1683
 
 
 
 
 
 
1684
1685	ret = devm_request_irq(dev, cpsw->irqs_table[1], cpsw_tx_interrupt,
 
1686			       0, dev_name(&pdev->dev), cpsw);
1687	if (ret < 0) {
1688		dev_err(dev, "error attaching irq (%d)\n", ret);
1689		goto clean_unregister_netdev_ret;
1690	}
1691
1692	if (!cpsw->cpts)
1693		goto skip_cpts;
 
 
 
 
1694
1695	ret = devm_request_irq(&pdev->dev, cpsw->misc_irq, cpsw_misc_interrupt,
 
1696			       0, dev_name(&pdev->dev), cpsw);
1697	if (ret < 0) {
1698		dev_err(dev, "error attaching misc irq (%d)\n", ret);
1699		goto clean_unregister_netdev_ret;
1700	}
1701
1702	/* Enable misc CPTS evnt_pend IRQ */
1703	cpts_set_irqpoll(cpsw->cpts, false);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1704
1705skip_cpts:
1706	cpsw_notice(priv, probe,
1707		    "initialized device (regs %pa, irq %d, pool size %d)\n",
1708		    &ss_res->start, cpsw->irqs_table[0], descs_pool_size);
 
 
 
 
 
 
1709
1710	pm_runtime_put(&pdev->dev);
1711
1712	return 0;
1713
1714clean_unregister_netdev_ret:
1715	unregister_netdev(ndev);
1716clean_cpts:
1717	cpts_release(cpsw->cpts);
 
1718	cpdma_ctlr_destroy(cpsw->dma);
1719clean_dt_ret:
1720	cpsw_remove_dt(pdev);
1721	pm_runtime_put_sync(&pdev->dev);
1722clean_runtime_disable_ret:
1723	pm_runtime_disable(&pdev->dev);
 
 
1724	return ret;
1725}
1726
1727static void cpsw_remove(struct platform_device *pdev)
1728{
1729	struct cpsw_common *cpsw = platform_get_drvdata(pdev);
1730	int i, ret;
 
1731
1732	ret = pm_runtime_resume_and_get(&pdev->dev);
1733	if (ret < 0) {
1734		/* Note, if this error path is taken, we're leaking some
1735		 * resources.
1736		 */
1737		dev_err(&pdev->dev, "Failed to resume device (%pe)\n",
1738			ERR_PTR(ret));
1739		return;
1740	}
1741
1742	for (i = 0; i < cpsw->data.slaves; i++)
1743		if (cpsw->slaves[i].ndev)
1744			unregister_netdev(cpsw->slaves[i].ndev);
1745
1746	cpts_release(cpsw->cpts);
 
1747	cpdma_ctlr_destroy(cpsw->dma);
1748	cpsw_remove_dt(pdev);
1749	pm_runtime_put_sync(&pdev->dev);
1750	pm_runtime_disable(&pdev->dev);
 
 
 
 
1751}
1752
1753#ifdef CONFIG_PM_SLEEP
1754static int cpsw_suspend(struct device *dev)
1755{
1756	struct cpsw_common *cpsw = dev_get_drvdata(dev);
1757	int i;
 
1758
1759	rtnl_lock();
 
1760
1761	for (i = 0; i < cpsw->data.slaves; i++)
1762		if (cpsw->slaves[i].ndev)
1763			if (netif_running(cpsw->slaves[i].ndev))
1764				cpsw_ndo_stop(cpsw->slaves[i].ndev);
1765
1766	rtnl_unlock();
 
 
 
1767
1768	/* Select sleep pin state */
1769	pinctrl_pm_select_sleep_state(dev);
1770
1771	return 0;
1772}
1773
1774static int cpsw_resume(struct device *dev)
1775{
1776	struct cpsw_common *cpsw = dev_get_drvdata(dev);
1777	int i;
 
1778
1779	/* Select default pin state */
1780	pinctrl_pm_select_default_state(dev);
1781
1782	/* shut up ASSERT_RTNL() warning in netif_set_real_num_tx/rx_queues */
1783	rtnl_lock();
 
 
1784
1785	for (i = 0; i < cpsw->data.slaves; i++)
1786		if (cpsw->slaves[i].ndev)
1787			if (netif_running(cpsw->slaves[i].ndev))
1788				cpsw_ndo_open(cpsw->slaves[i].ndev);
1789
 
 
 
 
1790	rtnl_unlock();
1791
1792	return 0;
1793}
1794#endif
1795
1796static SIMPLE_DEV_PM_OPS(cpsw_pm_ops, cpsw_suspend, cpsw_resume);
1797
1798static struct platform_driver cpsw_driver = {
1799	.driver = {
1800		.name	 = "cpsw",
1801		.pm	 = &cpsw_pm_ops,
1802		.of_match_table = cpsw_of_mtable,
1803	},
1804	.probe = cpsw_probe,
1805	.remove = cpsw_remove,
1806};
1807
1808module_platform_driver(cpsw_driver);
1809
1810MODULE_LICENSE("GPL");
1811MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>");
1812MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>");
1813MODULE_DESCRIPTION("TI CPSW Ethernet driver");
v4.10.11
 
   1/*
   2 * Texas Instruments Ethernet Switch Driver
   3 *
   4 * Copyright (C) 2012 Texas Instruments
   5 *
   6 * This program is free software; you can redistribute it and/or
   7 * modify it under the terms of the GNU General Public License as
   8 * published by the Free Software Foundation version 2.
   9 *
  10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
  11 * kind, whether express or implied; without even the implied warranty
  12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13 * GNU General Public License for more details.
  14 */
  15
  16#include <linux/kernel.h>
  17#include <linux/io.h>
  18#include <linux/clk.h>
  19#include <linux/timer.h>
  20#include <linux/module.h>
  21#include <linux/platform_device.h>
  22#include <linux/irqreturn.h>
  23#include <linux/interrupt.h>
  24#include <linux/if_ether.h>
  25#include <linux/etherdevice.h>
  26#include <linux/netdevice.h>
  27#include <linux/net_tstamp.h>
  28#include <linux/phy.h>
 
  29#include <linux/workqueue.h>
  30#include <linux/delay.h>
  31#include <linux/pm_runtime.h>
  32#include <linux/gpio.h>
  33#include <linux/of.h>
  34#include <linux/of_mdio.h>
  35#include <linux/of_net.h>
  36#include <linux/of_device.h>
  37#include <linux/if_vlan.h>
 
 
 
 
 
  38
  39#include <linux/pinctrl/consumer.h>
 
  40
  41#include "cpsw.h"
  42#include "cpsw_ale.h"
 
 
  43#include "cpts.h"
  44#include "davinci_cpdma.h"
  45
  46#define CPSW_DEBUG	(NETIF_MSG_HW		| NETIF_MSG_WOL		| \
  47			 NETIF_MSG_DRV		| NETIF_MSG_LINK	| \
  48			 NETIF_MSG_IFUP		| NETIF_MSG_INTR	| \
  49			 NETIF_MSG_PROBE	| NETIF_MSG_TIMER	| \
  50			 NETIF_MSG_IFDOWN	| NETIF_MSG_RX_ERR	| \
  51			 NETIF_MSG_TX_ERR	| NETIF_MSG_TX_DONE	| \
  52			 NETIF_MSG_PKTDATA	| NETIF_MSG_TX_QUEUED	| \
  53			 NETIF_MSG_RX_STATUS)
  54
  55#define cpsw_info(priv, type, format, ...)		\
  56do {								\
  57	if (netif_msg_##type(priv) && net_ratelimit())		\
  58		dev_info(priv->dev, format, ## __VA_ARGS__);	\
  59} while (0)
  60
  61#define cpsw_err(priv, type, format, ...)		\
  62do {								\
  63	if (netif_msg_##type(priv) && net_ratelimit())		\
  64		dev_err(priv->dev, format, ## __VA_ARGS__);	\
  65} while (0)
  66
  67#define cpsw_dbg(priv, type, format, ...)		\
  68do {								\
  69	if (netif_msg_##type(priv) && net_ratelimit())		\
  70		dev_dbg(priv->dev, format, ## __VA_ARGS__);	\
  71} while (0)
  72
  73#define cpsw_notice(priv, type, format, ...)		\
  74do {								\
  75	if (netif_msg_##type(priv) && net_ratelimit())		\
  76		dev_notice(priv->dev, format, ## __VA_ARGS__);	\
  77} while (0)
  78
  79#define ALE_ALL_PORTS		0x7
  80
  81#define CPSW_MAJOR_VERSION(reg)		(reg >> 8 & 0x7)
  82#define CPSW_MINOR_VERSION(reg)		(reg & 0xff)
  83#define CPSW_RTL_VERSION(reg)		((reg >> 11) & 0x1f)
  84
  85#define CPSW_VERSION_1		0x19010a
  86#define CPSW_VERSION_2		0x19010c
  87#define CPSW_VERSION_3		0x19010f
  88#define CPSW_VERSION_4		0x190112
  89
  90#define HOST_PORT_NUM		0
  91#define SLIVER_SIZE		0x40
  92
  93#define CPSW1_HOST_PORT_OFFSET	0x028
  94#define CPSW1_SLAVE_OFFSET	0x050
  95#define CPSW1_SLAVE_SIZE	0x040
  96#define CPSW1_CPDMA_OFFSET	0x100
  97#define CPSW1_STATERAM_OFFSET	0x200
  98#define CPSW1_HW_STATS		0x400
  99#define CPSW1_CPTS_OFFSET	0x500
 100#define CPSW1_ALE_OFFSET	0x600
 101#define CPSW1_SLIVER_OFFSET	0x700
 102
 103#define CPSW2_HOST_PORT_OFFSET	0x108
 104#define CPSW2_SLAVE_OFFSET	0x200
 105#define CPSW2_SLAVE_SIZE	0x100
 106#define CPSW2_CPDMA_OFFSET	0x800
 107#define CPSW2_HW_STATS		0x900
 108#define CPSW2_STATERAM_OFFSET	0xa00
 109#define CPSW2_CPTS_OFFSET	0xc00
 110#define CPSW2_ALE_OFFSET	0xd00
 111#define CPSW2_SLIVER_OFFSET	0xd80
 112#define CPSW2_BD_OFFSET		0x2000
 113
 114#define CPDMA_RXTHRESH		0x0c0
 115#define CPDMA_RXFREE		0x0e0
 116#define CPDMA_TXHDP		0x00
 117#define CPDMA_RXHDP		0x20
 118#define CPDMA_TXCP		0x40
 119#define CPDMA_RXCP		0x60
 120
 121#define CPSW_POLL_WEIGHT	64
 122#define CPSW_MIN_PACKET_SIZE	60
 123#define CPSW_MAX_PACKET_SIZE	(1500 + 14 + 4 + 4)
 124
 125#define RX_PRIORITY_MAPPING	0x76543210
 126#define TX_PRIORITY_MAPPING	0x33221100
 127#define CPDMA_TX_PRIORITY_MAP	0x01234567
 128
 129#define CPSW_VLAN_AWARE		BIT(1)
 130#define CPSW_ALE_VLAN_AWARE	1
 131
 132#define CPSW_FIFO_NORMAL_MODE		(0 << 16)
 133#define CPSW_FIFO_DUAL_MAC_MODE		(1 << 16)
 134#define CPSW_FIFO_RATE_LIMIT_MODE	(2 << 16)
 135
 136#define CPSW_INTPACEEN		(0x3f << 16)
 137#define CPSW_INTPRESCALE_MASK	(0x7FF << 0)
 138#define CPSW_CMINTMAX_CNT	63
 139#define CPSW_CMINTMIN_CNT	2
 140#define CPSW_CMINTMAX_INTVL	(1000 / CPSW_CMINTMIN_CNT)
 141#define CPSW_CMINTMIN_INTVL	((1000 / CPSW_CMINTMAX_CNT) + 1)
 142
 143#define cpsw_slave_index(cpsw, priv)				\
 144		((cpsw->data.dual_emac) ? priv->emac_port :	\
 145		cpsw->data.active_slave)
 146#define IRQ_NUM			2
 147#define CPSW_MAX_QUEUES		8
 148
 149static int debug_level;
 150module_param(debug_level, int, 0);
 151MODULE_PARM_DESC(debug_level, "cpsw debug level (NETIF_MSG bits)");
 152
 153static int ale_ageout = 10;
 154module_param(ale_ageout, int, 0);
 155MODULE_PARM_DESC(ale_ageout, "cpsw ale ageout interval (seconds)");
 156
 157static int rx_packet_max = CPSW_MAX_PACKET_SIZE;
 158module_param(rx_packet_max, int, 0);
 159MODULE_PARM_DESC(rx_packet_max, "maximum receive packet size (bytes)");
 160
 161struct cpsw_wr_regs {
 162	u32	id_ver;
 163	u32	soft_reset;
 164	u32	control;
 165	u32	int_control;
 166	u32	rx_thresh_en;
 167	u32	rx_en;
 168	u32	tx_en;
 169	u32	misc_en;
 170	u32	mem_allign1[8];
 171	u32	rx_thresh_stat;
 172	u32	rx_stat;
 173	u32	tx_stat;
 174	u32	misc_stat;
 175	u32	mem_allign2[8];
 176	u32	rx_imax;
 177	u32	tx_imax;
 178
 179};
 180
 181struct cpsw_ss_regs {
 182	u32	id_ver;
 183	u32	control;
 184	u32	soft_reset;
 185	u32	stat_port_en;
 186	u32	ptype;
 187	u32	soft_idle;
 188	u32	thru_rate;
 189	u32	gap_thresh;
 190	u32	tx_start_wds;
 191	u32	flow_control;
 192	u32	vlan_ltype;
 193	u32	ts_ltype;
 194	u32	dlr_ltype;
 195};
 196
 197/* CPSW_PORT_V1 */
 198#define CPSW1_MAX_BLKS      0x00 /* Maximum FIFO Blocks */
 199#define CPSW1_BLK_CNT       0x04 /* FIFO Block Usage Count (Read Only) */
 200#define CPSW1_TX_IN_CTL     0x08 /* Transmit FIFO Control */
 201#define CPSW1_PORT_VLAN     0x0c /* VLAN Register */
 202#define CPSW1_TX_PRI_MAP    0x10 /* Tx Header Priority to Switch Pri Mapping */
 203#define CPSW1_TS_CTL        0x14 /* Time Sync Control */
 204#define CPSW1_TS_SEQ_LTYPE  0x18 /* Time Sync Sequence ID Offset and Msg Type */
 205#define CPSW1_TS_VLAN       0x1c /* Time Sync VLAN1 and VLAN2 */
 206
 207/* CPSW_PORT_V2 */
 208#define CPSW2_CONTROL       0x00 /* Control Register */
 209#define CPSW2_MAX_BLKS      0x08 /* Maximum FIFO Blocks */
 210#define CPSW2_BLK_CNT       0x0c /* FIFO Block Usage Count (Read Only) */
 211#define CPSW2_TX_IN_CTL     0x10 /* Transmit FIFO Control */
 212#define CPSW2_PORT_VLAN     0x14 /* VLAN Register */
 213#define CPSW2_TX_PRI_MAP    0x18 /* Tx Header Priority to Switch Pri Mapping */
 214#define CPSW2_TS_SEQ_MTYPE  0x1c /* Time Sync Sequence ID Offset and Msg Type */
 215
 216/* CPSW_PORT_V1 and V2 */
 217#define SA_LO               0x20 /* CPGMAC_SL Source Address Low */
 218#define SA_HI               0x24 /* CPGMAC_SL Source Address High */
 219#define SEND_PERCENT        0x28 /* Transmit Queue Send Percentages */
 220
 221/* CPSW_PORT_V2 only */
 222#define RX_DSCP_PRI_MAP0    0x30 /* Rx DSCP Priority to Rx Packet Mapping */
 223#define RX_DSCP_PRI_MAP1    0x34 /* Rx DSCP Priority to Rx Packet Mapping */
 224#define RX_DSCP_PRI_MAP2    0x38 /* Rx DSCP Priority to Rx Packet Mapping */
 225#define RX_DSCP_PRI_MAP3    0x3c /* Rx DSCP Priority to Rx Packet Mapping */
 226#define RX_DSCP_PRI_MAP4    0x40 /* Rx DSCP Priority to Rx Packet Mapping */
 227#define RX_DSCP_PRI_MAP5    0x44 /* Rx DSCP Priority to Rx Packet Mapping */
 228#define RX_DSCP_PRI_MAP6    0x48 /* Rx DSCP Priority to Rx Packet Mapping */
 229#define RX_DSCP_PRI_MAP7    0x4c /* Rx DSCP Priority to Rx Packet Mapping */
 230
 231/* Bit definitions for the CPSW2_CONTROL register */
 232#define PASS_PRI_TAGGED     (1<<24) /* Pass Priority Tagged */
 233#define VLAN_LTYPE2_EN      (1<<21) /* VLAN LTYPE 2 enable */
 234#define VLAN_LTYPE1_EN      (1<<20) /* VLAN LTYPE 1 enable */
 235#define DSCP_PRI_EN         (1<<16) /* DSCP Priority Enable */
 236#define TS_320              (1<<14) /* Time Sync Dest Port 320 enable */
 237#define TS_319              (1<<13) /* Time Sync Dest Port 319 enable */
 238#define TS_132              (1<<12) /* Time Sync Dest IP Addr 132 enable */
 239#define TS_131              (1<<11) /* Time Sync Dest IP Addr 131 enable */
 240#define TS_130              (1<<10) /* Time Sync Dest IP Addr 130 enable */
 241#define TS_129              (1<<9)  /* Time Sync Dest IP Addr 129 enable */
 242#define TS_TTL_NONZERO      (1<<8)  /* Time Sync Time To Live Non-zero enable */
 243#define TS_ANNEX_F_EN       (1<<6)  /* Time Sync Annex F enable */
 244#define TS_ANNEX_D_EN       (1<<4)  /* Time Sync Annex D enable */
 245#define TS_LTYPE2_EN        (1<<3)  /* Time Sync LTYPE 2 enable */
 246#define TS_LTYPE1_EN        (1<<2)  /* Time Sync LTYPE 1 enable */
 247#define TS_TX_EN            (1<<1)  /* Time Sync Transmit Enable */
 248#define TS_RX_EN            (1<<0)  /* Time Sync Receive Enable */
 249
 250#define CTRL_V2_TS_BITS \
 251	(TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\
 252	 TS_TTL_NONZERO  | TS_ANNEX_D_EN | TS_LTYPE1_EN)
 253
 254#define CTRL_V2_ALL_TS_MASK (CTRL_V2_TS_BITS | TS_TX_EN | TS_RX_EN)
 255#define CTRL_V2_TX_TS_BITS  (CTRL_V2_TS_BITS | TS_TX_EN)
 256#define CTRL_V2_RX_TS_BITS  (CTRL_V2_TS_BITS | TS_RX_EN)
 257
 258
 259#define CTRL_V3_TS_BITS \
 260	(TS_320 | TS_319 | TS_132 | TS_131 | TS_130 | TS_129 |\
 261	 TS_TTL_NONZERO | TS_ANNEX_F_EN | TS_ANNEX_D_EN |\
 262	 TS_LTYPE1_EN)
 263
 264#define CTRL_V3_ALL_TS_MASK (CTRL_V3_TS_BITS | TS_TX_EN | TS_RX_EN)
 265#define CTRL_V3_TX_TS_BITS  (CTRL_V3_TS_BITS | TS_TX_EN)
 266#define CTRL_V3_RX_TS_BITS  (CTRL_V3_TS_BITS | TS_RX_EN)
 267
 268/* Bit definitions for the CPSW2_TS_SEQ_MTYPE register */
 269#define TS_SEQ_ID_OFFSET_SHIFT   (16)    /* Time Sync Sequence ID Offset */
 270#define TS_SEQ_ID_OFFSET_MASK    (0x3f)
 271#define TS_MSG_TYPE_EN_SHIFT     (0)     /* Time Sync Message Type Enable */
 272#define TS_MSG_TYPE_EN_MASK      (0xffff)
 273
 274/* The PTP event messages - Sync, Delay_Req, Pdelay_Req, and Pdelay_Resp. */
 275#define EVENT_MSG_BITS ((1<<0) | (1<<1) | (1<<2) | (1<<3))
 276
 277/* Bit definitions for the CPSW1_TS_CTL register */
 278#define CPSW_V1_TS_RX_EN		BIT(0)
 279#define CPSW_V1_TS_TX_EN		BIT(4)
 280#define CPSW_V1_MSG_TYPE_OFS		16
 281
 282/* Bit definitions for the CPSW1_TS_SEQ_LTYPE register */
 283#define CPSW_V1_SEQ_ID_OFS_SHIFT	16
 284
 285struct cpsw_host_regs {
 286	u32	max_blks;
 287	u32	blk_cnt;
 288	u32	tx_in_ctl;
 289	u32	port_vlan;
 290	u32	tx_pri_map;
 291	u32	cpdma_tx_pri_map;
 292	u32	cpdma_rx_chan_map;
 293};
 294
 295struct cpsw_sliver_regs {
 296	u32	id_ver;
 297	u32	mac_control;
 298	u32	mac_status;
 299	u32	soft_reset;
 300	u32	rx_maxlen;
 301	u32	__reserved_0;
 302	u32	rx_pause;
 303	u32	tx_pause;
 304	u32	__reserved_1;
 305	u32	rx_pri_map;
 306};
 307
 308struct cpsw_hw_stats {
 309	u32	rxgoodframes;
 310	u32	rxbroadcastframes;
 311	u32	rxmulticastframes;
 312	u32	rxpauseframes;
 313	u32	rxcrcerrors;
 314	u32	rxaligncodeerrors;
 315	u32	rxoversizedframes;
 316	u32	rxjabberframes;
 317	u32	rxundersizedframes;
 318	u32	rxfragments;
 319	u32	__pad_0[2];
 320	u32	rxoctets;
 321	u32	txgoodframes;
 322	u32	txbroadcastframes;
 323	u32	txmulticastframes;
 324	u32	txpauseframes;
 325	u32	txdeferredframes;
 326	u32	txcollisionframes;
 327	u32	txsinglecollframes;
 328	u32	txmultcollframes;
 329	u32	txexcessivecollisions;
 330	u32	txlatecollisions;
 331	u32	txunderrun;
 332	u32	txcarriersenseerrors;
 333	u32	txoctets;
 334	u32	octetframes64;
 335	u32	octetframes65t127;
 336	u32	octetframes128t255;
 337	u32	octetframes256t511;
 338	u32	octetframes512t1023;
 339	u32	octetframes1024tup;
 340	u32	netoctets;
 341	u32	rxsofoverruns;
 342	u32	rxmofoverruns;
 343	u32	rxdmaoverruns;
 344};
 345
 346struct cpsw_slave {
 347	void __iomem			*regs;
 348	struct cpsw_sliver_regs __iomem	*sliver;
 349	int				slave_num;
 350	u32				mac_control;
 351	struct cpsw_slave_data		*data;
 352	struct phy_device		*phy;
 353	struct net_device		*ndev;
 354	u32				port_vlan;
 355	u32				open_stat;
 356};
 357
 358static inline u32 slave_read(struct cpsw_slave *slave, u32 offset)
 359{
 360	return __raw_readl(slave->regs + offset);
 361}
 362
 363static inline void slave_write(struct cpsw_slave *slave, u32 val, u32 offset)
 364{
 365	__raw_writel(val, slave->regs + offset);
 366}
 367
 368struct cpsw_vector {
 369	struct cpdma_chan *ch;
 370	int budget;
 371};
 372
 373struct cpsw_common {
 374	struct device			*dev;
 375	struct cpsw_platform_data	data;
 376	struct napi_struct		napi_rx;
 377	struct napi_struct		napi_tx;
 378	struct cpsw_ss_regs __iomem	*regs;
 379	struct cpsw_wr_regs __iomem	*wr_regs;
 380	u8 __iomem			*hw_stats;
 381	struct cpsw_host_regs __iomem	*host_port_regs;
 382	u32				version;
 383	u32				coal_intvl;
 384	u32				bus_freq_mhz;
 385	int				rx_packet_max;
 386	struct cpsw_slave		*slaves;
 387	struct cpdma_ctlr		*dma;
 388	struct cpsw_vector		txv[CPSW_MAX_QUEUES];
 389	struct cpsw_vector		rxv[CPSW_MAX_QUEUES];
 390	struct cpsw_ale			*ale;
 391	bool				quirk_irq;
 392	bool				rx_irq_disabled;
 393	bool				tx_irq_disabled;
 394	u32 irqs_table[IRQ_NUM];
 395	struct cpts			*cpts;
 396	int				rx_ch_num, tx_ch_num;
 397	int				speed;
 398};
 399
 400struct cpsw_priv {
 401	struct net_device		*ndev;
 402	struct device			*dev;
 403	u32				msg_enable;
 404	u8				mac_addr[ETH_ALEN];
 405	bool				rx_pause;
 406	bool				tx_pause;
 407	u32 emac_port;
 408	struct cpsw_common *cpsw;
 409};
 410
 411struct cpsw_stats {
 412	char stat_string[ETH_GSTRING_LEN];
 413	int type;
 414	int sizeof_stat;
 415	int stat_offset;
 416};
 417
 418enum {
 419	CPSW_STATS,
 420	CPDMA_RX_STATS,
 421	CPDMA_TX_STATS,
 422};
 423
 424#define CPSW_STAT(m)		CPSW_STATS,				\
 425				sizeof(((struct cpsw_hw_stats *)0)->m), \
 426				offsetof(struct cpsw_hw_stats, m)
 427#define CPDMA_RX_STAT(m)	CPDMA_RX_STATS,				   \
 428				sizeof(((struct cpdma_chan_stats *)0)->m), \
 429				offsetof(struct cpdma_chan_stats, m)
 430#define CPDMA_TX_STAT(m)	CPDMA_TX_STATS,				   \
 431				sizeof(((struct cpdma_chan_stats *)0)->m), \
 432				offsetof(struct cpdma_chan_stats, m)
 433
 434static const struct cpsw_stats cpsw_gstrings_stats[] = {
 435	{ "Good Rx Frames", CPSW_STAT(rxgoodframes) },
 436	{ "Broadcast Rx Frames", CPSW_STAT(rxbroadcastframes) },
 437	{ "Multicast Rx Frames", CPSW_STAT(rxmulticastframes) },
 438	{ "Pause Rx Frames", CPSW_STAT(rxpauseframes) },
 439	{ "Rx CRC Errors", CPSW_STAT(rxcrcerrors) },
 440	{ "Rx Align/Code Errors", CPSW_STAT(rxaligncodeerrors) },
 441	{ "Oversize Rx Frames", CPSW_STAT(rxoversizedframes) },
 442	{ "Rx Jabbers", CPSW_STAT(rxjabberframes) },
 443	{ "Undersize (Short) Rx Frames", CPSW_STAT(rxundersizedframes) },
 444	{ "Rx Fragments", CPSW_STAT(rxfragments) },
 445	{ "Rx Octets", CPSW_STAT(rxoctets) },
 446	{ "Good Tx Frames", CPSW_STAT(txgoodframes) },
 447	{ "Broadcast Tx Frames", CPSW_STAT(txbroadcastframes) },
 448	{ "Multicast Tx Frames", CPSW_STAT(txmulticastframes) },
 449	{ "Pause Tx Frames", CPSW_STAT(txpauseframes) },
 450	{ "Deferred Tx Frames", CPSW_STAT(txdeferredframes) },
 451	{ "Collisions", CPSW_STAT(txcollisionframes) },
 452	{ "Single Collision Tx Frames", CPSW_STAT(txsinglecollframes) },
 453	{ "Multiple Collision Tx Frames", CPSW_STAT(txmultcollframes) },
 454	{ "Excessive Collisions", CPSW_STAT(txexcessivecollisions) },
 455	{ "Late Collisions", CPSW_STAT(txlatecollisions) },
 456	{ "Tx Underrun", CPSW_STAT(txunderrun) },
 457	{ "Carrier Sense Errors", CPSW_STAT(txcarriersenseerrors) },
 458	{ "Tx Octets", CPSW_STAT(txoctets) },
 459	{ "Rx + Tx 64 Octet Frames", CPSW_STAT(octetframes64) },
 460	{ "Rx + Tx 65-127 Octet Frames", CPSW_STAT(octetframes65t127) },
 461	{ "Rx + Tx 128-255 Octet Frames", CPSW_STAT(octetframes128t255) },
 462	{ "Rx + Tx 256-511 Octet Frames", CPSW_STAT(octetframes256t511) },
 463	{ "Rx + Tx 512-1023 Octet Frames", CPSW_STAT(octetframes512t1023) },
 464	{ "Rx + Tx 1024-Up Octet Frames", CPSW_STAT(octetframes1024tup) },
 465	{ "Net Octets", CPSW_STAT(netoctets) },
 466	{ "Rx Start of Frame Overruns", CPSW_STAT(rxsofoverruns) },
 467	{ "Rx Middle of Frame Overruns", CPSW_STAT(rxmofoverruns) },
 468	{ "Rx DMA Overruns", CPSW_STAT(rxdmaoverruns) },
 469};
 470
 471static const struct cpsw_stats cpsw_gstrings_ch_stats[] = {
 472	{ "head_enqueue", CPDMA_RX_STAT(head_enqueue) },
 473	{ "tail_enqueue", CPDMA_RX_STAT(tail_enqueue) },
 474	{ "pad_enqueue", CPDMA_RX_STAT(pad_enqueue) },
 475	{ "misqueued", CPDMA_RX_STAT(misqueued) },
 476	{ "desc_alloc_fail", CPDMA_RX_STAT(desc_alloc_fail) },
 477	{ "pad_alloc_fail", CPDMA_RX_STAT(pad_alloc_fail) },
 478	{ "runt_receive_buf", CPDMA_RX_STAT(runt_receive_buff) },
 479	{ "runt_transmit_buf", CPDMA_RX_STAT(runt_transmit_buff) },
 480	{ "empty_dequeue", CPDMA_RX_STAT(empty_dequeue) },
 481	{ "busy_dequeue", CPDMA_RX_STAT(busy_dequeue) },
 482	{ "good_dequeue", CPDMA_RX_STAT(good_dequeue) },
 483	{ "requeue", CPDMA_RX_STAT(requeue) },
 484	{ "teardown_dequeue", CPDMA_RX_STAT(teardown_dequeue) },
 485};
 486
 487#define CPSW_STATS_COMMON_LEN	ARRAY_SIZE(cpsw_gstrings_stats)
 488#define CPSW_STATS_CH_LEN	ARRAY_SIZE(cpsw_gstrings_ch_stats)
 489
 490#define ndev_to_cpsw(ndev) (((struct cpsw_priv *)netdev_priv(ndev))->cpsw)
 491#define napi_to_cpsw(napi)	container_of(napi, struct cpsw_common, napi)
 492#define for_each_slave(priv, func, arg...)				\
 493	do {								\
 494		struct cpsw_slave *slave;				\
 495		struct cpsw_common *cpsw = (priv)->cpsw;		\
 496		int n;							\
 497		if (cpsw->data.dual_emac)				\
 498			(func)((cpsw)->slaves + priv->emac_port, ##arg);\
 499		else							\
 500			for (n = cpsw->data.slaves,			\
 501					slave = cpsw->slaves;		\
 502					n; n--)				\
 503				(func)(slave++, ##arg);			\
 504	} while (0)
 505
 506#define cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb)		\
 507	do {								\
 508		if (!cpsw->data.dual_emac)				\
 509			break;						\
 510		if (CPDMA_RX_SOURCE_PORT(status) == 1) {		\
 511			ndev = cpsw->slaves[0].ndev;			\
 512			skb->dev = ndev;				\
 513		} else if (CPDMA_RX_SOURCE_PORT(status) == 2) {		\
 514			ndev = cpsw->slaves[1].ndev;			\
 515			skb->dev = ndev;				\
 516		}							\
 517	} while (0)
 518#define cpsw_add_mcast(cpsw, priv, addr)				\
 519	do {								\
 520		if (cpsw->data.dual_emac) {				\
 521			struct cpsw_slave *slave = cpsw->slaves +	\
 522						priv->emac_port;	\
 523			int slave_port = cpsw_get_slave_port(		\
 524						slave->slave_num);	\
 525			cpsw_ale_add_mcast(cpsw->ale, addr,		\
 526				1 << slave_port | ALE_PORT_HOST,	\
 527				ALE_VLAN, slave->port_vlan, 0);		\
 528		} else {						\
 529			cpsw_ale_add_mcast(cpsw->ale, addr,		\
 530				ALE_ALL_PORTS,				\
 531				0, 0, 0);				\
 532		}							\
 533	} while (0)
 534
 535static inline int cpsw_get_slave_port(u32 slave_num)
 536{
 537	return slave_num + 1;
 538}
 539
 
 
 
 540static void cpsw_set_promiscious(struct net_device *ndev, bool enable)
 541{
 542	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
 543	struct cpsw_ale *ale = cpsw->ale;
 544	int i;
 545
 546	if (cpsw->data.dual_emac) {
 547		bool flag = false;
 548
 549		/* Enabling promiscuous mode for one interface will be
 550		 * common for both the interface as the interface shares
 551		 * the same hardware resource.
 552		 */
 553		for (i = 0; i < cpsw->data.slaves; i++)
 554			if (cpsw->slaves[i].ndev->flags & IFF_PROMISC)
 555				flag = true;
 556
 557		if (!enable && flag) {
 558			enable = true;
 559			dev_err(&ndev->dev, "promiscuity not disabled as the other interface is still in promiscuity mode\n");
 560		}
 561
 562		if (enable) {
 563			/* Enable Bypass */
 564			cpsw_ale_control_set(ale, 0, ALE_BYPASS, 1);
 565
 566			dev_dbg(&ndev->dev, "promiscuity enabled\n");
 567		} else {
 568			/* Disable Bypass */
 569			cpsw_ale_control_set(ale, 0, ALE_BYPASS, 0);
 570			dev_dbg(&ndev->dev, "promiscuity disabled\n");
 571		}
 572	} else {
 573		if (enable) {
 574			unsigned long timeout = jiffies + HZ;
 575
 576			/* Disable Learn for all ports (host is port 0 and slaves are port 1 and up */
 577			for (i = 0; i <= cpsw->data.slaves; i++) {
 578				cpsw_ale_control_set(ale, i,
 579						     ALE_PORT_NOLEARN, 1);
 580				cpsw_ale_control_set(ale, i,
 581						     ALE_PORT_NO_SA_UPDATE, 1);
 582			}
 583
 584			/* Clear All Untouched entries */
 585			cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
 586			do {
 587				cpu_relax();
 588				if (cpsw_ale_control_get(ale, 0, ALE_AGEOUT))
 589					break;
 590			} while (time_after(timeout, jiffies));
 591			cpsw_ale_control_set(ale, 0, ALE_AGEOUT, 1);
 592
 593			/* Clear all mcast from ALE */
 594			cpsw_ale_flush_multicast(ale, ALE_ALL_PORTS, -1);
 
 595
 596			/* Flood All Unicast Packets to Host port */
 597			cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 1);
 598			dev_dbg(&ndev->dev, "promiscuity enabled\n");
 599		} else {
 600			/* Don't Flood All Unicast Packets to Host port */
 601			cpsw_ale_control_set(ale, 0, ALE_P0_UNI_FLOOD, 0);
 602
 603			/* Enable Learn for all ports (host is port 0 and slaves are port 1 and up */
 604			for (i = 0; i <= cpsw->data.slaves; i++) {
 605				cpsw_ale_control_set(ale, i,
 606						     ALE_PORT_NOLEARN, 0);
 607				cpsw_ale_control_set(ale, i,
 608						     ALE_PORT_NO_SA_UPDATE, 0);
 609			}
 610			dev_dbg(&ndev->dev, "promiscuity disabled\n");
 611		}
 612	}
 613}
 614
 615static void cpsw_ndo_set_rx_mode(struct net_device *ndev)
 
 
 
 
 
 
 
 
 
 616{
 617	struct cpsw_priv *priv = netdev_priv(ndev);
 618	struct cpsw_common *cpsw = priv->cpsw;
 619	int vid;
 620
 621	if (cpsw->data.dual_emac)
 622		vid = cpsw->slaves[priv->emac_port].port_vlan;
 
 
 
 
 
 
 
 
 
 
 623	else
 624		vid = cpsw->data.default_vlan;
 625
 626	if (ndev->flags & IFF_PROMISC) {
 627		/* Enable promiscuous mode */
 628		cpsw_set_promiscious(ndev, true);
 629		cpsw_ale_set_allmulti(cpsw->ale, IFF_ALLMULTI);
 630		return;
 631	} else {
 632		/* Disable promiscuous mode */
 633		cpsw_set_promiscious(ndev, false);
 634	}
 635
 636	/* Restore allmulti on vlans if necessary */
 637	cpsw_ale_set_allmulti(cpsw->ale, priv->ndev->flags & IFF_ALLMULTI);
 
 
 
 638
 639	/* Clear all mcast from ALE */
 640	cpsw_ale_flush_multicast(cpsw->ale, ALE_ALL_PORTS, vid);
 641
 642	if (!netdev_mc_empty(ndev)) {
 643		struct netdev_hw_addr *ha;
 
 
 
 
 
 644
 645		/* program multicast address list into ALE register */
 646		netdev_for_each_mc_addr(ha, ndev) {
 647			cpsw_add_mcast(cpsw, priv, (u8 *)ha->addr);
 648		}
 
 
 
 649	}
 650}
 651
 652static void cpsw_intr_enable(struct cpsw_common *cpsw)
 653{
 654	__raw_writel(0xFF, &cpsw->wr_regs->tx_en);
 655	__raw_writel(0xFF, &cpsw->wr_regs->rx_en);
 656
 657	cpdma_ctlr_int_ctrl(cpsw->dma, true);
 658	return;
 659}
 660
 661static void cpsw_intr_disable(struct cpsw_common *cpsw)
 662{
 663	__raw_writel(0, &cpsw->wr_regs->tx_en);
 664	__raw_writel(0, &cpsw->wr_regs->rx_en);
 665
 666	cpdma_ctlr_int_ctrl(cpsw->dma, false);
 667	return;
 
 
 
 
 
 
 
 
 668}
 669
 670static void cpsw_tx_handler(void *token, int len, int status)
 671{
 672	struct netdev_queue	*txq;
 673	struct sk_buff		*skb = token;
 674	struct net_device	*ndev = skb->dev;
 675	struct cpsw_common	*cpsw = ndev_to_cpsw(ndev);
 676
 677	/* Check whether the queue is stopped due to stalled tx dma, if the
 678	 * queue is stopped then start the queue as we have free desc for tx
 679	 */
 680	txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb));
 681	if (unlikely(netif_tx_queue_stopped(txq)))
 682		netif_tx_wake_queue(txq);
 
 
 683
 684	cpts_tx_timestamp(cpsw->cpts, skb);
 685	ndev->stats.tx_packets++;
 686	ndev->stats.tx_bytes += len;
 687	dev_kfree_skb_any(skb);
 688}
 689
 690static void cpsw_rx_handler(void *token, int len, int status)
 691{
 692	struct cpdma_chan	*ch;
 693	struct sk_buff		*skb = token;
 694	struct sk_buff		*new_skb;
 695	struct net_device	*ndev = skb->dev;
 696	int			ret = 0;
 697	struct cpsw_common	*cpsw = ndev_to_cpsw(ndev);
 698
 699	cpsw_dual_emac_src_port_detect(cpsw, status, ndev, skb);
 
 700
 701	if (unlikely(status < 0) || unlikely(!netif_running(ndev))) {
 702		bool ndev_status = false;
 703		struct cpsw_slave *slave = cpsw->slaves;
 704		int n;
 705
 706		if (cpsw->data.dual_emac) {
 707			/* In dual emac mode check for all interfaces */
 708			for (n = cpsw->data.slaves; n; n--, slave++)
 709				if (netif_running(slave->ndev))
 710					ndev_status = true;
 711		}
 
 712
 713		if (ndev_status && (status >= 0)) {
 714			/* The packet received is for the interface which
 715			 * is already down and the other interface is up
 716			 * and running, instead of freeing which results
 717			 * in reducing of the number of rx descriptor in
 718			 * DMA engine, requeue skb back to cpdma.
 719			 */
 720			new_skb = skb;
 721			goto requeue;
 722		}
 723
 724		/* the interface is going down, skbs are purged */
 725		dev_kfree_skb_any(skb);
 726		return;
 727	}
 728
 729	new_skb = netdev_alloc_skb_ip_align(ndev, cpsw->rx_packet_max);
 730	if (new_skb) {
 731		skb_copy_queue_mapping(new_skb, skb);
 732		skb_put(skb, len);
 733		cpts_rx_timestamp(cpsw->cpts, skb);
 734		skb->protocol = eth_type_trans(skb, ndev);
 735		netif_receive_skb(skb);
 736		ndev->stats.rx_bytes += len;
 737		ndev->stats.rx_packets++;
 738		kmemleak_not_leak(new_skb);
 739	} else {
 740		ndev->stats.rx_dropped++;
 741		new_skb = skb;
 742	}
 743
 744requeue:
 745	if (netif_dormant(ndev)) {
 746		dev_kfree_skb_any(new_skb);
 747		return;
 748	}
 749
 750	ch = cpsw->rxv[skb_get_queue_mapping(new_skb)].ch;
 751	ret = cpdma_chan_submit(ch, new_skb, new_skb->data,
 752				skb_tailroom(new_skb), 0);
 753	if (WARN_ON(ret < 0))
 754		dev_kfree_skb_any(new_skb);
 755}
 756
 757static void cpsw_split_res(struct net_device *ndev)
 758{
 759	struct cpsw_priv *priv = netdev_priv(ndev);
 760	u32 consumed_rate = 0, bigest_rate = 0;
 761	struct cpsw_common *cpsw = priv->cpsw;
 762	struct cpsw_vector *txv = cpsw->txv;
 763	int i, ch_weight, rlim_ch_num = 0;
 764	int budget, bigest_rate_ch = 0;
 765	u32 ch_rate, max_rate;
 766	int ch_budget = 0;
 767
 768	for (i = 0; i < cpsw->tx_ch_num; i++) {
 769		ch_rate = cpdma_chan_get_rate(txv[i].ch);
 770		if (!ch_rate)
 771			continue;
 772
 773		rlim_ch_num++;
 774		consumed_rate += ch_rate;
 775	}
 776
 777	if (cpsw->tx_ch_num == rlim_ch_num) {
 778		max_rate = consumed_rate;
 779	} else if (!rlim_ch_num) {
 780		ch_budget = CPSW_POLL_WEIGHT / cpsw->tx_ch_num;
 781		bigest_rate = 0;
 782		max_rate = consumed_rate;
 783	} else {
 784		max_rate = cpsw->speed * 1000;
 785
 786		/* if max_rate is less then expected due to reduced link speed,
 787		 * split proportionally according next potential max speed
 788		 */
 789		if (max_rate < consumed_rate)
 790			max_rate *= 10;
 791
 792		if (max_rate < consumed_rate)
 793			max_rate *= 10;
 794
 795		ch_budget = (consumed_rate * CPSW_POLL_WEIGHT) / max_rate;
 796		ch_budget = (CPSW_POLL_WEIGHT - ch_budget) /
 797			    (cpsw->tx_ch_num - rlim_ch_num);
 798		bigest_rate = (max_rate - consumed_rate) /
 799			      (cpsw->tx_ch_num - rlim_ch_num);
 800	}
 801
 802	/* split tx weight/budget */
 803	budget = CPSW_POLL_WEIGHT;
 804	for (i = 0; i < cpsw->tx_ch_num; i++) {
 805		ch_rate = cpdma_chan_get_rate(txv[i].ch);
 806		if (ch_rate) {
 807			txv[i].budget = (ch_rate * CPSW_POLL_WEIGHT) / max_rate;
 808			if (!txv[i].budget)
 809				txv[i].budget++;
 810			if (ch_rate > bigest_rate) {
 811				bigest_rate_ch = i;
 812				bigest_rate = ch_rate;
 813			}
 814
 815			ch_weight = (ch_rate * 100) / max_rate;
 816			if (!ch_weight)
 817				ch_weight++;
 818			cpdma_chan_set_weight(cpsw->txv[i].ch, ch_weight);
 819		} else {
 820			txv[i].budget = ch_budget;
 821			if (!bigest_rate_ch)
 822				bigest_rate_ch = i;
 823			cpdma_chan_set_weight(cpsw->txv[i].ch, 0);
 824		}
 825
 826		budget -= txv[i].budget;
 827	}
 828
 829	if (budget)
 830		txv[bigest_rate_ch].budget += budget;
 
 831
 832	/* split rx budget */
 833	budget = CPSW_POLL_WEIGHT;
 834	ch_budget = budget / cpsw->rx_ch_num;
 835	for (i = 0; i < cpsw->rx_ch_num; i++) {
 836		cpsw->rxv[i].budget = ch_budget;
 837		budget -= ch_budget;
 838	}
 839
 840	if (budget)
 841		cpsw->rxv[0].budget += budget;
 842}
 843
 844static irqreturn_t cpsw_tx_interrupt(int irq, void *dev_id)
 845{
 846	struct cpsw_common *cpsw = dev_id;
 847
 848	writel(0, &cpsw->wr_regs->tx_en);
 849	cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_TX);
 850
 851	if (cpsw->quirk_irq) {
 852		disable_irq_nosync(cpsw->irqs_table[1]);
 853		cpsw->tx_irq_disabled = true;
 854	}
 855
 856	napi_schedule(&cpsw->napi_tx);
 857	return IRQ_HANDLED;
 858}
 859
 860static irqreturn_t cpsw_rx_interrupt(int irq, void *dev_id)
 861{
 862	struct cpsw_common *cpsw = dev_id;
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 863
 864	cpdma_ctlr_eoi(cpsw->dma, CPDMA_EOI_RX);
 865	writel(0, &cpsw->wr_regs->rx_en);
 
 
 
 
 
 
 
 
 
 
 
 
 
 866
 867	if (cpsw->quirk_irq) {
 868		disable_irq_nosync(cpsw->irqs_table[0]);
 869		cpsw->rx_irq_disabled = true;
 870	}
 871
 872	napi_schedule(&cpsw->napi_rx);
 873	return IRQ_HANDLED;
 874}
 
 
 
 875
 876static int cpsw_tx_poll(struct napi_struct *napi_tx, int budget)
 877{
 878	u32			ch_map;
 879	int			num_tx, cur_budget, ch;
 880	struct cpsw_common	*cpsw = napi_to_cpsw(napi_tx);
 881	struct cpsw_vector	*txv;
 882
 883	/* process every unprocessed channel */
 884	ch_map = cpdma_ctrl_txchs_state(cpsw->dma);
 885	for (ch = 0, num_tx = 0; ch_map; ch_map >>= 1, ch++) {
 886		if (!(ch_map & 0x01))
 887			continue;
 888
 889		txv = &cpsw->txv[ch];
 890		if (unlikely(txv->budget > budget - num_tx))
 891			cur_budget = budget - num_tx;
 892		else
 893			cur_budget = txv->budget;
 894
 895		num_tx += cpdma_chan_process(txv->ch, cur_budget);
 896		if (num_tx >= budget)
 897			break;
 898	}
 899
 900	if (num_tx < budget) {
 901		napi_complete(napi_tx);
 902		writel(0xff, &cpsw->wr_regs->tx_en);
 903		if (cpsw->quirk_irq && cpsw->tx_irq_disabled) {
 904			cpsw->tx_irq_disabled = false;
 905			enable_irq(cpsw->irqs_table[1]);
 906		}
 907	}
 908
 909	return num_tx;
 910}
 911
 912static int cpsw_rx_poll(struct napi_struct *napi_rx, int budget)
 913{
 914	u32			ch_map;
 915	int			num_rx, cur_budget, ch;
 916	struct cpsw_common	*cpsw = napi_to_cpsw(napi_rx);
 917	struct cpsw_vector	*rxv;
 918
 919	/* process every unprocessed channel */
 920	ch_map = cpdma_ctrl_rxchs_state(cpsw->dma);
 921	for (ch = 0, num_rx = 0; ch_map; ch_map >>= 1, ch++) {
 922		if (!(ch_map & 0x01))
 923			continue;
 924
 925		rxv = &cpsw->rxv[ch];
 926		if (unlikely(rxv->budget > budget - num_rx))
 927			cur_budget = budget - num_rx;
 928		else
 929			cur_budget = rxv->budget;
 930
 931		num_rx += cpdma_chan_process(rxv->ch, cur_budget);
 932		if (num_rx >= budget)
 933			break;
 934	}
 935
 936	if (num_rx < budget) {
 937		napi_complete(napi_rx);
 938		writel(0xff, &cpsw->wr_regs->rx_en);
 939		if (cpsw->quirk_irq && cpsw->rx_irq_disabled) {
 940			cpsw->rx_irq_disabled = false;
 941			enable_irq(cpsw->irqs_table[0]);
 942		}
 943	}
 944
 945	return num_rx;
 946}
 
 
 
 
 
 
 947
 948static inline void soft_reset(const char *module, void __iomem *reg)
 949{
 950	unsigned long timeout = jiffies + HZ;
 951
 952	__raw_writel(1, reg);
 953	do {
 954		cpu_relax();
 955	} while ((__raw_readl(reg) & 1) && time_after(timeout, jiffies));
 956
 957	WARN(__raw_readl(reg) & 1, "failed to soft-reset %s\n", module);
 958}
 959
 960#define mac_hi(mac)	(((mac)[0] << 0) | ((mac)[1] << 8) |	\
 961			 ((mac)[2] << 16) | ((mac)[3] << 24))
 962#define mac_lo(mac)	(((mac)[4] << 0) | ((mac)[5] << 8))
 963
 964static void cpsw_set_slave_mac(struct cpsw_slave *slave,
 965			       struct cpsw_priv *priv)
 966{
 967	slave_write(slave, mac_hi(priv->mac_addr), SA_HI);
 968	slave_write(slave, mac_lo(priv->mac_addr), SA_LO);
 969}
 970
 971static void _cpsw_adjust_link(struct cpsw_slave *slave,
 972			      struct cpsw_priv *priv, bool *link)
 973{
 974	struct phy_device	*phy = slave->phy;
 975	u32			mac_control = 0;
 976	u32			slave_port;
 977	struct cpsw_common *cpsw = priv->cpsw;
 978
 979	if (!phy)
 980		return;
 981
 982	slave_port = cpsw_get_slave_port(slave->slave_num);
 983
 984	if (phy->link) {
 985		mac_control = cpsw->data.mac_control;
 986
 987		/* enable forwarding */
 988		cpsw_ale_control_set(cpsw->ale, slave_port,
 989				     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
 990
 991		if (phy->speed == 1000)
 992			mac_control |= BIT(7);	/* GIGABITEN	*/
 993		if (phy->duplex)
 994			mac_control |= BIT(0);	/* FULLDUPLEXEN	*/
 995
 996		/* set speed_in input in case RMII mode is used in 100Mbps */
 997		if (phy->speed == 100)
 998			mac_control |= BIT(15);
 999		else if (phy->speed == 10)
1000			mac_control |= BIT(18); /* In Band mode */
 
1001
1002		if (priv->rx_pause)
1003			mac_control |= BIT(3);
1004
1005		if (priv->tx_pause)
1006			mac_control |= BIT(4);
 
 
 
 
 
 
 
1007
1008		*link = true;
 
 
 
 
 
 
1009	} else {
1010		mac_control = 0;
1011		/* disable forwarding */
1012		cpsw_ale_control_set(cpsw->ale, slave_port,
1013				     ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
 
 
 
 
1014	}
1015
1016	if (mac_control != slave->mac_control) {
1017		phy_print_status(phy);
1018		__raw_writel(mac_control, &slave->sliver->mac_control);
1019	}
1020
1021	slave->mac_control = mac_control;
1022}
1023
1024static int cpsw_get_common_speed(struct cpsw_common *cpsw)
1025{
1026	int i, speed;
1027
1028	for (i = 0, speed = 0; i < cpsw->data.slaves; i++)
1029		if (cpsw->slaves[i].phy && cpsw->slaves[i].phy->link)
1030			speed += cpsw->slaves[i].phy->speed;
1031
1032	return speed;
1033}
1034
1035static int cpsw_need_resplit(struct cpsw_common *cpsw)
1036{
1037	int i, rlim_ch_num;
1038	int speed, ch_rate;
1039
1040	/* re-split resources only in case speed was changed */
1041	speed = cpsw_get_common_speed(cpsw);
1042	if (speed == cpsw->speed || !speed)
1043		return 0;
1044
1045	cpsw->speed = speed;
1046
1047	for (i = 0, rlim_ch_num = 0; i < cpsw->tx_ch_num; i++) {
1048		ch_rate = cpdma_chan_get_rate(cpsw->txv[i].ch);
1049		if (!ch_rate)
1050			break;
1051
1052		rlim_ch_num++;
1053	}
1054
1055	/* cases not dependent on speed */
1056	if (!rlim_ch_num || rlim_ch_num == cpsw->tx_ch_num)
1057		return 0;
1058
1059	return 1;
1060}
1061
1062static void cpsw_adjust_link(struct net_device *ndev)
1063{
1064	struct cpsw_priv	*priv = netdev_priv(ndev);
1065	struct cpsw_common	*cpsw = priv->cpsw;
1066	bool			link = false;
1067
1068	for_each_slave(priv, _cpsw_adjust_link, priv, &link);
1069
1070	if (link) {
1071		if (cpsw_need_resplit(cpsw))
1072			cpsw_split_res(ndev);
1073
1074		netif_carrier_on(ndev);
1075		if (netif_running(ndev))
1076			netif_tx_wake_all_queues(ndev);
1077	} else {
1078		netif_carrier_off(ndev);
1079		netif_tx_stop_all_queues(ndev);
1080	}
1081}
1082
1083static int cpsw_get_coalesce(struct net_device *ndev,
1084				struct ethtool_coalesce *coal)
1085{
1086	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
1087
1088	coal->rx_coalesce_usecs = cpsw->coal_intvl;
1089	return 0;
1090}
1091
1092static int cpsw_set_coalesce(struct net_device *ndev,
1093				struct ethtool_coalesce *coal)
1094{
1095	struct cpsw_priv *priv = netdev_priv(ndev);
1096	u32 int_ctrl;
1097	u32 num_interrupts = 0;
1098	u32 prescale = 0;
1099	u32 addnl_dvdr = 1;
1100	u32 coal_intvl = 0;
1101	struct cpsw_common *cpsw = priv->cpsw;
1102
1103	coal_intvl = coal->rx_coalesce_usecs;
1104
1105	int_ctrl =  readl(&cpsw->wr_regs->int_control);
1106	prescale = cpsw->bus_freq_mhz * 4;
1107
1108	if (!coal->rx_coalesce_usecs) {
1109		int_ctrl &= ~(CPSW_INTPRESCALE_MASK | CPSW_INTPACEEN);
1110		goto update_return;
1111	}
1112
1113	if (coal_intvl < CPSW_CMINTMIN_INTVL)
1114		coal_intvl = CPSW_CMINTMIN_INTVL;
1115
1116	if (coal_intvl > CPSW_CMINTMAX_INTVL) {
1117		/* Interrupt pacer works with 4us Pulse, we can
1118		 * throttle further by dilating the 4us pulse.
1119		 */
1120		addnl_dvdr = CPSW_INTPRESCALE_MASK / prescale;
1121
1122		if (addnl_dvdr > 1) {
1123			prescale *= addnl_dvdr;
1124			if (coal_intvl > (CPSW_CMINTMAX_INTVL * addnl_dvdr))
1125				coal_intvl = (CPSW_CMINTMAX_INTVL
1126						* addnl_dvdr);
1127		} else {
1128			addnl_dvdr = 1;
1129			coal_intvl = CPSW_CMINTMAX_INTVL;
1130		}
1131	}
1132
1133	num_interrupts = (1000 * addnl_dvdr) / coal_intvl;
1134	writel(num_interrupts, &cpsw->wr_regs->rx_imax);
1135	writel(num_interrupts, &cpsw->wr_regs->tx_imax);
1136
1137	int_ctrl |= CPSW_INTPACEEN;
1138	int_ctrl &= (~CPSW_INTPRESCALE_MASK);
1139	int_ctrl |= (prescale & CPSW_INTPRESCALE_MASK);
1140
1141update_return:
1142	writel(int_ctrl, &cpsw->wr_regs->int_control);
1143
1144	cpsw_notice(priv, timer, "Set coalesce to %d usecs.\n", coal_intvl);
1145	cpsw->coal_intvl = coal_intvl;
1146
1147	return 0;
1148}
1149
1150static int cpsw_get_sset_count(struct net_device *ndev, int sset)
1151{
1152	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
1153
1154	switch (sset) {
1155	case ETH_SS_STATS:
1156		return (CPSW_STATS_COMMON_LEN +
1157		       (cpsw->rx_ch_num + cpsw->tx_ch_num) *
1158		       CPSW_STATS_CH_LEN);
1159	default:
1160		return -EOPNOTSUPP;
1161	}
1162}
1163
1164static void cpsw_add_ch_strings(u8 **p, int ch_num, int rx_dir)
1165{
1166	int ch_stats_len;
1167	int line;
1168	int i;
1169
1170	ch_stats_len = CPSW_STATS_CH_LEN * ch_num;
1171	for (i = 0; i < ch_stats_len; i++) {
1172		line = i % CPSW_STATS_CH_LEN;
1173		snprintf(*p, ETH_GSTRING_LEN,
1174			 "%s DMA chan %d: %s", rx_dir ? "Rx" : "Tx",
1175			 i / CPSW_STATS_CH_LEN,
1176			 cpsw_gstrings_ch_stats[line].stat_string);
1177		*p += ETH_GSTRING_LEN;
1178	}
1179}
1180
1181static void cpsw_get_strings(struct net_device *ndev, u32 stringset, u8 *data)
1182{
1183	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
1184	u8 *p = data;
1185	int i;
1186
1187	switch (stringset) {
1188	case ETH_SS_STATS:
1189		for (i = 0; i < CPSW_STATS_COMMON_LEN; i++) {
1190			memcpy(p, cpsw_gstrings_stats[i].stat_string,
1191			       ETH_GSTRING_LEN);
1192			p += ETH_GSTRING_LEN;
1193		}
1194
1195		cpsw_add_ch_strings(&p, cpsw->rx_ch_num, 1);
1196		cpsw_add_ch_strings(&p, cpsw->tx_ch_num, 0);
1197		break;
1198	}
1199}
1200
1201static void cpsw_get_ethtool_stats(struct net_device *ndev,
1202				    struct ethtool_stats *stats, u64 *data)
1203{
1204	u8 *p;
1205	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
1206	struct cpdma_chan_stats ch_stats;
1207	int i, l, ch;
1208
1209	/* Collect Davinci CPDMA stats for Rx and Tx Channel */
1210	for (l = 0; l < CPSW_STATS_COMMON_LEN; l++)
1211		data[l] = readl(cpsw->hw_stats +
1212				cpsw_gstrings_stats[l].stat_offset);
1213
1214	for (ch = 0; ch < cpsw->rx_ch_num; ch++) {
1215		cpdma_chan_get_stats(cpsw->rxv[ch].ch, &ch_stats);
1216		for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) {
1217			p = (u8 *)&ch_stats +
1218				cpsw_gstrings_ch_stats[i].stat_offset;
1219			data[l] = *(u32 *)p;
1220		}
1221	}
1222
1223	for (ch = 0; ch < cpsw->tx_ch_num; ch++) {
1224		cpdma_chan_get_stats(cpsw->txv[ch].ch, &ch_stats);
1225		for (i = 0; i < CPSW_STATS_CH_LEN; i++, l++) {
1226			p = (u8 *)&ch_stats +
1227				cpsw_gstrings_ch_stats[i].stat_offset;
1228			data[l] = *(u32 *)p;
1229		}
1230	}
1231}
1232
1233static int cpsw_common_res_usage_state(struct cpsw_common *cpsw)
1234{
1235	u32 i;
1236	u32 usage_count = 0;
1237
1238	if (!cpsw->data.dual_emac)
1239		return 0;
1240
1241	for (i = 0; i < cpsw->data.slaves; i++)
1242		if (cpsw->slaves[i].open_stat)
1243			usage_count++;
1244
1245	return usage_count;
1246}
1247
1248static inline int cpsw_tx_packet_submit(struct cpsw_priv *priv,
1249					struct sk_buff *skb,
1250					struct cpdma_chan *txch)
1251{
1252	struct cpsw_common *cpsw = priv->cpsw;
1253
1254	return cpdma_chan_submit(txch, skb, skb->data, skb->len,
1255				 priv->emac_port + cpsw->data.dual_emac);
1256}
1257
1258static inline void cpsw_add_dual_emac_def_ale_entries(
1259		struct cpsw_priv *priv, struct cpsw_slave *slave,
1260		u32 slave_port)
1261{
1262	struct cpsw_common *cpsw = priv->cpsw;
1263	u32 port_mask = 1 << slave_port | ALE_PORT_HOST;
1264
1265	if (cpsw->version == CPSW_VERSION_1)
1266		slave_write(slave, slave->port_vlan, CPSW1_PORT_VLAN);
1267	else
1268		slave_write(slave, slave->port_vlan, CPSW2_PORT_VLAN);
1269	cpsw_ale_add_vlan(cpsw->ale, slave->port_vlan, port_mask,
1270			  port_mask, port_mask, 0);
1271	cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
1272			   port_mask, ALE_VLAN, slave->port_vlan, 0);
1273	cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr,
1274			   HOST_PORT_NUM, ALE_VLAN |
1275			   ALE_SECURE, slave->port_vlan);
1276}
1277
1278static void soft_reset_slave(struct cpsw_slave *slave)
1279{
1280	char name[32];
1281
1282	snprintf(name, sizeof(name), "slave-%d", slave->slave_num);
1283	soft_reset(name, &slave->sliver->soft_reset);
1284}
1285
1286static void cpsw_slave_open(struct cpsw_slave *slave, struct cpsw_priv *priv)
1287{
1288	u32 slave_port;
 
1289	struct cpsw_common *cpsw = priv->cpsw;
1290
1291	soft_reset_slave(slave);
 
1292
1293	/* setup priority mapping */
1294	__raw_writel(RX_PRIORITY_MAPPING, &slave->sliver->rx_pri_map);
 
1295
1296	switch (cpsw->version) {
1297	case CPSW_VERSION_1:
1298		slave_write(slave, TX_PRIORITY_MAPPING, CPSW1_TX_PRI_MAP);
 
 
 
 
 
 
1299		break;
1300	case CPSW_VERSION_2:
1301	case CPSW_VERSION_3:
1302	case CPSW_VERSION_4:
1303		slave_write(slave, TX_PRIORITY_MAPPING, CPSW2_TX_PRI_MAP);
 
 
 
 
 
 
1304		break;
1305	}
1306
1307	/* setup max packet size, and mac address */
1308	__raw_writel(cpsw->rx_packet_max, &slave->sliver->rx_maxlen);
 
1309	cpsw_set_slave_mac(slave, priv);
1310
1311	slave->mac_control = 0;	/* no link yet */
1312
1313	slave_port = cpsw_get_slave_port(slave->slave_num);
1314
1315	if (cpsw->data.dual_emac)
1316		cpsw_add_dual_emac_def_ale_entries(priv, slave, slave_port);
1317	else
1318		cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
1319				   1 << slave_port, 0, 0, ALE_MCAST_FWD_2);
1320
1321	if (slave->data->phy_node) {
1322		slave->phy = of_phy_connect(priv->ndev, slave->data->phy_node,
1323				 &cpsw_adjust_link, 0, slave->data->phy_if);
1324		if (!slave->phy) {
1325			dev_err(priv->dev, "phy \"%s\" not found on slave %d\n",
1326				slave->data->phy_node->full_name,
1327				slave->slave_num);
1328			return;
1329		}
1330	} else {
1331		slave->phy = phy_connect(priv->ndev, slave->data->phy_id,
1332				 &cpsw_adjust_link, slave->data->phy_if);
1333		if (IS_ERR(slave->phy)) {
1334			dev_err(priv->dev,
1335				"phy \"%s\" not found on slave %d, err %ld\n",
1336				slave->data->phy_id, slave->slave_num,
1337				PTR_ERR(slave->phy));
1338			slave->phy = NULL;
1339			return;
1340		}
1341	}
1342
 
 
 
 
1343	phy_attached_info(slave->phy);
1344
1345	phy_start(slave->phy);
1346
1347	/* Configure GMII_SEL register */
1348	cpsw_phy_sel(cpsw->dev, slave->phy->interface, slave->slave_num);
 
 
 
 
 
1349}
1350
1351static inline void cpsw_add_default_vlan(struct cpsw_priv *priv)
1352{
1353	struct cpsw_common *cpsw = priv->cpsw;
1354	const int vlan = cpsw->data.default_vlan;
1355	u32 reg;
1356	int i;
1357	int unreg_mcast_mask;
1358
1359	reg = (cpsw->version == CPSW_VERSION_1) ? CPSW1_PORT_VLAN :
1360	       CPSW2_PORT_VLAN;
1361
1362	writel(vlan, &cpsw->host_port_regs->port_vlan);
1363
1364	for (i = 0; i < cpsw->data.slaves; i++)
1365		slave_write(cpsw->slaves + i, vlan, reg);
1366
1367	if (priv->ndev->flags & IFF_ALLMULTI)
1368		unreg_mcast_mask = ALE_ALL_PORTS;
1369	else
1370		unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2;
1371
1372	cpsw_ale_add_vlan(cpsw->ale, vlan, ALE_ALL_PORTS,
1373			  ALE_ALL_PORTS, ALE_ALL_PORTS,
1374			  unreg_mcast_mask);
1375}
1376
1377static void cpsw_init_host_port(struct cpsw_priv *priv)
1378{
1379	u32 fifo_mode;
1380	u32 control_reg;
1381	struct cpsw_common *cpsw = priv->cpsw;
1382
1383	/* soft reset the controller and initialize ale */
1384	soft_reset("cpsw", &cpsw->regs->soft_reset);
1385	cpsw_ale_start(cpsw->ale);
1386
1387	/* switch to vlan unaware mode */
1388	cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM, ALE_VLAN_AWARE,
1389			     CPSW_ALE_VLAN_AWARE);
1390	control_reg = readl(&cpsw->regs->control);
1391	control_reg |= CPSW_VLAN_AWARE;
1392	writel(control_reg, &cpsw->regs->control);
1393	fifo_mode = (cpsw->data.dual_emac) ? CPSW_FIFO_DUAL_MAC_MODE :
1394		     CPSW_FIFO_NORMAL_MODE;
1395	writel(fifo_mode, &cpsw->host_port_regs->tx_in_ctl);
1396
1397	/* setup host port priority mapping */
1398	__raw_writel(CPDMA_TX_PRIORITY_MAP,
1399		     &cpsw->host_port_regs->cpdma_tx_pri_map);
1400	__raw_writel(0, &cpsw->host_port_regs->cpdma_rx_chan_map);
1401
1402	cpsw_ale_control_set(cpsw->ale, HOST_PORT_NUM,
1403			     ALE_PORT_STATE, ALE_PORT_STATE_FORWARD);
1404
1405	if (!cpsw->data.dual_emac) {
1406		cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM,
1407				   0, 0);
1408		cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
1409				   ALE_PORT_HOST, 0, 0, ALE_MCAST_FWD_2);
1410	}
1411}
1412
1413static int cpsw_fill_rx_channels(struct cpsw_priv *priv)
1414{
1415	struct cpsw_common *cpsw = priv->cpsw;
1416	struct sk_buff *skb;
1417	int ch_buf_num;
1418	int ch, i, ret;
1419
1420	for (ch = 0; ch < cpsw->rx_ch_num; ch++) {
1421		ch_buf_num = cpdma_chan_get_rx_buf_num(cpsw->rxv[ch].ch);
1422		for (i = 0; i < ch_buf_num; i++) {
1423			skb = __netdev_alloc_skb_ip_align(priv->ndev,
1424							  cpsw->rx_packet_max,
1425							  GFP_KERNEL);
1426			if (!skb) {
1427				cpsw_err(priv, ifup, "cannot allocate skb\n");
1428				return -ENOMEM;
1429			}
1430
1431			skb_set_queue_mapping(skb, ch);
1432			ret = cpdma_chan_submit(cpsw->rxv[ch].ch, skb,
1433						skb->data, skb_tailroom(skb),
1434						0);
1435			if (ret < 0) {
1436				cpsw_err(priv, ifup,
1437					 "cannot submit skb to channel %d rx, error %d\n",
1438					 ch, ret);
1439				kfree_skb(skb);
1440				return ret;
1441			}
1442			kmemleak_not_leak(skb);
1443		}
1444
1445		cpsw_info(priv, ifup, "ch %d rx, submitted %d descriptors\n",
1446			  ch, ch_buf_num);
1447	}
1448
1449	return 0;
1450}
1451
1452static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_common *cpsw)
1453{
1454	u32 slave_port;
1455
1456	slave_port = cpsw_get_slave_port(slave->slave_num);
1457
1458	if (!slave->phy)
1459		return;
1460	phy_stop(slave->phy);
1461	phy_disconnect(slave->phy);
1462	slave->phy = NULL;
1463	cpsw_ale_control_set(cpsw->ale, slave_port,
1464			     ALE_PORT_STATE, ALE_PORT_STATE_DISABLE);
1465	soft_reset_slave(slave);
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
1466}
1467
1468static int cpsw_ndo_open(struct net_device *ndev)
1469{
1470	struct cpsw_priv *priv = netdev_priv(ndev);
1471	struct cpsw_common *cpsw = priv->cpsw;
1472	int ret;
1473	u32 reg;
1474
1475	ret = pm_runtime_get_sync(cpsw->dev);
1476	if (ret < 0) {
1477		pm_runtime_put_noidle(cpsw->dev);
1478		return ret;
1479	}
1480
1481	if (!cpsw_common_res_usage_state(cpsw))
1482		cpsw_intr_disable(cpsw);
1483	netif_carrier_off(ndev);
1484
1485	/* Notify the stack of the actual queue counts. */
1486	ret = netif_set_real_num_tx_queues(ndev, cpsw->tx_ch_num);
1487	if (ret) {
1488		dev_err(priv->dev, "cannot set real number of tx queues\n");
1489		goto err_cleanup;
1490	}
1491
1492	ret = netif_set_real_num_rx_queues(ndev, cpsw->rx_ch_num);
1493	if (ret) {
1494		dev_err(priv->dev, "cannot set real number of rx queues\n");
1495		goto err_cleanup;
1496	}
1497
1498	reg = cpsw->version;
1499
1500	dev_info(priv->dev, "initializing cpsw version %d.%d (%d)\n",
1501		 CPSW_MAJOR_VERSION(reg), CPSW_MINOR_VERSION(reg),
1502		 CPSW_RTL_VERSION(reg));
1503
1504	/* initialize host and slave ports */
1505	if (!cpsw_common_res_usage_state(cpsw))
1506		cpsw_init_host_port(priv);
1507	for_each_slave(priv, cpsw_slave_open, priv);
1508
1509	/* Add default VLAN */
1510	if (!cpsw->data.dual_emac)
1511		cpsw_add_default_vlan(priv);
1512	else
1513		cpsw_ale_add_vlan(cpsw->ale, cpsw->data.default_vlan,
1514				  ALE_ALL_PORTS, ALE_ALL_PORTS, 0, 0);
1515
1516	if (!cpsw_common_res_usage_state(cpsw)) {
 
1517		/* disable priority elevation */
1518		__raw_writel(0, &cpsw->regs->ptype);
1519
1520		/* enable statistics collection only on all ports */
1521		__raw_writel(0x7, &cpsw->regs->stat_port_en);
1522
1523		/* Enable internal fifo flow control */
1524		writel(0x7, &cpsw->regs->flow_control);
1525
1526		napi_enable(&cpsw->napi_rx);
1527		napi_enable(&cpsw->napi_tx);
1528
1529		if (cpsw->tx_irq_disabled) {
1530			cpsw->tx_irq_disabled = false;
1531			enable_irq(cpsw->irqs_table[1]);
1532		}
1533
1534		if (cpsw->rx_irq_disabled) {
1535			cpsw->rx_irq_disabled = false;
1536			enable_irq(cpsw->irqs_table[0]);
1537		}
1538
 
 
 
 
 
 
 
1539		ret = cpsw_fill_rx_channels(priv);
1540		if (ret < 0)
1541			goto err_cleanup;
1542
1543		if (cpts_register(cpsw->cpts))
1544			dev_err(priv->dev, "error registering cpts device\n");
 
 
 
 
 
1545
1546	}
1547
1548	/* Enable Interrupt pacing if configured */
1549	if (cpsw->coal_intvl != 0) {
1550		struct ethtool_coalesce coal;
1551
1552		coal.rx_coalesce_usecs = cpsw->coal_intvl;
1553		cpsw_set_coalesce(ndev, &coal);
1554	}
1555
1556	cpdma_ctlr_start(cpsw->dma);
1557	cpsw_intr_enable(cpsw);
1558
1559	if (cpsw->data.dual_emac)
1560		cpsw->slaves[priv->emac_port].open_stat = true;
1561
1562	return 0;
1563
1564err_cleanup:
1565	cpdma_ctlr_stop(cpsw->dma);
 
 
 
 
 
 
1566	for_each_slave(priv, cpsw_slave_stop, cpsw);
1567	pm_runtime_put_sync(cpsw->dev);
1568	netif_carrier_off(priv->ndev);
1569	return ret;
1570}
1571
1572static int cpsw_ndo_stop(struct net_device *ndev)
1573{
1574	struct cpsw_priv *priv = netdev_priv(ndev);
1575	struct cpsw_common *cpsw = priv->cpsw;
1576
1577	cpsw_info(priv, ifdown, "shutting down cpsw device\n");
 
1578	netif_tx_stop_all_queues(priv->ndev);
1579	netif_carrier_off(priv->ndev);
1580
1581	if (cpsw_common_res_usage_state(cpsw) <= 1) {
1582		napi_disable(&cpsw->napi_rx);
1583		napi_disable(&cpsw->napi_tx);
1584		cpts_unregister(cpsw->cpts);
1585		cpsw_intr_disable(cpsw);
1586		cpdma_ctlr_stop(cpsw->dma);
1587		cpsw_ale_stop(cpsw->ale);
 
1588	}
1589	for_each_slave(priv, cpsw_slave_stop, cpsw);
1590
1591	if (cpsw_need_resplit(cpsw))
1592		cpsw_split_res(ndev);
1593
 
1594	pm_runtime_put_sync(cpsw->dev);
1595	if (cpsw->data.dual_emac)
1596		cpsw->slaves[priv->emac_port].open_stat = false;
1597	return 0;
1598}
1599
1600static netdev_tx_t cpsw_ndo_start_xmit(struct sk_buff *skb,
1601				       struct net_device *ndev)
1602{
1603	struct cpsw_priv *priv = netdev_priv(ndev);
1604	struct cpsw_common *cpsw = priv->cpsw;
 
1605	struct netdev_queue *txq;
1606	struct cpdma_chan *txch;
1607	int ret, q_idx;
1608
1609	netif_trans_update(ndev);
1610
1611	if (skb_padto(skb, CPSW_MIN_PACKET_SIZE)) {
1612		cpsw_err(priv, tx_err, "packet pad failed\n");
1613		ndev->stats.tx_dropped++;
1614		return NETDEV_TX_OK;
1615	}
1616
1617	if (skb_shinfo(skb)->tx_flags & SKBTX_HW_TSTAMP &&
1618	    cpts_is_tx_enabled(cpsw->cpts))
1619		skb_shinfo(skb)->tx_flags |= SKBTX_IN_PROGRESS;
1620
1621	skb_tx_timestamp(skb);
1622
1623	q_idx = skb_get_queue_mapping(skb);
1624	if (q_idx >= cpsw->tx_ch_num)
1625		q_idx = q_idx % cpsw->tx_ch_num;
1626
1627	txch = cpsw->txv[q_idx].ch;
1628	ret = cpsw_tx_packet_submit(priv, skb, txch);
 
 
 
1629	if (unlikely(ret != 0)) {
1630		cpsw_err(priv, tx_err, "desc submit failed\n");
1631		goto fail;
1632	}
1633
1634	/* If there is no more tx desc left free then we need to
1635	 * tell the kernel to stop sending us tx frames.
1636	 */
1637	if (unlikely(!cpdma_check_free_tx_desc(txch))) {
1638		txq = netdev_get_tx_queue(ndev, q_idx);
1639		netif_tx_stop_queue(txq);
 
 
 
 
 
 
1640	}
1641
1642	return NETDEV_TX_OK;
1643fail:
1644	ndev->stats.tx_dropped++;
1645	txq = netdev_get_tx_queue(ndev, skb_get_queue_mapping(skb));
1646	netif_tx_stop_queue(txq);
1647	return NETDEV_TX_BUSY;
1648}
1649
1650#if IS_ENABLED(CONFIG_TI_CPTS)
 
1651
1652static void cpsw_hwtstamp_v1(struct cpsw_common *cpsw)
1653{
1654	struct cpsw_slave *slave = &cpsw->slaves[cpsw->data.active_slave];
1655	u32 ts_en, seq_id;
1656
1657	if (!cpts_is_tx_enabled(cpsw->cpts) &&
1658	    !cpts_is_rx_enabled(cpsw->cpts)) {
1659		slave_write(slave, 0, CPSW1_TS_CTL);
1660		return;
1661	}
1662
1663	seq_id = (30 << CPSW_V1_SEQ_ID_OFS_SHIFT) | ETH_P_1588;
1664	ts_en = EVENT_MSG_BITS << CPSW_V1_MSG_TYPE_OFS;
1665
1666	if (cpts_is_tx_enabled(cpsw->cpts))
1667		ts_en |= CPSW_V1_TS_TX_EN;
1668
1669	if (cpts_is_rx_enabled(cpsw->cpts))
1670		ts_en |= CPSW_V1_TS_RX_EN;
1671
1672	slave_write(slave, ts_en, CPSW1_TS_CTL);
1673	slave_write(slave, seq_id, CPSW1_TS_SEQ_LTYPE);
1674}
1675
1676static void cpsw_hwtstamp_v2(struct cpsw_priv *priv)
1677{
1678	struct cpsw_slave *slave;
1679	struct cpsw_common *cpsw = priv->cpsw;
1680	u32 ctrl, mtype;
1681
1682	slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)];
1683
1684	ctrl = slave_read(slave, CPSW2_CONTROL);
1685	switch (cpsw->version) {
1686	case CPSW_VERSION_2:
1687		ctrl &= ~CTRL_V2_ALL_TS_MASK;
1688
1689		if (cpts_is_tx_enabled(cpsw->cpts))
1690			ctrl |= CTRL_V2_TX_TS_BITS;
1691
1692		if (cpts_is_rx_enabled(cpsw->cpts))
1693			ctrl |= CTRL_V2_RX_TS_BITS;
1694		break;
1695	case CPSW_VERSION_3:
1696	default:
1697		ctrl &= ~CTRL_V3_ALL_TS_MASK;
1698
1699		if (cpts_is_tx_enabled(cpsw->cpts))
1700			ctrl |= CTRL_V3_TX_TS_BITS;
1701
1702		if (cpts_is_rx_enabled(cpsw->cpts))
1703			ctrl |= CTRL_V3_RX_TS_BITS;
1704		break;
1705	}
1706
1707	mtype = (30 << TS_SEQ_ID_OFFSET_SHIFT) | EVENT_MSG_BITS;
1708
1709	slave_write(slave, mtype, CPSW2_TS_SEQ_MTYPE);
1710	slave_write(slave, ctrl, CPSW2_CONTROL);
1711	__raw_writel(ETH_P_1588, &cpsw->regs->ts_ltype);
1712}
1713
1714static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
1715{
1716	struct cpsw_priv *priv = netdev_priv(dev);
1717	struct hwtstamp_config cfg;
1718	struct cpsw_common *cpsw = priv->cpsw;
1719	struct cpts *cpts = cpsw->cpts;
1720
1721	if (cpsw->version != CPSW_VERSION_1 &&
1722	    cpsw->version != CPSW_VERSION_2 &&
1723	    cpsw->version != CPSW_VERSION_3)
1724		return -EOPNOTSUPP;
1725
1726	if (copy_from_user(&cfg, ifr->ifr_data, sizeof(cfg)))
1727		return -EFAULT;
1728
1729	/* reserved for future extensions */
1730	if (cfg.flags)
1731		return -EINVAL;
1732
1733	if (cfg.tx_type != HWTSTAMP_TX_OFF && cfg.tx_type != HWTSTAMP_TX_ON)
1734		return -ERANGE;
1735
1736	switch (cfg.rx_filter) {
1737	case HWTSTAMP_FILTER_NONE:
1738		cpts_rx_enable(cpts, 0);
1739		break;
1740	case HWTSTAMP_FILTER_ALL:
1741	case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
1742	case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
1743	case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
1744		return -ERANGE;
1745	case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
1746	case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
1747	case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
1748	case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
1749	case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
1750	case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
1751	case HWTSTAMP_FILTER_PTP_V2_EVENT:
1752	case HWTSTAMP_FILTER_PTP_V2_SYNC:
1753	case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
1754		cpts_rx_enable(cpts, 1);
1755		cfg.rx_filter = HWTSTAMP_FILTER_PTP_V2_EVENT;
1756		break;
1757	default:
1758		return -ERANGE;
1759	}
1760
1761	cpts_tx_enable(cpts, cfg.tx_type == HWTSTAMP_TX_ON);
1762
1763	switch (cpsw->version) {
1764	case CPSW_VERSION_1:
1765		cpsw_hwtstamp_v1(cpsw);
1766		break;
1767	case CPSW_VERSION_2:
1768	case CPSW_VERSION_3:
1769		cpsw_hwtstamp_v2(priv);
1770		break;
1771	default:
1772		WARN_ON(1);
1773	}
1774
1775	return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1776}
1777
1778static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
1779{
1780	struct cpsw_common *cpsw = ndev_to_cpsw(dev);
1781	struct cpts *cpts = cpsw->cpts;
1782	struct hwtstamp_config cfg;
1783
1784	if (cpsw->version != CPSW_VERSION_1 &&
1785	    cpsw->version != CPSW_VERSION_2 &&
1786	    cpsw->version != CPSW_VERSION_3)
1787		return -EOPNOTSUPP;
1788
1789	cfg.flags = 0;
1790	cfg.tx_type = cpts_is_tx_enabled(cpts) ?
1791		      HWTSTAMP_TX_ON : HWTSTAMP_TX_OFF;
1792	cfg.rx_filter = (cpts_is_rx_enabled(cpts) ?
1793			 HWTSTAMP_FILTER_PTP_V2_EVENT : HWTSTAMP_FILTER_NONE);
1794
1795	return copy_to_user(ifr->ifr_data, &cfg, sizeof(cfg)) ? -EFAULT : 0;
1796}
1797#else
1798static int cpsw_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
1799{
1800	return -EOPNOTSUPP;
1801}
1802
1803static int cpsw_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
1804{
1805	return -EOPNOTSUPP;
1806}
1807#endif /*CONFIG_TI_CPTS*/
1808
1809static int cpsw_ndo_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
1810{
1811	struct cpsw_priv *priv = netdev_priv(dev);
1812	struct cpsw_common *cpsw = priv->cpsw;
1813	int slave_no = cpsw_slave_index(cpsw, priv);
1814
1815	if (!netif_running(dev))
1816		return -EINVAL;
1817
1818	switch (cmd) {
1819	case SIOCSHWTSTAMP:
1820		return cpsw_hwtstamp_set(dev, req);
1821	case SIOCGHWTSTAMP:
1822		return cpsw_hwtstamp_get(dev, req);
1823	}
1824
1825	if (!cpsw->slaves[slave_no].phy)
1826		return -EOPNOTSUPP;
1827	return phy_mii_ioctl(cpsw->slaves[slave_no].phy, req, cmd);
1828}
1829
1830static void cpsw_ndo_tx_timeout(struct net_device *ndev)
1831{
1832	struct cpsw_priv *priv = netdev_priv(ndev);
1833	struct cpsw_common *cpsw = priv->cpsw;
1834	int ch;
1835
1836	cpsw_err(priv, tx_err, "transmit timeout, restarting dma\n");
1837	ndev->stats.tx_errors++;
1838	cpsw_intr_disable(cpsw);
1839	for (ch = 0; ch < cpsw->tx_ch_num; ch++) {
1840		cpdma_chan_stop(cpsw->txv[ch].ch);
1841		cpdma_chan_start(cpsw->txv[ch].ch);
1842	}
1843
1844	cpsw_intr_enable(cpsw);
1845}
1846
1847static int cpsw_ndo_set_mac_address(struct net_device *ndev, void *p)
1848{
1849	struct cpsw_priv *priv = netdev_priv(ndev);
1850	struct sockaddr *addr = (struct sockaddr *)p;
1851	struct cpsw_common *cpsw = priv->cpsw;
1852	int flags = 0;
1853	u16 vid = 0;
1854	int ret;
1855
1856	if (!is_valid_ether_addr(addr->sa_data))
1857		return -EADDRNOTAVAIL;
1858
1859	ret = pm_runtime_get_sync(cpsw->dev);
1860	if (ret < 0) {
1861		pm_runtime_put_noidle(cpsw->dev);
1862		return ret;
1863	}
1864
1865	if (cpsw->data.dual_emac) {
1866		vid = cpsw->slaves[priv->emac_port].port_vlan;
1867		flags = ALE_VLAN;
1868	}
1869
1870	cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr, HOST_PORT_NUM,
1871			   flags, vid);
1872	cpsw_ale_add_ucast(cpsw->ale, addr->sa_data, HOST_PORT_NUM,
1873			   flags, vid);
1874
1875	memcpy(priv->mac_addr, addr->sa_data, ETH_ALEN);
1876	memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN);
1877	for_each_slave(priv, cpsw_set_slave_mac, priv);
1878
1879	pm_runtime_put(cpsw->dev);
1880
1881	return 0;
1882}
1883
1884#ifdef CONFIG_NET_POLL_CONTROLLER
1885static void cpsw_ndo_poll_controller(struct net_device *ndev)
1886{
1887	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
1888
1889	cpsw_intr_disable(cpsw);
1890	cpsw_rx_interrupt(cpsw->irqs_table[0], cpsw);
1891	cpsw_tx_interrupt(cpsw->irqs_table[1], cpsw);
1892	cpsw_intr_enable(cpsw);
1893}
1894#endif
1895
1896static inline int cpsw_add_vlan_ale_entry(struct cpsw_priv *priv,
1897				unsigned short vid)
1898{
1899	int ret;
1900	int unreg_mcast_mask = 0;
 
1901	u32 port_mask;
1902	struct cpsw_common *cpsw = priv->cpsw;
1903
1904	if (cpsw->data.dual_emac) {
1905		port_mask = (1 << (priv->emac_port + 1)) | ALE_PORT_HOST;
1906
 
1907		if (priv->ndev->flags & IFF_ALLMULTI)
1908			unreg_mcast_mask = port_mask;
1909	} else {
1910		port_mask = ALE_ALL_PORTS;
 
1911
1912		if (priv->ndev->flags & IFF_ALLMULTI)
1913			unreg_mcast_mask = ALE_ALL_PORTS;
1914		else
1915			unreg_mcast_mask = ALE_PORT_1 | ALE_PORT_2;
1916	}
1917
1918	ret = cpsw_ale_add_vlan(cpsw->ale, vid, port_mask, 0, port_mask,
1919				unreg_mcast_mask);
1920	if (ret != 0)
1921		return ret;
1922
1923	ret = cpsw_ale_add_ucast(cpsw->ale, priv->mac_addr,
1924				 HOST_PORT_NUM, ALE_VLAN, vid);
1925	if (ret != 0)
1926		goto clean_vid;
1927
1928	ret = cpsw_ale_add_mcast(cpsw->ale, priv->ndev->broadcast,
1929				 port_mask, ALE_VLAN, vid, 0);
1930	if (ret != 0)
1931		goto clean_vlan_ucast;
1932	return 0;
1933
1934clean_vlan_ucast:
1935	cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr,
1936			   HOST_PORT_NUM, ALE_VLAN, vid);
1937clean_vid:
1938	cpsw_ale_del_vlan(cpsw->ale, vid, 0);
1939	return ret;
1940}
1941
1942static int cpsw_ndo_vlan_rx_add_vid(struct net_device *ndev,
1943				    __be16 proto, u16 vid)
1944{
1945	struct cpsw_priv *priv = netdev_priv(ndev);
1946	struct cpsw_common *cpsw = priv->cpsw;
1947	int ret;
1948
1949	if (vid == cpsw->data.default_vlan)
1950		return 0;
1951
1952	ret = pm_runtime_get_sync(cpsw->dev);
1953	if (ret < 0) {
1954		pm_runtime_put_noidle(cpsw->dev);
1955		return ret;
1956	}
1957
1958	if (cpsw->data.dual_emac) {
1959		/* In dual EMAC, reserved VLAN id should not be used for
1960		 * creating VLAN interfaces as this can break the dual
1961		 * EMAC port separation
1962		 */
1963		int i;
1964
1965		for (i = 0; i < cpsw->data.slaves; i++) {
1966			if (vid == cpsw->slaves[i].port_vlan)
1967				return -EINVAL;
 
 
1968		}
1969	}
1970
1971	dev_info(priv->dev, "Adding vlanid %d to vlan filter\n", vid);
1972	ret = cpsw_add_vlan_ale_entry(priv, vid);
1973
1974	pm_runtime_put(cpsw->dev);
1975	return ret;
1976}
1977
1978static int cpsw_ndo_vlan_rx_kill_vid(struct net_device *ndev,
1979				     __be16 proto, u16 vid)
1980{
1981	struct cpsw_priv *priv = netdev_priv(ndev);
1982	struct cpsw_common *cpsw = priv->cpsw;
1983	int ret;
1984
1985	if (vid == cpsw->data.default_vlan)
1986		return 0;
1987
1988	ret = pm_runtime_get_sync(cpsw->dev);
1989	if (ret < 0) {
1990		pm_runtime_put_noidle(cpsw->dev);
1991		return ret;
1992	}
1993
1994	if (cpsw->data.dual_emac) {
1995		int i;
1996
1997		for (i = 0; i < cpsw->data.slaves; i++) {
1998			if (vid == cpsw->slaves[i].port_vlan)
1999				return -EINVAL;
2000		}
2001	}
2002
2003	dev_info(priv->dev, "removing vlanid %d from vlan filter\n", vid);
2004	ret = cpsw_ale_del_vlan(cpsw->ale, vid, 0);
2005	if (ret != 0)
2006		return ret;
2007
2008	ret = cpsw_ale_del_ucast(cpsw->ale, priv->mac_addr,
2009				 HOST_PORT_NUM, ALE_VLAN, vid);
2010	if (ret != 0)
2011		return ret;
2012
2013	ret = cpsw_ale_del_mcast(cpsw->ale, priv->ndev->broadcast,
2014				 0, ALE_VLAN, vid);
2015	pm_runtime_put(cpsw->dev);
2016	return ret;
2017}
2018
2019static int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate)
 
2020{
2021	struct cpsw_priv *priv = netdev_priv(ndev);
2022	struct cpsw_common *cpsw = priv->cpsw;
2023	struct cpsw_slave *slave;
2024	u32 min_rate;
2025	u32 ch_rate;
2026	int i, ret;
2027
2028	ch_rate = netdev_get_tx_queue(ndev, queue)->tx_maxrate;
2029	if (ch_rate == rate)
2030		return 0;
2031
2032	ch_rate = rate * 1000;
2033	min_rate = cpdma_chan_get_min_rate(cpsw->dma);
2034	if ((ch_rate < min_rate && ch_rate)) {
2035		dev_err(priv->dev, "The channel rate cannot be less than %dMbps",
2036			min_rate);
2037		return -EINVAL;
2038	}
2039
2040	if (rate > cpsw->speed) {
2041		dev_err(priv->dev, "The channel rate cannot be more than 2Gbps");
2042		return -EINVAL;
2043	}
2044
2045	ret = pm_runtime_get_sync(cpsw->dev);
2046	if (ret < 0) {
2047		pm_runtime_put_noidle(cpsw->dev);
2048		return ret;
2049	}
2050
2051	ret = cpdma_chan_set_rate(cpsw->txv[queue].ch, ch_rate);
2052	pm_runtime_put(cpsw->dev);
2053
2054	if (ret)
2055		return ret;
 
 
2056
2057	/* update rates for slaves tx queues */
2058	for (i = 0; i < cpsw->data.slaves; i++) {
2059		slave = &cpsw->slaves[i];
2060		if (!slave->ndev)
2061			continue;
2062
2063		netdev_get_tx_queue(slave->ndev, queue)->tx_maxrate = rate;
2064	}
2065
2066	cpsw_split_res(ndev);
2067	return ret;
2068}
 
2069
2070static const struct net_device_ops cpsw_netdev_ops = {
2071	.ndo_open		= cpsw_ndo_open,
2072	.ndo_stop		= cpsw_ndo_stop,
2073	.ndo_start_xmit		= cpsw_ndo_start_xmit,
2074	.ndo_set_mac_address	= cpsw_ndo_set_mac_address,
2075	.ndo_do_ioctl		= cpsw_ndo_ioctl,
2076	.ndo_validate_addr	= eth_validate_addr,
2077	.ndo_tx_timeout		= cpsw_ndo_tx_timeout,
2078	.ndo_set_rx_mode	= cpsw_ndo_set_rx_mode,
2079	.ndo_set_tx_maxrate	= cpsw_ndo_set_tx_maxrate,
2080#ifdef CONFIG_NET_POLL_CONTROLLER
2081	.ndo_poll_controller	= cpsw_ndo_poll_controller,
2082#endif
2083	.ndo_vlan_rx_add_vid	= cpsw_ndo_vlan_rx_add_vid,
2084	.ndo_vlan_rx_kill_vid	= cpsw_ndo_vlan_rx_kill_vid,
 
 
 
2085};
2086
2087static int cpsw_get_regs_len(struct net_device *ndev)
2088{
2089	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
2090
2091	return cpsw->data.ale_entries * ALE_ENTRY_WORDS * sizeof(u32);
2092}
2093
2094static void cpsw_get_regs(struct net_device *ndev,
2095			  struct ethtool_regs *regs, void *p)
2096{
2097	u32 *reg = p;
2098	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
2099
2100	/* update CPSW IP version */
2101	regs->version = cpsw->version;
2102
2103	cpsw_ale_dump(cpsw->ale, reg);
2104}
2105
2106static void cpsw_get_drvinfo(struct net_device *ndev,
2107			     struct ethtool_drvinfo *info)
2108{
2109	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
2110	struct platform_device	*pdev = to_platform_device(cpsw->dev);
2111
2112	strlcpy(info->driver, "cpsw", sizeof(info->driver));
2113	strlcpy(info->version, "1.0", sizeof(info->version));
2114	strlcpy(info->bus_info, pdev->name, sizeof(info->bus_info));
2115}
2116
2117static u32 cpsw_get_msglevel(struct net_device *ndev)
2118{
2119	struct cpsw_priv *priv = netdev_priv(ndev);
2120	return priv->msg_enable;
2121}
2122
2123static void cpsw_set_msglevel(struct net_device *ndev, u32 value)
2124{
2125	struct cpsw_priv *priv = netdev_priv(ndev);
2126	priv->msg_enable = value;
2127}
2128
2129#if IS_ENABLED(CONFIG_TI_CPTS)
2130static int cpsw_get_ts_info(struct net_device *ndev,
2131			    struct ethtool_ts_info *info)
2132{
2133	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
2134
2135	info->so_timestamping =
2136		SOF_TIMESTAMPING_TX_HARDWARE |
2137		SOF_TIMESTAMPING_TX_SOFTWARE |
2138		SOF_TIMESTAMPING_RX_HARDWARE |
2139		SOF_TIMESTAMPING_RX_SOFTWARE |
2140		SOF_TIMESTAMPING_SOFTWARE |
2141		SOF_TIMESTAMPING_RAW_HARDWARE;
2142	info->phc_index = cpsw->cpts->phc_index;
2143	info->tx_types =
2144		(1 << HWTSTAMP_TX_OFF) |
2145		(1 << HWTSTAMP_TX_ON);
2146	info->rx_filters =
2147		(1 << HWTSTAMP_FILTER_NONE) |
2148		(1 << HWTSTAMP_FILTER_PTP_V2_EVENT);
2149	return 0;
2150}
2151#else
2152static int cpsw_get_ts_info(struct net_device *ndev,
2153			    struct ethtool_ts_info *info)
2154{
2155	info->so_timestamping =
2156		SOF_TIMESTAMPING_TX_SOFTWARE |
2157		SOF_TIMESTAMPING_RX_SOFTWARE |
2158		SOF_TIMESTAMPING_SOFTWARE;
2159	info->phc_index = -1;
2160	info->tx_types = 0;
2161	info->rx_filters = 0;
2162	return 0;
2163}
2164#endif
2165
2166static int cpsw_get_link_ksettings(struct net_device *ndev,
2167				   struct ethtool_link_ksettings *ecmd)
2168{
2169	struct cpsw_priv *priv = netdev_priv(ndev);
2170	struct cpsw_common *cpsw = priv->cpsw;
2171	int slave_no = cpsw_slave_index(cpsw, priv);
2172
2173	if (cpsw->slaves[slave_no].phy)
2174		return phy_ethtool_ksettings_get(cpsw->slaves[slave_no].phy,
2175						 ecmd);
2176	else
2177		return -EOPNOTSUPP;
2178}
2179
2180static int cpsw_set_link_ksettings(struct net_device *ndev,
2181				   const struct ethtool_link_ksettings *ecmd)
2182{
2183	struct cpsw_priv *priv = netdev_priv(ndev);
2184	struct cpsw_common *cpsw = priv->cpsw;
2185	int slave_no = cpsw_slave_index(cpsw, priv);
2186
2187	if (cpsw->slaves[slave_no].phy)
2188		return phy_ethtool_ksettings_set(cpsw->slaves[slave_no].phy,
2189						 ecmd);
2190	else
2191		return -EOPNOTSUPP;
2192}
2193
2194static void cpsw_get_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
2195{
2196	struct cpsw_priv *priv = netdev_priv(ndev);
2197	struct cpsw_common *cpsw = priv->cpsw;
2198	int slave_no = cpsw_slave_index(cpsw, priv);
2199
2200	wol->supported = 0;
2201	wol->wolopts = 0;
2202
2203	if (cpsw->slaves[slave_no].phy)
2204		phy_ethtool_get_wol(cpsw->slaves[slave_no].phy, wol);
2205}
2206
2207static int cpsw_set_wol(struct net_device *ndev, struct ethtool_wolinfo *wol)
2208{
2209	struct cpsw_priv *priv = netdev_priv(ndev);
2210	struct cpsw_common *cpsw = priv->cpsw;
2211	int slave_no = cpsw_slave_index(cpsw, priv);
2212
2213	if (cpsw->slaves[slave_no].phy)
2214		return phy_ethtool_set_wol(cpsw->slaves[slave_no].phy, wol);
2215	else
2216		return -EOPNOTSUPP;
2217}
2218
2219static void cpsw_get_pauseparam(struct net_device *ndev,
2220				struct ethtool_pauseparam *pause)
2221{
2222	struct cpsw_priv *priv = netdev_priv(ndev);
2223
2224	pause->autoneg = AUTONEG_DISABLE;
2225	pause->rx_pause = priv->rx_pause ? true : false;
2226	pause->tx_pause = priv->tx_pause ? true : false;
2227}
2228
2229static int cpsw_set_pauseparam(struct net_device *ndev,
2230			       struct ethtool_pauseparam *pause)
2231{
2232	struct cpsw_priv *priv = netdev_priv(ndev);
2233	bool link;
2234
2235	priv->rx_pause = pause->rx_pause ? true : false;
2236	priv->tx_pause = pause->tx_pause ? true : false;
2237
2238	for_each_slave(priv, _cpsw_adjust_link, priv, &link);
2239	return 0;
2240}
2241
2242static int cpsw_ethtool_op_begin(struct net_device *ndev)
2243{
2244	struct cpsw_priv *priv = netdev_priv(ndev);
2245	struct cpsw_common *cpsw = priv->cpsw;
2246	int ret;
2247
2248	ret = pm_runtime_get_sync(cpsw->dev);
2249	if (ret < 0) {
2250		cpsw_err(priv, drv, "ethtool begin failed %d\n", ret);
2251		pm_runtime_put_noidle(cpsw->dev);
2252	}
2253
2254	return ret;
2255}
2256
2257static void cpsw_ethtool_op_complete(struct net_device *ndev)
2258{
2259	struct cpsw_priv *priv = netdev_priv(ndev);
2260	int ret;
2261
2262	ret = pm_runtime_put(priv->cpsw->dev);
2263	if (ret < 0)
2264		cpsw_err(priv, drv, "ethtool complete failed %d\n", ret);
2265}
2266
2267static void cpsw_get_channels(struct net_device *ndev,
2268			      struct ethtool_channels *ch)
2269{
2270	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
2271
2272	ch->max_combined = 0;
2273	ch->max_rx = CPSW_MAX_QUEUES;
2274	ch->max_tx = CPSW_MAX_QUEUES;
2275	ch->max_other = 0;
2276	ch->other_count = 0;
2277	ch->rx_count = cpsw->rx_ch_num;
2278	ch->tx_count = cpsw->tx_ch_num;
2279	ch->combined_count = 0;
2280}
2281
2282static int cpsw_check_ch_settings(struct cpsw_common *cpsw,
2283				  struct ethtool_channels *ch)
2284{
2285	if (ch->combined_count)
2286		return -EINVAL;
2287
2288	/* verify we have at least one channel in each direction */
2289	if (!ch->rx_count || !ch->tx_count)
2290		return -EINVAL;
2291
2292	if (ch->rx_count > cpsw->data.channels ||
2293	    ch->tx_count > cpsw->data.channels)
2294		return -EINVAL;
2295
2296	return 0;
2297}
2298
2299static int cpsw_update_channels_res(struct cpsw_priv *priv, int ch_num, int rx)
2300{
2301	int (*poll)(struct napi_struct *, int);
2302	struct cpsw_common *cpsw = priv->cpsw;
2303	void (*handler)(void *, int, int);
2304	struct netdev_queue *queue;
2305	struct cpsw_vector *vec;
2306	int ret, *ch;
2307
2308	if (rx) {
2309		ch = &cpsw->rx_ch_num;
2310		vec = cpsw->rxv;
2311		handler = cpsw_rx_handler;
2312		poll = cpsw_rx_poll;
2313	} else {
2314		ch = &cpsw->tx_ch_num;
2315		vec = cpsw->txv;
2316		handler = cpsw_tx_handler;
2317		poll = cpsw_tx_poll;
2318	}
2319
2320	while (*ch < ch_num) {
2321		vec[*ch].ch = cpdma_chan_create(cpsw->dma, *ch, handler, rx);
2322		queue = netdev_get_tx_queue(priv->ndev, *ch);
2323		queue->tx_maxrate = 0;
2324
2325		if (IS_ERR(vec[*ch].ch))
2326			return PTR_ERR(vec[*ch].ch);
2327
2328		if (!vec[*ch].ch)
2329			return -EINVAL;
2330
2331		cpsw_info(priv, ifup, "created new %d %s channel\n", *ch,
2332			  (rx ? "rx" : "tx"));
2333		(*ch)++;
2334	}
2335
2336	while (*ch > ch_num) {
2337		(*ch)--;
2338
2339		ret = cpdma_chan_destroy(vec[*ch].ch);
2340		if (ret)
2341			return ret;
2342
2343		cpsw_info(priv, ifup, "destroyed %d %s channel\n", *ch,
2344			  (rx ? "rx" : "tx"));
2345	}
2346
2347	return 0;
2348}
2349
2350static int cpsw_update_channels(struct cpsw_priv *priv,
2351				struct ethtool_channels *ch)
2352{
2353	int ret;
2354
2355	ret = cpsw_update_channels_res(priv, ch->rx_count, 1);
2356	if (ret)
2357		return ret;
2358
2359	ret = cpsw_update_channels_res(priv, ch->tx_count, 0);
2360	if (ret)
2361		return ret;
2362
2363	return 0;
2364}
2365
2366static int cpsw_set_channels(struct net_device *ndev,
2367			     struct ethtool_channels *chs)
2368{
2369	struct cpsw_priv *priv = netdev_priv(ndev);
2370	struct cpsw_common *cpsw = priv->cpsw;
2371	struct cpsw_slave *slave;
2372	int i, ret;
2373
2374	ret = cpsw_check_ch_settings(cpsw, chs);
2375	if (ret < 0)
2376		return ret;
2377
2378	/* Disable NAPI scheduling */
2379	cpsw_intr_disable(cpsw);
2380
2381	/* Stop all transmit queues for every network device.
2382	 * Disable re-using rx descriptors with dormant_on.
2383	 */
2384	for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) {
2385		if (!(slave->ndev && netif_running(slave->ndev)))
2386			continue;
2387
2388		netif_tx_stop_all_queues(slave->ndev);
2389		netif_dormant_on(slave->ndev);
2390	}
2391
2392	/* Handle rest of tx packets and stop cpdma channels */
2393	cpdma_ctlr_stop(cpsw->dma);
2394	ret = cpsw_update_channels(priv, chs);
2395	if (ret)
2396		goto err;
2397
2398	for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) {
2399		if (!(slave->ndev && netif_running(slave->ndev)))
2400			continue;
2401
2402		/* Inform stack about new count of queues */
2403		ret = netif_set_real_num_tx_queues(slave->ndev,
2404						   cpsw->tx_ch_num);
2405		if (ret) {
2406			dev_err(priv->dev, "cannot set real number of tx queues\n");
2407			goto err;
2408		}
2409
2410		ret = netif_set_real_num_rx_queues(slave->ndev,
2411						   cpsw->rx_ch_num);
2412		if (ret) {
2413			dev_err(priv->dev, "cannot set real number of rx queues\n");
2414			goto err;
2415		}
2416
2417		/* Enable rx packets handling */
2418		netif_dormant_off(slave->ndev);
2419	}
2420
2421	if (cpsw_common_res_usage_state(cpsw)) {
2422		ret = cpsw_fill_rx_channels(priv);
2423		if (ret)
2424			goto err;
2425
2426		cpsw_split_res(ndev);
2427
2428		/* After this receive is started */
2429		cpdma_ctlr_start(cpsw->dma);
2430		cpsw_intr_enable(cpsw);
2431	}
2432
2433	/* Resume transmit for every affected interface */
2434	for (i = cpsw->data.slaves, slave = cpsw->slaves; i; i--, slave++) {
2435		if (!(slave->ndev && netif_running(slave->ndev)))
2436			continue;
2437		netif_tx_start_all_queues(slave->ndev);
2438	}
2439	return 0;
2440err:
2441	dev_err(priv->dev, "cannot update channels number, closing device\n");
2442	dev_close(ndev);
2443	return ret;
2444}
2445
2446static int cpsw_get_eee(struct net_device *ndev, struct ethtool_eee *edata)
2447{
2448	struct cpsw_priv *priv = netdev_priv(ndev);
2449	struct cpsw_common *cpsw = priv->cpsw;
2450	int slave_no = cpsw_slave_index(cpsw, priv);
2451
2452	if (cpsw->slaves[slave_no].phy)
2453		return phy_ethtool_get_eee(cpsw->slaves[slave_no].phy, edata);
2454	else
2455		return -EOPNOTSUPP;
2456}
2457
2458static int cpsw_set_eee(struct net_device *ndev, struct ethtool_eee *edata)
2459{
2460	struct cpsw_priv *priv = netdev_priv(ndev);
2461	struct cpsw_common *cpsw = priv->cpsw;
2462	int slave_no = cpsw_slave_index(cpsw, priv);
2463
2464	if (cpsw->slaves[slave_no].phy)
2465		return phy_ethtool_set_eee(cpsw->slaves[slave_no].phy, edata);
2466	else
2467		return -EOPNOTSUPP;
2468}
2469
2470static int cpsw_nway_reset(struct net_device *ndev)
2471{
2472	struct cpsw_priv *priv = netdev_priv(ndev);
2473	struct cpsw_common *cpsw = priv->cpsw;
2474	int slave_no = cpsw_slave_index(cpsw, priv);
2475
2476	if (cpsw->slaves[slave_no].phy)
2477		return genphy_restart_aneg(cpsw->slaves[slave_no].phy);
2478	else
2479		return -EOPNOTSUPP;
2480}
2481
2482static const struct ethtool_ops cpsw_ethtool_ops = {
 
2483	.get_drvinfo	= cpsw_get_drvinfo,
2484	.get_msglevel	= cpsw_get_msglevel,
2485	.set_msglevel	= cpsw_set_msglevel,
2486	.get_link	= ethtool_op_get_link,
2487	.get_ts_info	= cpsw_get_ts_info,
2488	.get_coalesce	= cpsw_get_coalesce,
2489	.set_coalesce	= cpsw_set_coalesce,
2490	.get_sset_count		= cpsw_get_sset_count,
2491	.get_strings		= cpsw_get_strings,
2492	.get_ethtool_stats	= cpsw_get_ethtool_stats,
2493	.get_pauseparam		= cpsw_get_pauseparam,
2494	.set_pauseparam		= cpsw_set_pauseparam,
2495	.get_wol	= cpsw_get_wol,
2496	.set_wol	= cpsw_set_wol,
2497	.get_regs_len	= cpsw_get_regs_len,
2498	.get_regs	= cpsw_get_regs,
2499	.begin		= cpsw_ethtool_op_begin,
2500	.complete	= cpsw_ethtool_op_complete,
2501	.get_channels	= cpsw_get_channels,
2502	.set_channels	= cpsw_set_channels,
2503	.get_link_ksettings	= cpsw_get_link_ksettings,
2504	.set_link_ksettings	= cpsw_set_link_ksettings,
2505	.get_eee	= cpsw_get_eee,
2506	.set_eee	= cpsw_set_eee,
2507	.nway_reset	= cpsw_nway_reset,
 
 
2508};
2509
2510static void cpsw_slave_init(struct cpsw_slave *slave, struct cpsw_common *cpsw,
2511			    u32 slave_reg_ofs, u32 sliver_reg_ofs)
2512{
2513	void __iomem		*regs = cpsw->regs;
2514	int			slave_num = slave->slave_num;
2515	struct cpsw_slave_data	*data = cpsw->data.slave_data + slave_num;
2516
2517	slave->data	= data;
2518	slave->regs	= regs + slave_reg_ofs;
2519	slave->sliver	= regs + sliver_reg_ofs;
2520	slave->port_vlan = data->dual_emac_res_vlan;
2521}
2522
2523static int cpsw_probe_dt(struct cpsw_platform_data *data,
2524			 struct platform_device *pdev)
2525{
2526	struct device_node *node = pdev->dev.of_node;
2527	struct device_node *slave_node;
2528	int i = 0, ret;
2529	u32 prop;
2530
2531	if (!node)
2532		return -EINVAL;
2533
2534	if (of_property_read_u32(node, "slaves", &prop)) {
2535		dev_err(&pdev->dev, "Missing slaves property in the DT.\n");
2536		return -EINVAL;
2537	}
2538	data->slaves = prop;
2539
2540	if (of_property_read_u32(node, "active_slave", &prop)) {
2541		dev_err(&pdev->dev, "Missing active_slave property in the DT.\n");
2542		return -EINVAL;
2543	}
2544	data->active_slave = prop;
2545
2546	data->slave_data = devm_kzalloc(&pdev->dev, data->slaves
2547					* sizeof(struct cpsw_slave_data),
 
2548					GFP_KERNEL);
2549	if (!data->slave_data)
2550		return -ENOMEM;
2551
2552	if (of_property_read_u32(node, "cpdma_channels", &prop)) {
2553		dev_err(&pdev->dev, "Missing cpdma_channels property in the DT.\n");
2554		return -EINVAL;
2555	}
2556	data->channels = prop;
2557
2558	if (of_property_read_u32(node, "ale_entries", &prop)) {
2559		dev_err(&pdev->dev, "Missing ale_entries property in the DT.\n");
2560		return -EINVAL;
2561	}
2562	data->ale_entries = prop;
2563
2564	if (of_property_read_u32(node, "bd_ram_size", &prop)) {
2565		dev_err(&pdev->dev, "Missing bd_ram_size property in the DT.\n");
2566		return -EINVAL;
2567	}
2568	data->bd_ram_size = prop;
2569
2570	if (of_property_read_u32(node, "mac_control", &prop)) {
2571		dev_err(&pdev->dev, "Missing mac_control property in the DT.\n");
2572		return -EINVAL;
2573	}
2574	data->mac_control = prop;
2575
2576	if (of_property_read_bool(node, "dual_emac"))
2577		data->dual_emac = 1;
2578
2579	/*
2580	 * Populate all the child nodes here...
2581	 */
2582	ret = of_platform_populate(node, NULL, NULL, &pdev->dev);
2583	/* We do not want to force this, as in some cases may not have child */
2584	if (ret)
2585		dev_warn(&pdev->dev, "Doesn't have any child node\n");
2586
2587	for_each_available_child_of_node(node, slave_node) {
2588		struct cpsw_slave_data *slave_data = data->slave_data + i;
2589		const void *mac_addr = NULL;
2590		int lenp;
2591		const __be32 *parp;
2592
2593		/* This is no slave child node, continue */
2594		if (strcmp(slave_node->name, "slave"))
2595			continue;
2596
 
 
 
 
 
 
 
 
 
 
 
2597		slave_data->phy_node = of_parse_phandle(slave_node,
2598							"phy-handle", 0);
2599		parp = of_get_property(slave_node, "phy_id", &lenp);
2600		if (slave_data->phy_node) {
2601			dev_dbg(&pdev->dev,
2602				"slave[%d] using phy-handle=\"%s\"\n",
2603				i, slave_data->phy_node->full_name);
2604		} else if (of_phy_is_fixed_link(slave_node)) {
2605			/* In the case of a fixed PHY, the DT node associated
2606			 * to the PHY is the Ethernet MAC DT node.
2607			 */
2608			ret = of_phy_register_fixed_link(slave_node);
2609			if (ret) {
2610				if (ret != -EPROBE_DEFER)
2611					dev_err(&pdev->dev, "failed to register fixed-link phy: %d\n", ret);
2612				return ret;
2613			}
2614			slave_data->phy_node = of_node_get(slave_node);
2615		} else if (parp) {
2616			u32 phyid;
2617			struct device_node *mdio_node;
2618			struct platform_device *mdio;
2619
2620			if (lenp != (sizeof(__be32) * 2)) {
2621				dev_err(&pdev->dev, "Invalid slave[%d] phy_id property\n", i);
2622				goto no_phy_slave;
2623			}
2624			mdio_node = of_find_node_by_phandle(be32_to_cpup(parp));
2625			phyid = be32_to_cpup(parp+1);
2626			mdio = of_find_device_by_node(mdio_node);
2627			of_node_put(mdio_node);
2628			if (!mdio) {
2629				dev_err(&pdev->dev, "Missing mdio platform device\n");
2630				return -EINVAL;
 
2631			}
2632			snprintf(slave_data->phy_id, sizeof(slave_data->phy_id),
2633				 PHY_ID_FMT, mdio->name, phyid);
2634			put_device(&mdio->dev);
2635		} else {
2636			dev_err(&pdev->dev,
2637				"No slave[%d] phy_id, phy-handle, or fixed-link property\n",
2638				i);
2639			goto no_phy_slave;
2640		}
2641		slave_data->phy_if = of_get_phy_mode(slave_node);
2642		if (slave_data->phy_if < 0) {
2643			dev_err(&pdev->dev, "Missing or malformed slave[%d] phy-mode property\n",
2644				i);
2645			return slave_data->phy_if;
2646		}
2647
2648no_phy_slave:
2649		mac_addr = of_get_mac_address(slave_node);
2650		if (mac_addr) {
2651			memcpy(slave_data->mac_addr, mac_addr, ETH_ALEN);
2652		} else {
2653			ret = ti_cm_get_macid(&pdev->dev, i,
2654					      slave_data->mac_addr);
2655			if (ret)
2656				return ret;
2657		}
2658		if (data->dual_emac) {
2659			if (of_property_read_u32(slave_node, "dual_emac_res_vlan",
2660						 &prop)) {
2661				dev_err(&pdev->dev, "Missing dual_emac_res_vlan in DT.\n");
2662				slave_data->dual_emac_res_vlan = i+1;
2663				dev_err(&pdev->dev, "Using %d as Reserved VLAN for %d slave\n",
2664					slave_data->dual_emac_res_vlan, i);
2665			} else {
2666				slave_data->dual_emac_res_vlan = prop;
2667			}
2668		}
2669
2670		i++;
2671		if (i == data->slaves)
2672			break;
 
 
2673	}
2674
2675	return 0;
 
 
 
 
2676}
2677
2678static void cpsw_remove_dt(struct platform_device *pdev)
2679{
2680	struct net_device *ndev = platform_get_drvdata(pdev);
2681	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
2682	struct cpsw_platform_data *data = &cpsw->data;
2683	struct device_node *node = pdev->dev.of_node;
2684	struct device_node *slave_node;
2685	int i = 0;
2686
2687	for_each_available_child_of_node(node, slave_node) {
2688		struct cpsw_slave_data *slave_data = &data->slave_data[i];
2689
2690		if (strcmp(slave_node->name, "slave"))
2691			continue;
2692
2693		if (of_phy_is_fixed_link(slave_node))
2694			of_phy_deregister_fixed_link(slave_node);
2695
2696		of_node_put(slave_data->phy_node);
2697
2698		i++;
2699		if (i == data->slaves)
 
2700			break;
 
2701	}
2702
2703	of_platform_depopulate(&pdev->dev);
2704}
2705
2706static int cpsw_probe_dual_emac(struct cpsw_priv *priv)
2707{
2708	struct cpsw_common		*cpsw = priv->cpsw;
2709	struct cpsw_platform_data	*data = &cpsw->data;
2710	struct net_device		*ndev;
2711	struct cpsw_priv		*priv_sl2;
2712	int ret = 0;
2713
2714	ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES);
 
2715	if (!ndev) {
2716		dev_err(cpsw->dev, "cpsw: error allocating net_device\n");
2717		return -ENOMEM;
2718	}
2719
2720	priv_sl2 = netdev_priv(ndev);
2721	priv_sl2->cpsw = cpsw;
2722	priv_sl2->ndev = ndev;
2723	priv_sl2->dev  = &ndev->dev;
2724	priv_sl2->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
2725
2726	if (is_valid_ether_addr(data->slave_data[1].mac_addr)) {
2727		memcpy(priv_sl2->mac_addr, data->slave_data[1].mac_addr,
2728			ETH_ALEN);
2729		dev_info(cpsw->dev, "cpsw: Detected MACID = %pM\n",
2730			 priv_sl2->mac_addr);
2731	} else {
2732		random_ether_addr(priv_sl2->mac_addr);
2733		dev_info(cpsw->dev, "cpsw: Random MACID = %pM\n",
2734			 priv_sl2->mac_addr);
2735	}
2736	memcpy(ndev->dev_addr, priv_sl2->mac_addr, ETH_ALEN);
2737
2738	priv_sl2->emac_port = 1;
2739	cpsw->slaves[1].ndev = ndev;
2740	ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
 
 
2741
2742	ndev->netdev_ops = &cpsw_netdev_ops;
2743	ndev->ethtool_ops = &cpsw_ethtool_ops;
2744
2745	/* register the network device */
2746	SET_NETDEV_DEV(ndev, cpsw->dev);
 
2747	ret = register_netdev(ndev);
2748	if (ret) {
2749		dev_err(cpsw->dev, "cpsw: error registering net device\n");
2750		free_netdev(ndev);
2751		ret = -ENODEV;
2752	}
2753
2754	return ret;
2755}
2756
2757#define CPSW_QUIRK_IRQ		BIT(0)
2758
2759static struct platform_device_id cpsw_devtype[] = {
2760	{
2761		/* keep it for existing comaptibles */
2762		.name = "cpsw",
2763		.driver_data = CPSW_QUIRK_IRQ,
2764	}, {
2765		.name = "am335x-cpsw",
2766		.driver_data = CPSW_QUIRK_IRQ,
2767	}, {
2768		.name = "am4372-cpsw",
2769		.driver_data = 0,
2770	}, {
2771		.name = "dra7-cpsw",
2772		.driver_data = 0,
2773	}, {
2774		/* sentinel */
2775	}
2776};
2777MODULE_DEVICE_TABLE(platform, cpsw_devtype);
2778
2779enum ti_cpsw_type {
2780	CPSW = 0,
2781	AM335X_CPSW,
2782	AM4372_CPSW,
2783	DRA7_CPSW,
2784};
2785
2786static const struct of_device_id cpsw_of_mtable[] = {
2787	{ .compatible = "ti,cpsw", .data = &cpsw_devtype[CPSW], },
2788	{ .compatible = "ti,am335x-cpsw", .data = &cpsw_devtype[AM335X_CPSW], },
2789	{ .compatible = "ti,am4372-cpsw", .data = &cpsw_devtype[AM4372_CPSW], },
2790	{ .compatible = "ti,dra7-cpsw", .data = &cpsw_devtype[DRA7_CPSW], },
2791	{ /* sentinel */ },
2792};
2793MODULE_DEVICE_TABLE(of, cpsw_of_mtable);
2794
 
 
 
 
 
2795static int cpsw_probe(struct platform_device *pdev)
2796{
 
2797	struct clk			*clk;
2798	struct cpsw_platform_data	*data;
2799	struct net_device		*ndev;
2800	struct cpsw_priv		*priv;
2801	struct cpdma_params		dma_params;
2802	struct cpsw_ale_params		ale_params;
2803	void __iomem			*ss_regs;
2804	void __iomem			*cpts_regs;
2805	struct resource			*res, *ss_res;
2806	const struct of_device_id	*of_id;
2807	struct gpio_descs		*mode;
2808	u32 slave_offset, sliver_offset, slave_size;
2809	struct cpsw_common		*cpsw;
2810	int ret = 0, i;
2811	int irq;
2812
2813	cpsw = devm_kzalloc(&pdev->dev, sizeof(struct cpsw_common), GFP_KERNEL);
2814	if (!cpsw)
2815		return -ENOMEM;
2816
2817	cpsw->dev = &pdev->dev;
2818
2819	ndev = alloc_etherdev_mq(sizeof(struct cpsw_priv), CPSW_MAX_QUEUES);
2820	if (!ndev) {
2821		dev_err(&pdev->dev, "error allocating net_device\n");
2822		return -ENOMEM;
2823	}
2824
2825	platform_set_drvdata(pdev, ndev);
2826	priv = netdev_priv(ndev);
2827	priv->cpsw = cpsw;
2828	priv->ndev = ndev;
2829	priv->dev  = &ndev->dev;
2830	priv->msg_enable = netif_msg_init(debug_level, CPSW_DEBUG);
2831	cpsw->rx_packet_max = max(rx_packet_max, 128);
2832
2833	mode = devm_gpiod_get_array_optional(&pdev->dev, "mode", GPIOD_OUT_LOW);
2834	if (IS_ERR(mode)) {
2835		ret = PTR_ERR(mode);
2836		dev_err(&pdev->dev, "gpio request failed, ret %d\n", ret);
2837		goto clean_ndev_ret;
2838	}
2839
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
2840	/*
2841	 * This may be required here for child devices.
2842	 */
2843	pm_runtime_enable(&pdev->dev);
2844
2845	/* Select default pin state */
2846	pinctrl_pm_select_default_state(&pdev->dev);
2847
2848	/* Need to enable clocks with runtime PM api to access module
2849	 * registers
2850	 */
2851	ret = pm_runtime_get_sync(&pdev->dev);
2852	if (ret < 0) {
2853		pm_runtime_put_noidle(&pdev->dev);
2854		goto clean_runtime_disable_ret;
2855	}
2856
2857	ret = cpsw_probe_dt(&cpsw->data, pdev);
2858	if (ret)
2859		goto clean_dt_ret;
2860
 
 
 
 
2861	data = &cpsw->data;
2862	cpsw->rx_ch_num = 1;
2863	cpsw->tx_ch_num = 1;
2864
2865	if (is_valid_ether_addr(data->slave_data[0].mac_addr)) {
2866		memcpy(priv->mac_addr, data->slave_data[0].mac_addr, ETH_ALEN);
2867		dev_info(&pdev->dev, "Detected MACID = %pM\n", priv->mac_addr);
2868	} else {
2869		eth_random_addr(priv->mac_addr);
2870		dev_info(&pdev->dev, "Random MACID = %pM\n", priv->mac_addr);
2871	}
2872
2873	memcpy(ndev->dev_addr, priv->mac_addr, ETH_ALEN);
2874
2875	cpsw->slaves = devm_kzalloc(&pdev->dev,
2876				    sizeof(struct cpsw_slave) * data->slaves,
2877				    GFP_KERNEL);
2878	if (!cpsw->slaves) {
2879		ret = -ENOMEM;
2880		goto clean_dt_ret;
2881	}
2882	for (i = 0; i < data->slaves; i++)
2883		cpsw->slaves[i].slave_num = i;
2884
2885	cpsw->slaves[0].ndev = ndev;
2886	priv->emac_port = 0;
2887
2888	clk = devm_clk_get(&pdev->dev, "fck");
2889	if (IS_ERR(clk)) {
2890		dev_err(priv->dev, "fck is not found\n");
2891		ret = -ENODEV;
2892		goto clean_dt_ret;
 
 
 
 
 
 
 
2893	}
2894	cpsw->bus_freq_mhz = clk_get_rate(clk) / 1000000;
2895
2896	ss_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2897	ss_regs = devm_ioremap_resource(&pdev->dev, ss_res);
2898	if (IS_ERR(ss_regs)) {
2899		ret = PTR_ERR(ss_regs);
2900		goto clean_dt_ret;
 
 
 
 
 
 
 
 
 
 
2901	}
2902	cpsw->regs = ss_regs;
2903
2904	cpsw->version = readl(&cpsw->regs->id_ver);
 
 
 
 
 
2905
2906	res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
2907	cpsw->wr_regs = devm_ioremap_resource(&pdev->dev, res);
2908	if (IS_ERR(cpsw->wr_regs)) {
2909		ret = PTR_ERR(cpsw->wr_regs);
2910		goto clean_dt_ret;
 
2911	}
2912
2913	memset(&dma_params, 0, sizeof(dma_params));
2914	memset(&ale_params, 0, sizeof(ale_params));
2915
2916	switch (cpsw->version) {
2917	case CPSW_VERSION_1:
2918		cpsw->host_port_regs = ss_regs + CPSW1_HOST_PORT_OFFSET;
2919		cpts_regs		= ss_regs + CPSW1_CPTS_OFFSET;
2920		cpsw->hw_stats	     = ss_regs + CPSW1_HW_STATS;
2921		dma_params.dmaregs   = ss_regs + CPSW1_CPDMA_OFFSET;
2922		dma_params.txhdp     = ss_regs + CPSW1_STATERAM_OFFSET;
2923		ale_params.ale_regs  = ss_regs + CPSW1_ALE_OFFSET;
2924		slave_offset         = CPSW1_SLAVE_OFFSET;
2925		slave_size           = CPSW1_SLAVE_SIZE;
2926		sliver_offset        = CPSW1_SLIVER_OFFSET;
2927		dma_params.desc_mem_phys = 0;
2928		break;
2929	case CPSW_VERSION_2:
2930	case CPSW_VERSION_3:
2931	case CPSW_VERSION_4:
2932		cpsw->host_port_regs = ss_regs + CPSW2_HOST_PORT_OFFSET;
2933		cpts_regs		= ss_regs + CPSW2_CPTS_OFFSET;
2934		cpsw->hw_stats	     = ss_regs + CPSW2_HW_STATS;
2935		dma_params.dmaregs   = ss_regs + CPSW2_CPDMA_OFFSET;
2936		dma_params.txhdp     = ss_regs + CPSW2_STATERAM_OFFSET;
2937		ale_params.ale_regs  = ss_regs + CPSW2_ALE_OFFSET;
2938		slave_offset         = CPSW2_SLAVE_OFFSET;
2939		slave_size           = CPSW2_SLAVE_SIZE;
2940		sliver_offset        = CPSW2_SLIVER_OFFSET;
2941		dma_params.desc_mem_phys =
2942			(u32 __force) ss_res->start + CPSW2_BD_OFFSET;
2943		break;
2944	default:
2945		dev_err(priv->dev, "unknown version 0x%08x\n", cpsw->version);
2946		ret = -ENODEV;
2947		goto clean_dt_ret;
2948	}
2949	for (i = 0; i < cpsw->data.slaves; i++) {
2950		struct cpsw_slave *slave = &cpsw->slaves[i];
2951
2952		cpsw_slave_init(slave, cpsw, slave_offset, sliver_offset);
2953		slave_offset  += slave_size;
2954		sliver_offset += SLIVER_SIZE;
2955	}
2956
2957	dma_params.dev		= &pdev->dev;
2958	dma_params.rxthresh	= dma_params.dmaregs + CPDMA_RXTHRESH;
2959	dma_params.rxfree	= dma_params.dmaregs + CPDMA_RXFREE;
2960	dma_params.rxhdp	= dma_params.txhdp + CPDMA_RXHDP;
2961	dma_params.txcp		= dma_params.txhdp + CPDMA_TXCP;
2962	dma_params.rxcp		= dma_params.txhdp + CPDMA_RXCP;
2963
2964	dma_params.num_chan		= data->channels;
2965	dma_params.has_soft_reset	= true;
2966	dma_params.min_packet_size	= CPSW_MIN_PACKET_SIZE;
2967	dma_params.desc_mem_size	= data->bd_ram_size;
2968	dma_params.desc_align		= 16;
2969	dma_params.has_ext_regs		= true;
2970	dma_params.desc_hw_addr         = dma_params.desc_mem_phys;
2971	dma_params.bus_freq_mhz		= cpsw->bus_freq_mhz;
2972
2973	cpsw->dma = cpdma_ctlr_create(&dma_params);
2974	if (!cpsw->dma) {
2975		dev_err(priv->dev, "error initializing dma\n");
2976		ret = -ENOMEM;
2977		goto clean_dt_ret;
2978	}
2979
2980	cpsw->txv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_tx_handler, 0);
2981	cpsw->rxv[0].ch = cpdma_chan_create(cpsw->dma, 0, cpsw_rx_handler, 1);
2982	if (WARN_ON(!cpsw->rxv[0].ch || !cpsw->txv[0].ch)) {
2983		dev_err(priv->dev, "error initializing dma channels\n");
2984		ret = -ENOMEM;
2985		goto clean_dma_ret;
2986	}
2987
2988	ale_params.dev			= &ndev->dev;
2989	ale_params.ale_ageout		= ale_ageout;
2990	ale_params.ale_entries		= data->ale_entries;
2991	ale_params.ale_ports		= data->slaves;
2992
2993	cpsw->ale = cpsw_ale_create(&ale_params);
2994	if (!cpsw->ale) {
2995		dev_err(priv->dev, "error initializing ale engine\n");
2996		ret = -ENODEV;
2997		goto clean_dma_ret;
2998	}
2999
3000	cpsw->cpts = cpts_create(cpsw->dev, cpts_regs, cpsw->dev->of_node);
3001	if (IS_ERR(cpsw->cpts)) {
3002		ret = PTR_ERR(cpsw->cpts);
3003		goto clean_ale_ret;
3004	}
3005
3006	ndev->irq = platform_get_irq(pdev, 1);
3007	if (ndev->irq < 0) {
3008		dev_err(priv->dev, "error getting irq resource\n");
3009		ret = ndev->irq;
3010		goto clean_ale_ret;
3011	}
3012
3013	of_id = of_match_device(cpsw_of_mtable, &pdev->dev);
3014	if (of_id) {
3015		pdev->id_entry = of_id->data;
3016		if (pdev->id_entry->driver_data)
3017			cpsw->quirk_irq = true;
3018	}
3019
3020	/* Grab RX and TX IRQs. Note that we also have RX_THRESHOLD and
3021	 * MISC IRQs which are always kept disabled with this driver so
3022	 * we will not request them.
3023	 *
3024	 * If anyone wants to implement support for those, make sure to
3025	 * first request and append them to irqs_table array.
3026	 */
 
 
 
 
 
 
3027
3028	/* RX IRQ */
3029	irq = platform_get_irq(pdev, 1);
3030	if (irq < 0) {
3031		ret = irq;
3032		goto clean_ale_ret;
3033	}
3034
3035	cpsw->irqs_table[0] = irq;
3036	ret = devm_request_irq(&pdev->dev, irq, cpsw_rx_interrupt,
3037			       0, dev_name(&pdev->dev), cpsw);
3038	if (ret < 0) {
3039		dev_err(priv->dev, "error attaching irq (%d)\n", ret);
3040		goto clean_ale_ret;
3041	}
3042
3043	/* TX IRQ */
3044	irq = platform_get_irq(pdev, 2);
3045	if (irq < 0) {
3046		ret = irq;
3047		goto clean_ale_ret;
3048	}
3049
3050	cpsw->irqs_table[1] = irq;
3051	ret = devm_request_irq(&pdev->dev, irq, cpsw_tx_interrupt,
3052			       0, dev_name(&pdev->dev), cpsw);
3053	if (ret < 0) {
3054		dev_err(priv->dev, "error attaching irq (%d)\n", ret);
3055		goto clean_ale_ret;
3056	}
3057
3058	ndev->features |= NETIF_F_HW_VLAN_CTAG_FILTER;
3059
3060	ndev->netdev_ops = &cpsw_netdev_ops;
3061	ndev->ethtool_ops = &cpsw_ethtool_ops;
3062	netif_napi_add(ndev, &cpsw->napi_rx, cpsw_rx_poll, CPSW_POLL_WEIGHT);
3063	netif_tx_napi_add(ndev, &cpsw->napi_tx, cpsw_tx_poll, CPSW_POLL_WEIGHT);
3064	cpsw_split_res(ndev);
3065
3066	/* register the network device */
3067	SET_NETDEV_DEV(ndev, &pdev->dev);
3068	ret = register_netdev(ndev);
3069	if (ret) {
3070		dev_err(priv->dev, "error registering net device\n");
3071		ret = -ENODEV;
3072		goto clean_ale_ret;
3073	}
3074
3075	cpsw_notice(priv, probe, "initialized device (regs %pa, irq %d)\n",
3076		    &ss_res->start, ndev->irq);
3077
3078	if (cpsw->data.dual_emac) {
3079		ret = cpsw_probe_dual_emac(priv);
3080		if (ret) {
3081			cpsw_err(priv, probe, "error probe slave 2 emac interface\n");
3082			goto clean_unregister_netdev_ret;
3083		}
3084	}
3085
3086	pm_runtime_put(&pdev->dev);
3087
3088	return 0;
3089
3090clean_unregister_netdev_ret:
3091	unregister_netdev(ndev);
3092clean_ale_ret:
3093	cpsw_ale_destroy(cpsw->ale);
3094clean_dma_ret:
3095	cpdma_ctlr_destroy(cpsw->dma);
3096clean_dt_ret:
3097	cpsw_remove_dt(pdev);
3098	pm_runtime_put_sync(&pdev->dev);
3099clean_runtime_disable_ret:
3100	pm_runtime_disable(&pdev->dev);
3101clean_ndev_ret:
3102	free_netdev(priv->ndev);
3103	return ret;
3104}
3105
3106static int cpsw_remove(struct platform_device *pdev)
3107{
3108	struct net_device *ndev = platform_get_drvdata(pdev);
3109	struct cpsw_common *cpsw = ndev_to_cpsw(ndev);
3110	int ret;
3111
3112	ret = pm_runtime_get_sync(&pdev->dev);
3113	if (ret < 0) {
3114		pm_runtime_put_noidle(&pdev->dev);
3115		return ret;
 
 
 
 
3116	}
3117
3118	if (cpsw->data.dual_emac)
3119		unregister_netdev(cpsw->slaves[1].ndev);
3120	unregister_netdev(ndev);
3121
3122	cpts_release(cpsw->cpts);
3123	cpsw_ale_destroy(cpsw->ale);
3124	cpdma_ctlr_destroy(cpsw->dma);
3125	cpsw_remove_dt(pdev);
3126	pm_runtime_put_sync(&pdev->dev);
3127	pm_runtime_disable(&pdev->dev);
3128	if (cpsw->data.dual_emac)
3129		free_netdev(cpsw->slaves[1].ndev);
3130	free_netdev(ndev);
3131	return 0;
3132}
3133
3134#ifdef CONFIG_PM_SLEEP
3135static int cpsw_suspend(struct device *dev)
3136{
3137	struct platform_device	*pdev = to_platform_device(dev);
3138	struct net_device	*ndev = platform_get_drvdata(pdev);
3139	struct cpsw_common	*cpsw = ndev_to_cpsw(ndev);
3140
3141	if (cpsw->data.dual_emac) {
3142		int i;
3143
3144		for (i = 0; i < cpsw->data.slaves; i++) {
 
3145			if (netif_running(cpsw->slaves[i].ndev))
3146				cpsw_ndo_stop(cpsw->slaves[i].ndev);
3147		}
3148	} else {
3149		if (netif_running(ndev))
3150			cpsw_ndo_stop(ndev);
3151	}
3152
3153	/* Select sleep pin state */
3154	pinctrl_pm_select_sleep_state(dev);
3155
3156	return 0;
3157}
3158
3159static int cpsw_resume(struct device *dev)
3160{
3161	struct platform_device	*pdev = to_platform_device(dev);
3162	struct net_device	*ndev = platform_get_drvdata(pdev);
3163	struct cpsw_common	*cpsw = ndev_to_cpsw(ndev);
3164
3165	/* Select default pin state */
3166	pinctrl_pm_select_default_state(dev);
3167
3168	/* shut up ASSERT_RTNL() warning in netif_set_real_num_tx/rx_queues */
3169	rtnl_lock();
3170	if (cpsw->data.dual_emac) {
3171		int i;
3172
3173		for (i = 0; i < cpsw->data.slaves; i++) {
 
3174			if (netif_running(cpsw->slaves[i].ndev))
3175				cpsw_ndo_open(cpsw->slaves[i].ndev);
3176		}
3177	} else {
3178		if (netif_running(ndev))
3179			cpsw_ndo_open(ndev);
3180	}
3181	rtnl_unlock();
3182
3183	return 0;
3184}
3185#endif
3186
3187static SIMPLE_DEV_PM_OPS(cpsw_pm_ops, cpsw_suspend, cpsw_resume);
3188
3189static struct platform_driver cpsw_driver = {
3190	.driver = {
3191		.name	 = "cpsw",
3192		.pm	 = &cpsw_pm_ops,
3193		.of_match_table = cpsw_of_mtable,
3194	},
3195	.probe = cpsw_probe,
3196	.remove = cpsw_remove,
3197};
3198
3199module_platform_driver(cpsw_driver);
3200
3201MODULE_LICENSE("GPL");
3202MODULE_AUTHOR("Cyril Chemparathy <cyril@ti.com>");
3203MODULE_AUTHOR("Mugunthan V N <mugunthanvnm@ti.com>");
3204MODULE_DESCRIPTION("TI CPSW Ethernet driver");