Loading...
1// SPDX-License-Identifier: GPL-2.0
2/* Copyright(c) 2013 - 2018 Intel Corporation. */
3
4/* ethtool support for i40e */
5
6#include "i40e_devids.h"
7#include "i40e_diag.h"
8#include "i40e_txrx_common.h"
9#include "i40e_virtchnl_pf.h"
10
11/* ethtool statistics helpers */
12
13/**
14 * struct i40e_stats - definition for an ethtool statistic
15 * @stat_string: statistic name to display in ethtool -S output
16 * @sizeof_stat: the sizeof() the stat, must be no greater than sizeof(u64)
17 * @stat_offset: offsetof() the stat from a base pointer
18 *
19 * This structure defines a statistic to be added to the ethtool stats buffer.
20 * It defines a statistic as offset from a common base pointer. Stats should
21 * be defined in constant arrays using the I40E_STAT macro, with every element
22 * of the array using the same _type for calculating the sizeof_stat and
23 * stat_offset.
24 *
25 * The @sizeof_stat is expected to be sizeof(u8), sizeof(u16), sizeof(u32) or
26 * sizeof(u64). Other sizes are not expected and will produce a WARN_ONCE from
27 * the i40e_add_ethtool_stat() helper function.
28 *
29 * The @stat_string is interpreted as a format string, allowing formatted
30 * values to be inserted while looping over multiple structures for a given
31 * statistics array. Thus, every statistic string in an array should have the
32 * same type and number of format specifiers, to be formatted by variadic
33 * arguments to the i40e_add_stat_string() helper function.
34 **/
35struct i40e_stats {
36 char stat_string[ETH_GSTRING_LEN];
37 int sizeof_stat;
38 int stat_offset;
39};
40
41/* Helper macro to define an i40e_stat structure with proper size and type.
42 * Use this when defining constant statistics arrays. Note that @_type expects
43 * only a type name and is used multiple times.
44 */
45#define I40E_STAT(_type, _name, _stat) { \
46 .stat_string = _name, \
47 .sizeof_stat = sizeof_field(_type, _stat), \
48 .stat_offset = offsetof(_type, _stat) \
49}
50
51/* Helper macro for defining some statistics directly copied from the netdev
52 * stats structure.
53 */
54#define I40E_NETDEV_STAT(_net_stat) \
55 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
56
57/* Helper macro for defining some statistics related to queues */
58#define I40E_QUEUE_STAT(_name, _stat) \
59 I40E_STAT(struct i40e_ring, _name, _stat)
60
61/* Stats associated with a Tx or Rx ring */
62static const struct i40e_stats i40e_gstrings_queue_stats[] = {
63 I40E_QUEUE_STAT("%s-%u.packets", stats.packets),
64 I40E_QUEUE_STAT("%s-%u.bytes", stats.bytes),
65};
66
67/**
68 * i40e_add_one_ethtool_stat - copy the stat into the supplied buffer
69 * @data: location to store the stat value
70 * @pointer: basis for where to copy from
71 * @stat: the stat definition
72 *
73 * Copies the stat data defined by the pointer and stat structure pair into
74 * the memory supplied as data. Used to implement i40e_add_ethtool_stats and
75 * i40e_add_queue_stats. If the pointer is null, data will be zero'd.
76 */
77static void
78i40e_add_one_ethtool_stat(u64 *data, void *pointer,
79 const struct i40e_stats *stat)
80{
81 char *p;
82
83 if (!pointer) {
84 /* ensure that the ethtool data buffer is zero'd for any stats
85 * which don't have a valid pointer.
86 */
87 *data = 0;
88 return;
89 }
90
91 p = (char *)pointer + stat->stat_offset;
92 switch (stat->sizeof_stat) {
93 case sizeof(u64):
94 *data = *((u64 *)p);
95 break;
96 case sizeof(u32):
97 *data = *((u32 *)p);
98 break;
99 case sizeof(u16):
100 *data = *((u16 *)p);
101 break;
102 case sizeof(u8):
103 *data = *((u8 *)p);
104 break;
105 default:
106 WARN_ONCE(1, "unexpected stat size for %s",
107 stat->stat_string);
108 *data = 0;
109 }
110}
111
112/**
113 * __i40e_add_ethtool_stats - copy stats into the ethtool supplied buffer
114 * @data: ethtool stats buffer
115 * @pointer: location to copy stats from
116 * @stats: array of stats to copy
117 * @size: the size of the stats definition
118 *
119 * Copy the stats defined by the stats array using the pointer as a base into
120 * the data buffer supplied by ethtool. Updates the data pointer to point to
121 * the next empty location for successive calls to __i40e_add_ethtool_stats.
122 * If pointer is null, set the data values to zero and update the pointer to
123 * skip these stats.
124 **/
125static void
126__i40e_add_ethtool_stats(u64 **data, void *pointer,
127 const struct i40e_stats stats[],
128 const unsigned int size)
129{
130 unsigned int i;
131
132 for (i = 0; i < size; i++)
133 i40e_add_one_ethtool_stat((*data)++, pointer, &stats[i]);
134}
135
136/**
137 * i40e_add_ethtool_stats - copy stats into ethtool supplied buffer
138 * @data: ethtool stats buffer
139 * @pointer: location where stats are stored
140 * @stats: static const array of stat definitions
141 *
142 * Macro to ease the use of __i40e_add_ethtool_stats by taking a static
143 * constant stats array and passing the ARRAY_SIZE(). This avoids typos by
144 * ensuring that we pass the size associated with the given stats array.
145 *
146 * The parameter @stats is evaluated twice, so parameters with side effects
147 * should be avoided.
148 **/
149#define i40e_add_ethtool_stats(data, pointer, stats) \
150 __i40e_add_ethtool_stats(data, pointer, stats, ARRAY_SIZE(stats))
151
152/**
153 * i40e_add_queue_stats - copy queue statistics into supplied buffer
154 * @data: ethtool stats buffer
155 * @ring: the ring to copy
156 *
157 * Queue statistics must be copied while protected by
158 * u64_stats_fetch_begin, so we can't directly use i40e_add_ethtool_stats.
159 * Assumes that queue stats are defined in i40e_gstrings_queue_stats. If the
160 * ring pointer is null, zero out the queue stat values and update the data
161 * pointer. Otherwise safely copy the stats from the ring into the supplied
162 * buffer and update the data pointer when finished.
163 *
164 * This function expects to be called while under rcu_read_lock().
165 **/
166static void
167i40e_add_queue_stats(u64 **data, struct i40e_ring *ring)
168{
169 const unsigned int size = ARRAY_SIZE(i40e_gstrings_queue_stats);
170 const struct i40e_stats *stats = i40e_gstrings_queue_stats;
171 unsigned int start;
172 unsigned int i;
173
174 /* To avoid invalid statistics values, ensure that we keep retrying
175 * the copy until we get a consistent value according to
176 * u64_stats_fetch_retry. But first, make sure our ring is
177 * non-null before attempting to access its syncp.
178 */
179 do {
180 start = !ring ? 0 : u64_stats_fetch_begin(&ring->syncp);
181 for (i = 0; i < size; i++) {
182 i40e_add_one_ethtool_stat(&(*data)[i], ring,
183 &stats[i]);
184 }
185 } while (ring && u64_stats_fetch_retry(&ring->syncp, start));
186
187 /* Once we successfully copy the stats in, update the data pointer */
188 *data += size;
189}
190
191/**
192 * __i40e_add_stat_strings - copy stat strings into ethtool buffer
193 * @p: ethtool supplied buffer
194 * @stats: stat definitions array
195 * @size: size of the stats array
196 *
197 * Format and copy the strings described by stats into the buffer pointed at
198 * by p.
199 **/
200static void __i40e_add_stat_strings(u8 **p, const struct i40e_stats stats[],
201 const unsigned int size, ...)
202{
203 unsigned int i;
204
205 for (i = 0; i < size; i++) {
206 va_list args;
207
208 va_start(args, size);
209 vsnprintf(*p, ETH_GSTRING_LEN, stats[i].stat_string, args);
210 *p += ETH_GSTRING_LEN;
211 va_end(args);
212 }
213}
214
215/**
216 * i40e_add_stat_strings - copy stat strings into ethtool buffer
217 * @p: ethtool supplied buffer
218 * @stats: stat definitions array
219 *
220 * Format and copy the strings described by the const static stats value into
221 * the buffer pointed at by p.
222 *
223 * The parameter @stats is evaluated twice, so parameters with side effects
224 * should be avoided. Additionally, stats must be an array such that
225 * ARRAY_SIZE can be called on it.
226 **/
227#define i40e_add_stat_strings(p, stats, ...) \
228 __i40e_add_stat_strings(p, stats, ARRAY_SIZE(stats), ## __VA_ARGS__)
229
230#define I40E_PF_STAT(_name, _stat) \
231 I40E_STAT(struct i40e_pf, _name, _stat)
232#define I40E_VSI_STAT(_name, _stat) \
233 I40E_STAT(struct i40e_vsi, _name, _stat)
234#define I40E_VEB_STAT(_name, _stat) \
235 I40E_STAT(struct i40e_veb, _name, _stat)
236#define I40E_VEB_TC_STAT(_name, _stat) \
237 I40E_STAT(struct i40e_cp_veb_tc_stats, _name, _stat)
238#define I40E_PFC_STAT(_name, _stat) \
239 I40E_STAT(struct i40e_pfc_stats, _name, _stat)
240
241static const struct i40e_stats i40e_gstrings_net_stats[] = {
242 I40E_NETDEV_STAT(rx_packets),
243 I40E_NETDEV_STAT(tx_packets),
244 I40E_NETDEV_STAT(rx_bytes),
245 I40E_NETDEV_STAT(tx_bytes),
246 I40E_NETDEV_STAT(rx_errors),
247 I40E_NETDEV_STAT(tx_errors),
248 I40E_NETDEV_STAT(rx_dropped),
249 I40E_NETDEV_STAT(rx_missed_errors),
250 I40E_NETDEV_STAT(tx_dropped),
251 I40E_NETDEV_STAT(collisions),
252 I40E_NETDEV_STAT(rx_length_errors),
253 I40E_NETDEV_STAT(rx_crc_errors),
254};
255
256static const struct i40e_stats i40e_gstrings_veb_stats[] = {
257 I40E_VEB_STAT("veb.rx_bytes", stats.rx_bytes),
258 I40E_VEB_STAT("veb.tx_bytes", stats.tx_bytes),
259 I40E_VEB_STAT("veb.rx_unicast", stats.rx_unicast),
260 I40E_VEB_STAT("veb.tx_unicast", stats.tx_unicast),
261 I40E_VEB_STAT("veb.rx_multicast", stats.rx_multicast),
262 I40E_VEB_STAT("veb.tx_multicast", stats.tx_multicast),
263 I40E_VEB_STAT("veb.rx_broadcast", stats.rx_broadcast),
264 I40E_VEB_STAT("veb.tx_broadcast", stats.tx_broadcast),
265 I40E_VEB_STAT("veb.rx_discards", stats.rx_discards),
266 I40E_VEB_STAT("veb.tx_discards", stats.tx_discards),
267 I40E_VEB_STAT("veb.tx_errors", stats.tx_errors),
268 I40E_VEB_STAT("veb.rx_unknown_protocol", stats.rx_unknown_protocol),
269};
270
271struct i40e_cp_veb_tc_stats {
272 u64 tc_rx_packets;
273 u64 tc_rx_bytes;
274 u64 tc_tx_packets;
275 u64 tc_tx_bytes;
276};
277
278static const struct i40e_stats i40e_gstrings_veb_tc_stats[] = {
279 I40E_VEB_TC_STAT("veb.tc_%u_tx_packets", tc_tx_packets),
280 I40E_VEB_TC_STAT("veb.tc_%u_tx_bytes", tc_tx_bytes),
281 I40E_VEB_TC_STAT("veb.tc_%u_rx_packets", tc_rx_packets),
282 I40E_VEB_TC_STAT("veb.tc_%u_rx_bytes", tc_rx_bytes),
283};
284
285static const struct i40e_stats i40e_gstrings_misc_stats[] = {
286 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
287 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
288 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
289 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
290 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
291 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
292 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
293 I40E_VSI_STAT("tx_linearize", tx_linearize),
294 I40E_VSI_STAT("tx_force_wb", tx_force_wb),
295 I40E_VSI_STAT("tx_busy", tx_busy),
296 I40E_VSI_STAT("tx_stopped", tx_stopped),
297 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
298 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
299 I40E_VSI_STAT("rx_cache_reuse", rx_page_reuse),
300 I40E_VSI_STAT("rx_cache_alloc", rx_page_alloc),
301 I40E_VSI_STAT("rx_cache_waive", rx_page_waive),
302 I40E_VSI_STAT("rx_cache_busy", rx_page_busy),
303 I40E_VSI_STAT("tx_restart", tx_restart),
304};
305
306/* These PF_STATs might look like duplicates of some NETDEV_STATs,
307 * but they are separate. This device supports Virtualization, and
308 * as such might have several netdevs supporting VMDq and FCoE going
309 * through a single port. The NETDEV_STATs are for individual netdevs
310 * seen at the top of the stack, and the PF_STATs are for the physical
311 * function at the bottom of the stack hosting those netdevs.
312 *
313 * The PF_STATs are appended to the netdev stats only when ethtool -S
314 * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
315 */
316static const struct i40e_stats i40e_gstrings_stats[] = {
317 I40E_PF_STAT("port.rx_bytes", stats.eth.rx_bytes),
318 I40E_PF_STAT("port.tx_bytes", stats.eth.tx_bytes),
319 I40E_PF_STAT("port.rx_unicast", stats.eth.rx_unicast),
320 I40E_PF_STAT("port.tx_unicast", stats.eth.tx_unicast),
321 I40E_PF_STAT("port.rx_multicast", stats.eth.rx_multicast),
322 I40E_PF_STAT("port.tx_multicast", stats.eth.tx_multicast),
323 I40E_PF_STAT("port.rx_broadcast", stats.eth.rx_broadcast),
324 I40E_PF_STAT("port.tx_broadcast", stats.eth.tx_broadcast),
325 I40E_PF_STAT("port.tx_errors", stats.eth.tx_errors),
326 I40E_PF_STAT("port.rx_discards", stats.eth.rx_discards),
327 I40E_PF_STAT("port.tx_dropped_link_down", stats.tx_dropped_link_down),
328 I40E_PF_STAT("port.rx_crc_errors", stats.crc_errors),
329 I40E_PF_STAT("port.illegal_bytes", stats.illegal_bytes),
330 I40E_PF_STAT("port.mac_local_faults", stats.mac_local_faults),
331 I40E_PF_STAT("port.mac_remote_faults", stats.mac_remote_faults),
332 I40E_PF_STAT("port.tx_timeout", tx_timeout_count),
333 I40E_PF_STAT("port.rx_csum_bad", hw_csum_rx_error),
334 I40E_PF_STAT("port.rx_length_errors", stats.rx_length_errors),
335 I40E_PF_STAT("port.link_xon_rx", stats.link_xon_rx),
336 I40E_PF_STAT("port.link_xoff_rx", stats.link_xoff_rx),
337 I40E_PF_STAT("port.link_xon_tx", stats.link_xon_tx),
338 I40E_PF_STAT("port.link_xoff_tx", stats.link_xoff_tx),
339 I40E_PF_STAT("port.rx_size_64", stats.rx_size_64),
340 I40E_PF_STAT("port.rx_size_127", stats.rx_size_127),
341 I40E_PF_STAT("port.rx_size_255", stats.rx_size_255),
342 I40E_PF_STAT("port.rx_size_511", stats.rx_size_511),
343 I40E_PF_STAT("port.rx_size_1023", stats.rx_size_1023),
344 I40E_PF_STAT("port.rx_size_1522", stats.rx_size_1522),
345 I40E_PF_STAT("port.rx_size_big", stats.rx_size_big),
346 I40E_PF_STAT("port.tx_size_64", stats.tx_size_64),
347 I40E_PF_STAT("port.tx_size_127", stats.tx_size_127),
348 I40E_PF_STAT("port.tx_size_255", stats.tx_size_255),
349 I40E_PF_STAT("port.tx_size_511", stats.tx_size_511),
350 I40E_PF_STAT("port.tx_size_1023", stats.tx_size_1023),
351 I40E_PF_STAT("port.tx_size_1522", stats.tx_size_1522),
352 I40E_PF_STAT("port.tx_size_big", stats.tx_size_big),
353 I40E_PF_STAT("port.rx_undersize", stats.rx_undersize),
354 I40E_PF_STAT("port.rx_fragments", stats.rx_fragments),
355 I40E_PF_STAT("port.rx_oversize", stats.rx_oversize),
356 I40E_PF_STAT("port.rx_jabber", stats.rx_jabber),
357 I40E_PF_STAT("port.VF_admin_queue_requests", vf_aq_requests),
358 I40E_PF_STAT("port.arq_overflows", arq_overflows),
359 I40E_PF_STAT("port.tx_hwtstamp_timeouts", tx_hwtstamp_timeouts),
360 I40E_PF_STAT("port.rx_hwtstamp_cleared", rx_hwtstamp_cleared),
361 I40E_PF_STAT("port.tx_hwtstamp_skipped", tx_hwtstamp_skipped),
362 I40E_PF_STAT("port.fdir_flush_cnt", fd_flush_cnt),
363 I40E_PF_STAT("port.fdir_atr_match", stats.fd_atr_match),
364 I40E_PF_STAT("port.fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
365 I40E_PF_STAT("port.fdir_atr_status", stats.fd_atr_status),
366 I40E_PF_STAT("port.fdir_sb_match", stats.fd_sb_match),
367 I40E_PF_STAT("port.fdir_sb_status", stats.fd_sb_status),
368
369 /* LPI stats */
370 I40E_PF_STAT("port.tx_lpi_status", stats.tx_lpi_status),
371 I40E_PF_STAT("port.rx_lpi_status", stats.rx_lpi_status),
372 I40E_PF_STAT("port.tx_lpi_count", stats.tx_lpi_count),
373 I40E_PF_STAT("port.rx_lpi_count", stats.rx_lpi_count),
374};
375
376struct i40e_pfc_stats {
377 u64 priority_xon_rx;
378 u64 priority_xoff_rx;
379 u64 priority_xon_tx;
380 u64 priority_xoff_tx;
381 u64 priority_xon_2_xoff;
382};
383
384static const struct i40e_stats i40e_gstrings_pfc_stats[] = {
385 I40E_PFC_STAT("port.tx_priority_%u_xon_tx", priority_xon_tx),
386 I40E_PFC_STAT("port.tx_priority_%u_xoff_tx", priority_xoff_tx),
387 I40E_PFC_STAT("port.rx_priority_%u_xon_rx", priority_xon_rx),
388 I40E_PFC_STAT("port.rx_priority_%u_xoff_rx", priority_xoff_rx),
389 I40E_PFC_STAT("port.rx_priority_%u_xon_2_xoff", priority_xon_2_xoff),
390};
391
392#define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
393
394#define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
395
396#define I40E_VSI_STATS_LEN (I40E_NETDEV_STATS_LEN + I40E_MISC_STATS_LEN)
397
398#define I40E_PFC_STATS_LEN (ARRAY_SIZE(i40e_gstrings_pfc_stats) * \
399 I40E_MAX_USER_PRIORITY)
400
401#define I40E_VEB_STATS_LEN (ARRAY_SIZE(i40e_gstrings_veb_stats) + \
402 (ARRAY_SIZE(i40e_gstrings_veb_tc_stats) * \
403 I40E_MAX_TRAFFIC_CLASS))
404
405#define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
406
407#define I40E_PF_STATS_LEN (I40E_GLOBAL_STATS_LEN + \
408 I40E_PFC_STATS_LEN + \
409 I40E_VEB_STATS_LEN + \
410 I40E_VSI_STATS_LEN)
411
412/* Length of stats for a single queue */
413#define I40E_QUEUE_STATS_LEN ARRAY_SIZE(i40e_gstrings_queue_stats)
414
415enum i40e_ethtool_test_id {
416 I40E_ETH_TEST_REG = 0,
417 I40E_ETH_TEST_EEPROM,
418 I40E_ETH_TEST_INTR,
419 I40E_ETH_TEST_LINK,
420};
421
422static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
423 "Register test (offline)",
424 "Eeprom test (offline)",
425 "Interrupt test (offline)",
426 "Link test (on/offline)"
427};
428
429#define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
430
431struct i40e_priv_flags {
432 char flag_string[ETH_GSTRING_LEN];
433 u8 bitno;
434 bool read_only;
435};
436
437#define I40E_PRIV_FLAG(_name, _bitno, _read_only) { \
438 .flag_string = _name, \
439 .bitno = _bitno, \
440 .read_only = _read_only, \
441}
442
443static const struct i40e_priv_flags i40e_gstrings_priv_flags[] = {
444 /* NOTE: MFP setting cannot be changed */
445 I40E_PRIV_FLAG("MFP", I40E_FLAG_MFP_ENA, 1),
446 I40E_PRIV_FLAG("total-port-shutdown",
447 I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, 1),
448 I40E_PRIV_FLAG("LinkPolling", I40E_FLAG_LINK_POLLING_ENA, 0),
449 I40E_PRIV_FLAG("flow-director-atr", I40E_FLAG_FD_ATR_ENA, 0),
450 I40E_PRIV_FLAG("veb-stats", I40E_FLAG_VEB_STATS_ENA, 0),
451 I40E_PRIV_FLAG("hw-atr-eviction", I40E_FLAG_HW_ATR_EVICT_ENA, 0),
452 I40E_PRIV_FLAG("link-down-on-close",
453 I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, 0),
454 I40E_PRIV_FLAG("legacy-rx", I40E_FLAG_LEGACY_RX_ENA, 0),
455 I40E_PRIV_FLAG("disable-source-pruning",
456 I40E_FLAG_SOURCE_PRUNING_DIS, 0),
457 I40E_PRIV_FLAG("disable-fw-lldp", I40E_FLAG_FW_LLDP_DIS, 0),
458 I40E_PRIV_FLAG("rs-fec", I40E_FLAG_RS_FEC, 0),
459 I40E_PRIV_FLAG("base-r-fec", I40E_FLAG_BASE_R_FEC, 0),
460 I40E_PRIV_FLAG("vf-vlan-pruning",
461 I40E_FLAG_VF_VLAN_PRUNING_ENA, 0),
462};
463
464#define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gstrings_priv_flags)
465
466/* Private flags with a global effect, restricted to PF 0 */
467static const struct i40e_priv_flags i40e_gl_gstrings_priv_flags[] = {
468 I40E_PRIV_FLAG("vf-true-promisc-support",
469 I40E_FLAG_TRUE_PROMISC_ENA, 0),
470};
471
472#define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_gstrings_priv_flags)
473
474/**
475 * i40e_partition_setting_complaint - generic complaint for MFP restriction
476 * @pf: the PF struct
477 **/
478static void i40e_partition_setting_complaint(struct i40e_pf *pf)
479{
480 dev_info(&pf->pdev->dev,
481 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
482}
483
484/**
485 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
486 * @pf: PF struct with phy_types
487 * @ks: ethtool link ksettings struct to fill out
488 *
489 **/
490static void i40e_phy_type_to_ethtool(struct i40e_pf *pf,
491 struct ethtool_link_ksettings *ks)
492{
493 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
494 u64 phy_types = pf->hw.phy.phy_types;
495
496 ethtool_link_ksettings_zero_link_mode(ks, supported);
497 ethtool_link_ksettings_zero_link_mode(ks, advertising);
498
499 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
500 ethtool_link_ksettings_add_link_mode(ks, supported,
501 1000baseT_Full);
502 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
503 ethtool_link_ksettings_add_link_mode(ks, advertising,
504 1000baseT_Full);
505 if (test_bit(I40E_HW_CAP_100M_SGMII, pf->hw.caps)) {
506 ethtool_link_ksettings_add_link_mode(ks, supported,
507 100baseT_Full);
508 ethtool_link_ksettings_add_link_mode(ks, advertising,
509 100baseT_Full);
510 }
511 }
512 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
513 phy_types & I40E_CAP_PHY_TYPE_XFI ||
514 phy_types & I40E_CAP_PHY_TYPE_SFI ||
515 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
516 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC) {
517 ethtool_link_ksettings_add_link_mode(ks, supported,
518 10000baseT_Full);
519 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
520 ethtool_link_ksettings_add_link_mode(ks, advertising,
521 10000baseT_Full);
522 }
523 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_T) {
524 ethtool_link_ksettings_add_link_mode(ks, supported,
525 10000baseT_Full);
526 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
527 ethtool_link_ksettings_add_link_mode(ks, advertising,
528 10000baseT_Full);
529 }
530 if (phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T) {
531 ethtool_link_ksettings_add_link_mode(ks, supported,
532 2500baseT_Full);
533 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
534 ethtool_link_ksettings_add_link_mode(ks, advertising,
535 2500baseT_Full);
536 }
537 if (phy_types & I40E_CAP_PHY_TYPE_5GBASE_T) {
538 ethtool_link_ksettings_add_link_mode(ks, supported,
539 5000baseT_Full);
540 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
541 ethtool_link_ksettings_add_link_mode(ks, advertising,
542 5000baseT_Full);
543 }
544 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
545 phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
546 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
547 ethtool_link_ksettings_add_link_mode(ks, supported,
548 40000baseCR4_Full);
549 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
550 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
551 ethtool_link_ksettings_add_link_mode(ks, supported,
552 40000baseCR4_Full);
553 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
554 ethtool_link_ksettings_add_link_mode(ks, advertising,
555 40000baseCR4_Full);
556 }
557 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
558 ethtool_link_ksettings_add_link_mode(ks, supported,
559 100baseT_Full);
560 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
561 ethtool_link_ksettings_add_link_mode(ks, advertising,
562 100baseT_Full);
563 }
564 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T) {
565 ethtool_link_ksettings_add_link_mode(ks, supported,
566 1000baseT_Full);
567 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
568 ethtool_link_ksettings_add_link_mode(ks, advertising,
569 1000baseT_Full);
570 }
571 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4) {
572 ethtool_link_ksettings_add_link_mode(ks, supported,
573 40000baseSR4_Full);
574 ethtool_link_ksettings_add_link_mode(ks, advertising,
575 40000baseSR4_Full);
576 }
577 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4) {
578 ethtool_link_ksettings_add_link_mode(ks, supported,
579 40000baseLR4_Full);
580 ethtool_link_ksettings_add_link_mode(ks, advertising,
581 40000baseLR4_Full);
582 }
583 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
584 ethtool_link_ksettings_add_link_mode(ks, supported,
585 40000baseKR4_Full);
586 ethtool_link_ksettings_add_link_mode(ks, advertising,
587 40000baseKR4_Full);
588 }
589 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
590 ethtool_link_ksettings_add_link_mode(ks, supported,
591 20000baseKR2_Full);
592 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
593 ethtool_link_ksettings_add_link_mode(ks, advertising,
594 20000baseKR2_Full);
595 }
596 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
597 ethtool_link_ksettings_add_link_mode(ks, supported,
598 10000baseKX4_Full);
599 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
600 ethtool_link_ksettings_add_link_mode(ks, advertising,
601 10000baseKX4_Full);
602 }
603 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR &&
604 !test_bit(I40E_HW_CAP_CRT_RETIMER, pf->hw.caps)) {
605 ethtool_link_ksettings_add_link_mode(ks, supported,
606 10000baseKR_Full);
607 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
608 ethtool_link_ksettings_add_link_mode(ks, advertising,
609 10000baseKR_Full);
610 }
611 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX &&
612 !test_bit(I40E_HW_CAP_CRT_RETIMER, pf->hw.caps)) {
613 ethtool_link_ksettings_add_link_mode(ks, supported,
614 1000baseKX_Full);
615 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
616 ethtool_link_ksettings_add_link_mode(ks, advertising,
617 1000baseKX_Full);
618 }
619 /* need to add 25G PHY types */
620 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR) {
621 ethtool_link_ksettings_add_link_mode(ks, supported,
622 25000baseKR_Full);
623 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
624 ethtool_link_ksettings_add_link_mode(ks, advertising,
625 25000baseKR_Full);
626 }
627 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR) {
628 ethtool_link_ksettings_add_link_mode(ks, supported,
629 25000baseCR_Full);
630 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
631 ethtool_link_ksettings_add_link_mode(ks, advertising,
632 25000baseCR_Full);
633 }
634 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
635 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
636 ethtool_link_ksettings_add_link_mode(ks, supported,
637 25000baseSR_Full);
638 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
639 ethtool_link_ksettings_add_link_mode(ks, advertising,
640 25000baseSR_Full);
641 }
642 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
643 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
644 ethtool_link_ksettings_add_link_mode(ks, supported,
645 25000baseCR_Full);
646 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB)
647 ethtool_link_ksettings_add_link_mode(ks, advertising,
648 25000baseCR_Full);
649 }
650 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
651 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
652 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
653 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
654 phy_types & I40E_CAP_PHY_TYPE_25GBASE_AOC ||
655 phy_types & I40E_CAP_PHY_TYPE_25GBASE_ACC) {
656 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
657 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
658 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
659 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_25GB) {
660 ethtool_link_ksettings_add_link_mode(ks, advertising,
661 FEC_NONE);
662 ethtool_link_ksettings_add_link_mode(ks, advertising,
663 FEC_RS);
664 ethtool_link_ksettings_add_link_mode(ks, advertising,
665 FEC_BASER);
666 }
667 }
668 /* need to add new 10G PHY types */
669 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
670 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU) {
671 ethtool_link_ksettings_add_link_mode(ks, supported,
672 10000baseCR_Full);
673 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
674 ethtool_link_ksettings_add_link_mode(ks, advertising,
675 10000baseCR_Full);
676 }
677 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR) {
678 ethtool_link_ksettings_add_link_mode(ks, supported,
679 10000baseSR_Full);
680 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
681 ethtool_link_ksettings_add_link_mode(ks, advertising,
682 10000baseSR_Full);
683 }
684 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
685 ethtool_link_ksettings_add_link_mode(ks, supported,
686 10000baseLR_Full);
687 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
688 ethtool_link_ksettings_add_link_mode(ks, advertising,
689 10000baseLR_Full);
690 }
691 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
692 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
693 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
694 ethtool_link_ksettings_add_link_mode(ks, supported,
695 1000baseX_Full);
696 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
697 ethtool_link_ksettings_add_link_mode(ks, advertising,
698 1000baseX_Full);
699 }
700 /* Autoneg PHY types */
701 if (phy_types & I40E_CAP_PHY_TYPE_SGMII ||
702 phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4 ||
703 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
704 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4 ||
705 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
706 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR ||
707 phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
708 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
709 phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2 ||
710 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
711 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR ||
712 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4 ||
713 phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR ||
714 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
715 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
716 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
717 phy_types & I40E_CAP_PHY_TYPE_5GBASE_T ||
718 phy_types & I40E_CAP_PHY_TYPE_2_5GBASE_T ||
719 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL ||
720 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
721 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
722 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
723 phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX ||
724 phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
725 ethtool_link_ksettings_add_link_mode(ks, supported,
726 Autoneg);
727 ethtool_link_ksettings_add_link_mode(ks, advertising,
728 Autoneg);
729 }
730}
731
732/**
733 * i40e_get_settings_link_up_fec - Get the FEC mode encoding from mask
734 * @req_fec_info: mask request FEC info
735 * @ks: ethtool ksettings to fill in
736 **/
737static void i40e_get_settings_link_up_fec(u8 req_fec_info,
738 struct ethtool_link_ksettings *ks)
739{
740 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_NONE);
741 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_RS);
742 ethtool_link_ksettings_add_link_mode(ks, supported, FEC_BASER);
743
744 if ((I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) &&
745 (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info)) {
746 ethtool_link_ksettings_add_link_mode(ks, advertising,
747 FEC_NONE);
748 ethtool_link_ksettings_add_link_mode(ks, advertising,
749 FEC_BASER);
750 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
751 } else if (I40E_AQ_SET_FEC_REQUEST_RS & req_fec_info) {
752 ethtool_link_ksettings_add_link_mode(ks, advertising, FEC_RS);
753 } else if (I40E_AQ_SET_FEC_REQUEST_KR & req_fec_info) {
754 ethtool_link_ksettings_add_link_mode(ks, advertising,
755 FEC_BASER);
756 } else {
757 ethtool_link_ksettings_add_link_mode(ks, advertising,
758 FEC_NONE);
759 }
760}
761
762/**
763 * i40e_get_settings_link_up - Get the Link settings for when link is up
764 * @hw: hw structure
765 * @ks: ethtool ksettings to fill in
766 * @netdev: network interface device structure
767 * @pf: pointer to physical function struct
768 **/
769static void i40e_get_settings_link_up(struct i40e_hw *hw,
770 struct ethtool_link_ksettings *ks,
771 struct net_device *netdev,
772 struct i40e_pf *pf)
773{
774 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
775 struct ethtool_link_ksettings cap_ksettings;
776 u32 link_speed = hw_link_info->link_speed;
777
778 /* Initialize supported and advertised settings based on phy settings */
779 switch (hw_link_info->phy_type) {
780 case I40E_PHY_TYPE_40GBASE_CR4:
781 case I40E_PHY_TYPE_40GBASE_CR4_CU:
782 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
783 ethtool_link_ksettings_add_link_mode(ks, supported,
784 40000baseCR4_Full);
785 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
786 ethtool_link_ksettings_add_link_mode(ks, advertising,
787 40000baseCR4_Full);
788 break;
789 case I40E_PHY_TYPE_XLAUI:
790 case I40E_PHY_TYPE_XLPPI:
791 case I40E_PHY_TYPE_40GBASE_AOC:
792 ethtool_link_ksettings_add_link_mode(ks, supported,
793 40000baseCR4_Full);
794 ethtool_link_ksettings_add_link_mode(ks, advertising,
795 40000baseCR4_Full);
796 break;
797 case I40E_PHY_TYPE_40GBASE_SR4:
798 ethtool_link_ksettings_add_link_mode(ks, supported,
799 40000baseSR4_Full);
800 ethtool_link_ksettings_add_link_mode(ks, advertising,
801 40000baseSR4_Full);
802 break;
803 case I40E_PHY_TYPE_40GBASE_LR4:
804 ethtool_link_ksettings_add_link_mode(ks, supported,
805 40000baseLR4_Full);
806 ethtool_link_ksettings_add_link_mode(ks, advertising,
807 40000baseLR4_Full);
808 break;
809 case I40E_PHY_TYPE_25GBASE_SR:
810 case I40E_PHY_TYPE_25GBASE_LR:
811 case I40E_PHY_TYPE_10GBASE_SR:
812 case I40E_PHY_TYPE_10GBASE_LR:
813 case I40E_PHY_TYPE_1000BASE_SX:
814 case I40E_PHY_TYPE_1000BASE_LX:
815 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
816 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
817 ethtool_link_ksettings_add_link_mode(ks, supported,
818 25000baseSR_Full);
819 ethtool_link_ksettings_add_link_mode(ks, advertising,
820 25000baseSR_Full);
821 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
822 ethtool_link_ksettings_add_link_mode(ks, supported,
823 10000baseSR_Full);
824 ethtool_link_ksettings_add_link_mode(ks, advertising,
825 10000baseSR_Full);
826 ethtool_link_ksettings_add_link_mode(ks, supported,
827 10000baseLR_Full);
828 ethtool_link_ksettings_add_link_mode(ks, advertising,
829 10000baseLR_Full);
830 ethtool_link_ksettings_add_link_mode(ks, supported,
831 1000baseX_Full);
832 ethtool_link_ksettings_add_link_mode(ks, advertising,
833 1000baseX_Full);
834 ethtool_link_ksettings_add_link_mode(ks, supported,
835 10000baseT_Full);
836 if (hw_link_info->module_type[2] &
837 I40E_MODULE_TYPE_1000BASE_SX ||
838 hw_link_info->module_type[2] &
839 I40E_MODULE_TYPE_1000BASE_LX) {
840 ethtool_link_ksettings_add_link_mode(ks, supported,
841 1000baseT_Full);
842 if (hw_link_info->requested_speeds &
843 I40E_LINK_SPEED_1GB)
844 ethtool_link_ksettings_add_link_mode(
845 ks, advertising, 1000baseT_Full);
846 }
847 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
848 ethtool_link_ksettings_add_link_mode(ks, advertising,
849 10000baseT_Full);
850 break;
851 case I40E_PHY_TYPE_10GBASE_T:
852 case I40E_PHY_TYPE_5GBASE_T_LINK_STATUS:
853 case I40E_PHY_TYPE_2_5GBASE_T_LINK_STATUS:
854 case I40E_PHY_TYPE_1000BASE_T:
855 case I40E_PHY_TYPE_100BASE_TX:
856 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
857 ethtool_link_ksettings_add_link_mode(ks, supported,
858 10000baseT_Full);
859 ethtool_link_ksettings_add_link_mode(ks, supported,
860 5000baseT_Full);
861 ethtool_link_ksettings_add_link_mode(ks, supported,
862 2500baseT_Full);
863 ethtool_link_ksettings_add_link_mode(ks, supported,
864 1000baseT_Full);
865 ethtool_link_ksettings_add_link_mode(ks, supported,
866 100baseT_Full);
867 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
868 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
869 ethtool_link_ksettings_add_link_mode(ks, advertising,
870 10000baseT_Full);
871 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_5GB)
872 ethtool_link_ksettings_add_link_mode(ks, advertising,
873 5000baseT_Full);
874 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_2_5GB)
875 ethtool_link_ksettings_add_link_mode(ks, advertising,
876 2500baseT_Full);
877 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
878 ethtool_link_ksettings_add_link_mode(ks, advertising,
879 1000baseT_Full);
880 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
881 ethtool_link_ksettings_add_link_mode(ks, advertising,
882 100baseT_Full);
883 break;
884 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
885 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
886 ethtool_link_ksettings_add_link_mode(ks, supported,
887 1000baseT_Full);
888 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
889 ethtool_link_ksettings_add_link_mode(ks, advertising,
890 1000baseT_Full);
891 break;
892 case I40E_PHY_TYPE_10GBASE_CR1_CU:
893 case I40E_PHY_TYPE_10GBASE_CR1:
894 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
895 ethtool_link_ksettings_add_link_mode(ks, supported,
896 10000baseT_Full);
897 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
898 ethtool_link_ksettings_add_link_mode(ks, advertising,
899 10000baseT_Full);
900 break;
901 case I40E_PHY_TYPE_XAUI:
902 case I40E_PHY_TYPE_XFI:
903 case I40E_PHY_TYPE_SFI:
904 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
905 case I40E_PHY_TYPE_10GBASE_AOC:
906 ethtool_link_ksettings_add_link_mode(ks, supported,
907 10000baseT_Full);
908 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
909 ethtool_link_ksettings_add_link_mode(ks, advertising,
910 10000baseT_Full);
911 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
912 break;
913 case I40E_PHY_TYPE_SGMII:
914 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
915 ethtool_link_ksettings_add_link_mode(ks, supported,
916 1000baseT_Full);
917 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
918 ethtool_link_ksettings_add_link_mode(ks, advertising,
919 1000baseT_Full);
920 if (test_bit(I40E_HW_CAP_100M_SGMII, pf->hw.caps)) {
921 ethtool_link_ksettings_add_link_mode(ks, supported,
922 100baseT_Full);
923 if (hw_link_info->requested_speeds &
924 I40E_LINK_SPEED_100MB)
925 ethtool_link_ksettings_add_link_mode(
926 ks, advertising, 100baseT_Full);
927 }
928 break;
929 case I40E_PHY_TYPE_40GBASE_KR4:
930 case I40E_PHY_TYPE_25GBASE_KR:
931 case I40E_PHY_TYPE_20GBASE_KR2:
932 case I40E_PHY_TYPE_10GBASE_KR:
933 case I40E_PHY_TYPE_10GBASE_KX4:
934 case I40E_PHY_TYPE_1000BASE_KX:
935 ethtool_link_ksettings_add_link_mode(ks, supported,
936 40000baseKR4_Full);
937 ethtool_link_ksettings_add_link_mode(ks, supported,
938 25000baseKR_Full);
939 ethtool_link_ksettings_add_link_mode(ks, supported,
940 20000baseKR2_Full);
941 ethtool_link_ksettings_add_link_mode(ks, supported,
942 10000baseKR_Full);
943 ethtool_link_ksettings_add_link_mode(ks, supported,
944 10000baseKX4_Full);
945 ethtool_link_ksettings_add_link_mode(ks, supported,
946 1000baseKX_Full);
947 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
948 ethtool_link_ksettings_add_link_mode(ks, advertising,
949 40000baseKR4_Full);
950 ethtool_link_ksettings_add_link_mode(ks, advertising,
951 25000baseKR_Full);
952 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
953 ethtool_link_ksettings_add_link_mode(ks, advertising,
954 20000baseKR2_Full);
955 ethtool_link_ksettings_add_link_mode(ks, advertising,
956 10000baseKR_Full);
957 ethtool_link_ksettings_add_link_mode(ks, advertising,
958 10000baseKX4_Full);
959 ethtool_link_ksettings_add_link_mode(ks, advertising,
960 1000baseKX_Full);
961 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
962 break;
963 case I40E_PHY_TYPE_25GBASE_CR:
964 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
965 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
966 ethtool_link_ksettings_add_link_mode(ks, supported,
967 25000baseCR_Full);
968 ethtool_link_ksettings_add_link_mode(ks, advertising,
969 25000baseCR_Full);
970 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
971
972 break;
973 case I40E_PHY_TYPE_25GBASE_AOC:
974 case I40E_PHY_TYPE_25GBASE_ACC:
975 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
976 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
977 ethtool_link_ksettings_add_link_mode(ks, supported,
978 25000baseCR_Full);
979 ethtool_link_ksettings_add_link_mode(ks, advertising,
980 25000baseCR_Full);
981 i40e_get_settings_link_up_fec(hw_link_info->req_fec_info, ks);
982
983 ethtool_link_ksettings_add_link_mode(ks, supported,
984 10000baseCR_Full);
985 ethtool_link_ksettings_add_link_mode(ks, advertising,
986 10000baseCR_Full);
987 break;
988 default:
989 /* if we got here and link is up something bad is afoot */
990 netdev_info(netdev,
991 "WARNING: Link is up but PHY type 0x%x is not recognized, or incorrect cable is in use\n",
992 hw_link_info->phy_type);
993 }
994
995 /* Now that we've worked out everything that could be supported by the
996 * current PHY type, get what is supported by the NVM and intersect
997 * them to get what is truly supported
998 */
999 memset(&cap_ksettings, 0, sizeof(struct ethtool_link_ksettings));
1000 i40e_phy_type_to_ethtool(pf, &cap_ksettings);
1001 ethtool_intersect_link_masks(ks, &cap_ksettings);
1002
1003 /* Set speed and duplex */
1004 switch (link_speed) {
1005 case I40E_LINK_SPEED_40GB:
1006 ks->base.speed = SPEED_40000;
1007 break;
1008 case I40E_LINK_SPEED_25GB:
1009 ks->base.speed = SPEED_25000;
1010 break;
1011 case I40E_LINK_SPEED_20GB:
1012 ks->base.speed = SPEED_20000;
1013 break;
1014 case I40E_LINK_SPEED_10GB:
1015 ks->base.speed = SPEED_10000;
1016 break;
1017 case I40E_LINK_SPEED_5GB:
1018 ks->base.speed = SPEED_5000;
1019 break;
1020 case I40E_LINK_SPEED_2_5GB:
1021 ks->base.speed = SPEED_2500;
1022 break;
1023 case I40E_LINK_SPEED_1GB:
1024 ks->base.speed = SPEED_1000;
1025 break;
1026 case I40E_LINK_SPEED_100MB:
1027 ks->base.speed = SPEED_100;
1028 break;
1029 default:
1030 ks->base.speed = SPEED_UNKNOWN;
1031 break;
1032 }
1033 ks->base.duplex = DUPLEX_FULL;
1034}
1035
1036/**
1037 * i40e_get_settings_link_down - Get the Link settings for when link is down
1038 * @hw: hw structure
1039 * @ks: ethtool ksettings to fill in
1040 * @pf: pointer to physical function struct
1041 *
1042 * Reports link settings that can be determined when link is down
1043 **/
1044static void i40e_get_settings_link_down(struct i40e_hw *hw,
1045 struct ethtool_link_ksettings *ks,
1046 struct i40e_pf *pf)
1047{
1048 /* link is down and the driver needs to fall back on
1049 * supported phy types to figure out what info to display
1050 */
1051 i40e_phy_type_to_ethtool(pf, ks);
1052
1053 /* With no link speed and duplex are unknown */
1054 ks->base.speed = SPEED_UNKNOWN;
1055 ks->base.duplex = DUPLEX_UNKNOWN;
1056}
1057
1058/**
1059 * i40e_get_link_ksettings - Get Link Speed and Duplex settings
1060 * @netdev: network interface device structure
1061 * @ks: ethtool ksettings
1062 *
1063 * Reports speed/duplex settings based on media_type
1064 **/
1065static int i40e_get_link_ksettings(struct net_device *netdev,
1066 struct ethtool_link_ksettings *ks)
1067{
1068 struct i40e_netdev_priv *np = netdev_priv(netdev);
1069 struct i40e_pf *pf = np->vsi->back;
1070 struct i40e_hw *hw = &pf->hw;
1071 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1072 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1073
1074 ethtool_link_ksettings_zero_link_mode(ks, supported);
1075 ethtool_link_ksettings_zero_link_mode(ks, advertising);
1076
1077 if (link_up)
1078 i40e_get_settings_link_up(hw, ks, netdev, pf);
1079 else
1080 i40e_get_settings_link_down(hw, ks, pf);
1081
1082 /* Now set the settings that don't rely on link being up/down */
1083 /* Set autoneg settings */
1084 ks->base.autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1085 AUTONEG_ENABLE : AUTONEG_DISABLE);
1086
1087 /* Set media type settings */
1088 switch (hw->phy.media_type) {
1089 case I40E_MEDIA_TYPE_BACKPLANE:
1090 ethtool_link_ksettings_add_link_mode(ks, supported, Autoneg);
1091 ethtool_link_ksettings_add_link_mode(ks, supported, Backplane);
1092 ethtool_link_ksettings_add_link_mode(ks, advertising, Autoneg);
1093 ethtool_link_ksettings_add_link_mode(ks, advertising,
1094 Backplane);
1095 ks->base.port = PORT_NONE;
1096 break;
1097 case I40E_MEDIA_TYPE_BASET:
1098 ethtool_link_ksettings_add_link_mode(ks, supported, TP);
1099 ethtool_link_ksettings_add_link_mode(ks, advertising, TP);
1100 ks->base.port = PORT_TP;
1101 break;
1102 case I40E_MEDIA_TYPE_DA:
1103 case I40E_MEDIA_TYPE_CX4:
1104 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1105 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1106 ks->base.port = PORT_DA;
1107 break;
1108 case I40E_MEDIA_TYPE_FIBER:
1109 ethtool_link_ksettings_add_link_mode(ks, supported, FIBRE);
1110 ethtool_link_ksettings_add_link_mode(ks, advertising, FIBRE);
1111 ks->base.port = PORT_FIBRE;
1112 break;
1113 case I40E_MEDIA_TYPE_UNKNOWN:
1114 default:
1115 ks->base.port = PORT_OTHER;
1116 break;
1117 }
1118
1119 /* Set flow control settings */
1120 ethtool_link_ksettings_add_link_mode(ks, supported, Pause);
1121 ethtool_link_ksettings_add_link_mode(ks, supported, Asym_Pause);
1122
1123 switch (hw->fc.requested_mode) {
1124 case I40E_FC_FULL:
1125 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1126 break;
1127 case I40E_FC_TX_PAUSE:
1128 ethtool_link_ksettings_add_link_mode(ks, advertising,
1129 Asym_Pause);
1130 break;
1131 case I40E_FC_RX_PAUSE:
1132 ethtool_link_ksettings_add_link_mode(ks, advertising, Pause);
1133 ethtool_link_ksettings_add_link_mode(ks, advertising,
1134 Asym_Pause);
1135 break;
1136 default:
1137 ethtool_link_ksettings_del_link_mode(ks, advertising, Pause);
1138 ethtool_link_ksettings_del_link_mode(ks, advertising,
1139 Asym_Pause);
1140 break;
1141 }
1142
1143 return 0;
1144}
1145
1146#define I40E_LBIT_SIZE 8
1147/**
1148 * i40e_speed_to_link_speed - Translate decimal speed to i40e_aq_link_speed
1149 * @speed: speed in decimal
1150 * @ks: ethtool ksettings
1151 *
1152 * Return i40e_aq_link_speed based on speed
1153 **/
1154static enum i40e_aq_link_speed
1155i40e_speed_to_link_speed(__u32 speed, const struct ethtool_link_ksettings *ks)
1156{
1157 enum i40e_aq_link_speed link_speed = I40E_LINK_SPEED_UNKNOWN;
1158 bool speed_changed = false;
1159 int i, j;
1160
1161 static const struct {
1162 __u32 speed;
1163 enum i40e_aq_link_speed link_speed;
1164 __u8 bit[I40E_LBIT_SIZE];
1165 } i40e_speed_lut[] = {
1166#define I40E_LBIT(mode) ETHTOOL_LINK_MODE_ ## mode ##_Full_BIT
1167 {SPEED_100, I40E_LINK_SPEED_100MB, {I40E_LBIT(100baseT)} },
1168 {SPEED_1000, I40E_LINK_SPEED_1GB,
1169 {I40E_LBIT(1000baseT), I40E_LBIT(1000baseX),
1170 I40E_LBIT(1000baseKX)} },
1171 {SPEED_10000, I40E_LINK_SPEED_10GB,
1172 {I40E_LBIT(10000baseT), I40E_LBIT(10000baseKR),
1173 I40E_LBIT(10000baseLR), I40E_LBIT(10000baseCR),
1174 I40E_LBIT(10000baseSR), I40E_LBIT(10000baseKX4)} },
1175
1176 {SPEED_25000, I40E_LINK_SPEED_25GB,
1177 {I40E_LBIT(25000baseCR), I40E_LBIT(25000baseKR),
1178 I40E_LBIT(25000baseSR)} },
1179 {SPEED_40000, I40E_LINK_SPEED_40GB,
1180 {I40E_LBIT(40000baseKR4), I40E_LBIT(40000baseCR4),
1181 I40E_LBIT(40000baseSR4), I40E_LBIT(40000baseLR4)} },
1182 {SPEED_20000, I40E_LINK_SPEED_20GB,
1183 {I40E_LBIT(20000baseKR2)} },
1184 {SPEED_2500, I40E_LINK_SPEED_2_5GB, {I40E_LBIT(2500baseT)} },
1185 {SPEED_5000, I40E_LINK_SPEED_5GB, {I40E_LBIT(2500baseT)} }
1186#undef I40E_LBIT
1187};
1188
1189 for (i = 0; i < ARRAY_SIZE(i40e_speed_lut); i++) {
1190 if (i40e_speed_lut[i].speed == speed) {
1191 for (j = 0; j < I40E_LBIT_SIZE; j++) {
1192 if (test_bit(i40e_speed_lut[i].bit[j],
1193 ks->link_modes.supported)) {
1194 speed_changed = true;
1195 break;
1196 }
1197 if (!i40e_speed_lut[i].bit[j])
1198 break;
1199 }
1200 if (speed_changed) {
1201 link_speed = i40e_speed_lut[i].link_speed;
1202 break;
1203 }
1204 }
1205 }
1206 return link_speed;
1207}
1208
1209#undef I40E_LBIT_SIZE
1210
1211/**
1212 * i40e_set_link_ksettings - Set Speed and Duplex
1213 * @netdev: network interface device structure
1214 * @ks: ethtool ksettings
1215 *
1216 * Set speed/duplex per media_types advertised/forced
1217 **/
1218static int i40e_set_link_ksettings(struct net_device *netdev,
1219 const struct ethtool_link_ksettings *ks)
1220{
1221 struct i40e_netdev_priv *np = netdev_priv(netdev);
1222 struct i40e_aq_get_phy_abilities_resp abilities;
1223 struct ethtool_link_ksettings safe_ks;
1224 struct ethtool_link_ksettings copy_ks;
1225 struct i40e_aq_set_phy_config config;
1226 struct i40e_pf *pf = np->vsi->back;
1227 enum i40e_aq_link_speed link_speed;
1228 struct i40e_vsi *vsi = np->vsi;
1229 struct i40e_hw *hw = &pf->hw;
1230 bool autoneg_changed = false;
1231 int timeout = 50;
1232 int status = 0;
1233 int err = 0;
1234 __u32 speed;
1235 u8 autoneg;
1236
1237 /* Changing port settings is not supported if this isn't the
1238 * port's controlling PF
1239 */
1240 if (hw->partition_id != 1) {
1241 i40e_partition_setting_complaint(pf);
1242 return -EOPNOTSUPP;
1243 }
1244 if (vsi->type != I40E_VSI_MAIN)
1245 return -EOPNOTSUPP;
1246 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
1247 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
1248 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
1249 hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
1250 hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
1251 return -EOPNOTSUPP;
1252 if (hw->device_id == I40E_DEV_ID_KX_B ||
1253 hw->device_id == I40E_DEV_ID_KX_C ||
1254 hw->device_id == I40E_DEV_ID_20G_KR2 ||
1255 hw->device_id == I40E_DEV_ID_20G_KR2_A ||
1256 hw->device_id == I40E_DEV_ID_25G_B ||
1257 hw->device_id == I40E_DEV_ID_KX_X722) {
1258 netdev_info(netdev, "Changing settings is not supported on backplane.\n");
1259 return -EOPNOTSUPP;
1260 }
1261
1262 /* copy the ksettings to copy_ks to avoid modifying the origin */
1263 memcpy(©_ks, ks, sizeof(struct ethtool_link_ksettings));
1264
1265 /* save autoneg out of ksettings */
1266 autoneg = copy_ks.base.autoneg;
1267 speed = copy_ks.base.speed;
1268
1269 /* get our own copy of the bits to check against */
1270 memset(&safe_ks, 0, sizeof(struct ethtool_link_ksettings));
1271 safe_ks.base.cmd = copy_ks.base.cmd;
1272 safe_ks.base.link_mode_masks_nwords =
1273 copy_ks.base.link_mode_masks_nwords;
1274 i40e_get_link_ksettings(netdev, &safe_ks);
1275
1276 /* Get link modes supported by hardware and check against modes
1277 * requested by the user. Return an error if unsupported mode was set.
1278 */
1279 if (!bitmap_subset(copy_ks.link_modes.advertising,
1280 safe_ks.link_modes.supported,
1281 __ETHTOOL_LINK_MODE_MASK_NBITS))
1282 return -EINVAL;
1283
1284 /* set autoneg back to what it currently is */
1285 copy_ks.base.autoneg = safe_ks.base.autoneg;
1286 copy_ks.base.speed = safe_ks.base.speed;
1287
1288 /* If copy_ks.base and safe_ks.base are not the same now, then they are
1289 * trying to set something that we do not support.
1290 */
1291 if (memcmp(©_ks.base, &safe_ks.base,
1292 sizeof(struct ethtool_link_settings))) {
1293 netdev_err(netdev, "Only speed and autoneg are supported.\n");
1294 return -EOPNOTSUPP;
1295 }
1296
1297 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
1298 timeout--;
1299 if (!timeout)
1300 return -EBUSY;
1301 usleep_range(1000, 2000);
1302 }
1303
1304 /* Get the current phy config */
1305 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1306 NULL);
1307 if (status) {
1308 err = -EAGAIN;
1309 goto done;
1310 }
1311
1312 /* Copy abilities to config in case autoneg is not
1313 * set below
1314 */
1315 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
1316 config.abilities = abilities.abilities;
1317
1318 /* Check autoneg */
1319 if (autoneg == AUTONEG_ENABLE) {
1320 /* If autoneg was not already enabled */
1321 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
1322 /* If autoneg is not supported, return error */
1323 if (!ethtool_link_ksettings_test_link_mode(&safe_ks,
1324 supported,
1325 Autoneg)) {
1326 netdev_info(netdev, "Autoneg not supported on this phy\n");
1327 err = -EINVAL;
1328 goto done;
1329 }
1330 /* Autoneg is allowed to change */
1331 config.abilities = abilities.abilities |
1332 I40E_AQ_PHY_ENABLE_AN;
1333 autoneg_changed = true;
1334 }
1335 } else {
1336 /* If autoneg is currently enabled */
1337 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
1338 /* If autoneg is supported 10GBASE_T is the only PHY
1339 * that can disable it, so otherwise return error
1340 */
1341 if (ethtool_link_ksettings_test_link_mode(&safe_ks,
1342 supported,
1343 Autoneg) &&
1344 hw->phy.media_type != I40E_MEDIA_TYPE_BASET) {
1345 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
1346 err = -EINVAL;
1347 goto done;
1348 }
1349 /* Autoneg is allowed to change */
1350 config.abilities = abilities.abilities &
1351 ~I40E_AQ_PHY_ENABLE_AN;
1352 autoneg_changed = true;
1353 }
1354 }
1355
1356 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1357 100baseT_Full))
1358 config.link_speed |= I40E_LINK_SPEED_100MB;
1359 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1360 1000baseT_Full) ||
1361 ethtool_link_ksettings_test_link_mode(ks, advertising,
1362 1000baseX_Full) ||
1363 ethtool_link_ksettings_test_link_mode(ks, advertising,
1364 1000baseKX_Full))
1365 config.link_speed |= I40E_LINK_SPEED_1GB;
1366 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1367 10000baseT_Full) ||
1368 ethtool_link_ksettings_test_link_mode(ks, advertising,
1369 10000baseKX4_Full) ||
1370 ethtool_link_ksettings_test_link_mode(ks, advertising,
1371 10000baseKR_Full) ||
1372 ethtool_link_ksettings_test_link_mode(ks, advertising,
1373 10000baseCR_Full) ||
1374 ethtool_link_ksettings_test_link_mode(ks, advertising,
1375 10000baseSR_Full) ||
1376 ethtool_link_ksettings_test_link_mode(ks, advertising,
1377 10000baseLR_Full))
1378 config.link_speed |= I40E_LINK_SPEED_10GB;
1379 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1380 2500baseT_Full))
1381 config.link_speed |= I40E_LINK_SPEED_2_5GB;
1382 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1383 5000baseT_Full))
1384 config.link_speed |= I40E_LINK_SPEED_5GB;
1385 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1386 20000baseKR2_Full))
1387 config.link_speed |= I40E_LINK_SPEED_20GB;
1388 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1389 25000baseCR_Full) ||
1390 ethtool_link_ksettings_test_link_mode(ks, advertising,
1391 25000baseKR_Full) ||
1392 ethtool_link_ksettings_test_link_mode(ks, advertising,
1393 25000baseSR_Full))
1394 config.link_speed |= I40E_LINK_SPEED_25GB;
1395 if (ethtool_link_ksettings_test_link_mode(ks, advertising,
1396 40000baseKR4_Full) ||
1397 ethtool_link_ksettings_test_link_mode(ks, advertising,
1398 40000baseCR4_Full) ||
1399 ethtool_link_ksettings_test_link_mode(ks, advertising,
1400 40000baseSR4_Full) ||
1401 ethtool_link_ksettings_test_link_mode(ks, advertising,
1402 40000baseLR4_Full))
1403 config.link_speed |= I40E_LINK_SPEED_40GB;
1404
1405 /* Autonegotiation must be disabled to change speed */
1406 if ((speed != SPEED_UNKNOWN && safe_ks.base.speed != speed) &&
1407 (autoneg == AUTONEG_DISABLE ||
1408 (safe_ks.base.autoneg == AUTONEG_DISABLE && !autoneg_changed))) {
1409 link_speed = i40e_speed_to_link_speed(speed, ks);
1410 if (link_speed == I40E_LINK_SPEED_UNKNOWN) {
1411 netdev_info(netdev, "Given speed is not supported\n");
1412 err = -EOPNOTSUPP;
1413 goto done;
1414 } else {
1415 config.link_speed = link_speed;
1416 }
1417 } else {
1418 if (safe_ks.base.speed != speed) {
1419 netdev_info(netdev,
1420 "Unable to set speed, disable autoneg\n");
1421 err = -EOPNOTSUPP;
1422 goto done;
1423 }
1424 }
1425
1426 /* If speed didn't get set, set it to what it currently is.
1427 * This is needed because if advertise is 0 (as it is when autoneg
1428 * is disabled) then speed won't get set.
1429 */
1430 if (!config.link_speed)
1431 config.link_speed = abilities.link_speed;
1432 if (autoneg_changed || abilities.link_speed != config.link_speed) {
1433 /* copy over the rest of the abilities */
1434 config.phy_type = abilities.phy_type;
1435 config.phy_type_ext = abilities.phy_type_ext;
1436 config.eee_capability = abilities.eee_capability;
1437 config.eeer = abilities.eeer_val;
1438 config.low_power_ctrl = abilities.d3_lpan;
1439 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
1440 I40E_AQ_PHY_FEC_CONFIG_MASK;
1441
1442 /* save the requested speeds */
1443 hw->phy.link_info.requested_speeds = config.link_speed;
1444 /* set link and auto negotiation so changes take effect */
1445 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1446 /* If link is up put link down */
1447 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
1448 /* Tell the OS link is going down, the link will go
1449 * back up when fw says it is ready asynchronously
1450 */
1451 i40e_print_link_message(vsi, false);
1452 netif_carrier_off(netdev);
1453 netif_tx_stop_all_queues(netdev);
1454 }
1455
1456 /* make the aq call */
1457 status = i40e_aq_set_phy_config(hw, &config, NULL);
1458 if (status) {
1459 netdev_info(netdev,
1460 "Set phy config failed, err %pe aq_err %s\n",
1461 ERR_PTR(status),
1462 i40e_aq_str(hw, hw->aq.asq_last_status));
1463 err = -EAGAIN;
1464 goto done;
1465 }
1466
1467 status = i40e_update_link_info(hw);
1468 if (status)
1469 netdev_dbg(netdev,
1470 "Updating link info failed with err %pe aq_err %s\n",
1471 ERR_PTR(status),
1472 i40e_aq_str(hw, hw->aq.asq_last_status));
1473
1474 } else {
1475 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
1476 }
1477
1478done:
1479 clear_bit(__I40E_CONFIG_BUSY, pf->state);
1480
1481 return err;
1482}
1483
1484static int i40e_set_fec_cfg(struct net_device *netdev, u8 fec_cfg)
1485{
1486 struct i40e_netdev_priv *np = netdev_priv(netdev);
1487 struct i40e_aq_get_phy_abilities_resp abilities;
1488 struct i40e_pf *pf = np->vsi->back;
1489 struct i40e_hw *hw = &pf->hw;
1490 int status = 0;
1491 int err = 0;
1492
1493 /* Get the current phy config */
1494 memset(&abilities, 0, sizeof(abilities));
1495 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1496 NULL);
1497 if (status) {
1498 err = -EAGAIN;
1499 goto done;
1500 }
1501
1502 if (abilities.fec_cfg_curr_mod_ext_info != fec_cfg) {
1503 struct i40e_aq_set_phy_config config;
1504
1505 memset(&config, 0, sizeof(config));
1506 config.phy_type = abilities.phy_type;
1507 config.abilities = abilities.abilities |
1508 I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
1509 config.phy_type_ext = abilities.phy_type_ext;
1510 config.link_speed = abilities.link_speed;
1511 config.eee_capability = abilities.eee_capability;
1512 config.eeer = abilities.eeer_val;
1513 config.low_power_ctrl = abilities.d3_lpan;
1514 config.fec_config = fec_cfg & I40E_AQ_PHY_FEC_CONFIG_MASK;
1515 status = i40e_aq_set_phy_config(hw, &config, NULL);
1516 if (status) {
1517 netdev_info(netdev,
1518 "Set phy config failed, err %pe aq_err %s\n",
1519 ERR_PTR(status),
1520 i40e_aq_str(hw, hw->aq.asq_last_status));
1521 err = -EAGAIN;
1522 goto done;
1523 }
1524 i40e_set_fec_in_flags(fec_cfg, pf->flags);
1525 status = i40e_update_link_info(hw);
1526 if (status)
1527 /* debug level message only due to relation to the link
1528 * itself rather than to the FEC settings
1529 * (e.g. no physical connection etc.)
1530 */
1531 netdev_dbg(netdev,
1532 "Updating link info failed with err %pe aq_err %s\n",
1533 ERR_PTR(status),
1534 i40e_aq_str(hw, hw->aq.asq_last_status));
1535 }
1536
1537done:
1538 return err;
1539}
1540
1541static int i40e_get_fec_param(struct net_device *netdev,
1542 struct ethtool_fecparam *fecparam)
1543{
1544 struct i40e_netdev_priv *np = netdev_priv(netdev);
1545 struct i40e_aq_get_phy_abilities_resp abilities;
1546 struct i40e_pf *pf = np->vsi->back;
1547 struct i40e_hw *hw = &pf->hw;
1548 int status = 0;
1549 int err = 0;
1550 u8 fec_cfg;
1551
1552 /* Get the current phy config */
1553 memset(&abilities, 0, sizeof(abilities));
1554 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
1555 NULL);
1556 if (status) {
1557 err = -EAGAIN;
1558 goto done;
1559 }
1560
1561 fecparam->fec = 0;
1562 fec_cfg = abilities.fec_cfg_curr_mod_ext_info;
1563 if (fec_cfg & I40E_AQ_SET_FEC_AUTO)
1564 fecparam->fec |= ETHTOOL_FEC_AUTO;
1565 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_RS |
1566 I40E_AQ_SET_FEC_ABILITY_RS))
1567 fecparam->fec |= ETHTOOL_FEC_RS;
1568 else if (fec_cfg & (I40E_AQ_SET_FEC_REQUEST_KR |
1569 I40E_AQ_SET_FEC_ABILITY_KR))
1570 fecparam->fec |= ETHTOOL_FEC_BASER;
1571 if (fec_cfg == 0)
1572 fecparam->fec |= ETHTOOL_FEC_OFF;
1573
1574 if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_KR_ENA)
1575 fecparam->active_fec = ETHTOOL_FEC_BASER;
1576 else if (hw->phy.link_info.fec_info & I40E_AQ_CONFIG_FEC_RS_ENA)
1577 fecparam->active_fec = ETHTOOL_FEC_RS;
1578 else
1579 fecparam->active_fec = ETHTOOL_FEC_OFF;
1580done:
1581 return err;
1582}
1583
1584static int i40e_set_fec_param(struct net_device *netdev,
1585 struct ethtool_fecparam *fecparam)
1586{
1587 struct i40e_netdev_priv *np = netdev_priv(netdev);
1588 struct i40e_pf *pf = np->vsi->back;
1589 struct i40e_hw *hw = &pf->hw;
1590 u8 fec_cfg = 0;
1591
1592 if (hw->device_id != I40E_DEV_ID_25G_SFP28 &&
1593 hw->device_id != I40E_DEV_ID_25G_B &&
1594 hw->device_id != I40E_DEV_ID_KX_X722)
1595 return -EPERM;
1596
1597 if (hw->mac.type == I40E_MAC_X722 &&
1598 !test_bit(I40E_HW_CAP_X722_FEC_REQUEST, hw->caps)) {
1599 netdev_err(netdev, "Setting FEC encoding not supported by firmware. Please update the NVM image.\n");
1600 return -EOPNOTSUPP;
1601 }
1602
1603 switch (fecparam->fec) {
1604 case ETHTOOL_FEC_AUTO:
1605 fec_cfg = I40E_AQ_SET_FEC_AUTO;
1606 break;
1607 case ETHTOOL_FEC_RS:
1608 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
1609 I40E_AQ_SET_FEC_ABILITY_RS);
1610 break;
1611 case ETHTOOL_FEC_BASER:
1612 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
1613 I40E_AQ_SET_FEC_ABILITY_KR);
1614 break;
1615 case ETHTOOL_FEC_OFF:
1616 case ETHTOOL_FEC_NONE:
1617 fec_cfg = 0;
1618 break;
1619 default:
1620 dev_warn(&pf->pdev->dev, "Unsupported FEC mode: %d",
1621 fecparam->fec);
1622 return -EINVAL;
1623 }
1624
1625 return i40e_set_fec_cfg(netdev, fec_cfg);
1626}
1627
1628static int i40e_nway_reset(struct net_device *netdev)
1629{
1630 /* restart autonegotiation */
1631 struct i40e_netdev_priv *np = netdev_priv(netdev);
1632 struct i40e_pf *pf = np->vsi->back;
1633 struct i40e_hw *hw = &pf->hw;
1634 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
1635 int ret = 0;
1636
1637 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
1638 if (ret) {
1639 netdev_info(netdev, "link restart failed, err %pe aq_err %s\n",
1640 ERR_PTR(ret),
1641 i40e_aq_str(hw, hw->aq.asq_last_status));
1642 return -EIO;
1643 }
1644
1645 return 0;
1646}
1647
1648/**
1649 * i40e_get_pauseparam - Get Flow Control status
1650 * @netdev: netdevice structure
1651 * @pause: buffer to return pause parameters
1652 *
1653 * Return tx/rx-pause status
1654 **/
1655static void i40e_get_pauseparam(struct net_device *netdev,
1656 struct ethtool_pauseparam *pause)
1657{
1658 struct i40e_netdev_priv *np = netdev_priv(netdev);
1659 struct i40e_pf *pf = np->vsi->back;
1660 struct i40e_hw *hw = &pf->hw;
1661 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1662 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1663
1664 pause->autoneg =
1665 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
1666 AUTONEG_ENABLE : AUTONEG_DISABLE);
1667
1668 /* PFC enabled so report LFC as off */
1669 if (dcbx_cfg->pfc.pfcenable) {
1670 pause->rx_pause = 0;
1671 pause->tx_pause = 0;
1672 return;
1673 }
1674
1675 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
1676 pause->rx_pause = 1;
1677 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
1678 pause->tx_pause = 1;
1679 } else if (hw->fc.current_mode == I40E_FC_FULL) {
1680 pause->rx_pause = 1;
1681 pause->tx_pause = 1;
1682 }
1683}
1684
1685/**
1686 * i40e_set_pauseparam - Set Flow Control parameter
1687 * @netdev: network interface device structure
1688 * @pause: return tx/rx flow control status
1689 **/
1690static int i40e_set_pauseparam(struct net_device *netdev,
1691 struct ethtool_pauseparam *pause)
1692{
1693 struct i40e_netdev_priv *np = netdev_priv(netdev);
1694 struct i40e_pf *pf = np->vsi->back;
1695 struct i40e_vsi *vsi = np->vsi;
1696 struct i40e_hw *hw = &pf->hw;
1697 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
1698 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
1699 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
1700 u8 aq_failures;
1701 int err = 0;
1702 int status;
1703 u32 is_an;
1704
1705 /* Changing the port's flow control is not supported if this isn't the
1706 * port's controlling PF
1707 */
1708 if (hw->partition_id != 1) {
1709 i40e_partition_setting_complaint(pf);
1710 return -EOPNOTSUPP;
1711 }
1712
1713 if (vsi->type != I40E_VSI_MAIN)
1714 return -EOPNOTSUPP;
1715
1716 is_an = hw_link_info->an_info & I40E_AQ_AN_COMPLETED;
1717 if (pause->autoneg != is_an) {
1718 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
1719 return -EOPNOTSUPP;
1720 }
1721
1722 /* If we have link and don't have autoneg */
1723 if (!test_bit(__I40E_DOWN, pf->state) && !is_an) {
1724 /* Send message that it might not necessarily work*/
1725 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
1726 }
1727
1728 if (dcbx_cfg->pfc.pfcenable) {
1729 netdev_info(netdev,
1730 "Priority flow control enabled. Cannot set link flow control.\n");
1731 return -EOPNOTSUPP;
1732 }
1733
1734 if (pause->rx_pause && pause->tx_pause)
1735 hw->fc.requested_mode = I40E_FC_FULL;
1736 else if (pause->rx_pause && !pause->tx_pause)
1737 hw->fc.requested_mode = I40E_FC_RX_PAUSE;
1738 else if (!pause->rx_pause && pause->tx_pause)
1739 hw->fc.requested_mode = I40E_FC_TX_PAUSE;
1740 else if (!pause->rx_pause && !pause->tx_pause)
1741 hw->fc.requested_mode = I40E_FC_NONE;
1742 else
1743 return -EINVAL;
1744
1745 /* Tell the OS link is going down, the link will go back up when fw
1746 * says it is ready asynchronously
1747 */
1748 i40e_print_link_message(vsi, false);
1749 netif_carrier_off(netdev);
1750 netif_tx_stop_all_queues(netdev);
1751
1752 /* Set the fc mode and only restart an if link is up*/
1753 status = i40e_set_fc(hw, &aq_failures, link_up);
1754
1755 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
1756 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %pe aq_err %s\n",
1757 ERR_PTR(status),
1758 i40e_aq_str(hw, hw->aq.asq_last_status));
1759 err = -EAGAIN;
1760 }
1761 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
1762 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %pe aq_err %s\n",
1763 ERR_PTR(status),
1764 i40e_aq_str(hw, hw->aq.asq_last_status));
1765 err = -EAGAIN;
1766 }
1767 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
1768 netdev_info(netdev, "Set fc failed on the get_link_info call with err %pe aq_err %s\n",
1769 ERR_PTR(status),
1770 i40e_aq_str(hw, hw->aq.asq_last_status));
1771 err = -EAGAIN;
1772 }
1773
1774 if (!test_bit(__I40E_DOWN, pf->state) && is_an) {
1775 /* Give it a little more time to try to come back */
1776 msleep(75);
1777 if (!test_bit(__I40E_DOWN, pf->state))
1778 return i40e_nway_reset(netdev);
1779 }
1780
1781 return err;
1782}
1783
1784static u32 i40e_get_msglevel(struct net_device *netdev)
1785{
1786 struct i40e_netdev_priv *np = netdev_priv(netdev);
1787 struct i40e_pf *pf = np->vsi->back;
1788 u32 debug_mask = pf->hw.debug_mask;
1789
1790 if (debug_mask)
1791 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1792
1793 return pf->msg_enable;
1794}
1795
1796static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1797{
1798 struct i40e_netdev_priv *np = netdev_priv(netdev);
1799 struct i40e_pf *pf = np->vsi->back;
1800
1801 if (I40E_DEBUG_USER & data)
1802 pf->hw.debug_mask = data;
1803 else
1804 pf->msg_enable = data;
1805}
1806
1807static int i40e_get_regs_len(struct net_device *netdev)
1808{
1809 int reg_count = 0;
1810 int i;
1811
1812 for (i = 0; i40e_reg_list[i].offset != 0; i++)
1813 reg_count += i40e_reg_list[i].elements;
1814
1815 return reg_count * sizeof(u32);
1816}
1817
1818static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1819 void *p)
1820{
1821 struct i40e_netdev_priv *np = netdev_priv(netdev);
1822 struct i40e_pf *pf = np->vsi->back;
1823 struct i40e_hw *hw = &pf->hw;
1824 u32 *reg_buf = p;
1825 unsigned int i, j, ri;
1826 u32 reg;
1827
1828 /* Tell ethtool which driver-version-specific regs output we have.
1829 *
1830 * At some point, if we have ethtool doing special formatting of
1831 * this data, it will rely on this version number to know how to
1832 * interpret things. Hence, this needs to be updated if/when the
1833 * diags register table is changed.
1834 */
1835 regs->version = 1;
1836
1837 /* loop through the diags reg table for what to print */
1838 ri = 0;
1839 for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1840 for (j = 0; j < i40e_reg_list[i].elements; j++) {
1841 reg = i40e_reg_list[i].offset
1842 + (j * i40e_reg_list[i].stride);
1843 reg_buf[ri++] = rd32(hw, reg);
1844 }
1845 }
1846
1847}
1848
1849static int i40e_get_eeprom(struct net_device *netdev,
1850 struct ethtool_eeprom *eeprom, u8 *bytes)
1851{
1852 struct i40e_netdev_priv *np = netdev_priv(netdev);
1853 struct i40e_hw *hw = &np->vsi->back->hw;
1854 struct i40e_pf *pf = np->vsi->back;
1855 int ret_val = 0, len, offset;
1856 u8 *eeprom_buff;
1857 u16 i, sectors;
1858 bool last;
1859 u32 magic;
1860
1861#define I40E_NVM_SECTOR_SIZE 4096
1862 if (eeprom->len == 0)
1863 return -EINVAL;
1864
1865 /* check for NVMUpdate access method */
1866 magic = hw->vendor_id | (hw->device_id << 16);
1867 if (eeprom->magic && eeprom->magic != magic) {
1868 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1869 int errno = 0;
1870
1871 /* make sure it is the right magic for NVMUpdate */
1872 if ((eeprom->magic >> 16) != hw->device_id)
1873 errno = -EINVAL;
1874 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1875 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1876 errno = -EBUSY;
1877 else
1878 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1879
1880 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1881 dev_info(&pf->pdev->dev,
1882 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1883 ret_val, hw->aq.asq_last_status, errno,
1884 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1885 cmd->offset, cmd->data_size);
1886
1887 return errno;
1888 }
1889
1890 /* normal ethtool get_eeprom support */
1891 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1892
1893 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1894 if (!eeprom_buff)
1895 return -ENOMEM;
1896
1897 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1898 if (ret_val) {
1899 dev_info(&pf->pdev->dev,
1900 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1901 ret_val, hw->aq.asq_last_status);
1902 goto free_buff;
1903 }
1904
1905 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1906 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1907 len = I40E_NVM_SECTOR_SIZE;
1908 last = false;
1909 for (i = 0; i < sectors; i++) {
1910 if (i == (sectors - 1)) {
1911 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1912 last = true;
1913 }
1914 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i);
1915 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1916 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1917 last, NULL);
1918 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1919 dev_info(&pf->pdev->dev,
1920 "read NVM failed, invalid offset 0x%x\n",
1921 offset);
1922 break;
1923 } else if (ret_val &&
1924 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1925 dev_info(&pf->pdev->dev,
1926 "read NVM failed, access, offset 0x%x\n",
1927 offset);
1928 break;
1929 } else if (ret_val) {
1930 dev_info(&pf->pdev->dev,
1931 "read NVM failed offset %d err=%d status=0x%x\n",
1932 offset, ret_val, hw->aq.asq_last_status);
1933 break;
1934 }
1935 }
1936
1937 i40e_release_nvm(hw);
1938 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1939free_buff:
1940 kfree(eeprom_buff);
1941 return ret_val;
1942}
1943
1944static int i40e_get_eeprom_len(struct net_device *netdev)
1945{
1946 struct i40e_netdev_priv *np = netdev_priv(netdev);
1947 struct i40e_hw *hw = &np->vsi->back->hw;
1948 u32 val;
1949
1950#define X722_EEPROM_SCOPE_LIMIT 0x5B9FFF
1951 if (hw->mac.type == I40E_MAC_X722) {
1952 val = X722_EEPROM_SCOPE_LIMIT + 1;
1953 return val;
1954 }
1955 val = FIELD_GET(I40E_GLPCI_LBARCTRL_FL_SIZE_MASK,
1956 rd32(hw, I40E_GLPCI_LBARCTRL));
1957 /* register returns value in power of 2, 64Kbyte chunks. */
1958 val = (64 * 1024) * BIT(val);
1959 return val;
1960}
1961
1962static int i40e_set_eeprom(struct net_device *netdev,
1963 struct ethtool_eeprom *eeprom, u8 *bytes)
1964{
1965 struct i40e_netdev_priv *np = netdev_priv(netdev);
1966 struct i40e_hw *hw = &np->vsi->back->hw;
1967 struct i40e_pf *pf = np->vsi->back;
1968 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1969 int ret_val = 0;
1970 int errno = 0;
1971 u32 magic;
1972
1973 /* normal ethtool set_eeprom is not supported */
1974 magic = hw->vendor_id | (hw->device_id << 16);
1975 if (eeprom->magic == magic)
1976 errno = -EOPNOTSUPP;
1977 /* check for NVMUpdate access method */
1978 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1979 errno = -EINVAL;
1980 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
1981 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
1982 errno = -EBUSY;
1983 else
1984 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1985
1986 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1987 dev_info(&pf->pdev->dev,
1988 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1989 ret_val, hw->aq.asq_last_status, errno,
1990 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1991 cmd->offset, cmd->data_size);
1992
1993 return errno;
1994}
1995
1996static void i40e_get_drvinfo(struct net_device *netdev,
1997 struct ethtool_drvinfo *drvinfo)
1998{
1999 struct i40e_netdev_priv *np = netdev_priv(netdev);
2000 struct i40e_vsi *vsi = np->vsi;
2001 struct i40e_pf *pf = vsi->back;
2002
2003 strscpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
2004 i40e_nvm_version_str(&pf->hw, drvinfo->fw_version,
2005 sizeof(drvinfo->fw_version));
2006 strscpy(drvinfo->bus_info, pci_name(pf->pdev),
2007 sizeof(drvinfo->bus_info));
2008 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
2009 if (pf->hw.pf_id == 0)
2010 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
2011}
2012
2013static u32 i40e_get_max_num_descriptors(struct i40e_pf *pf)
2014{
2015 struct i40e_hw *hw = &pf->hw;
2016
2017 switch (hw->mac.type) {
2018 case I40E_MAC_XL710:
2019 return I40E_MAX_NUM_DESCRIPTORS_XL710;
2020 default:
2021 return I40E_MAX_NUM_DESCRIPTORS;
2022 }
2023}
2024
2025static void i40e_get_ringparam(struct net_device *netdev,
2026 struct ethtool_ringparam *ring,
2027 struct kernel_ethtool_ringparam *kernel_ring,
2028 struct netlink_ext_ack *extack)
2029{
2030 struct i40e_netdev_priv *np = netdev_priv(netdev);
2031 struct i40e_pf *pf = np->vsi->back;
2032 struct i40e_vsi *vsi = i40e_pf_get_main_vsi(pf);
2033
2034 ring->rx_max_pending = i40e_get_max_num_descriptors(pf);
2035 ring->tx_max_pending = i40e_get_max_num_descriptors(pf);
2036 ring->rx_mini_max_pending = 0;
2037 ring->rx_jumbo_max_pending = 0;
2038 ring->rx_pending = vsi->rx_rings[0]->count;
2039 ring->tx_pending = vsi->tx_rings[0]->count;
2040 ring->rx_mini_pending = 0;
2041 ring->rx_jumbo_pending = 0;
2042}
2043
2044static bool i40e_active_tx_ring_index(struct i40e_vsi *vsi, u16 index)
2045{
2046 if (i40e_enabled_xdp_vsi(vsi)) {
2047 return index < vsi->num_queue_pairs ||
2048 (index >= vsi->alloc_queue_pairs &&
2049 index < vsi->alloc_queue_pairs + vsi->num_queue_pairs);
2050 }
2051
2052 return index < vsi->num_queue_pairs;
2053}
2054
2055static int i40e_set_ringparam(struct net_device *netdev,
2056 struct ethtool_ringparam *ring,
2057 struct kernel_ethtool_ringparam *kernel_ring,
2058 struct netlink_ext_ack *extack)
2059{
2060 u32 new_rx_count, new_tx_count, max_num_descriptors;
2061 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
2062 struct i40e_netdev_priv *np = netdev_priv(netdev);
2063 struct i40e_hw *hw = &np->vsi->back->hw;
2064 struct i40e_vsi *vsi = np->vsi;
2065 struct i40e_pf *pf = vsi->back;
2066 u16 tx_alloc_queue_pairs;
2067 int timeout = 50;
2068 int i, err = 0;
2069
2070 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
2071 return -EINVAL;
2072
2073 max_num_descriptors = i40e_get_max_num_descriptors(pf);
2074 if (ring->tx_pending > max_num_descriptors ||
2075 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
2076 ring->rx_pending > max_num_descriptors ||
2077 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
2078 netdev_info(netdev,
2079 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
2080 ring->tx_pending, ring->rx_pending,
2081 I40E_MIN_NUM_DESCRIPTORS, max_num_descriptors);
2082 return -EINVAL;
2083 }
2084
2085 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
2086 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
2087
2088 /* if nothing to do return success */
2089 if ((new_tx_count == vsi->tx_rings[0]->count) &&
2090 (new_rx_count == vsi->rx_rings[0]->count))
2091 return 0;
2092
2093 /* If there is a AF_XDP page pool attached to any of Rx rings,
2094 * disallow changing the number of descriptors -- regardless
2095 * if the netdev is running or not.
2096 */
2097 if (i40e_xsk_any_rx_ring_enabled(vsi))
2098 return -EBUSY;
2099
2100 while (test_and_set_bit(__I40E_CONFIG_BUSY, pf->state)) {
2101 timeout--;
2102 if (!timeout)
2103 return -EBUSY;
2104 usleep_range(1000, 2000);
2105 }
2106
2107 if (!netif_running(vsi->netdev)) {
2108 /* simple case - set for the next time the netdev is started */
2109 for (i = 0; i < vsi->num_queue_pairs; i++) {
2110 vsi->tx_rings[i]->count = new_tx_count;
2111 vsi->rx_rings[i]->count = new_rx_count;
2112 if (i40e_enabled_xdp_vsi(vsi))
2113 vsi->xdp_rings[i]->count = new_tx_count;
2114 }
2115 vsi->num_tx_desc = new_tx_count;
2116 vsi->num_rx_desc = new_rx_count;
2117 goto done;
2118 }
2119
2120 /* We can't just free everything and then setup again,
2121 * because the ISRs in MSI-X mode get passed pointers
2122 * to the Tx and Rx ring structs.
2123 */
2124
2125 /* alloc updated Tx and XDP Tx resources */
2126 tx_alloc_queue_pairs = vsi->alloc_queue_pairs *
2127 (i40e_enabled_xdp_vsi(vsi) ? 2 : 1);
2128 if (new_tx_count != vsi->tx_rings[0]->count) {
2129 netdev_info(netdev,
2130 "Changing Tx descriptor count from %d to %d.\n",
2131 vsi->tx_rings[0]->count, new_tx_count);
2132 tx_rings = kcalloc(tx_alloc_queue_pairs,
2133 sizeof(struct i40e_ring), GFP_KERNEL);
2134 if (!tx_rings) {
2135 err = -ENOMEM;
2136 goto done;
2137 }
2138
2139 for (i = 0; i < tx_alloc_queue_pairs; i++) {
2140 if (!i40e_active_tx_ring_index(vsi, i))
2141 continue;
2142
2143 tx_rings[i] = *vsi->tx_rings[i];
2144 tx_rings[i].count = new_tx_count;
2145 /* the desc and bi pointers will be reallocated in the
2146 * setup call
2147 */
2148 tx_rings[i].desc = NULL;
2149 tx_rings[i].rx_bi = NULL;
2150 err = i40e_setup_tx_descriptors(&tx_rings[i]);
2151 if (err) {
2152 while (i) {
2153 i--;
2154 if (!i40e_active_tx_ring_index(vsi, i))
2155 continue;
2156 i40e_free_tx_resources(&tx_rings[i]);
2157 }
2158 kfree(tx_rings);
2159 tx_rings = NULL;
2160
2161 goto done;
2162 }
2163 }
2164 }
2165
2166 /* alloc updated Rx resources */
2167 if (new_rx_count != vsi->rx_rings[0]->count) {
2168 netdev_info(netdev,
2169 "Changing Rx descriptor count from %d to %d\n",
2170 vsi->rx_rings[0]->count, new_rx_count);
2171 rx_rings = kcalloc(vsi->alloc_queue_pairs,
2172 sizeof(struct i40e_ring), GFP_KERNEL);
2173 if (!rx_rings) {
2174 err = -ENOMEM;
2175 goto free_tx;
2176 }
2177
2178 for (i = 0; i < vsi->num_queue_pairs; i++) {
2179 u16 unused;
2180
2181 /* clone ring and setup updated count */
2182 rx_rings[i] = *vsi->rx_rings[i];
2183 rx_rings[i].count = new_rx_count;
2184 /* the desc and bi pointers will be reallocated in the
2185 * setup call
2186 */
2187 rx_rings[i].desc = NULL;
2188 rx_rings[i].rx_bi = NULL;
2189 /* Clear cloned XDP RX-queue info before setup call */
2190 memset(&rx_rings[i].xdp_rxq, 0, sizeof(rx_rings[i].xdp_rxq));
2191 /* this is to allow wr32 to have something to write to
2192 * during early allocation of Rx buffers
2193 */
2194 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
2195 err = i40e_setup_rx_descriptors(&rx_rings[i]);
2196 if (err)
2197 goto rx_unwind;
2198
2199 /* now allocate the Rx buffers to make sure the OS
2200 * has enough memory, any failure here means abort
2201 */
2202 unused = I40E_DESC_UNUSED(&rx_rings[i]);
2203 err = i40e_alloc_rx_buffers(&rx_rings[i], unused);
2204rx_unwind:
2205 if (err) {
2206 do {
2207 i40e_free_rx_resources(&rx_rings[i]);
2208 } while (i--);
2209 kfree(rx_rings);
2210 rx_rings = NULL;
2211
2212 goto free_tx;
2213 }
2214 }
2215 }
2216
2217 /* Bring interface down, copy in the new ring info,
2218 * then restore the interface
2219 */
2220 i40e_down(vsi);
2221
2222 if (tx_rings) {
2223 for (i = 0; i < tx_alloc_queue_pairs; i++) {
2224 if (i40e_active_tx_ring_index(vsi, i)) {
2225 i40e_free_tx_resources(vsi->tx_rings[i]);
2226 *vsi->tx_rings[i] = tx_rings[i];
2227 }
2228 }
2229 kfree(tx_rings);
2230 tx_rings = NULL;
2231 }
2232
2233 if (rx_rings) {
2234 for (i = 0; i < vsi->num_queue_pairs; i++) {
2235 i40e_free_rx_resources(vsi->rx_rings[i]);
2236 /* get the real tail offset */
2237 rx_rings[i].tail = vsi->rx_rings[i]->tail;
2238 /* this is to fake out the allocation routine
2239 * into thinking it has to realloc everything
2240 * but the recycling logic will let us re-use
2241 * the buffers allocated above
2242 */
2243 rx_rings[i].next_to_use = 0;
2244 rx_rings[i].next_to_clean = 0;
2245 rx_rings[i].next_to_alloc = 0;
2246 /* do a struct copy */
2247 *vsi->rx_rings[i] = rx_rings[i];
2248 }
2249 kfree(rx_rings);
2250 rx_rings = NULL;
2251 }
2252
2253 vsi->num_tx_desc = new_tx_count;
2254 vsi->num_rx_desc = new_rx_count;
2255 i40e_up(vsi);
2256
2257free_tx:
2258 /* error cleanup if the Rx allocations failed after getting Tx */
2259 if (tx_rings) {
2260 for (i = 0; i < tx_alloc_queue_pairs; i++) {
2261 if (i40e_active_tx_ring_index(vsi, i))
2262 i40e_free_tx_resources(vsi->tx_rings[i]);
2263 }
2264 kfree(tx_rings);
2265 tx_rings = NULL;
2266 }
2267
2268done:
2269 clear_bit(__I40E_CONFIG_BUSY, pf->state);
2270
2271 return err;
2272}
2273
2274/**
2275 * i40e_get_stats_count - return the stats count for a device
2276 * @netdev: the netdev to return the count for
2277 *
2278 * Returns the total number of statistics for this netdev. Note that even
2279 * though this is a function, it is required that the count for a specific
2280 * netdev must never change. Basing the count on static values such as the
2281 * maximum number of queues or the device type is ok. However, the API for
2282 * obtaining stats is *not* safe against changes based on non-static
2283 * values such as the *current* number of queues, or runtime flags.
2284 *
2285 * If a statistic is not always enabled, return it as part of the count
2286 * anyways, always return its string, and report its value as zero.
2287 **/
2288static int i40e_get_stats_count(struct net_device *netdev)
2289{
2290 struct i40e_netdev_priv *np = netdev_priv(netdev);
2291 struct i40e_vsi *vsi = np->vsi;
2292 struct i40e_pf *pf = vsi->back;
2293 int stats_len;
2294
2295 if (vsi->type == I40E_VSI_MAIN && pf->hw.partition_id == 1)
2296 stats_len = I40E_PF_STATS_LEN;
2297 else
2298 stats_len = I40E_VSI_STATS_LEN;
2299
2300 /* The number of stats reported for a given net_device must remain
2301 * constant throughout the life of that device.
2302 *
2303 * This is because the API for obtaining the size, strings, and stats
2304 * is spread out over three separate ethtool ioctls. There is no safe
2305 * way to lock the number of stats across these calls, so we must
2306 * assume that they will never change.
2307 *
2308 * Due to this, we report the maximum number of queues, even if not
2309 * every queue is currently configured. Since we always allocate
2310 * queues in pairs, we'll just use netdev->num_tx_queues * 2. This
2311 * works because the num_tx_queues is set at device creation and never
2312 * changes.
2313 */
2314 stats_len += I40E_QUEUE_STATS_LEN * 2 * netdev->num_tx_queues;
2315
2316 return stats_len;
2317}
2318
2319static int i40e_get_sset_count(struct net_device *netdev, int sset)
2320{
2321 struct i40e_netdev_priv *np = netdev_priv(netdev);
2322 struct i40e_vsi *vsi = np->vsi;
2323 struct i40e_pf *pf = vsi->back;
2324
2325 switch (sset) {
2326 case ETH_SS_TEST:
2327 return I40E_TEST_LEN;
2328 case ETH_SS_STATS:
2329 return i40e_get_stats_count(netdev);
2330 case ETH_SS_PRIV_FLAGS:
2331 return I40E_PRIV_FLAGS_STR_LEN +
2332 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
2333 default:
2334 return -EOPNOTSUPP;
2335 }
2336}
2337
2338/**
2339 * i40e_get_veb_tc_stats - copy VEB TC statistics to formatted structure
2340 * @tc: the TC statistics in VEB structure (veb->tc_stats)
2341 * @i: the index of traffic class in (veb->tc_stats) structure to copy
2342 *
2343 * Copy VEB TC statistics from structure of arrays (veb->tc_stats) to
2344 * one dimensional structure i40e_cp_veb_tc_stats.
2345 * Produce formatted i40e_cp_veb_tc_stats structure of the VEB TC
2346 * statistics for the given TC.
2347 **/
2348static struct i40e_cp_veb_tc_stats
2349i40e_get_veb_tc_stats(struct i40e_veb_tc_stats *tc, unsigned int i)
2350{
2351 struct i40e_cp_veb_tc_stats veb_tc = {
2352 .tc_rx_packets = tc->tc_rx_packets[i],
2353 .tc_rx_bytes = tc->tc_rx_bytes[i],
2354 .tc_tx_packets = tc->tc_tx_packets[i],
2355 .tc_tx_bytes = tc->tc_tx_bytes[i],
2356 };
2357
2358 return veb_tc;
2359}
2360
2361/**
2362 * i40e_get_pfc_stats - copy HW PFC statistics to formatted structure
2363 * @pf: the PF device structure
2364 * @i: the priority value to copy
2365 *
2366 * The PFC stats are found as arrays in pf->stats, which is not easy to pass
2367 * into i40e_add_ethtool_stats. Produce a formatted i40e_pfc_stats structure
2368 * of the PFC stats for the given priority.
2369 **/
2370static inline struct i40e_pfc_stats
2371i40e_get_pfc_stats(struct i40e_pf *pf, unsigned int i)
2372{
2373#define I40E_GET_PFC_STAT(stat, priority) \
2374 .stat = pf->stats.stat[priority]
2375
2376 struct i40e_pfc_stats pfc = {
2377 I40E_GET_PFC_STAT(priority_xon_rx, i),
2378 I40E_GET_PFC_STAT(priority_xoff_rx, i),
2379 I40E_GET_PFC_STAT(priority_xon_tx, i),
2380 I40E_GET_PFC_STAT(priority_xoff_tx, i),
2381 I40E_GET_PFC_STAT(priority_xon_2_xoff, i),
2382 };
2383 return pfc;
2384}
2385
2386/**
2387 * i40e_get_ethtool_stats - copy stat values into supplied buffer
2388 * @netdev: the netdev to collect stats for
2389 * @stats: ethtool stats command structure
2390 * @data: ethtool supplied buffer
2391 *
2392 * Copy the stats values for this netdev into the buffer. Expects data to be
2393 * pre-allocated to the size returned by i40e_get_stats_count.. Note that all
2394 * statistics must be copied in a static order, and the count must not change
2395 * for a given netdev. See i40e_get_stats_count for more details.
2396 *
2397 * If a statistic is not currently valid (such as a disabled queue), this
2398 * function reports its value as zero.
2399 **/
2400static void i40e_get_ethtool_stats(struct net_device *netdev,
2401 struct ethtool_stats *stats, u64 *data)
2402{
2403 struct i40e_netdev_priv *np = netdev_priv(netdev);
2404 struct i40e_vsi *vsi = np->vsi;
2405 struct i40e_pf *pf = vsi->back;
2406 struct i40e_veb *veb = NULL;
2407 unsigned int i;
2408 bool veb_stats;
2409 u64 *p = data;
2410
2411 i40e_update_stats(vsi);
2412
2413 i40e_add_ethtool_stats(&data, i40e_get_vsi_stats_struct(vsi),
2414 i40e_gstrings_net_stats);
2415
2416 i40e_add_ethtool_stats(&data, vsi, i40e_gstrings_misc_stats);
2417
2418 rcu_read_lock();
2419 for (i = 0; i < netdev->num_tx_queues; i++) {
2420 i40e_add_queue_stats(&data, READ_ONCE(vsi->tx_rings[i]));
2421 i40e_add_queue_stats(&data, READ_ONCE(vsi->rx_rings[i]));
2422 }
2423 rcu_read_unlock();
2424
2425 if (vsi->type != I40E_VSI_MAIN || pf->hw.partition_id != 1)
2426 goto check_data_pointer;
2427
2428 veb = i40e_pf_get_main_veb(pf);
2429 veb_stats = veb && test_bit(I40E_FLAG_VEB_STATS_ENA, pf->flags);
2430
2431 if (veb_stats)
2432 i40e_update_veb_stats(veb);
2433
2434 /* If veb stats aren't enabled, pass NULL instead of the veb so that
2435 * we initialize stats to zero and update the data pointer
2436 * intelligently
2437 */
2438 i40e_add_ethtool_stats(&data, veb_stats ? veb : NULL,
2439 i40e_gstrings_veb_stats);
2440
2441 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2442 if (veb_stats) {
2443 struct i40e_cp_veb_tc_stats veb_tc =
2444 i40e_get_veb_tc_stats(&veb->tc_stats, i);
2445
2446 i40e_add_ethtool_stats(&data, &veb_tc,
2447 i40e_gstrings_veb_tc_stats);
2448 } else {
2449 i40e_add_ethtool_stats(&data, NULL,
2450 i40e_gstrings_veb_tc_stats);
2451 }
2452
2453 i40e_add_ethtool_stats(&data, pf, i40e_gstrings_stats);
2454
2455 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
2456 struct i40e_pfc_stats pfc = i40e_get_pfc_stats(pf, i);
2457
2458 i40e_add_ethtool_stats(&data, &pfc, i40e_gstrings_pfc_stats);
2459 }
2460
2461check_data_pointer:
2462 WARN_ONCE(data - p != i40e_get_stats_count(netdev),
2463 "ethtool stats count mismatch!");
2464}
2465
2466/**
2467 * i40e_get_stat_strings - copy stat strings into supplied buffer
2468 * @netdev: the netdev to collect strings for
2469 * @data: supplied buffer to copy strings into
2470 *
2471 * Copy the strings related to stats for this netdev. Expects data to be
2472 * pre-allocated with the size reported by i40e_get_stats_count. Note that the
2473 * strings must be copied in a static order and the total count must not
2474 * change for a given netdev. See i40e_get_stats_count for more details.
2475 **/
2476static void i40e_get_stat_strings(struct net_device *netdev, u8 *data)
2477{
2478 struct i40e_netdev_priv *np = netdev_priv(netdev);
2479 struct i40e_vsi *vsi = np->vsi;
2480 struct i40e_pf *pf = vsi->back;
2481 unsigned int i;
2482 u8 *p = data;
2483
2484 i40e_add_stat_strings(&data, i40e_gstrings_net_stats);
2485
2486 i40e_add_stat_strings(&data, i40e_gstrings_misc_stats);
2487
2488 for (i = 0; i < netdev->num_tx_queues; i++) {
2489 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2490 "tx", i);
2491 i40e_add_stat_strings(&data, i40e_gstrings_queue_stats,
2492 "rx", i);
2493 }
2494
2495 if (vsi->type != I40E_VSI_MAIN || pf->hw.partition_id != 1)
2496 goto check_data_pointer;
2497
2498 i40e_add_stat_strings(&data, i40e_gstrings_veb_stats);
2499
2500 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++)
2501 i40e_add_stat_strings(&data, i40e_gstrings_veb_tc_stats, i);
2502
2503 i40e_add_stat_strings(&data, i40e_gstrings_stats);
2504
2505 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++)
2506 i40e_add_stat_strings(&data, i40e_gstrings_pfc_stats, i);
2507
2508check_data_pointer:
2509 WARN_ONCE(data - p != i40e_get_stats_count(netdev) * ETH_GSTRING_LEN,
2510 "stat strings count mismatch!");
2511}
2512
2513static void i40e_get_priv_flag_strings(struct net_device *netdev, u8 *data)
2514{
2515 struct i40e_netdev_priv *np = netdev_priv(netdev);
2516 struct i40e_vsi *vsi = np->vsi;
2517 struct i40e_pf *pf = vsi->back;
2518 unsigned int i;
2519 u8 *p = data;
2520
2521 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++)
2522 ethtool_puts(&p, i40e_gstrings_priv_flags[i].flag_string);
2523 if (pf->hw.pf_id != 0)
2524 return;
2525 for (i = 0; i < I40E_GL_PRIV_FLAGS_STR_LEN; i++)
2526 ethtool_puts(&p, i40e_gl_gstrings_priv_flags[i].flag_string);
2527}
2528
2529static void i40e_get_strings(struct net_device *netdev, u32 stringset,
2530 u8 *data)
2531{
2532 switch (stringset) {
2533 case ETH_SS_TEST:
2534 memcpy(data, i40e_gstrings_test,
2535 I40E_TEST_LEN * ETH_GSTRING_LEN);
2536 break;
2537 case ETH_SS_STATS:
2538 i40e_get_stat_strings(netdev, data);
2539 break;
2540 case ETH_SS_PRIV_FLAGS:
2541 i40e_get_priv_flag_strings(netdev, data);
2542 break;
2543 default:
2544 break;
2545 }
2546}
2547
2548static int i40e_get_ts_info(struct net_device *dev,
2549 struct kernel_ethtool_ts_info *info)
2550{
2551 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
2552
2553 /* only report HW timestamping if PTP is enabled */
2554 if (!test_bit(I40E_FLAG_PTP_ENA, pf->flags))
2555 return ethtool_op_get_ts_info(dev, info);
2556
2557 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
2558 SOF_TIMESTAMPING_TX_HARDWARE |
2559 SOF_TIMESTAMPING_RX_HARDWARE |
2560 SOF_TIMESTAMPING_RAW_HARDWARE;
2561
2562 if (pf->ptp_clock)
2563 info->phc_index = ptp_clock_index(pf->ptp_clock);
2564
2565 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
2566
2567 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
2568 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
2569 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
2570 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
2571
2572 if (test_bit(I40E_HW_CAP_PTP_L4, pf->hw.caps))
2573 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
2574 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
2575 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
2576 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
2577 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
2578 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
2579 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
2580 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
2581
2582 return 0;
2583}
2584
2585static u64 i40e_link_test(struct net_device *netdev, u64 *data)
2586{
2587 struct i40e_netdev_priv *np = netdev_priv(netdev);
2588 struct i40e_pf *pf = np->vsi->back;
2589 bool link_up = false;
2590 int status;
2591
2592 netif_info(pf, hw, netdev, "link test\n");
2593 status = i40e_get_link_status(&pf->hw, &link_up);
2594 if (status) {
2595 netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
2596 *data = 1;
2597 return *data;
2598 }
2599
2600 if (link_up)
2601 *data = 0;
2602 else
2603 *data = 1;
2604
2605 return *data;
2606}
2607
2608static u64 i40e_reg_test(struct net_device *netdev, u64 *data)
2609{
2610 struct i40e_netdev_priv *np = netdev_priv(netdev);
2611 struct i40e_pf *pf = np->vsi->back;
2612
2613 netif_info(pf, hw, netdev, "register test\n");
2614 *data = i40e_diag_reg_test(&pf->hw);
2615
2616 return *data;
2617}
2618
2619static u64 i40e_eeprom_test(struct net_device *netdev, u64 *data)
2620{
2621 struct i40e_netdev_priv *np = netdev_priv(netdev);
2622 struct i40e_pf *pf = np->vsi->back;
2623
2624 netif_info(pf, hw, netdev, "eeprom test\n");
2625 *data = i40e_diag_eeprom_test(&pf->hw);
2626
2627 /* forcebly clear the NVM Update state machine */
2628 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
2629
2630 return *data;
2631}
2632
2633static u64 i40e_intr_test(struct net_device *netdev, u64 *data)
2634{
2635 struct i40e_netdev_priv *np = netdev_priv(netdev);
2636 struct i40e_pf *pf = np->vsi->back;
2637 u16 swc_old = pf->sw_int_count;
2638
2639 netif_info(pf, hw, netdev, "interrupt test\n");
2640 wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
2641 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
2642 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
2643 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
2644 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
2645 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
2646 usleep_range(1000, 2000);
2647 *data = (swc_old == pf->sw_int_count);
2648
2649 return *data;
2650}
2651
2652static inline bool i40e_active_vfs(struct i40e_pf *pf)
2653{
2654 struct i40e_vf *vfs = pf->vf;
2655 int i;
2656
2657 for (i = 0; i < pf->num_alloc_vfs; i++)
2658 if (test_bit(I40E_VF_STATE_ACTIVE, &vfs[i].vf_states))
2659 return true;
2660 return false;
2661}
2662
2663static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
2664{
2665 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
2666}
2667
2668static void i40e_diag_test(struct net_device *netdev,
2669 struct ethtool_test *eth_test, u64 *data)
2670{
2671 struct i40e_netdev_priv *np = netdev_priv(netdev);
2672 bool if_running = netif_running(netdev);
2673 struct i40e_pf *pf = np->vsi->back;
2674
2675 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
2676 /* Offline tests */
2677 netif_info(pf, drv, netdev, "offline testing starting\n");
2678
2679 set_bit(__I40E_TESTING, pf->state);
2680
2681 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
2682 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state)) {
2683 dev_warn(&pf->pdev->dev,
2684 "Cannot start offline testing when PF is in reset state.\n");
2685 goto skip_ol_tests;
2686 }
2687
2688 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
2689 dev_warn(&pf->pdev->dev,
2690 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
2691 goto skip_ol_tests;
2692 }
2693
2694 /* If the device is online then take it offline */
2695 if (if_running)
2696 /* indicate we're in test mode */
2697 i40e_close(netdev);
2698 else
2699 /* This reset does not affect link - if it is
2700 * changed to a type of reset that does affect
2701 * link then the following link test would have
2702 * to be moved to before the reset
2703 */
2704 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2705
2706 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2707 eth_test->flags |= ETH_TEST_FL_FAILED;
2708
2709 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
2710 eth_test->flags |= ETH_TEST_FL_FAILED;
2711
2712 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
2713 eth_test->flags |= ETH_TEST_FL_FAILED;
2714
2715 /* run reg test last, a reset is required after it */
2716 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
2717 eth_test->flags |= ETH_TEST_FL_FAILED;
2718
2719 clear_bit(__I40E_TESTING, pf->state);
2720 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED), true);
2721
2722 if (if_running)
2723 i40e_open(netdev);
2724 } else {
2725 /* Online tests */
2726 netif_info(pf, drv, netdev, "online testing starting\n");
2727
2728 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
2729 eth_test->flags |= ETH_TEST_FL_FAILED;
2730
2731 /* Offline only tests, not run in online; pass by default */
2732 data[I40E_ETH_TEST_REG] = 0;
2733 data[I40E_ETH_TEST_EEPROM] = 0;
2734 data[I40E_ETH_TEST_INTR] = 0;
2735 }
2736
2737 netif_info(pf, drv, netdev, "testing finished\n");
2738 return;
2739
2740skip_ol_tests:
2741 data[I40E_ETH_TEST_REG] = 1;
2742 data[I40E_ETH_TEST_EEPROM] = 1;
2743 data[I40E_ETH_TEST_INTR] = 1;
2744 data[I40E_ETH_TEST_LINK] = 1;
2745 eth_test->flags |= ETH_TEST_FL_FAILED;
2746 clear_bit(__I40E_TESTING, pf->state);
2747 netif_info(pf, drv, netdev, "testing failed\n");
2748}
2749
2750static void i40e_get_wol(struct net_device *netdev,
2751 struct ethtool_wolinfo *wol)
2752{
2753 struct i40e_netdev_priv *np = netdev_priv(netdev);
2754 struct i40e_pf *pf = np->vsi->back;
2755 struct i40e_hw *hw = &pf->hw;
2756 u16 wol_nvm_bits;
2757
2758 /* NVM bit on means WoL disabled for the port */
2759 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2760 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
2761 wol->supported = 0;
2762 wol->wolopts = 0;
2763 } else {
2764 wol->supported = WAKE_MAGIC;
2765 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
2766 }
2767}
2768
2769/**
2770 * i40e_set_wol - set the WakeOnLAN configuration
2771 * @netdev: the netdev in question
2772 * @wol: the ethtool WoL setting data
2773 **/
2774static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
2775{
2776 struct i40e_netdev_priv *np = netdev_priv(netdev);
2777 struct i40e_pf *pf = np->vsi->back;
2778 struct i40e_vsi *vsi = np->vsi;
2779 struct i40e_hw *hw = &pf->hw;
2780 u16 wol_nvm_bits;
2781
2782 /* WoL not supported if this isn't the controlling PF on the port */
2783 if (hw->partition_id != 1) {
2784 i40e_partition_setting_complaint(pf);
2785 return -EOPNOTSUPP;
2786 }
2787
2788 if (vsi->type != I40E_VSI_MAIN)
2789 return -EOPNOTSUPP;
2790
2791 /* NVM bit on means WoL disabled for the port */
2792 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
2793 if (BIT(hw->port) & wol_nvm_bits)
2794 return -EOPNOTSUPP;
2795
2796 /* only magic packet is supported */
2797 if (wol->wolopts & ~WAKE_MAGIC)
2798 return -EOPNOTSUPP;
2799
2800 /* is this a new value? */
2801 if (pf->wol_en != !!wol->wolopts) {
2802 pf->wol_en = !!wol->wolopts;
2803 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
2804 }
2805
2806 return 0;
2807}
2808
2809static int i40e_set_phys_id(struct net_device *netdev,
2810 enum ethtool_phys_id_state state)
2811{
2812 struct i40e_netdev_priv *np = netdev_priv(netdev);
2813 struct i40e_pf *pf = np->vsi->back;
2814 struct i40e_hw *hw = &pf->hw;
2815 int blink_freq = 2;
2816 u16 temp_status;
2817 int ret = 0;
2818
2819 switch (state) {
2820 case ETHTOOL_ID_ACTIVE:
2821 if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps)) {
2822 pf->led_status = i40e_led_get(hw);
2823 } else {
2824 if (!test_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps))
2825 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL,
2826 NULL);
2827 ret = i40e_led_get_phy(hw, &temp_status,
2828 &pf->phy_led_val);
2829 pf->led_status = temp_status;
2830 }
2831 return blink_freq;
2832 case ETHTOOL_ID_ON:
2833 if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps))
2834 i40e_led_set(hw, 0xf, false);
2835 else
2836 ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
2837 break;
2838 case ETHTOOL_ID_OFF:
2839 if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps))
2840 i40e_led_set(hw, 0x0, false);
2841 else
2842 ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
2843 break;
2844 case ETHTOOL_ID_INACTIVE:
2845 if (!test_bit(I40E_HW_CAP_PHY_CONTROLS_LEDS, pf->hw.caps)) {
2846 i40e_led_set(hw, pf->led_status, false);
2847 } else {
2848 ret = i40e_led_set_phy(hw, false, pf->led_status,
2849 (pf->phy_led_val |
2850 I40E_PHY_LED_MODE_ORIG));
2851 if (!test_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps))
2852 i40e_aq_set_phy_debug(hw, 0, NULL);
2853 }
2854 break;
2855 default:
2856 break;
2857 }
2858 if (ret)
2859 return -ENOENT;
2860 else
2861 return 0;
2862}
2863
2864/* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
2865 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
2866 * 125us (8000 interrupts per second) == ITR(62)
2867 */
2868
2869/**
2870 * __i40e_get_coalesce - get per-queue coalesce settings
2871 * @netdev: the netdev to check
2872 * @ec: ethtool coalesce data structure
2873 * @queue: which queue to pick
2874 *
2875 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
2876 * are per queue. If queue is <0 then we default to queue 0 as the
2877 * representative value.
2878 **/
2879static int __i40e_get_coalesce(struct net_device *netdev,
2880 struct ethtool_coalesce *ec,
2881 int queue)
2882{
2883 struct i40e_netdev_priv *np = netdev_priv(netdev);
2884 struct i40e_ring *rx_ring, *tx_ring;
2885 struct i40e_vsi *vsi = np->vsi;
2886
2887 ec->tx_max_coalesced_frames_irq = vsi->work_limit;
2888
2889 /* rx and tx usecs has per queue value. If user doesn't specify the
2890 * queue, return queue 0's value to represent.
2891 */
2892 if (queue < 0)
2893 queue = 0;
2894 else if (queue >= vsi->num_queue_pairs)
2895 return -EINVAL;
2896
2897 rx_ring = vsi->rx_rings[queue];
2898 tx_ring = vsi->tx_rings[queue];
2899
2900 if (ITR_IS_DYNAMIC(rx_ring->itr_setting))
2901 ec->use_adaptive_rx_coalesce = 1;
2902
2903 if (ITR_IS_DYNAMIC(tx_ring->itr_setting))
2904 ec->use_adaptive_tx_coalesce = 1;
2905
2906 ec->rx_coalesce_usecs = rx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2907 ec->tx_coalesce_usecs = tx_ring->itr_setting & ~I40E_ITR_DYNAMIC;
2908
2909 /* we use the _usecs_high to store/set the interrupt rate limit
2910 * that the hardware supports, that almost but not quite
2911 * fits the original intent of the ethtool variable,
2912 * the rx_coalesce_usecs_high limits total interrupts
2913 * per second from both tx/rx sources.
2914 */
2915 ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2916 ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2917
2918 return 0;
2919}
2920
2921/**
2922 * i40e_get_coalesce - get a netdev's coalesce settings
2923 * @netdev: the netdev to check
2924 * @ec: ethtool coalesce data structure
2925 * @kernel_coal: ethtool CQE mode setting structure
2926 * @extack: extack for reporting error messages
2927 *
2928 * Gets the coalesce settings for a particular netdev. Note that if user has
2929 * modified per-queue settings, this only guarantees to represent queue 0. See
2930 * __i40e_get_coalesce for more details.
2931 **/
2932static int i40e_get_coalesce(struct net_device *netdev,
2933 struct ethtool_coalesce *ec,
2934 struct kernel_ethtool_coalesce *kernel_coal,
2935 struct netlink_ext_ack *extack)
2936{
2937 return __i40e_get_coalesce(netdev, ec, -1);
2938}
2939
2940/**
2941 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2942 * @netdev: netdev structure
2943 * @ec: ethtool's coalesce settings
2944 * @queue: the particular queue to read
2945 *
2946 * Will read a specific queue's coalesce settings
2947 **/
2948static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2949 struct ethtool_coalesce *ec)
2950{
2951 return __i40e_get_coalesce(netdev, ec, queue);
2952}
2953
2954/**
2955 * i40e_set_itr_per_queue - set ITR values for specific queue
2956 * @vsi: the VSI to set values for
2957 * @ec: coalesce settings from ethtool
2958 * @queue: the queue to modify
2959 *
2960 * Change the ITR settings for a specific queue.
2961 **/
2962static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2963 struct ethtool_coalesce *ec,
2964 int queue)
2965{
2966 struct i40e_ring *rx_ring = vsi->rx_rings[queue];
2967 struct i40e_ring *tx_ring = vsi->tx_rings[queue];
2968 struct i40e_pf *pf = vsi->back;
2969 struct i40e_hw *hw = &pf->hw;
2970 struct i40e_q_vector *q_vector;
2971 u16 intrl;
2972
2973 intrl = i40e_intrl_usec_to_reg(vsi->int_rate_limit);
2974
2975 rx_ring->itr_setting = ITR_REG_ALIGN(ec->rx_coalesce_usecs);
2976 tx_ring->itr_setting = ITR_REG_ALIGN(ec->tx_coalesce_usecs);
2977
2978 if (ec->use_adaptive_rx_coalesce)
2979 rx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2980 else
2981 rx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2982
2983 if (ec->use_adaptive_tx_coalesce)
2984 tx_ring->itr_setting |= I40E_ITR_DYNAMIC;
2985 else
2986 tx_ring->itr_setting &= ~I40E_ITR_DYNAMIC;
2987
2988 q_vector = rx_ring->q_vector;
2989 q_vector->rx.target_itr = ITR_TO_REG(rx_ring->itr_setting);
2990
2991 q_vector = tx_ring->q_vector;
2992 q_vector->tx.target_itr = ITR_TO_REG(tx_ring->itr_setting);
2993
2994 /* The interrupt handler itself will take care of programming
2995 * the Tx and Rx ITR values based on the values we have entered
2996 * into the q_vector, no need to write the values now.
2997 */
2998
2999 wr32(hw, I40E_PFINT_RATEN(q_vector->reg_idx), intrl);
3000 i40e_flush(hw);
3001}
3002
3003/**
3004 * __i40e_set_coalesce - set coalesce settings for particular queue
3005 * @netdev: the netdev to change
3006 * @ec: ethtool coalesce settings
3007 * @queue: the queue to change
3008 *
3009 * Sets the coalesce settings for a particular queue.
3010 **/
3011static int __i40e_set_coalesce(struct net_device *netdev,
3012 struct ethtool_coalesce *ec,
3013 int queue)
3014{
3015 struct i40e_netdev_priv *np = netdev_priv(netdev);
3016 u16 intrl_reg, cur_rx_itr, cur_tx_itr;
3017 struct i40e_vsi *vsi = np->vsi;
3018 struct i40e_pf *pf = vsi->back;
3019 int i;
3020
3021 if (ec->tx_max_coalesced_frames_irq)
3022 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
3023
3024 if (queue < 0) {
3025 cur_rx_itr = vsi->rx_rings[0]->itr_setting;
3026 cur_tx_itr = vsi->tx_rings[0]->itr_setting;
3027 } else if (queue < vsi->num_queue_pairs) {
3028 cur_rx_itr = vsi->rx_rings[queue]->itr_setting;
3029 cur_tx_itr = vsi->tx_rings[queue]->itr_setting;
3030 } else {
3031 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
3032 vsi->num_queue_pairs - 1);
3033 return -EINVAL;
3034 }
3035
3036 cur_tx_itr &= ~I40E_ITR_DYNAMIC;
3037 cur_rx_itr &= ~I40E_ITR_DYNAMIC;
3038
3039 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
3040 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
3041 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
3042 return -EINVAL;
3043 }
3044
3045 if (ec->rx_coalesce_usecs_high > INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
3046 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-%lu\n",
3047 INTRL_REG_TO_USEC(I40E_MAX_INTRL));
3048 return -EINVAL;
3049 }
3050
3051 if (ec->rx_coalesce_usecs != cur_rx_itr &&
3052 ec->use_adaptive_rx_coalesce) {
3053 netif_info(pf, drv, netdev, "RX interrupt moderation cannot be changed if adaptive-rx is enabled.\n");
3054 return -EINVAL;
3055 }
3056
3057 if (ec->rx_coalesce_usecs > I40E_MAX_ITR) {
3058 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
3059 return -EINVAL;
3060 }
3061
3062 if (ec->tx_coalesce_usecs != cur_tx_itr &&
3063 ec->use_adaptive_tx_coalesce) {
3064 netif_info(pf, drv, netdev, "TX interrupt moderation cannot be changed if adaptive-tx is enabled.\n");
3065 return -EINVAL;
3066 }
3067
3068 if (ec->tx_coalesce_usecs > I40E_MAX_ITR) {
3069 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
3070 return -EINVAL;
3071 }
3072
3073 if (ec->use_adaptive_rx_coalesce && !cur_rx_itr)
3074 ec->rx_coalesce_usecs = I40E_MIN_ITR;
3075
3076 if (ec->use_adaptive_tx_coalesce && !cur_tx_itr)
3077 ec->tx_coalesce_usecs = I40E_MIN_ITR;
3078
3079 intrl_reg = i40e_intrl_usec_to_reg(ec->rx_coalesce_usecs_high);
3080 vsi->int_rate_limit = INTRL_REG_TO_USEC(intrl_reg);
3081 if (vsi->int_rate_limit != ec->rx_coalesce_usecs_high) {
3082 netif_info(pf, drv, netdev, "Interrupt rate limit rounded down to %d\n",
3083 vsi->int_rate_limit);
3084 }
3085
3086 /* rx and tx usecs has per queue value. If user doesn't specify the
3087 * queue, apply to all queues.
3088 */
3089 if (queue < 0) {
3090 for (i = 0; i < vsi->num_queue_pairs; i++)
3091 i40e_set_itr_per_queue(vsi, ec, i);
3092 } else {
3093 i40e_set_itr_per_queue(vsi, ec, queue);
3094 }
3095
3096 return 0;
3097}
3098
3099/**
3100 * i40e_set_coalesce - set coalesce settings for every queue on the netdev
3101 * @netdev: the netdev to change
3102 * @ec: ethtool coalesce settings
3103 * @kernel_coal: ethtool CQE mode setting structure
3104 * @extack: extack for reporting error messages
3105 *
3106 * This will set each queue to the same coalesce settings.
3107 **/
3108static int i40e_set_coalesce(struct net_device *netdev,
3109 struct ethtool_coalesce *ec,
3110 struct kernel_ethtool_coalesce *kernel_coal,
3111 struct netlink_ext_ack *extack)
3112{
3113 return __i40e_set_coalesce(netdev, ec, -1);
3114}
3115
3116/**
3117 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
3118 * @netdev: the netdev to change
3119 * @ec: ethtool's coalesce settings
3120 * @queue: the queue to change
3121 *
3122 * Sets the specified queue's coalesce settings.
3123 **/
3124static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
3125 struct ethtool_coalesce *ec)
3126{
3127 return __i40e_set_coalesce(netdev, ec, queue);
3128}
3129
3130/**
3131 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
3132 * @pf: pointer to the physical function struct
3133 * @cmd: ethtool rxnfc command
3134 *
3135 * Returns Success if the flow is supported, else Invalid Input.
3136 **/
3137static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
3138{
3139 struct i40e_hw *hw = &pf->hw;
3140 u8 flow_pctype = 0;
3141 u64 i_set = 0;
3142
3143 cmd->data = 0;
3144
3145 switch (cmd->flow_type) {
3146 case TCP_V4_FLOW:
3147 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3148 break;
3149 case UDP_V4_FLOW:
3150 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3151 break;
3152 case TCP_V6_FLOW:
3153 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
3154 break;
3155 case UDP_V6_FLOW:
3156 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
3157 break;
3158 case SCTP_V4_FLOW:
3159 case AH_ESP_V4_FLOW:
3160 case AH_V4_FLOW:
3161 case ESP_V4_FLOW:
3162 case IPV4_FLOW:
3163 case SCTP_V6_FLOW:
3164 case AH_ESP_V6_FLOW:
3165 case AH_V6_FLOW:
3166 case ESP_V6_FLOW:
3167 case IPV6_FLOW:
3168 /* Default is src/dest for IP, no matter the L4 hashing */
3169 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
3170 break;
3171 default:
3172 return -EINVAL;
3173 }
3174
3175 /* Read flow based hash input set register */
3176 if (flow_pctype) {
3177 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
3178 flow_pctype)) |
3179 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
3180 flow_pctype)) << 32);
3181 }
3182
3183 /* Process bits of hash input set */
3184 if (i_set) {
3185 if (i_set & I40E_L4_SRC_MASK)
3186 cmd->data |= RXH_L4_B_0_1;
3187 if (i_set & I40E_L4_DST_MASK)
3188 cmd->data |= RXH_L4_B_2_3;
3189
3190 if (cmd->flow_type == TCP_V4_FLOW ||
3191 cmd->flow_type == UDP_V4_FLOW) {
3192 if (hw->mac.type == I40E_MAC_X722) {
3193 if (i_set & I40E_X722_L3_SRC_MASK)
3194 cmd->data |= RXH_IP_SRC;
3195 if (i_set & I40E_X722_L3_DST_MASK)
3196 cmd->data |= RXH_IP_DST;
3197 } else {
3198 if (i_set & I40E_L3_SRC_MASK)
3199 cmd->data |= RXH_IP_SRC;
3200 if (i_set & I40E_L3_DST_MASK)
3201 cmd->data |= RXH_IP_DST;
3202 }
3203 } else if (cmd->flow_type == TCP_V6_FLOW ||
3204 cmd->flow_type == UDP_V6_FLOW) {
3205 if (i_set & I40E_L3_V6_SRC_MASK)
3206 cmd->data |= RXH_IP_SRC;
3207 if (i_set & I40E_L3_V6_DST_MASK)
3208 cmd->data |= RXH_IP_DST;
3209 }
3210 }
3211
3212 return 0;
3213}
3214
3215/**
3216 * i40e_check_mask - Check whether a mask field is set
3217 * @mask: the full mask value
3218 * @field: mask of the field to check
3219 *
3220 * If the given mask is fully set, return positive value. If the mask for the
3221 * field is fully unset, return zero. Otherwise return a negative error code.
3222 **/
3223static int i40e_check_mask(u64 mask, u64 field)
3224{
3225 u64 value = mask & field;
3226
3227 if (value == field)
3228 return 1;
3229 else if (!value)
3230 return 0;
3231 else
3232 return -1;
3233}
3234
3235/**
3236 * i40e_parse_rx_flow_user_data - Deconstruct user-defined data
3237 * @fsp: pointer to rx flow specification
3238 * @data: pointer to userdef data structure for storage
3239 *
3240 * Read the user-defined data and deconstruct the value into a structure. No
3241 * other code should read the user-defined data, so as to ensure that every
3242 * place consistently reads the value correctly.
3243 *
3244 * The user-defined field is a 64bit Big Endian format value, which we
3245 * deconstruct by reading bits or bit fields from it. Single bit flags shall
3246 * be defined starting from the highest bits, while small bit field values
3247 * shall be defined starting from the lowest bits.
3248 *
3249 * Returns 0 if the data is valid, and non-zero if the userdef data is invalid
3250 * and the filter should be rejected. The data structure will always be
3251 * modified even if FLOW_EXT is not set.
3252 *
3253 **/
3254static int i40e_parse_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3255 struct i40e_rx_flow_userdef *data)
3256{
3257 u64 value, mask;
3258 int valid;
3259
3260 /* Zero memory first so it's always consistent. */
3261 memset(data, 0, sizeof(*data));
3262
3263 if (!(fsp->flow_type & FLOW_EXT))
3264 return 0;
3265
3266 value = be64_to_cpu(*((__be64 *)fsp->h_ext.data));
3267 mask = be64_to_cpu(*((__be64 *)fsp->m_ext.data));
3268
3269#define I40E_USERDEF_FLEX_WORD GENMASK_ULL(15, 0)
3270#define I40E_USERDEF_FLEX_OFFSET GENMASK_ULL(31, 16)
3271#define I40E_USERDEF_FLEX_FILTER GENMASK_ULL(31, 0)
3272
3273 valid = i40e_check_mask(mask, I40E_USERDEF_FLEX_FILTER);
3274 if (valid < 0) {
3275 return -EINVAL;
3276 } else if (valid) {
3277 data->flex_word = value & I40E_USERDEF_FLEX_WORD;
3278 data->flex_offset =
3279 FIELD_GET(I40E_USERDEF_FLEX_OFFSET, value);
3280 data->flex_filter = true;
3281 }
3282
3283 return 0;
3284}
3285
3286/**
3287 * i40e_fill_rx_flow_user_data - Fill in user-defined data field
3288 * @fsp: pointer to rx_flow specification
3289 * @data: pointer to return userdef data
3290 *
3291 * Reads the userdef data structure and properly fills in the user defined
3292 * fields of the rx_flow_spec.
3293 **/
3294static void i40e_fill_rx_flow_user_data(struct ethtool_rx_flow_spec *fsp,
3295 struct i40e_rx_flow_userdef *data)
3296{
3297 u64 value = 0, mask = 0;
3298
3299 if (data->flex_filter) {
3300 value |= data->flex_word;
3301 value |= (u64)data->flex_offset << 16;
3302 mask |= I40E_USERDEF_FLEX_FILTER;
3303 }
3304
3305 if (value || mask)
3306 fsp->flow_type |= FLOW_EXT;
3307
3308 *((__be64 *)fsp->h_ext.data) = cpu_to_be64(value);
3309 *((__be64 *)fsp->m_ext.data) = cpu_to_be64(mask);
3310}
3311
3312/**
3313 * i40e_get_ethtool_fdir_all - Populates the rule count of a command
3314 * @pf: Pointer to the physical function struct
3315 * @cmd: The command to get or set Rx flow classification rules
3316 * @rule_locs: Array of used rule locations
3317 *
3318 * This function populates both the total and actual rule count of
3319 * the ethtool flow classification command
3320 *
3321 * Returns 0 on success or -EMSGSIZE if entry not found
3322 **/
3323static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
3324 struct ethtool_rxnfc *cmd,
3325 u32 *rule_locs)
3326{
3327 struct i40e_fdir_filter *rule;
3328 struct hlist_node *node2;
3329 int cnt = 0;
3330
3331 /* report total rule count */
3332 cmd->data = i40e_get_fd_cnt_all(pf);
3333
3334 hlist_for_each_entry_safe(rule, node2,
3335 &pf->fdir_filter_list, fdir_node) {
3336 if (cnt == cmd->rule_cnt)
3337 return -EMSGSIZE;
3338
3339 rule_locs[cnt] = rule->fd_id;
3340 cnt++;
3341 }
3342
3343 cmd->rule_cnt = cnt;
3344
3345 return 0;
3346}
3347
3348/**
3349 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
3350 * @pf: Pointer to the physical function struct
3351 * @cmd: The command to get or set Rx flow classification rules
3352 *
3353 * This function looks up a filter based on the Rx flow classification
3354 * command and fills the flow spec info for it if found
3355 *
3356 * Returns 0 on success or -EINVAL if filter not found
3357 **/
3358static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
3359 struct ethtool_rxnfc *cmd)
3360{
3361 struct ethtool_rx_flow_spec *fsp =
3362 (struct ethtool_rx_flow_spec *)&cmd->fs;
3363 struct i40e_rx_flow_userdef userdef = {0};
3364 struct i40e_fdir_filter *rule = NULL;
3365 struct hlist_node *node2;
3366 struct i40e_vsi *vsi;
3367 u64 input_set;
3368 u16 index;
3369
3370 hlist_for_each_entry_safe(rule, node2,
3371 &pf->fdir_filter_list, fdir_node) {
3372 if (fsp->location <= rule->fd_id)
3373 break;
3374 }
3375
3376 if (!rule || fsp->location != rule->fd_id)
3377 return -EINVAL;
3378
3379 fsp->flow_type = rule->flow_type;
3380 if (fsp->flow_type == IP_USER_FLOW) {
3381 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
3382 fsp->h_u.usr_ip4_spec.proto = 0;
3383 fsp->m_u.usr_ip4_spec.proto = 0;
3384 }
3385
3386 if (fsp->flow_type == IPV6_USER_FLOW ||
3387 fsp->flow_type == UDP_V6_FLOW ||
3388 fsp->flow_type == TCP_V6_FLOW ||
3389 fsp->flow_type == SCTP_V6_FLOW) {
3390 /* Reverse the src and dest notion, since the HW views them
3391 * from Tx perspective where as the user expects it from
3392 * Rx filter view.
3393 */
3394 fsp->h_u.tcp_ip6_spec.psrc = rule->dst_port;
3395 fsp->h_u.tcp_ip6_spec.pdst = rule->src_port;
3396 memcpy(fsp->h_u.tcp_ip6_spec.ip6dst, rule->src_ip6,
3397 sizeof(__be32) * 4);
3398 memcpy(fsp->h_u.tcp_ip6_spec.ip6src, rule->dst_ip6,
3399 sizeof(__be32) * 4);
3400 } else {
3401 /* Reverse the src and dest notion, since the HW views them
3402 * from Tx perspective where as the user expects it from
3403 * Rx filter view.
3404 */
3405 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
3406 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
3407 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip;
3408 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip;
3409 }
3410
3411 switch (rule->flow_type) {
3412 case SCTP_V4_FLOW:
3413 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
3414 break;
3415 case TCP_V4_FLOW:
3416 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
3417 break;
3418 case UDP_V4_FLOW:
3419 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
3420 break;
3421 case SCTP_V6_FLOW:
3422 index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
3423 break;
3424 case TCP_V6_FLOW:
3425 index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
3426 break;
3427 case UDP_V6_FLOW:
3428 index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
3429 break;
3430 case IP_USER_FLOW:
3431 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
3432 break;
3433 case IPV6_USER_FLOW:
3434 index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;
3435 break;
3436 default:
3437 /* If we have stored a filter with a flow type not listed here
3438 * it is almost certainly a driver bug. WARN(), and then
3439 * assign the input_set as if all fields are enabled to avoid
3440 * reading unassigned memory.
3441 */
3442 WARN(1, "Missing input set index for flow_type %d\n",
3443 rule->flow_type);
3444 input_set = 0xFFFFFFFFFFFFFFFFULL;
3445 goto no_input_set;
3446 }
3447
3448 input_set = i40e_read_fd_input_set(pf, index);
3449
3450no_input_set:
3451 if (input_set & I40E_L3_V6_SRC_MASK) {
3452 fsp->m_u.tcp_ip6_spec.ip6src[0] = htonl(0xFFFFFFFF);
3453 fsp->m_u.tcp_ip6_spec.ip6src[1] = htonl(0xFFFFFFFF);
3454 fsp->m_u.tcp_ip6_spec.ip6src[2] = htonl(0xFFFFFFFF);
3455 fsp->m_u.tcp_ip6_spec.ip6src[3] = htonl(0xFFFFFFFF);
3456 }
3457
3458 if (input_set & I40E_L3_V6_DST_MASK) {
3459 fsp->m_u.tcp_ip6_spec.ip6dst[0] = htonl(0xFFFFFFFF);
3460 fsp->m_u.tcp_ip6_spec.ip6dst[1] = htonl(0xFFFFFFFF);
3461 fsp->m_u.tcp_ip6_spec.ip6dst[2] = htonl(0xFFFFFFFF);
3462 fsp->m_u.tcp_ip6_spec.ip6dst[3] = htonl(0xFFFFFFFF);
3463 }
3464
3465 if (input_set & I40E_L3_SRC_MASK)
3466 fsp->m_u.tcp_ip4_spec.ip4src = htonl(0xFFFFFFFF);
3467
3468 if (input_set & I40E_L3_DST_MASK)
3469 fsp->m_u.tcp_ip4_spec.ip4dst = htonl(0xFFFFFFFF);
3470
3471 if (input_set & I40E_L4_SRC_MASK)
3472 fsp->m_u.tcp_ip4_spec.psrc = htons(0xFFFF);
3473
3474 if (input_set & I40E_L4_DST_MASK)
3475 fsp->m_u.tcp_ip4_spec.pdst = htons(0xFFFF);
3476
3477 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
3478 fsp->ring_cookie = RX_CLS_FLOW_DISC;
3479 else
3480 fsp->ring_cookie = rule->q_index;
3481
3482 if (rule->vlan_tag) {
3483 fsp->h_ext.vlan_etype = rule->vlan_etype;
3484 fsp->m_ext.vlan_etype = htons(0xFFFF);
3485 fsp->h_ext.vlan_tci = rule->vlan_tag;
3486 fsp->m_ext.vlan_tci = htons(0xFFFF);
3487 fsp->flow_type |= FLOW_EXT;
3488 }
3489
3490 vsi = i40e_pf_get_main_vsi(pf);
3491 if (rule->dest_vsi != vsi->id) {
3492 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
3493 if (vsi && vsi->type == I40E_VSI_SRIOV) {
3494 /* VFs are zero-indexed by the driver, but ethtool
3495 * expects them to be one-indexed, so add one here
3496 */
3497 u64 ring_vf = vsi->vf_id + 1;
3498
3499 ring_vf <<= ETHTOOL_RX_FLOW_SPEC_RING_VF_OFF;
3500 fsp->ring_cookie |= ring_vf;
3501 }
3502 }
3503
3504 if (rule->flex_filter) {
3505 userdef.flex_filter = true;
3506 userdef.flex_word = be16_to_cpu(rule->flex_word);
3507 userdef.flex_offset = rule->flex_offset;
3508 }
3509
3510 i40e_fill_rx_flow_user_data(fsp, &userdef);
3511
3512 return 0;
3513}
3514
3515/**
3516 * i40e_get_rxnfc - command to get RX flow classification rules
3517 * @netdev: network interface device structure
3518 * @cmd: ethtool rxnfc command
3519 * @rule_locs: pointer to store rule data
3520 *
3521 * Returns Success if the command is supported.
3522 **/
3523static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
3524 u32 *rule_locs)
3525{
3526 struct i40e_netdev_priv *np = netdev_priv(netdev);
3527 struct i40e_vsi *vsi = np->vsi;
3528 struct i40e_pf *pf = vsi->back;
3529 int ret = -EOPNOTSUPP;
3530
3531 switch (cmd->cmd) {
3532 case ETHTOOL_GRXRINGS:
3533 cmd->data = vsi->rss_size;
3534 ret = 0;
3535 break;
3536 case ETHTOOL_GRXFH:
3537 ret = i40e_get_rss_hash_opts(pf, cmd);
3538 break;
3539 case ETHTOOL_GRXCLSRLCNT:
3540 cmd->rule_cnt = pf->fdir_pf_active_filters;
3541 /* report total rule count */
3542 cmd->data = i40e_get_fd_cnt_all(pf);
3543 ret = 0;
3544 break;
3545 case ETHTOOL_GRXCLSRULE:
3546 ret = i40e_get_ethtool_fdir_entry(pf, cmd);
3547 break;
3548 case ETHTOOL_GRXCLSRLALL:
3549 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
3550 break;
3551 default:
3552 break;
3553 }
3554
3555 return ret;
3556}
3557
3558/**
3559 * i40e_get_rss_hash_bits - Read RSS Hash bits from register
3560 * @hw: hw structure
3561 * @nfc: pointer to user request
3562 * @i_setc: bits currently set
3563 *
3564 * Returns value of bits to be set per user request
3565 **/
3566static u64 i40e_get_rss_hash_bits(struct i40e_hw *hw,
3567 struct ethtool_rxnfc *nfc,
3568 u64 i_setc)
3569{
3570 u64 i_set = i_setc;
3571 u64 src_l3 = 0, dst_l3 = 0;
3572
3573 if (nfc->data & RXH_L4_B_0_1)
3574 i_set |= I40E_L4_SRC_MASK;
3575 else
3576 i_set &= ~I40E_L4_SRC_MASK;
3577 if (nfc->data & RXH_L4_B_2_3)
3578 i_set |= I40E_L4_DST_MASK;
3579 else
3580 i_set &= ~I40E_L4_DST_MASK;
3581
3582 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
3583 src_l3 = I40E_L3_V6_SRC_MASK;
3584 dst_l3 = I40E_L3_V6_DST_MASK;
3585 } else if (nfc->flow_type == TCP_V4_FLOW ||
3586 nfc->flow_type == UDP_V4_FLOW) {
3587 if (hw->mac.type == I40E_MAC_X722) {
3588 src_l3 = I40E_X722_L3_SRC_MASK;
3589 dst_l3 = I40E_X722_L3_DST_MASK;
3590 } else {
3591 src_l3 = I40E_L3_SRC_MASK;
3592 dst_l3 = I40E_L3_DST_MASK;
3593 }
3594 } else {
3595 /* Any other flow type are not supported here */
3596 return i_set;
3597 }
3598
3599 if (nfc->data & RXH_IP_SRC)
3600 i_set |= src_l3;
3601 else
3602 i_set &= ~src_l3;
3603 if (nfc->data & RXH_IP_DST)
3604 i_set |= dst_l3;
3605 else
3606 i_set &= ~dst_l3;
3607
3608 return i_set;
3609}
3610
3611#define FLOW_PCTYPES_SIZE 64
3612/**
3613 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
3614 * @pf: pointer to the physical function struct
3615 * @nfc: ethtool rxnfc command
3616 *
3617 * Returns Success if the flow input set is supported.
3618 **/
3619static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
3620{
3621 struct i40e_hw *hw = &pf->hw;
3622 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
3623 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
3624 DECLARE_BITMAP(flow_pctypes, FLOW_PCTYPES_SIZE);
3625 u64 i_set, i_setc;
3626
3627 bitmap_zero(flow_pctypes, FLOW_PCTYPES_SIZE);
3628
3629 if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
3630 dev_err(&pf->pdev->dev,
3631 "Change of RSS hash input set is not supported when MFP mode is enabled\n");
3632 return -EOPNOTSUPP;
3633 }
3634
3635 /* RSS does not support anything other than hashing
3636 * to queues on src and dst IPs and ports
3637 */
3638 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
3639 RXH_L4_B_0_1 | RXH_L4_B_2_3))
3640 return -EINVAL;
3641
3642 switch (nfc->flow_type) {
3643 case TCP_V4_FLOW:
3644 set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP, flow_pctypes);
3645 if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,
3646 pf->hw.caps))
3647 set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK,
3648 flow_pctypes);
3649 break;
3650 case TCP_V6_FLOW:
3651 set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP, flow_pctypes);
3652 if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,
3653 pf->hw.caps))
3654 set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK,
3655 flow_pctypes);
3656 break;
3657 case UDP_V4_FLOW:
3658 set_bit(I40E_FILTER_PCTYPE_NONF_IPV4_UDP, flow_pctypes);
3659 if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,
3660 pf->hw.caps)) {
3661 set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP,
3662 flow_pctypes);
3663 set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP,
3664 flow_pctypes);
3665 }
3666 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3667 break;
3668 case UDP_V6_FLOW:
3669 set_bit(I40E_FILTER_PCTYPE_NONF_IPV6_UDP, flow_pctypes);
3670 if (test_bit(I40E_HW_CAP_MULTI_TCP_UDP_RSS_PCTYPE,
3671 pf->hw.caps)) {
3672 set_bit(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP,
3673 flow_pctypes);
3674 set_bit(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP,
3675 flow_pctypes);
3676 }
3677 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3678 break;
3679 case AH_ESP_V4_FLOW:
3680 case AH_V4_FLOW:
3681 case ESP_V4_FLOW:
3682 case SCTP_V4_FLOW:
3683 if ((nfc->data & RXH_L4_B_0_1) ||
3684 (nfc->data & RXH_L4_B_2_3))
3685 return -EINVAL;
3686 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
3687 break;
3688 case AH_ESP_V6_FLOW:
3689 case AH_V6_FLOW:
3690 case ESP_V6_FLOW:
3691 case SCTP_V6_FLOW:
3692 if ((nfc->data & RXH_L4_B_0_1) ||
3693 (nfc->data & RXH_L4_B_2_3))
3694 return -EINVAL;
3695 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
3696 break;
3697 case IPV4_FLOW:
3698 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
3699 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
3700 break;
3701 case IPV6_FLOW:
3702 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
3703 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
3704 break;
3705 default:
3706 return -EINVAL;
3707 }
3708
3709 if (bitmap_weight(flow_pctypes, FLOW_PCTYPES_SIZE)) {
3710 u8 flow_id;
3711
3712 for_each_set_bit(flow_id, flow_pctypes, FLOW_PCTYPES_SIZE) {
3713 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id)) |
3714 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id)) << 32);
3715 i_set = i40e_get_rss_hash_bits(&pf->hw, nfc, i_setc);
3716
3717 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_id),
3718 (u32)i_set);
3719 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_id),
3720 (u32)(i_set >> 32));
3721 hena |= BIT_ULL(flow_id);
3722 }
3723 }
3724
3725 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
3726 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
3727 i40e_flush(hw);
3728
3729 return 0;
3730}
3731
3732/**
3733 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
3734 * @vsi: Pointer to the targeted VSI
3735 * @input: The filter to update or NULL to indicate deletion
3736 * @sw_idx: Software index to the filter
3737 * @cmd: The command to get or set Rx flow classification rules
3738 *
3739 * This function updates (or deletes) a Flow Director entry from
3740 * the hlist of the corresponding PF
3741 *
3742 * Returns 0 on success
3743 **/
3744static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
3745 struct i40e_fdir_filter *input,
3746 u16 sw_idx,
3747 struct ethtool_rxnfc *cmd)
3748{
3749 struct i40e_fdir_filter *rule, *parent;
3750 struct i40e_pf *pf = vsi->back;
3751 struct hlist_node *node2;
3752 int err = -EINVAL;
3753
3754 parent = NULL;
3755 rule = NULL;
3756
3757 hlist_for_each_entry_safe(rule, node2,
3758 &pf->fdir_filter_list, fdir_node) {
3759 /* hash found, or no matching entry */
3760 if (rule->fd_id >= sw_idx)
3761 break;
3762 parent = rule;
3763 }
3764
3765 /* if there is an old rule occupying our place remove it */
3766 if (rule && (rule->fd_id == sw_idx)) {
3767 /* Remove this rule, since we're either deleting it, or
3768 * replacing it.
3769 */
3770 err = i40e_add_del_fdir(vsi, rule, false);
3771 hlist_del(&rule->fdir_node);
3772 kfree(rule);
3773 pf->fdir_pf_active_filters--;
3774 }
3775
3776 /* If we weren't given an input, this is a delete, so just return the
3777 * error code indicating if there was an entry at the requested slot
3778 */
3779 if (!input)
3780 return err;
3781
3782 /* Otherwise, install the new rule as requested */
3783 INIT_HLIST_NODE(&input->fdir_node);
3784
3785 /* add filter to the list */
3786 if (parent)
3787 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
3788 else
3789 hlist_add_head(&input->fdir_node,
3790 &pf->fdir_filter_list);
3791
3792 /* update counts */
3793 pf->fdir_pf_active_filters++;
3794
3795 return 0;
3796}
3797
3798/**
3799 * i40e_prune_flex_pit_list - Cleanup unused entries in FLX_PIT table
3800 * @pf: pointer to PF structure
3801 *
3802 * This function searches the list of filters and determines which FLX_PIT
3803 * entries are still required. It will prune any entries which are no longer
3804 * in use after the deletion.
3805 **/
3806static void i40e_prune_flex_pit_list(struct i40e_pf *pf)
3807{
3808 struct i40e_flex_pit *entry, *tmp;
3809 struct i40e_fdir_filter *rule;
3810
3811 /* First, we'll check the l3 table */
3812 list_for_each_entry_safe(entry, tmp, &pf->l3_flex_pit_list, list) {
3813 bool found = false;
3814
3815 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3816 if (rule->flow_type != IP_USER_FLOW)
3817 continue;
3818 if (rule->flex_filter &&
3819 rule->flex_offset == entry->src_offset) {
3820 found = true;
3821 break;
3822 }
3823 }
3824
3825 /* If we didn't find the filter, then we can prune this entry
3826 * from the list.
3827 */
3828 if (!found) {
3829 list_del(&entry->list);
3830 kfree(entry);
3831 }
3832 }
3833
3834 /* Followed by the L4 table */
3835 list_for_each_entry_safe(entry, tmp, &pf->l4_flex_pit_list, list) {
3836 bool found = false;
3837
3838 hlist_for_each_entry(rule, &pf->fdir_filter_list, fdir_node) {
3839 /* Skip this filter if it's L3, since we already
3840 * checked those in the above loop
3841 */
3842 if (rule->flow_type == IP_USER_FLOW)
3843 continue;
3844 if (rule->flex_filter &&
3845 rule->flex_offset == entry->src_offset) {
3846 found = true;
3847 break;
3848 }
3849 }
3850
3851 /* If we didn't find the filter, then we can prune this entry
3852 * from the list.
3853 */
3854 if (!found) {
3855 list_del(&entry->list);
3856 kfree(entry);
3857 }
3858 }
3859}
3860
3861/**
3862 * i40e_del_fdir_entry - Deletes a Flow Director filter entry
3863 * @vsi: Pointer to the targeted VSI
3864 * @cmd: The command to get or set Rx flow classification rules
3865 *
3866 * The function removes a Flow Director filter entry from the
3867 * hlist of the corresponding PF
3868 *
3869 * Returns 0 on success
3870 */
3871static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
3872 struct ethtool_rxnfc *cmd)
3873{
3874 struct ethtool_rx_flow_spec *fsp =
3875 (struct ethtool_rx_flow_spec *)&cmd->fs;
3876 struct i40e_pf *pf = vsi->back;
3877 int ret = 0;
3878
3879 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
3880 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
3881 return -EBUSY;
3882
3883 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
3884 return -EBUSY;
3885
3886 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
3887
3888 i40e_prune_flex_pit_list(pf);
3889
3890 i40e_fdir_check_and_reenable(pf);
3891 return ret;
3892}
3893
3894/**
3895 * i40e_unused_pit_index - Find an unused PIT index for given list
3896 * @pf: the PF data structure
3897 *
3898 * Find the first unused flexible PIT index entry. We search both the L3 and
3899 * L4 flexible PIT lists so that the returned index is unique and unused by
3900 * either currently programmed L3 or L4 filters. We use a bit field as storage
3901 * to track which indexes are already used.
3902 **/
3903static u8 i40e_unused_pit_index(struct i40e_pf *pf)
3904{
3905 unsigned long available_index = 0xFF;
3906 struct i40e_flex_pit *entry;
3907
3908 /* We need to make sure that the new index isn't in use by either L3
3909 * or L4 filters so that IP_USER_FLOW filters can program both L3 and
3910 * L4 to use the same index.
3911 */
3912
3913 list_for_each_entry(entry, &pf->l4_flex_pit_list, list)
3914 clear_bit(entry->pit_index, &available_index);
3915
3916 list_for_each_entry(entry, &pf->l3_flex_pit_list, list)
3917 clear_bit(entry->pit_index, &available_index);
3918
3919 return find_first_bit(&available_index, 8);
3920}
3921
3922/**
3923 * i40e_find_flex_offset - Find an existing flex src_offset
3924 * @flex_pit_list: L3 or L4 flex PIT list
3925 * @src_offset: new src_offset to find
3926 *
3927 * Searches the flex_pit_list for an existing offset. If no offset is
3928 * currently programmed, then this will return an ERR_PTR if there is no space
3929 * to add a new offset, otherwise it returns NULL.
3930 **/
3931static
3932struct i40e_flex_pit *i40e_find_flex_offset(struct list_head *flex_pit_list,
3933 u16 src_offset)
3934{
3935 struct i40e_flex_pit *entry;
3936 int size = 0;
3937
3938 /* Search for the src_offset first. If we find a matching entry
3939 * already programmed, we can simply re-use it.
3940 */
3941 list_for_each_entry(entry, flex_pit_list, list) {
3942 size++;
3943 if (entry->src_offset == src_offset)
3944 return entry;
3945 }
3946
3947 /* If we haven't found an entry yet, then the provided src offset has
3948 * not yet been programmed. We will program the src offset later on,
3949 * but we need to indicate whether there is enough space to do so
3950 * here. We'll make use of ERR_PTR for this purpose.
3951 */
3952 if (size >= I40E_FLEX_PIT_TABLE_SIZE)
3953 return ERR_PTR(-ENOSPC);
3954
3955 return NULL;
3956}
3957
3958/**
3959 * i40e_add_flex_offset - Add src_offset to flex PIT table list
3960 * @flex_pit_list: L3 or L4 flex PIT list
3961 * @src_offset: new src_offset to add
3962 * @pit_index: the PIT index to program
3963 *
3964 * This function programs the new src_offset to the list. It is expected that
3965 * i40e_find_flex_offset has already been tried and returned NULL, indicating
3966 * that this offset is not programmed, and that the list has enough space to
3967 * store another offset.
3968 *
3969 * Returns 0 on success, and negative value on error.
3970 **/
3971static int i40e_add_flex_offset(struct list_head *flex_pit_list,
3972 u16 src_offset,
3973 u8 pit_index)
3974{
3975 struct i40e_flex_pit *new_pit, *entry;
3976
3977 new_pit = kzalloc(sizeof(*entry), GFP_KERNEL);
3978 if (!new_pit)
3979 return -ENOMEM;
3980
3981 new_pit->src_offset = src_offset;
3982 new_pit->pit_index = pit_index;
3983
3984 /* We need to insert this item such that the list is sorted by
3985 * src_offset in ascending order.
3986 */
3987 list_for_each_entry(entry, flex_pit_list, list) {
3988 if (new_pit->src_offset < entry->src_offset) {
3989 list_add_tail(&new_pit->list, &entry->list);
3990 return 0;
3991 }
3992
3993 /* If we found an entry with our offset already programmed we
3994 * can simply return here, after freeing the memory. However,
3995 * if the pit_index does not match we need to report an error.
3996 */
3997 if (new_pit->src_offset == entry->src_offset) {
3998 int err = 0;
3999
4000 /* If the PIT index is not the same we can't re-use
4001 * the entry, so we must report an error.
4002 */
4003 if (new_pit->pit_index != entry->pit_index)
4004 err = -EINVAL;
4005
4006 kfree(new_pit);
4007 return err;
4008 }
4009 }
4010
4011 /* If we reached here, then we haven't yet added the item. This means
4012 * that we should add the item at the end of the list.
4013 */
4014 list_add_tail(&new_pit->list, flex_pit_list);
4015 return 0;
4016}
4017
4018/**
4019 * __i40e_reprogram_flex_pit - Re-program specific FLX_PIT table
4020 * @pf: Pointer to the PF structure
4021 * @flex_pit_list: list of flexible src offsets in use
4022 * @flex_pit_start: index to first entry for this section of the table
4023 *
4024 * In order to handle flexible data, the hardware uses a table of values
4025 * called the FLX_PIT table. This table is used to indicate which sections of
4026 * the input correspond to what PIT index values. Unfortunately, hardware is
4027 * very restrictive about programming this table. Entries must be ordered by
4028 * src_offset in ascending order, without duplicates. Additionally, unused
4029 * entries must be set to the unused index value, and must have valid size and
4030 * length according to the src_offset ordering.
4031 *
4032 * This function will reprogram the FLX_PIT register from a book-keeping
4033 * structure that we guarantee is already ordered correctly, and has no more
4034 * than 3 entries.
4035 *
4036 * To make things easier, we only support flexible values of one word length,
4037 * rather than allowing variable length flexible values.
4038 **/
4039static void __i40e_reprogram_flex_pit(struct i40e_pf *pf,
4040 struct list_head *flex_pit_list,
4041 int flex_pit_start)
4042{
4043 struct i40e_flex_pit *entry = NULL;
4044 u16 last_offset = 0;
4045 int i = 0, j = 0;
4046
4047 /* First, loop over the list of flex PIT entries, and reprogram the
4048 * registers.
4049 */
4050 list_for_each_entry(entry, flex_pit_list, list) {
4051 /* We have to be careful when programming values for the
4052 * largest SRC_OFFSET value. It is possible that adding
4053 * additional empty values at the end would overflow the space
4054 * for the SRC_OFFSET in the FLX_PIT register. To avoid this,
4055 * we check here and add the empty values prior to adding the
4056 * largest value.
4057 *
4058 * To determine this, we will use a loop from i+1 to 3, which
4059 * will determine whether the unused entries would have valid
4060 * SRC_OFFSET. Note that there cannot be extra entries past
4061 * this value, because the only valid values would have been
4062 * larger than I40E_MAX_FLEX_SRC_OFFSET, and thus would not
4063 * have been added to the list in the first place.
4064 */
4065 for (j = i + 1; j < 3; j++) {
4066 u16 offset = entry->src_offset + j;
4067 int index = flex_pit_start + i;
4068 u32 value = I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
4069 1,
4070 offset - 3);
4071
4072 if (offset > I40E_MAX_FLEX_SRC_OFFSET) {
4073 i40e_write_rx_ctl(&pf->hw,
4074 I40E_PRTQF_FLX_PIT(index),
4075 value);
4076 i++;
4077 }
4078 }
4079
4080 /* Now, we can program the actual value into the table */
4081 i40e_write_rx_ctl(&pf->hw,
4082 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
4083 I40E_FLEX_PREP_VAL(entry->pit_index + 50,
4084 1,
4085 entry->src_offset));
4086 i++;
4087 }
4088
4089 /* In order to program the last entries in the table, we need to
4090 * determine the valid offset. If the list is empty, we'll just start
4091 * with 0. Otherwise, we'll start with the last item offset and add 1.
4092 * This ensures that all entries have valid sizes. If we don't do this
4093 * correctly, the hardware will disable flexible field parsing.
4094 */
4095 if (!list_empty(flex_pit_list))
4096 last_offset = list_prev_entry(entry, list)->src_offset + 1;
4097
4098 for (; i < 3; i++, last_offset++) {
4099 i40e_write_rx_ctl(&pf->hw,
4100 I40E_PRTQF_FLX_PIT(flex_pit_start + i),
4101 I40E_FLEX_PREP_VAL(I40E_FLEX_DEST_UNUSED,
4102 1,
4103 last_offset));
4104 }
4105}
4106
4107/**
4108 * i40e_reprogram_flex_pit - Reprogram all FLX_PIT tables after input set change
4109 * @pf: pointer to the PF structure
4110 *
4111 * This function reprograms both the L3 and L4 FLX_PIT tables. See the
4112 * internal helper function for implementation details.
4113 **/
4114static void i40e_reprogram_flex_pit(struct i40e_pf *pf)
4115{
4116 __i40e_reprogram_flex_pit(pf, &pf->l3_flex_pit_list,
4117 I40E_FLEX_PIT_IDX_START_L3);
4118
4119 __i40e_reprogram_flex_pit(pf, &pf->l4_flex_pit_list,
4120 I40E_FLEX_PIT_IDX_START_L4);
4121
4122 /* We also need to program the L3 and L4 GLQF ORT register */
4123 i40e_write_rx_ctl(&pf->hw,
4124 I40E_GLQF_ORT(I40E_L3_GLQF_ORT_IDX),
4125 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L3,
4126 3, 1));
4127
4128 i40e_write_rx_ctl(&pf->hw,
4129 I40E_GLQF_ORT(I40E_L4_GLQF_ORT_IDX),
4130 I40E_ORT_PREP_VAL(I40E_FLEX_PIT_IDX_START_L4,
4131 3, 1));
4132}
4133
4134/**
4135 * i40e_flow_str - Converts a flow_type into a human readable string
4136 * @fsp: the flow specification
4137 *
4138 * Currently only flow types we support are included here, and the string
4139 * value attempts to match what ethtool would use to configure this flow type.
4140 **/
4141static const char *i40e_flow_str(struct ethtool_rx_flow_spec *fsp)
4142{
4143 switch (fsp->flow_type & ~FLOW_EXT) {
4144 case TCP_V4_FLOW:
4145 return "tcp4";
4146 case UDP_V4_FLOW:
4147 return "udp4";
4148 case SCTP_V4_FLOW:
4149 return "sctp4";
4150 case IP_USER_FLOW:
4151 return "ip4";
4152 case TCP_V6_FLOW:
4153 return "tcp6";
4154 case UDP_V6_FLOW:
4155 return "udp6";
4156 case SCTP_V6_FLOW:
4157 return "sctp6";
4158 case IPV6_USER_FLOW:
4159 return "ip6";
4160 default:
4161 return "unknown";
4162 }
4163}
4164
4165/**
4166 * i40e_pit_index_to_mask - Return the FLEX mask for a given PIT index
4167 * @pit_index: PIT index to convert
4168 *
4169 * Returns the mask for a given PIT index. Will return 0 if the pit_index is
4170 * of range.
4171 **/
4172static u64 i40e_pit_index_to_mask(int pit_index)
4173{
4174 switch (pit_index) {
4175 case 0:
4176 return I40E_FLEX_50_MASK;
4177 case 1:
4178 return I40E_FLEX_51_MASK;
4179 case 2:
4180 return I40E_FLEX_52_MASK;
4181 case 3:
4182 return I40E_FLEX_53_MASK;
4183 case 4:
4184 return I40E_FLEX_54_MASK;
4185 case 5:
4186 return I40E_FLEX_55_MASK;
4187 case 6:
4188 return I40E_FLEX_56_MASK;
4189 case 7:
4190 return I40E_FLEX_57_MASK;
4191 default:
4192 return 0;
4193 }
4194}
4195
4196/**
4197 * i40e_print_input_set - Show changes between two input sets
4198 * @vsi: the vsi being configured
4199 * @old: the old input set
4200 * @new: the new input set
4201 *
4202 * Print the difference between old and new input sets by showing which series
4203 * of words are toggled on or off. Only displays the bits we actually support
4204 * changing.
4205 **/
4206static void i40e_print_input_set(struct i40e_vsi *vsi, u64 old, u64 new)
4207{
4208 struct i40e_pf *pf = vsi->back;
4209 bool old_value, new_value;
4210 int i;
4211
4212 old_value = !!(old & I40E_L3_SRC_MASK);
4213 new_value = !!(new & I40E_L3_SRC_MASK);
4214 if (old_value != new_value)
4215 netif_info(pf, drv, vsi->netdev, "L3 source address: %s -> %s\n",
4216 old_value ? "ON" : "OFF",
4217 new_value ? "ON" : "OFF");
4218
4219 old_value = !!(old & I40E_L3_DST_MASK);
4220 new_value = !!(new & I40E_L3_DST_MASK);
4221 if (old_value != new_value)
4222 netif_info(pf, drv, vsi->netdev, "L3 destination address: %s -> %s\n",
4223 old_value ? "ON" : "OFF",
4224 new_value ? "ON" : "OFF");
4225
4226 old_value = !!(old & I40E_L4_SRC_MASK);
4227 new_value = !!(new & I40E_L4_SRC_MASK);
4228 if (old_value != new_value)
4229 netif_info(pf, drv, vsi->netdev, "L4 source port: %s -> %s\n",
4230 old_value ? "ON" : "OFF",
4231 new_value ? "ON" : "OFF");
4232
4233 old_value = !!(old & I40E_L4_DST_MASK);
4234 new_value = !!(new & I40E_L4_DST_MASK);
4235 if (old_value != new_value)
4236 netif_info(pf, drv, vsi->netdev, "L4 destination port: %s -> %s\n",
4237 old_value ? "ON" : "OFF",
4238 new_value ? "ON" : "OFF");
4239
4240 old_value = !!(old & I40E_VERIFY_TAG_MASK);
4241 new_value = !!(new & I40E_VERIFY_TAG_MASK);
4242 if (old_value != new_value)
4243 netif_info(pf, drv, vsi->netdev, "SCTP verification tag: %s -> %s\n",
4244 old_value ? "ON" : "OFF",
4245 new_value ? "ON" : "OFF");
4246
4247 /* Show change of flexible filter entries */
4248 for (i = 0; i < I40E_FLEX_INDEX_ENTRIES; i++) {
4249 u64 flex_mask = i40e_pit_index_to_mask(i);
4250
4251 old_value = !!(old & flex_mask);
4252 new_value = !!(new & flex_mask);
4253 if (old_value != new_value)
4254 netif_info(pf, drv, vsi->netdev, "FLEX index %d: %s -> %s\n",
4255 i,
4256 old_value ? "ON" : "OFF",
4257 new_value ? "ON" : "OFF");
4258 }
4259
4260 netif_info(pf, drv, vsi->netdev, " Current input set: %0llx\n",
4261 old);
4262 netif_info(pf, drv, vsi->netdev, "Requested input set: %0llx\n",
4263 new);
4264}
4265
4266/**
4267 * i40e_check_fdir_input_set - Check that a given rx_flow_spec mask is valid
4268 * @vsi: pointer to the targeted VSI
4269 * @fsp: pointer to Rx flow specification
4270 * @userdef: userdefined data from flow specification
4271 *
4272 * Ensures that a given ethtool_rx_flow_spec has a valid mask. Some support
4273 * for partial matches exists with a few limitations. First, hardware only
4274 * supports masking by word boundary (2 bytes) and not per individual bit.
4275 * Second, hardware is limited to using one mask for a flow type and cannot
4276 * use a separate mask for each filter.
4277 *
4278 * To support these limitations, if we already have a configured filter for
4279 * the specified type, this function enforces that new filters of the type
4280 * match the configured input set. Otherwise, if we do not have a filter of
4281 * the specified type, we allow the input set to be updated to match the
4282 * desired filter.
4283 *
4284 * To help ensure that administrators understand why filters weren't displayed
4285 * as supported, we print a diagnostic message displaying how the input set
4286 * would change and warning to delete the preexisting filters if required.
4287 *
4288 * Returns 0 on successful input set match, and a negative return code on
4289 * failure.
4290 **/
4291static int i40e_check_fdir_input_set(struct i40e_vsi *vsi,
4292 struct ethtool_rx_flow_spec *fsp,
4293 struct i40e_rx_flow_userdef *userdef)
4294{
4295 static const __be32 ipv6_full_mask[4] = {cpu_to_be32(0xffffffff),
4296 cpu_to_be32(0xffffffff), cpu_to_be32(0xffffffff),
4297 cpu_to_be32(0xffffffff)};
4298 struct ethtool_tcpip6_spec *tcp_ip6_spec;
4299 struct ethtool_usrip6_spec *usr_ip6_spec;
4300 struct ethtool_tcpip4_spec *tcp_ip4_spec;
4301 struct ethtool_usrip4_spec *usr_ip4_spec;
4302 struct i40e_pf *pf = vsi->back;
4303 u64 current_mask, new_mask;
4304 bool new_flex_offset = false;
4305 bool flex_l3 = false;
4306 u16 *fdir_filter_count;
4307 u16 index, src_offset = 0;
4308 u8 pit_index = 0;
4309 int err;
4310
4311 switch (fsp->flow_type & ~FLOW_EXT) {
4312 case SCTP_V4_FLOW:
4313 index = I40E_FILTER_PCTYPE_NONF_IPV4_SCTP;
4314 fdir_filter_count = &pf->fd_sctp4_filter_cnt;
4315 break;
4316 case TCP_V4_FLOW:
4317 index = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
4318 fdir_filter_count = &pf->fd_tcp4_filter_cnt;
4319 break;
4320 case UDP_V4_FLOW:
4321 index = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
4322 fdir_filter_count = &pf->fd_udp4_filter_cnt;
4323 break;
4324 case SCTP_V6_FLOW:
4325 index = I40E_FILTER_PCTYPE_NONF_IPV6_SCTP;
4326 fdir_filter_count = &pf->fd_sctp6_filter_cnt;
4327 break;
4328 case TCP_V6_FLOW:
4329 index = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
4330 fdir_filter_count = &pf->fd_tcp6_filter_cnt;
4331 break;
4332 case UDP_V6_FLOW:
4333 index = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
4334 fdir_filter_count = &pf->fd_udp6_filter_cnt;
4335 break;
4336 case IP_USER_FLOW:
4337 index = I40E_FILTER_PCTYPE_NONF_IPV4_OTHER;
4338 fdir_filter_count = &pf->fd_ip4_filter_cnt;
4339 flex_l3 = true;
4340 break;
4341 case IPV6_USER_FLOW:
4342 index = I40E_FILTER_PCTYPE_NONF_IPV6_OTHER;
4343 fdir_filter_count = &pf->fd_ip6_filter_cnt;
4344 flex_l3 = true;
4345 break;
4346 default:
4347 return -EOPNOTSUPP;
4348 }
4349
4350 /* Read the current input set from register memory. */
4351 current_mask = i40e_read_fd_input_set(pf, index);
4352 new_mask = current_mask;
4353
4354 /* Determine, if any, the required changes to the input set in order
4355 * to support the provided mask.
4356 *
4357 * Hardware only supports masking at word (2 byte) granularity and does
4358 * not support full bitwise masking. This implementation simplifies
4359 * even further and only supports fully enabled or fully disabled
4360 * masks for each field, even though we could split the ip4src and
4361 * ip4dst fields.
4362 */
4363 switch (fsp->flow_type & ~FLOW_EXT) {
4364 case SCTP_V4_FLOW:
4365 new_mask &= ~I40E_VERIFY_TAG_MASK;
4366 fallthrough;
4367 case TCP_V4_FLOW:
4368 case UDP_V4_FLOW:
4369 tcp_ip4_spec = &fsp->m_u.tcp_ip4_spec;
4370
4371 /* IPv4 source address */
4372 if (tcp_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4373 new_mask |= I40E_L3_SRC_MASK;
4374 else if (!tcp_ip4_spec->ip4src)
4375 new_mask &= ~I40E_L3_SRC_MASK;
4376 else
4377 return -EOPNOTSUPP;
4378
4379 /* IPv4 destination address */
4380 if (tcp_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4381 new_mask |= I40E_L3_DST_MASK;
4382 else if (!tcp_ip4_spec->ip4dst)
4383 new_mask &= ~I40E_L3_DST_MASK;
4384 else
4385 return -EOPNOTSUPP;
4386
4387 /* L4 source port */
4388 if (tcp_ip4_spec->psrc == htons(0xFFFF))
4389 new_mask |= I40E_L4_SRC_MASK;
4390 else if (!tcp_ip4_spec->psrc)
4391 new_mask &= ~I40E_L4_SRC_MASK;
4392 else
4393 return -EOPNOTSUPP;
4394
4395 /* L4 destination port */
4396 if (tcp_ip4_spec->pdst == htons(0xFFFF))
4397 new_mask |= I40E_L4_DST_MASK;
4398 else if (!tcp_ip4_spec->pdst)
4399 new_mask &= ~I40E_L4_DST_MASK;
4400 else
4401 return -EOPNOTSUPP;
4402
4403 /* Filtering on Type of Service is not supported. */
4404 if (tcp_ip4_spec->tos)
4405 return -EOPNOTSUPP;
4406
4407 break;
4408 case SCTP_V6_FLOW:
4409 new_mask &= ~I40E_VERIFY_TAG_MASK;
4410 fallthrough;
4411 case TCP_V6_FLOW:
4412 case UDP_V6_FLOW:
4413 tcp_ip6_spec = &fsp->m_u.tcp_ip6_spec;
4414
4415 /* Check if user provided IPv6 source address. */
4416 if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6src,
4417 (struct in6_addr *)&ipv6_full_mask))
4418 new_mask |= I40E_L3_V6_SRC_MASK;
4419 else if (ipv6_addr_any((struct in6_addr *)
4420 &tcp_ip6_spec->ip6src))
4421 new_mask &= ~I40E_L3_V6_SRC_MASK;
4422 else
4423 return -EOPNOTSUPP;
4424
4425 /* Check if user provided destination address. */
4426 if (ipv6_addr_equal((struct in6_addr *)&tcp_ip6_spec->ip6dst,
4427 (struct in6_addr *)&ipv6_full_mask))
4428 new_mask |= I40E_L3_V6_DST_MASK;
4429 else if (ipv6_addr_any((struct in6_addr *)
4430 &tcp_ip6_spec->ip6dst))
4431 new_mask &= ~I40E_L3_V6_DST_MASK;
4432 else
4433 return -EOPNOTSUPP;
4434
4435 /* L4 source port */
4436 if (tcp_ip6_spec->psrc == htons(0xFFFF))
4437 new_mask |= I40E_L4_SRC_MASK;
4438 else if (!tcp_ip6_spec->psrc)
4439 new_mask &= ~I40E_L4_SRC_MASK;
4440 else
4441 return -EOPNOTSUPP;
4442
4443 /* L4 destination port */
4444 if (tcp_ip6_spec->pdst == htons(0xFFFF))
4445 new_mask |= I40E_L4_DST_MASK;
4446 else if (!tcp_ip6_spec->pdst)
4447 new_mask &= ~I40E_L4_DST_MASK;
4448 else
4449 return -EOPNOTSUPP;
4450
4451 /* Filtering on Traffic Classes is not supported. */
4452 if (tcp_ip6_spec->tclass)
4453 return -EOPNOTSUPP;
4454 break;
4455 case IP_USER_FLOW:
4456 usr_ip4_spec = &fsp->m_u.usr_ip4_spec;
4457
4458 /* IPv4 source address */
4459 if (usr_ip4_spec->ip4src == htonl(0xFFFFFFFF))
4460 new_mask |= I40E_L3_SRC_MASK;
4461 else if (!usr_ip4_spec->ip4src)
4462 new_mask &= ~I40E_L3_SRC_MASK;
4463 else
4464 return -EOPNOTSUPP;
4465
4466 /* IPv4 destination address */
4467 if (usr_ip4_spec->ip4dst == htonl(0xFFFFFFFF))
4468 new_mask |= I40E_L3_DST_MASK;
4469 else if (!usr_ip4_spec->ip4dst)
4470 new_mask &= ~I40E_L3_DST_MASK;
4471 else
4472 return -EOPNOTSUPP;
4473
4474 /* First 4 bytes of L4 header */
4475 if (usr_ip4_spec->l4_4_bytes)
4476 return -EOPNOTSUPP;
4477
4478 /* Filtering on Type of Service is not supported. */
4479 if (usr_ip4_spec->tos)
4480 return -EOPNOTSUPP;
4481
4482 /* Filtering on IP version is not supported */
4483 if (usr_ip4_spec->ip_ver)
4484 return -EINVAL;
4485
4486 /* Filtering on L4 protocol is not supported */
4487 if (usr_ip4_spec->proto)
4488 return -EINVAL;
4489
4490 break;
4491 case IPV6_USER_FLOW:
4492 usr_ip6_spec = &fsp->m_u.usr_ip6_spec;
4493
4494 /* Check if user provided IPv6 source address. */
4495 if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6src,
4496 (struct in6_addr *)&ipv6_full_mask))
4497 new_mask |= I40E_L3_V6_SRC_MASK;
4498 else if (ipv6_addr_any((struct in6_addr *)
4499 &usr_ip6_spec->ip6src))
4500 new_mask &= ~I40E_L3_V6_SRC_MASK;
4501 else
4502 return -EOPNOTSUPP;
4503
4504 /* Check if user provided destination address. */
4505 if (ipv6_addr_equal((struct in6_addr *)&usr_ip6_spec->ip6dst,
4506 (struct in6_addr *)&ipv6_full_mask))
4507 new_mask |= I40E_L3_V6_DST_MASK;
4508 else if (ipv6_addr_any((struct in6_addr *)
4509 &usr_ip6_spec->ip6dst))
4510 new_mask &= ~I40E_L3_V6_DST_MASK;
4511 else
4512 return -EOPNOTSUPP;
4513
4514 if (usr_ip6_spec->l4_4_bytes)
4515 return -EOPNOTSUPP;
4516
4517 /* Filtering on Traffic class is not supported. */
4518 if (usr_ip6_spec->tclass)
4519 return -EOPNOTSUPP;
4520
4521 /* Filtering on L4 protocol is not supported */
4522 if (usr_ip6_spec->l4_proto)
4523 return -EINVAL;
4524
4525 break;
4526 default:
4527 return -EOPNOTSUPP;
4528 }
4529
4530 if (fsp->flow_type & FLOW_EXT) {
4531 /* Allow only 802.1Q and no etype defined, as
4532 * later it's modified to 0x8100
4533 */
4534 if (fsp->h_ext.vlan_etype != htons(ETH_P_8021Q) &&
4535 fsp->h_ext.vlan_etype != 0)
4536 return -EOPNOTSUPP;
4537 if (fsp->m_ext.vlan_tci == htons(0xFFFF))
4538 new_mask |= I40E_VLAN_SRC_MASK;
4539 else
4540 new_mask &= ~I40E_VLAN_SRC_MASK;
4541 }
4542
4543 /* First, clear all flexible filter entries */
4544 new_mask &= ~I40E_FLEX_INPUT_MASK;
4545
4546 /* If we have a flexible filter, try to add this offset to the correct
4547 * flexible filter PIT list. Once finished, we can update the mask.
4548 * If the src_offset changed, we will get a new mask value which will
4549 * trigger an input set change.
4550 */
4551 if (userdef->flex_filter) {
4552 struct i40e_flex_pit *l3_flex_pit = NULL, *flex_pit = NULL;
4553
4554 /* Flexible offset must be even, since the flexible payload
4555 * must be aligned on 2-byte boundary.
4556 */
4557 if (userdef->flex_offset & 0x1) {
4558 dev_warn(&pf->pdev->dev,
4559 "Flexible data offset must be 2-byte aligned\n");
4560 return -EINVAL;
4561 }
4562
4563 src_offset = userdef->flex_offset >> 1;
4564
4565 /* FLX_PIT source offset value is only so large */
4566 if (src_offset > I40E_MAX_FLEX_SRC_OFFSET) {
4567 dev_warn(&pf->pdev->dev,
4568 "Flexible data must reside within first 64 bytes of the packet payload\n");
4569 return -EINVAL;
4570 }
4571
4572 /* See if this offset has already been programmed. If we get
4573 * an ERR_PTR, then the filter is not safe to add. Otherwise,
4574 * if we get a NULL pointer, this means we will need to add
4575 * the offset.
4576 */
4577 flex_pit = i40e_find_flex_offset(&pf->l4_flex_pit_list,
4578 src_offset);
4579 if (IS_ERR(flex_pit))
4580 return PTR_ERR(flex_pit);
4581
4582 /* IP_USER_FLOW filters match both L4 (ICMP) and L3 (unknown)
4583 * packet types, and thus we need to program both L3 and L4
4584 * flexible values. These must have identical flexible index,
4585 * as otherwise we can't correctly program the input set. So
4586 * we'll find both an L3 and L4 index and make sure they are
4587 * the same.
4588 */
4589 if (flex_l3) {
4590 l3_flex_pit =
4591 i40e_find_flex_offset(&pf->l3_flex_pit_list,
4592 src_offset);
4593 if (IS_ERR(l3_flex_pit))
4594 return PTR_ERR(l3_flex_pit);
4595
4596 if (flex_pit) {
4597 /* If we already had a matching L4 entry, we
4598 * need to make sure that the L3 entry we
4599 * obtained uses the same index.
4600 */
4601 if (l3_flex_pit) {
4602 if (l3_flex_pit->pit_index !=
4603 flex_pit->pit_index) {
4604 return -EINVAL;
4605 }
4606 } else {
4607 new_flex_offset = true;
4608 }
4609 } else {
4610 flex_pit = l3_flex_pit;
4611 }
4612 }
4613
4614 /* If we didn't find an existing flex offset, we need to
4615 * program a new one. However, we don't immediately program it
4616 * here because we will wait to program until after we check
4617 * that it is safe to change the input set.
4618 */
4619 if (!flex_pit) {
4620 new_flex_offset = true;
4621 pit_index = i40e_unused_pit_index(pf);
4622 } else {
4623 pit_index = flex_pit->pit_index;
4624 }
4625
4626 /* Update the mask with the new offset */
4627 new_mask |= i40e_pit_index_to_mask(pit_index);
4628 }
4629
4630 /* If the mask and flexible filter offsets for this filter match the
4631 * currently programmed values we don't need any input set change, so
4632 * this filter is safe to install.
4633 */
4634 if (new_mask == current_mask && !new_flex_offset)
4635 return 0;
4636
4637 netif_info(pf, drv, vsi->netdev, "Input set change requested for %s flows:\n",
4638 i40e_flow_str(fsp));
4639 i40e_print_input_set(vsi, current_mask, new_mask);
4640 if (new_flex_offset) {
4641 netif_info(pf, drv, vsi->netdev, "FLEX index %d: Offset -> %d",
4642 pit_index, src_offset);
4643 }
4644
4645 /* Hardware input sets are global across multiple ports, so even the
4646 * main port cannot change them when in MFP mode as this would impact
4647 * any filters on the other ports.
4648 */
4649 if (test_bit(I40E_FLAG_MFP_ENA, pf->flags)) {
4650 netif_err(pf, drv, vsi->netdev, "Cannot change Flow Director input sets while MFP is enabled\n");
4651 return -EOPNOTSUPP;
4652 }
4653
4654 /* This filter requires us to update the input set. However, hardware
4655 * only supports one input set per flow type, and does not support
4656 * separate masks for each filter. This means that we can only support
4657 * a single mask for all filters of a specific type.
4658 *
4659 * If we have preexisting filters, they obviously depend on the
4660 * current programmed input set. Display a diagnostic message in this
4661 * case explaining why the filter could not be accepted.
4662 */
4663 if (*fdir_filter_count) {
4664 netif_err(pf, drv, vsi->netdev, "Cannot change input set for %s flows until %d preexisting filters are removed\n",
4665 i40e_flow_str(fsp),
4666 *fdir_filter_count);
4667 return -EOPNOTSUPP;
4668 }
4669
4670 i40e_write_fd_input_set(pf, index, new_mask);
4671
4672 /* IP_USER_FLOW filters match both IPv4/Other and IPv4/Fragmented
4673 * frames. If we're programming the input set for IPv4/Other, we also
4674 * need to program the IPv4/Fragmented input set. Since we don't have
4675 * separate support, we'll always assume and enforce that the two flow
4676 * types must have matching input sets.
4677 */
4678 if (index == I40E_FILTER_PCTYPE_NONF_IPV4_OTHER)
4679 i40e_write_fd_input_set(pf, I40E_FILTER_PCTYPE_FRAG_IPV4,
4680 new_mask);
4681
4682 /* Add the new offset and update table, if necessary */
4683 if (new_flex_offset) {
4684 err = i40e_add_flex_offset(&pf->l4_flex_pit_list, src_offset,
4685 pit_index);
4686 if (err)
4687 return err;
4688
4689 if (flex_l3) {
4690 err = i40e_add_flex_offset(&pf->l3_flex_pit_list,
4691 src_offset,
4692 pit_index);
4693 if (err)
4694 return err;
4695 }
4696
4697 i40e_reprogram_flex_pit(pf);
4698 }
4699
4700 return 0;
4701}
4702
4703/**
4704 * i40e_match_fdir_filter - Return true of two filters match
4705 * @a: pointer to filter struct
4706 * @b: pointer to filter struct
4707 *
4708 * Returns true if the two filters match exactly the same criteria. I.e. they
4709 * match the same flow type and have the same parameters. We don't need to
4710 * check any input-set since all filters of the same flow type must use the
4711 * same input set.
4712 **/
4713static bool i40e_match_fdir_filter(struct i40e_fdir_filter *a,
4714 struct i40e_fdir_filter *b)
4715{
4716 /* The filters do not much if any of these criteria differ. */
4717 if (a->dst_ip != b->dst_ip ||
4718 a->src_ip != b->src_ip ||
4719 a->dst_port != b->dst_port ||
4720 a->src_port != b->src_port ||
4721 a->flow_type != b->flow_type ||
4722 a->ipl4_proto != b->ipl4_proto ||
4723 a->vlan_tag != b->vlan_tag ||
4724 a->vlan_etype != b->vlan_etype)
4725 return false;
4726
4727 return true;
4728}
4729
4730/**
4731 * i40e_disallow_matching_filters - Check that new filters differ
4732 * @vsi: pointer to the targeted VSI
4733 * @input: new filter to check
4734 *
4735 * Due to hardware limitations, it is not possible for two filters that match
4736 * similar criteria to be programmed at the same time. This is true for a few
4737 * reasons:
4738 *
4739 * (a) all filters matching a particular flow type must use the same input
4740 * set, that is they must match the same criteria.
4741 * (b) different flow types will never match the same packet, as the flow type
4742 * is decided by hardware before checking which rules apply.
4743 * (c) hardware has no way to distinguish which order filters apply in.
4744 *
4745 * Due to this, we can't really support using the location data to order
4746 * filters in the hardware parsing. It is technically possible for the user to
4747 * request two filters matching the same criteria but which select different
4748 * queues. In this case, rather than keep both filters in the list, we reject
4749 * the 2nd filter when the user requests adding it.
4750 *
4751 * This avoids needing to track location for programming the filter to
4752 * hardware, and ensures that we avoid some strange scenarios involving
4753 * deleting filters which match the same criteria.
4754 **/
4755static int i40e_disallow_matching_filters(struct i40e_vsi *vsi,
4756 struct i40e_fdir_filter *input)
4757{
4758 struct i40e_pf *pf = vsi->back;
4759 struct i40e_fdir_filter *rule;
4760 struct hlist_node *node2;
4761
4762 /* Loop through every filter, and check that it doesn't match */
4763 hlist_for_each_entry_safe(rule, node2,
4764 &pf->fdir_filter_list, fdir_node) {
4765 /* Don't check the filters match if they share the same fd_id,
4766 * since the new filter is actually just updating the target
4767 * of the old filter.
4768 */
4769 if (rule->fd_id == input->fd_id)
4770 continue;
4771
4772 /* If any filters match, then print a warning message to the
4773 * kernel message buffer and bail out.
4774 */
4775 if (i40e_match_fdir_filter(rule, input)) {
4776 dev_warn(&pf->pdev->dev,
4777 "Existing user defined filter %d already matches this flow.\n",
4778 rule->fd_id);
4779 return -EINVAL;
4780 }
4781 }
4782
4783 return 0;
4784}
4785
4786/**
4787 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
4788 * @vsi: pointer to the targeted VSI
4789 * @cmd: command to get or set RX flow classification rules
4790 *
4791 * Add Flow Director filters for a specific flow spec based on their
4792 * protocol. Returns 0 if the filters were successfully added.
4793 **/
4794static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
4795 struct ethtool_rxnfc *cmd)
4796{
4797 struct i40e_rx_flow_userdef userdef;
4798 struct ethtool_rx_flow_spec *fsp;
4799 struct i40e_fdir_filter *input;
4800 u16 dest_vsi = 0, q_index = 0;
4801 struct i40e_pf *pf;
4802 int ret = -EINVAL;
4803 u8 dest_ctl;
4804
4805 if (!vsi)
4806 return -EINVAL;
4807 pf = vsi->back;
4808
4809 if (!test_bit(I40E_FLAG_FD_SB_ENA, pf->flags))
4810 return -EOPNOTSUPP;
4811
4812 if (test_bit(__I40E_FD_SB_AUTO_DISABLED, pf->state))
4813 return -ENOSPC;
4814
4815 if (test_bit(__I40E_RESET_RECOVERY_PENDING, pf->state) ||
4816 test_bit(__I40E_RESET_INTR_RECEIVED, pf->state))
4817 return -EBUSY;
4818
4819 if (test_bit(__I40E_FD_FLUSH_REQUESTED, pf->state))
4820 return -EBUSY;
4821
4822 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
4823
4824 /* Parse the user-defined field */
4825 if (i40e_parse_rx_flow_user_data(fsp, &userdef))
4826 return -EINVAL;
4827
4828 /* Extended MAC field is not supported */
4829 if (fsp->flow_type & FLOW_MAC_EXT)
4830 return -EINVAL;
4831
4832 ret = i40e_check_fdir_input_set(vsi, fsp, &userdef);
4833 if (ret)
4834 return ret;
4835
4836 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
4837 pf->hw.func_caps.fd_filters_guaranteed)) {
4838 return -EINVAL;
4839 }
4840
4841 /* ring_cookie is either the drop index, or is a mask of the queue
4842 * index and VF id we wish to target.
4843 */
4844 if (fsp->ring_cookie == RX_CLS_FLOW_DISC) {
4845 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
4846 } else {
4847 u32 ring = ethtool_get_flow_spec_ring(fsp->ring_cookie);
4848 u8 vf = ethtool_get_flow_spec_ring_vf(fsp->ring_cookie);
4849
4850 if (!vf) {
4851 if (ring >= vsi->num_queue_pairs)
4852 return -EINVAL;
4853 dest_vsi = vsi->id;
4854 } else {
4855 /* VFs are zero-indexed, so we subtract one here */
4856 vf--;
4857
4858 if (vf >= pf->num_alloc_vfs)
4859 return -EINVAL;
4860 if (ring >= pf->vf[vf].num_queue_pairs)
4861 return -EINVAL;
4862 dest_vsi = pf->vf[vf].lan_vsi_id;
4863 }
4864 dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
4865 q_index = ring;
4866 }
4867
4868 input = kzalloc(sizeof(*input), GFP_KERNEL);
4869
4870 if (!input)
4871 return -ENOMEM;
4872
4873 input->fd_id = fsp->location;
4874 input->q_index = q_index;
4875 input->dest_vsi = dest_vsi;
4876 input->dest_ctl = dest_ctl;
4877 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
4878 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
4879 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4880 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4881 input->flow_type = fsp->flow_type & ~FLOW_EXT;
4882
4883 input->vlan_etype = fsp->h_ext.vlan_etype;
4884 if (!fsp->m_ext.vlan_etype && fsp->h_ext.vlan_tci)
4885 input->vlan_etype = cpu_to_be16(ETH_P_8021Q);
4886 if (fsp->m_ext.vlan_tci && input->vlan_etype)
4887 input->vlan_tag = fsp->h_ext.vlan_tci;
4888 if (input->flow_type == IPV6_USER_FLOW ||
4889 input->flow_type == UDP_V6_FLOW ||
4890 input->flow_type == TCP_V6_FLOW ||
4891 input->flow_type == SCTP_V6_FLOW) {
4892 /* Reverse the src and dest notion, since the HW expects them
4893 * to be from Tx perspective where as the input from user is
4894 * from Rx filter view.
4895 */
4896 input->ipl4_proto = fsp->h_u.usr_ip6_spec.l4_proto;
4897 input->dst_port = fsp->h_u.tcp_ip6_spec.psrc;
4898 input->src_port = fsp->h_u.tcp_ip6_spec.pdst;
4899 memcpy(input->dst_ip6, fsp->h_u.ah_ip6_spec.ip6src,
4900 sizeof(__be32) * 4);
4901 memcpy(input->src_ip6, fsp->h_u.ah_ip6_spec.ip6dst,
4902 sizeof(__be32) * 4);
4903 } else {
4904 /* Reverse the src and dest notion, since the HW expects them
4905 * to be from Tx perspective where as the input from user is
4906 * from Rx filter view.
4907 */
4908 input->ipl4_proto = fsp->h_u.usr_ip4_spec.proto;
4909 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
4910 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
4911 input->dst_ip = fsp->h_u.tcp_ip4_spec.ip4src;
4912 input->src_ip = fsp->h_u.tcp_ip4_spec.ip4dst;
4913 }
4914
4915 if (userdef.flex_filter) {
4916 input->flex_filter = true;
4917 input->flex_word = cpu_to_be16(userdef.flex_word);
4918 input->flex_offset = userdef.flex_offset;
4919 }
4920
4921 /* Avoid programming two filters with identical match criteria. */
4922 ret = i40e_disallow_matching_filters(vsi, input);
4923 if (ret)
4924 goto free_filter_memory;
4925
4926 /* Add the input filter to the fdir_input_list, possibly replacing
4927 * a previous filter. Do not free the input structure after adding it
4928 * to the list as this would cause a use-after-free bug.
4929 */
4930 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
4931 ret = i40e_add_del_fdir(vsi, input, true);
4932 if (ret)
4933 goto remove_sw_rule;
4934 return 0;
4935
4936remove_sw_rule:
4937 hlist_del(&input->fdir_node);
4938 pf->fdir_pf_active_filters--;
4939free_filter_memory:
4940 kfree(input);
4941 return ret;
4942}
4943
4944/**
4945 * i40e_set_rxnfc - command to set RX flow classification rules
4946 * @netdev: network interface device structure
4947 * @cmd: ethtool rxnfc command
4948 *
4949 * Returns Success if the command is supported.
4950 **/
4951static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
4952{
4953 struct i40e_netdev_priv *np = netdev_priv(netdev);
4954 struct i40e_vsi *vsi = np->vsi;
4955 struct i40e_pf *pf = vsi->back;
4956 int ret = -EOPNOTSUPP;
4957
4958 switch (cmd->cmd) {
4959 case ETHTOOL_SRXFH:
4960 ret = i40e_set_rss_hash_opt(pf, cmd);
4961 break;
4962 case ETHTOOL_SRXCLSRLINS:
4963 ret = i40e_add_fdir_ethtool(vsi, cmd);
4964 break;
4965 case ETHTOOL_SRXCLSRLDEL:
4966 ret = i40e_del_fdir_entry(vsi, cmd);
4967 break;
4968 default:
4969 break;
4970 }
4971
4972 return ret;
4973}
4974
4975/**
4976 * i40e_max_channels - get Max number of combined channels supported
4977 * @vsi: vsi pointer
4978 **/
4979static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
4980{
4981 /* TODO: This code assumes DCB and FD is disabled for now. */
4982 return vsi->alloc_queue_pairs;
4983}
4984
4985/**
4986 * i40e_get_channels - Get the current channels enabled and max supported etc.
4987 * @dev: network interface device structure
4988 * @ch: ethtool channels structure
4989 *
4990 * We don't support separate tx and rx queues as channels. The other count
4991 * represents how many queues are being used for control. max_combined counts
4992 * how many queue pairs we can support. They may not be mapped 1 to 1 with
4993 * q_vectors since we support a lot more queue pairs than q_vectors.
4994 **/
4995static void i40e_get_channels(struct net_device *dev,
4996 struct ethtool_channels *ch)
4997{
4998 struct i40e_netdev_priv *np = netdev_priv(dev);
4999 struct i40e_vsi *vsi = np->vsi;
5000 struct i40e_pf *pf = vsi->back;
5001
5002 /* report maximum channels */
5003 ch->max_combined = i40e_max_channels(vsi);
5004
5005 /* report info for other vector */
5006 ch->other_count = test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ? 1 : 0;
5007 ch->max_other = ch->other_count;
5008
5009 /* Note: This code assumes DCB is disabled for now. */
5010 ch->combined_count = vsi->num_queue_pairs;
5011}
5012
5013/**
5014 * i40e_set_channels - Set the new channels count.
5015 * @dev: network interface device structure
5016 * @ch: ethtool channels structure
5017 *
5018 * The new channels count may not be the same as requested by the user
5019 * since it gets rounded down to a power of 2 value.
5020 **/
5021static int i40e_set_channels(struct net_device *dev,
5022 struct ethtool_channels *ch)
5023{
5024 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
5025 struct i40e_netdev_priv *np = netdev_priv(dev);
5026 unsigned int count = ch->combined_count;
5027 struct i40e_vsi *vsi = np->vsi;
5028 struct i40e_pf *pf = vsi->back;
5029 struct i40e_fdir_filter *rule;
5030 struct hlist_node *node2;
5031 int new_count;
5032 int err = 0;
5033
5034 /* We do not support setting channels for any other VSI at present */
5035 if (vsi->type != I40E_VSI_MAIN)
5036 return -EINVAL;
5037
5038 /* We do not support setting channels via ethtool when TCs are
5039 * configured through mqprio
5040 */
5041 if (i40e_is_tc_mqprio_enabled(pf))
5042 return -EINVAL;
5043
5044 /* verify they are not requesting separate vectors */
5045 if (!count || ch->rx_count || ch->tx_count)
5046 return -EINVAL;
5047
5048 /* verify other_count has not changed */
5049 if (ch->other_count != (test_bit(I40E_FLAG_FD_SB_ENA, pf->flags) ? 1 : 0))
5050 return -EINVAL;
5051
5052 /* verify the number of channels does not exceed hardware limits */
5053 if (count > i40e_max_channels(vsi))
5054 return -EINVAL;
5055
5056 /* verify that the number of channels does not invalidate any current
5057 * flow director rules
5058 */
5059 hlist_for_each_entry_safe(rule, node2,
5060 &pf->fdir_filter_list, fdir_node) {
5061 if (rule->dest_ctl != drop && count <= rule->q_index) {
5062 dev_warn(&pf->pdev->dev,
5063 "Existing user defined filter %d assigns flow to queue %d\n",
5064 rule->fd_id, rule->q_index);
5065 err = -EINVAL;
5066 }
5067 }
5068
5069 if (err) {
5070 dev_err(&pf->pdev->dev,
5071 "Existing filter rules must be deleted to reduce combined channel count to %d\n",
5072 count);
5073 return err;
5074 }
5075
5076 /* update feature limits from largest to smallest supported values */
5077 /* TODO: Flow director limit, DCB etc */
5078
5079 /* use rss_reconfig to rebuild with new queue count and update traffic
5080 * class queue mapping
5081 */
5082 new_count = i40e_reconfig_rss_queues(pf, count);
5083 if (new_count > 0)
5084 return 0;
5085 else
5086 return -EINVAL;
5087}
5088
5089/**
5090 * i40e_get_rxfh_key_size - get the RSS hash key size
5091 * @netdev: network interface device structure
5092 *
5093 * Returns the table size.
5094 **/
5095static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
5096{
5097 return I40E_HKEY_ARRAY_SIZE;
5098}
5099
5100/**
5101 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
5102 * @netdev: network interface device structure
5103 *
5104 * Returns the table size.
5105 **/
5106static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
5107{
5108 return I40E_HLUT_ARRAY_SIZE;
5109}
5110
5111/**
5112 * i40e_get_rxfh - get the rx flow hash indirection table
5113 * @netdev: network interface device structure
5114 * @rxfh: pointer to param struct (indir, key, hfunc)
5115 *
5116 * Reads the indirection table directly from the hardware. Returns 0 on
5117 * success.
5118 **/
5119static int i40e_get_rxfh(struct net_device *netdev,
5120 struct ethtool_rxfh_param *rxfh)
5121{
5122 struct i40e_netdev_priv *np = netdev_priv(netdev);
5123 struct i40e_vsi *vsi = np->vsi;
5124 u8 *lut, *seed = NULL;
5125 int ret;
5126 u16 i;
5127
5128 rxfh->hfunc = ETH_RSS_HASH_TOP;
5129
5130 if (!rxfh->indir)
5131 return 0;
5132
5133 seed = rxfh->key;
5134 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
5135 if (!lut)
5136 return -ENOMEM;
5137 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
5138 if (ret)
5139 goto out;
5140 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
5141 rxfh->indir[i] = (u32)(lut[i]);
5142
5143out:
5144 kfree(lut);
5145
5146 return ret;
5147}
5148
5149/**
5150 * i40e_set_rxfh - set the rx flow hash indirection table
5151 * @netdev: network interface device structure
5152 * @rxfh: pointer to param struct (indir, key, hfunc)
5153 * @extack: extended ACK from the Netlink message
5154 *
5155 * Returns -EINVAL if the table specifies an invalid queue id, otherwise
5156 * returns 0 after programming the table.
5157 **/
5158static int i40e_set_rxfh(struct net_device *netdev,
5159 struct ethtool_rxfh_param *rxfh,
5160 struct netlink_ext_ack *extack)
5161{
5162 struct i40e_netdev_priv *np = netdev_priv(netdev);
5163 struct i40e_vsi *vsi = np->vsi;
5164 struct i40e_pf *pf = vsi->back;
5165 u8 *seed = NULL;
5166 u16 i;
5167
5168 if (rxfh->hfunc != ETH_RSS_HASH_NO_CHANGE &&
5169 rxfh->hfunc != ETH_RSS_HASH_TOP)
5170 return -EOPNOTSUPP;
5171
5172 if (rxfh->key) {
5173 if (!vsi->rss_hkey_user) {
5174 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
5175 GFP_KERNEL);
5176 if (!vsi->rss_hkey_user)
5177 return -ENOMEM;
5178 }
5179 memcpy(vsi->rss_hkey_user, rxfh->key, I40E_HKEY_ARRAY_SIZE);
5180 seed = vsi->rss_hkey_user;
5181 }
5182 if (!vsi->rss_lut_user) {
5183 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
5184 if (!vsi->rss_lut_user)
5185 return -ENOMEM;
5186 }
5187
5188 /* Each 32 bits pointed by 'indir' is stored with a lut entry */
5189 if (rxfh->indir)
5190 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
5191 vsi->rss_lut_user[i] = (u8)(rxfh->indir[i]);
5192 else
5193 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
5194 vsi->rss_size);
5195
5196 return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
5197 I40E_HLUT_ARRAY_SIZE);
5198}
5199
5200/**
5201 * i40e_get_priv_flags - report device private flags
5202 * @dev: network interface device structure
5203 *
5204 * The get string set count and the string set should be matched for each
5205 * flag returned. Add new strings for each flag to the i40e_gstrings_priv_flags
5206 * array.
5207 *
5208 * Returns a u32 bitmap of flags.
5209 **/
5210static u32 i40e_get_priv_flags(struct net_device *dev)
5211{
5212 struct i40e_netdev_priv *np = netdev_priv(dev);
5213 struct i40e_vsi *vsi = np->vsi;
5214 struct i40e_pf *pf = vsi->back;
5215 u32 i, j, ret_flags = 0;
5216
5217 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
5218 const struct i40e_priv_flags *priv_flag;
5219
5220 priv_flag = &i40e_gstrings_priv_flags[i];
5221
5222 if (test_bit(priv_flag->bitno, pf->flags))
5223 ret_flags |= BIT(i);
5224 }
5225
5226 if (pf->hw.pf_id != 0)
5227 return ret_flags;
5228
5229 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
5230 const struct i40e_priv_flags *priv_flag;
5231
5232 priv_flag = &i40e_gl_gstrings_priv_flags[j];
5233
5234 if (test_bit(priv_flag->bitno, pf->flags))
5235 ret_flags |= BIT(i + j);
5236 }
5237
5238 return ret_flags;
5239}
5240
5241/**
5242 * i40e_set_priv_flags - set private flags
5243 * @dev: network interface device structure
5244 * @flags: bit flags to be set
5245 **/
5246static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
5247{
5248 DECLARE_BITMAP(changed_flags, I40E_PF_FLAGS_NBITS);
5249 DECLARE_BITMAP(orig_flags, I40E_PF_FLAGS_NBITS);
5250 DECLARE_BITMAP(new_flags, I40E_PF_FLAGS_NBITS);
5251 struct i40e_netdev_priv *np = netdev_priv(dev);
5252 enum i40e_admin_queue_err adq_err;
5253 struct i40e_vsi *vsi = np->vsi;
5254 struct i40e_pf *pf = vsi->back;
5255 u32 reset_needed = 0;
5256 int status;
5257 u32 i, j;
5258
5259 bitmap_copy(orig_flags, pf->flags, I40E_PF_FLAGS_NBITS);
5260 bitmap_copy(new_flags, pf->flags, I40E_PF_FLAGS_NBITS);
5261
5262 for (i = 0; i < I40E_PRIV_FLAGS_STR_LEN; i++) {
5263 const struct i40e_priv_flags *priv_flag;
5264 bool new_val;
5265
5266 priv_flag = &i40e_gstrings_priv_flags[i];
5267 new_val = (flags & BIT(i)) ? true : false;
5268
5269 /* If this is a read-only flag, it can't be changed */
5270 if (priv_flag->read_only &&
5271 test_bit(priv_flag->bitno, orig_flags) != new_val)
5272 return -EOPNOTSUPP;
5273
5274 if (new_val)
5275 set_bit(priv_flag->bitno, new_flags);
5276 else
5277 clear_bit(priv_flag->bitno, new_flags);
5278 }
5279
5280 if (pf->hw.pf_id != 0)
5281 goto flags_complete;
5282
5283 for (j = 0; j < I40E_GL_PRIV_FLAGS_STR_LEN; j++) {
5284 const struct i40e_priv_flags *priv_flag;
5285 bool new_val;
5286
5287 priv_flag = &i40e_gl_gstrings_priv_flags[j];
5288 new_val = (flags & BIT(i + j)) ? true : false;
5289
5290 /* If this is a read-only flag, it can't be changed */
5291 if (priv_flag->read_only &&
5292 test_bit(priv_flag->bitno, orig_flags) != new_val)
5293 return -EOPNOTSUPP;
5294
5295 if (new_val)
5296 set_bit(priv_flag->bitno, new_flags);
5297 else
5298 clear_bit(priv_flag->bitno, new_flags);
5299 }
5300
5301flags_complete:
5302 bitmap_xor(changed_flags, new_flags, orig_flags, I40E_PF_FLAGS_NBITS);
5303
5304 if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags))
5305 reset_needed = I40E_PF_RESET_AND_REBUILD_FLAG;
5306
5307 if (test_bit(I40E_FLAG_VEB_STATS_ENA, changed_flags) ||
5308 test_bit(I40E_FLAG_LEGACY_RX_ENA, changed_flags) ||
5309 test_bit(I40E_FLAG_SOURCE_PRUNING_DIS, changed_flags))
5310 reset_needed = BIT(__I40E_PF_RESET_REQUESTED);
5311
5312 /* Before we finalize any flag changes, we need to perform some
5313 * checks to ensure that the changes are supported and safe.
5314 */
5315
5316 /* ATR eviction is not supported on all devices */
5317 if (test_bit(I40E_FLAG_HW_ATR_EVICT_ENA, new_flags) &&
5318 !test_bit(I40E_HW_CAP_ATR_EVICT, pf->hw.caps))
5319 return -EOPNOTSUPP;
5320
5321 /* If the driver detected FW LLDP was disabled on init, this flag could
5322 * be set, however we do not support _changing_ the flag:
5323 * - on XL710 if NPAR is enabled or FW API version < 1.7
5324 * - on X722 with FW API version < 1.6
5325 * There are situations where older FW versions/NPAR enabled PFs could
5326 * disable LLDP, however we _must_ not allow the user to enable/disable
5327 * LLDP with this flag on unsupported FW versions.
5328 */
5329 if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags) &&
5330 !test_bit(I40E_HW_CAP_FW_LLDP_STOPPABLE, pf->hw.caps)) {
5331 dev_warn(&pf->pdev->dev,
5332 "Device does not support changing FW LLDP\n");
5333 return -EOPNOTSUPP;
5334 }
5335
5336 if (test_bit(I40E_FLAG_RS_FEC, changed_flags) &&
5337 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5338 pf->hw.device_id != I40E_DEV_ID_25G_B) {
5339 dev_warn(&pf->pdev->dev,
5340 "Device does not support changing FEC configuration\n");
5341 return -EOPNOTSUPP;
5342 }
5343
5344 if (test_bit(I40E_FLAG_BASE_R_FEC, changed_flags) &&
5345 pf->hw.device_id != I40E_DEV_ID_25G_SFP28 &&
5346 pf->hw.device_id != I40E_DEV_ID_25G_B &&
5347 pf->hw.device_id != I40E_DEV_ID_KX_X722) {
5348 dev_warn(&pf->pdev->dev,
5349 "Device does not support changing FEC configuration\n");
5350 return -EOPNOTSUPP;
5351 }
5352
5353 /* Process any additional changes needed as a result of flag changes.
5354 * The changed_flags value reflects the list of bits that were
5355 * changed in the code above.
5356 */
5357
5358 /* Flush current ATR settings if ATR was disabled */
5359 if (test_bit(I40E_FLAG_FD_ATR_ENA, changed_flags) &&
5360 !test_bit(I40E_FLAG_FD_ATR_ENA, new_flags)) {
5361 set_bit(__I40E_FD_ATR_AUTO_DISABLED, pf->state);
5362 set_bit(__I40E_FD_FLUSH_REQUESTED, pf->state);
5363 }
5364
5365 if (test_bit(I40E_FLAG_TRUE_PROMISC_ENA, changed_flags)) {
5366 u16 sw_flags = 0, valid_flags = 0;
5367 int ret;
5368
5369 if (!test_bit(I40E_FLAG_TRUE_PROMISC_ENA, new_flags))
5370 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5371 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
5372 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
5373 0, NULL);
5374 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
5375 dev_info(&pf->pdev->dev,
5376 "couldn't set switch config bits, err %pe aq_err %s\n",
5377 ERR_PTR(ret),
5378 i40e_aq_str(&pf->hw,
5379 pf->hw.aq.asq_last_status));
5380 /* not a fatal problem, just keep going */
5381 }
5382 }
5383
5384 if (test_bit(I40E_FLAG_RS_FEC, changed_flags) ||
5385 test_bit(I40E_FLAG_BASE_R_FEC, changed_flags)) {
5386 u8 fec_cfg = 0;
5387
5388 if (test_bit(I40E_FLAG_RS_FEC, new_flags) &&
5389 test_bit(I40E_FLAG_BASE_R_FEC, new_flags)) {
5390 fec_cfg = I40E_AQ_SET_FEC_AUTO;
5391 } else if (test_bit(I40E_FLAG_RS_FEC, new_flags)) {
5392 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_RS |
5393 I40E_AQ_SET_FEC_ABILITY_RS);
5394 } else if (test_bit(I40E_FLAG_BASE_R_FEC, new_flags)) {
5395 fec_cfg = (I40E_AQ_SET_FEC_REQUEST_KR |
5396 I40E_AQ_SET_FEC_ABILITY_KR);
5397 }
5398 if (i40e_set_fec_cfg(dev, fec_cfg))
5399 dev_warn(&pf->pdev->dev, "Cannot change FEC config\n");
5400 }
5401
5402 if (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, changed_flags) &&
5403 test_bit(I40E_FLAG_TOTAL_PORT_SHUTDOWN_ENA, orig_flags)) {
5404 dev_err(&pf->pdev->dev,
5405 "Setting link-down-on-close not supported on this port (because total-port-shutdown is enabled)\n");
5406 return -EOPNOTSUPP;
5407 }
5408
5409 if (test_bit(I40E_FLAG_VF_VLAN_PRUNING_ENA, changed_flags) &&
5410 pf->num_alloc_vfs) {
5411 dev_warn(&pf->pdev->dev,
5412 "Changing vf-vlan-pruning flag while VF(s) are active is not supported\n");
5413 return -EOPNOTSUPP;
5414 }
5415
5416 if (test_bit(I40E_FLAG_LEGACY_RX_ENA, changed_flags) &&
5417 I40E_2K_TOO_SMALL_WITH_PADDING) {
5418 dev_warn(&pf->pdev->dev,
5419 "2k Rx buffer is too small to fit standard MTU and skb_shared_info\n");
5420 return -EOPNOTSUPP;
5421 }
5422
5423 if (test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, changed_flags) &&
5424 test_bit(I40E_FLAG_LINK_DOWN_ON_CLOSE_ENA, new_flags) &&
5425 test_bit(I40E_FLAG_MFP_ENA, new_flags))
5426 dev_warn(&pf->pdev->dev,
5427 "Turning on link-down-on-close flag may affect other partitions\n");
5428
5429 if (test_bit(I40E_FLAG_FW_LLDP_DIS, changed_flags)) {
5430 if (test_bit(I40E_FLAG_FW_LLDP_DIS, new_flags)) {
5431#ifdef CONFIG_I40E_DCB
5432 i40e_dcb_sw_default_config(pf);
5433#endif /* CONFIG_I40E_DCB */
5434 i40e_aq_cfg_lldp_mib_change_event(&pf->hw, false, NULL);
5435 i40e_aq_stop_lldp(&pf->hw, true, false, NULL);
5436 } else {
5437 status = i40e_aq_start_lldp(&pf->hw, false, NULL);
5438 if (status) {
5439 adq_err = pf->hw.aq.asq_last_status;
5440 switch (adq_err) {
5441 case I40E_AQ_RC_EEXIST:
5442 dev_warn(&pf->pdev->dev,
5443 "FW LLDP agent is already running\n");
5444 reset_needed = 0;
5445 break;
5446 case I40E_AQ_RC_EPERM:
5447 dev_warn(&pf->pdev->dev,
5448 "Device configuration forbids SW from starting the LLDP agent.\n");
5449 return -EINVAL;
5450 case I40E_AQ_RC_EAGAIN:
5451 dev_warn(&pf->pdev->dev,
5452 "Stop FW LLDP agent command is still being processed, please try again in a second.\n");
5453 return -EBUSY;
5454 default:
5455 dev_warn(&pf->pdev->dev,
5456 "Starting FW LLDP agent failed: error: %pe, %s\n",
5457 ERR_PTR(status),
5458 i40e_aq_str(&pf->hw,
5459 adq_err));
5460 return -EINVAL;
5461 }
5462 }
5463 }
5464 }
5465
5466 /* Now that we've checked to ensure that the new flags are valid, load
5467 * them into place. Since we only modify flags either (a) during
5468 * initialization or (b) while holding the RTNL lock, we don't need
5469 * anything fancy here.
5470 */
5471 bitmap_copy(pf->flags, new_flags, I40E_PF_FLAGS_NBITS);
5472
5473 /* Issue reset to cause things to take effect, as additional bits
5474 * are added we will need to create a mask of bits requiring reset
5475 */
5476 if (reset_needed)
5477 i40e_do_reset(pf, reset_needed, true);
5478
5479 return 0;
5480}
5481
5482/**
5483 * i40e_get_module_info - get (Q)SFP+ module type info
5484 * @netdev: network interface device structure
5485 * @modinfo: module EEPROM size and layout information structure
5486 **/
5487static int i40e_get_module_info(struct net_device *netdev,
5488 struct ethtool_modinfo *modinfo)
5489{
5490 struct i40e_netdev_priv *np = netdev_priv(netdev);
5491 struct i40e_vsi *vsi = np->vsi;
5492 struct i40e_pf *pf = vsi->back;
5493 struct i40e_hw *hw = &pf->hw;
5494 u32 sff8472_comp = 0;
5495 u32 sff8472_swap = 0;
5496 u32 sff8636_rev = 0;
5497 u32 type = 0;
5498 int status;
5499
5500 /* Check if firmware supports reading module EEPROM. */
5501 if (!test_bit(I40E_HW_CAP_AQ_PHY_ACCESS, hw->caps)) {
5502 netdev_err(vsi->netdev, "Module EEPROM memory read not supported. Please update the NVM image.\n");
5503 return -EINVAL;
5504 }
5505
5506 status = i40e_update_link_info(hw);
5507 if (status)
5508 return -EIO;
5509
5510 if (hw->phy.link_info.phy_type == I40E_PHY_TYPE_EMPTY) {
5511 netdev_err(vsi->netdev, "Cannot read module EEPROM memory. No module connected.\n");
5512 return -EINVAL;
5513 }
5514
5515 type = hw->phy.link_info.module_type[0];
5516
5517 switch (type) {
5518 case I40E_MODULE_TYPE_SFP:
5519 status = i40e_aq_get_phy_register(hw,
5520 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5521 I40E_I2C_EEPROM_DEV_ADDR, true,
5522 I40E_MODULE_SFF_8472_COMP,
5523 &sff8472_comp, NULL);
5524 if (status)
5525 return -EIO;
5526
5527 status = i40e_aq_get_phy_register(hw,
5528 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5529 I40E_I2C_EEPROM_DEV_ADDR, true,
5530 I40E_MODULE_SFF_8472_SWAP,
5531 &sff8472_swap, NULL);
5532 if (status)
5533 return -EIO;
5534
5535 /* Check if the module requires address swap to access
5536 * the other EEPROM memory page.
5537 */
5538 if (sff8472_swap & I40E_MODULE_SFF_ADDR_MODE) {
5539 netdev_warn(vsi->netdev, "Module address swap to access page 0xA2 is not supported.\n");
5540 modinfo->type = ETH_MODULE_SFF_8079;
5541 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5542 } else if (sff8472_comp == 0x00) {
5543 /* Module is not SFF-8472 compliant */
5544 modinfo->type = ETH_MODULE_SFF_8079;
5545 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5546 } else if (!(sff8472_swap & I40E_MODULE_SFF_DDM_IMPLEMENTED)) {
5547 /* Module is SFF-8472 compliant but doesn't implement
5548 * Digital Diagnostic Monitoring (DDM).
5549 */
5550 modinfo->type = ETH_MODULE_SFF_8079;
5551 modinfo->eeprom_len = ETH_MODULE_SFF_8079_LEN;
5552 } else {
5553 modinfo->type = ETH_MODULE_SFF_8472;
5554 modinfo->eeprom_len = ETH_MODULE_SFF_8472_LEN;
5555 }
5556 break;
5557 case I40E_MODULE_TYPE_QSFP_PLUS:
5558 /* Read from memory page 0. */
5559 status = i40e_aq_get_phy_register(hw,
5560 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5561 0, true,
5562 I40E_MODULE_REVISION_ADDR,
5563 &sff8636_rev, NULL);
5564 if (status)
5565 return -EIO;
5566 /* Determine revision compliance byte */
5567 if (sff8636_rev > 0x02) {
5568 /* Module is SFF-8636 compliant */
5569 modinfo->type = ETH_MODULE_SFF_8636;
5570 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5571 } else {
5572 modinfo->type = ETH_MODULE_SFF_8436;
5573 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5574 }
5575 break;
5576 case I40E_MODULE_TYPE_QSFP28:
5577 modinfo->type = ETH_MODULE_SFF_8636;
5578 modinfo->eeprom_len = I40E_MODULE_QSFP_MAX_LEN;
5579 break;
5580 default:
5581 netdev_dbg(vsi->netdev, "SFP module type unrecognized or no SFP connector used.\n");
5582 return -EOPNOTSUPP;
5583 }
5584 return 0;
5585}
5586
5587/**
5588 * i40e_get_module_eeprom - fills buffer with (Q)SFP+ module memory contents
5589 * @netdev: network interface device structure
5590 * @ee: EEPROM dump request structure
5591 * @data: buffer to be filled with EEPROM contents
5592 **/
5593static int i40e_get_module_eeprom(struct net_device *netdev,
5594 struct ethtool_eeprom *ee,
5595 u8 *data)
5596{
5597 struct i40e_netdev_priv *np = netdev_priv(netdev);
5598 struct i40e_vsi *vsi = np->vsi;
5599 struct i40e_pf *pf = vsi->back;
5600 struct i40e_hw *hw = &pf->hw;
5601 bool is_sfp = false;
5602 u32 value = 0;
5603 int status;
5604 int i;
5605
5606 if (!ee || !ee->len || !data)
5607 return -EINVAL;
5608
5609 if (hw->phy.link_info.module_type[0] == I40E_MODULE_TYPE_SFP)
5610 is_sfp = true;
5611
5612 for (i = 0; i < ee->len; i++) {
5613 u32 offset = i + ee->offset;
5614 u32 addr = is_sfp ? I40E_I2C_EEPROM_DEV_ADDR : 0;
5615
5616 /* Check if we need to access the other memory page */
5617 if (is_sfp) {
5618 if (offset >= ETH_MODULE_SFF_8079_LEN) {
5619 offset -= ETH_MODULE_SFF_8079_LEN;
5620 addr = I40E_I2C_EEPROM_DEV_ADDR2;
5621 }
5622 } else {
5623 while (offset >= ETH_MODULE_SFF_8436_LEN) {
5624 /* Compute memory page number and offset. */
5625 offset -= ETH_MODULE_SFF_8436_LEN / 2;
5626 addr++;
5627 }
5628 }
5629
5630 status = i40e_aq_get_phy_register(hw,
5631 I40E_AQ_PHY_REG_ACCESS_EXTERNAL_MODULE,
5632 addr, true, offset, &value, NULL);
5633 if (status)
5634 return -EIO;
5635 data[i] = value;
5636 }
5637 return 0;
5638}
5639
5640static void i40e_eee_capability_to_kedata_supported(__le16 eee_capability_,
5641 unsigned long *supported)
5642{
5643 const int eee_capability = le16_to_cpu(eee_capability_);
5644 static const int lut[] = {
5645 ETHTOOL_LINK_MODE_100baseT_Full_BIT,
5646 ETHTOOL_LINK_MODE_1000baseT_Full_BIT,
5647 ETHTOOL_LINK_MODE_10000baseT_Full_BIT,
5648 ETHTOOL_LINK_MODE_1000baseKX_Full_BIT,
5649 ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT,
5650 ETHTOOL_LINK_MODE_10000baseKR_Full_BIT,
5651 ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT,
5652 };
5653
5654 linkmode_zero(supported);
5655 for (unsigned int i = ARRAY_SIZE(lut); i--; )
5656 if (eee_capability & BIT(i + 1))
5657 linkmode_set_bit(lut[i], supported);
5658}
5659
5660static int i40e_get_eee(struct net_device *netdev, struct ethtool_keee *edata)
5661{
5662 struct i40e_netdev_priv *np = netdev_priv(netdev);
5663 struct i40e_aq_get_phy_abilities_resp phy_cfg;
5664 struct i40e_vsi *vsi = np->vsi;
5665 struct i40e_pf *pf = vsi->back;
5666 struct i40e_hw *hw = &pf->hw;
5667 int status;
5668
5669 /* Get initial PHY capabilities */
5670 status = i40e_aq_get_phy_capabilities(hw, false, true, &phy_cfg, NULL);
5671 if (status)
5672 return -EAGAIN;
5673
5674 /* Check whether NIC configuration is compatible with Energy Efficient
5675 * Ethernet (EEE) mode.
5676 */
5677 if (phy_cfg.eee_capability == 0)
5678 return -EOPNOTSUPP;
5679
5680 i40e_eee_capability_to_kedata_supported(phy_cfg.eee_capability,
5681 edata->supported);
5682 linkmode_copy(edata->lp_advertised, edata->supported);
5683
5684 /* Get current configuration */
5685 status = i40e_aq_get_phy_capabilities(hw, false, false, &phy_cfg, NULL);
5686 if (status)
5687 return -EAGAIN;
5688
5689 linkmode_zero(edata->advertised);
5690 if (phy_cfg.eee_capability)
5691 linkmode_copy(edata->advertised, edata->supported);
5692 edata->eee_enabled = !!phy_cfg.eee_capability;
5693 edata->tx_lpi_enabled = pf->stats.tx_lpi_status;
5694
5695 edata->eee_active = pf->stats.tx_lpi_status && pf->stats.rx_lpi_status;
5696
5697 return 0;
5698}
5699
5700static int i40e_is_eee_param_supported(struct net_device *netdev,
5701 struct ethtool_keee *edata)
5702{
5703 struct i40e_netdev_priv *np = netdev_priv(netdev);
5704 struct i40e_vsi *vsi = np->vsi;
5705 struct i40e_pf *pf = vsi->back;
5706 struct i40e_ethtool_not_used {
5707 bool value;
5708 const char *name;
5709 } param[] = {
5710 {!!(edata->advertised[0] & ~edata->supported[0]), "advertise"},
5711 {!!edata->tx_lpi_timer, "tx-timer"},
5712 {edata->tx_lpi_enabled != pf->stats.tx_lpi_status, "tx-lpi"}
5713 };
5714 int i;
5715
5716 for (i = 0; i < ARRAY_SIZE(param); i++) {
5717 if (param[i].value) {
5718 netdev_info(netdev,
5719 "EEE setting %s not supported\n",
5720 param[i].name);
5721 return -EOPNOTSUPP;
5722 }
5723 }
5724
5725 return 0;
5726}
5727
5728static int i40e_set_eee(struct net_device *netdev, struct ethtool_keee *edata)
5729{
5730 struct i40e_netdev_priv *np = netdev_priv(netdev);
5731 struct i40e_aq_get_phy_abilities_resp abilities;
5732 struct i40e_aq_set_phy_config config;
5733 struct i40e_vsi *vsi = np->vsi;
5734 struct i40e_pf *pf = vsi->back;
5735 struct i40e_hw *hw = &pf->hw;
5736 __le16 eee_capability;
5737 int status;
5738
5739 /* Deny parameters we don't support */
5740 if (i40e_is_eee_param_supported(netdev, edata))
5741 return -EOPNOTSUPP;
5742
5743 /* Get initial PHY capabilities */
5744 status = i40e_aq_get_phy_capabilities(hw, false, true, &abilities,
5745 NULL);
5746 if (status)
5747 return -EAGAIN;
5748
5749 /* Check whether NIC configuration is compatible with Energy Efficient
5750 * Ethernet (EEE) mode.
5751 */
5752 if (abilities.eee_capability == 0)
5753 return -EOPNOTSUPP;
5754
5755 /* Cache initial EEE capability */
5756 eee_capability = abilities.eee_capability;
5757
5758 /* Get current PHY configuration */
5759 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
5760 NULL);
5761 if (status)
5762 return -EAGAIN;
5763
5764 /* Cache current PHY configuration */
5765 config.phy_type = abilities.phy_type;
5766 config.phy_type_ext = abilities.phy_type_ext;
5767 config.link_speed = abilities.link_speed;
5768 config.abilities = abilities.abilities |
5769 I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
5770 config.eeer = abilities.eeer_val;
5771 config.low_power_ctrl = abilities.d3_lpan;
5772 config.fec_config = abilities.fec_cfg_curr_mod_ext_info &
5773 I40E_AQ_PHY_FEC_CONFIG_MASK;
5774
5775 /* Set desired EEE state */
5776 if (edata->eee_enabled) {
5777 config.eee_capability = eee_capability;
5778 config.eeer |= cpu_to_le32(I40E_PRTPM_EEER_TX_LPI_EN_MASK);
5779 } else {
5780 config.eee_capability = 0;
5781 config.eeer &= cpu_to_le32(~I40E_PRTPM_EEER_TX_LPI_EN_MASK);
5782 }
5783
5784 /* Apply modified PHY configuration */
5785 status = i40e_aq_set_phy_config(hw, &config, NULL);
5786 if (status)
5787 return -EAGAIN;
5788
5789 return 0;
5790}
5791
5792static const struct ethtool_ops i40e_ethtool_recovery_mode_ops = {
5793 .get_drvinfo = i40e_get_drvinfo,
5794 .set_eeprom = i40e_set_eeprom,
5795 .get_eeprom_len = i40e_get_eeprom_len,
5796 .get_eeprom = i40e_get_eeprom,
5797};
5798
5799static const struct ethtool_ops i40e_ethtool_ops = {
5800 .supported_coalesce_params = ETHTOOL_COALESCE_USECS |
5801 ETHTOOL_COALESCE_TX_MAX_FRAMES_IRQ |
5802 ETHTOOL_COALESCE_USE_ADAPTIVE |
5803 ETHTOOL_COALESCE_RX_USECS_HIGH |
5804 ETHTOOL_COALESCE_TX_USECS_HIGH,
5805 .get_drvinfo = i40e_get_drvinfo,
5806 .get_regs_len = i40e_get_regs_len,
5807 .get_regs = i40e_get_regs,
5808 .nway_reset = i40e_nway_reset,
5809 .get_link = ethtool_op_get_link,
5810 .get_wol = i40e_get_wol,
5811 .set_wol = i40e_set_wol,
5812 .set_eeprom = i40e_set_eeprom,
5813 .get_eeprom_len = i40e_get_eeprom_len,
5814 .get_eeprom = i40e_get_eeprom,
5815 .get_ringparam = i40e_get_ringparam,
5816 .set_ringparam = i40e_set_ringparam,
5817 .get_pauseparam = i40e_get_pauseparam,
5818 .set_pauseparam = i40e_set_pauseparam,
5819 .get_msglevel = i40e_get_msglevel,
5820 .set_msglevel = i40e_set_msglevel,
5821 .get_rxnfc = i40e_get_rxnfc,
5822 .set_rxnfc = i40e_set_rxnfc,
5823 .self_test = i40e_diag_test,
5824 .get_strings = i40e_get_strings,
5825 .get_eee = i40e_get_eee,
5826 .set_eee = i40e_set_eee,
5827 .set_phys_id = i40e_set_phys_id,
5828 .get_sset_count = i40e_get_sset_count,
5829 .get_ethtool_stats = i40e_get_ethtool_stats,
5830 .get_coalesce = i40e_get_coalesce,
5831 .set_coalesce = i40e_set_coalesce,
5832 .get_rxfh_key_size = i40e_get_rxfh_key_size,
5833 .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
5834 .get_rxfh = i40e_get_rxfh,
5835 .set_rxfh = i40e_set_rxfh,
5836 .get_channels = i40e_get_channels,
5837 .set_channels = i40e_set_channels,
5838 .get_module_info = i40e_get_module_info,
5839 .get_module_eeprom = i40e_get_module_eeprom,
5840 .get_ts_info = i40e_get_ts_info,
5841 .get_priv_flags = i40e_get_priv_flags,
5842 .set_priv_flags = i40e_set_priv_flags,
5843 .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
5844 .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
5845 .get_link_ksettings = i40e_get_link_ksettings,
5846 .set_link_ksettings = i40e_set_link_ksettings,
5847 .get_fecparam = i40e_get_fec_param,
5848 .set_fecparam = i40e_set_fec_param,
5849 .flash_device = i40e_ddp_flash,
5850};
5851
5852void i40e_set_ethtool_ops(struct net_device *netdev)
5853{
5854 struct i40e_netdev_priv *np = netdev_priv(netdev);
5855 struct i40e_pf *pf = np->vsi->back;
5856
5857 if (!test_bit(__I40E_RECOVERY_MODE, pf->state))
5858 netdev->ethtool_ops = &i40e_ethtool_ops;
5859 else
5860 netdev->ethtool_ops = &i40e_ethtool_recovery_mode_ops;
5861}
1/*******************************************************************************
2 *
3 * Intel Ethernet Controller XL710 Family Linux Driver
4 * Copyright(c) 2013 - 2016 Intel Corporation.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms and conditions of the GNU General Public License,
8 * version 2, as published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along
16 * with this program. If not, see <http://www.gnu.org/licenses/>.
17 *
18 * The full GNU General Public License is included in this distribution in
19 * the file called "COPYING".
20 *
21 * Contact Information:
22 * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
23 * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
24 *
25 ******************************************************************************/
26
27/* ethtool support for i40e */
28
29#include "i40e.h"
30#include "i40e_diag.h"
31
32struct i40e_stats {
33 char stat_string[ETH_GSTRING_LEN];
34 int sizeof_stat;
35 int stat_offset;
36};
37
38#define I40E_STAT(_type, _name, _stat) { \
39 .stat_string = _name, \
40 .sizeof_stat = FIELD_SIZEOF(_type, _stat), \
41 .stat_offset = offsetof(_type, _stat) \
42}
43
44#define I40E_NETDEV_STAT(_net_stat) \
45 I40E_STAT(struct rtnl_link_stats64, #_net_stat, _net_stat)
46#define I40E_PF_STAT(_name, _stat) \
47 I40E_STAT(struct i40e_pf, _name, _stat)
48#define I40E_VSI_STAT(_name, _stat) \
49 I40E_STAT(struct i40e_vsi, _name, _stat)
50#define I40E_VEB_STAT(_name, _stat) \
51 I40E_STAT(struct i40e_veb, _name, _stat)
52
53static const struct i40e_stats i40e_gstrings_net_stats[] = {
54 I40E_NETDEV_STAT(rx_packets),
55 I40E_NETDEV_STAT(tx_packets),
56 I40E_NETDEV_STAT(rx_bytes),
57 I40E_NETDEV_STAT(tx_bytes),
58 I40E_NETDEV_STAT(rx_errors),
59 I40E_NETDEV_STAT(tx_errors),
60 I40E_NETDEV_STAT(rx_dropped),
61 I40E_NETDEV_STAT(tx_dropped),
62 I40E_NETDEV_STAT(collisions),
63 I40E_NETDEV_STAT(rx_length_errors),
64 I40E_NETDEV_STAT(rx_crc_errors),
65};
66
67static const struct i40e_stats i40e_gstrings_veb_stats[] = {
68 I40E_VEB_STAT("rx_bytes", stats.rx_bytes),
69 I40E_VEB_STAT("tx_bytes", stats.tx_bytes),
70 I40E_VEB_STAT("rx_unicast", stats.rx_unicast),
71 I40E_VEB_STAT("tx_unicast", stats.tx_unicast),
72 I40E_VEB_STAT("rx_multicast", stats.rx_multicast),
73 I40E_VEB_STAT("tx_multicast", stats.tx_multicast),
74 I40E_VEB_STAT("rx_broadcast", stats.rx_broadcast),
75 I40E_VEB_STAT("tx_broadcast", stats.tx_broadcast),
76 I40E_VEB_STAT("rx_discards", stats.rx_discards),
77 I40E_VEB_STAT("tx_discards", stats.tx_discards),
78 I40E_VEB_STAT("tx_errors", stats.tx_errors),
79 I40E_VEB_STAT("rx_unknown_protocol", stats.rx_unknown_protocol),
80};
81
82static const struct i40e_stats i40e_gstrings_misc_stats[] = {
83 I40E_VSI_STAT("rx_unicast", eth_stats.rx_unicast),
84 I40E_VSI_STAT("tx_unicast", eth_stats.tx_unicast),
85 I40E_VSI_STAT("rx_multicast", eth_stats.rx_multicast),
86 I40E_VSI_STAT("tx_multicast", eth_stats.tx_multicast),
87 I40E_VSI_STAT("rx_broadcast", eth_stats.rx_broadcast),
88 I40E_VSI_STAT("tx_broadcast", eth_stats.tx_broadcast),
89 I40E_VSI_STAT("rx_unknown_protocol", eth_stats.rx_unknown_protocol),
90 I40E_VSI_STAT("tx_linearize", tx_linearize),
91 I40E_VSI_STAT("tx_force_wb", tx_force_wb),
92 I40E_VSI_STAT("tx_lost_interrupt", tx_lost_interrupt),
93 I40E_VSI_STAT("rx_alloc_fail", rx_buf_failed),
94 I40E_VSI_STAT("rx_pg_alloc_fail", rx_page_failed),
95};
96
97/* These PF_STATs might look like duplicates of some NETDEV_STATs,
98 * but they are separate. This device supports Virtualization, and
99 * as such might have several netdevs supporting VMDq and FCoE going
100 * through a single port. The NETDEV_STATs are for individual netdevs
101 * seen at the top of the stack, and the PF_STATs are for the physical
102 * function at the bottom of the stack hosting those netdevs.
103 *
104 * The PF_STATs are appended to the netdev stats only when ethtool -S
105 * is queried on the base PF netdev, not on the VMDq or FCoE netdev.
106 */
107static const struct i40e_stats i40e_gstrings_stats[] = {
108 I40E_PF_STAT("rx_bytes", stats.eth.rx_bytes),
109 I40E_PF_STAT("tx_bytes", stats.eth.tx_bytes),
110 I40E_PF_STAT("rx_unicast", stats.eth.rx_unicast),
111 I40E_PF_STAT("tx_unicast", stats.eth.tx_unicast),
112 I40E_PF_STAT("rx_multicast", stats.eth.rx_multicast),
113 I40E_PF_STAT("tx_multicast", stats.eth.tx_multicast),
114 I40E_PF_STAT("rx_broadcast", stats.eth.rx_broadcast),
115 I40E_PF_STAT("tx_broadcast", stats.eth.tx_broadcast),
116 I40E_PF_STAT("tx_errors", stats.eth.tx_errors),
117 I40E_PF_STAT("rx_dropped", stats.eth.rx_discards),
118 I40E_PF_STAT("tx_dropped_link_down", stats.tx_dropped_link_down),
119 I40E_PF_STAT("rx_crc_errors", stats.crc_errors),
120 I40E_PF_STAT("illegal_bytes", stats.illegal_bytes),
121 I40E_PF_STAT("mac_local_faults", stats.mac_local_faults),
122 I40E_PF_STAT("mac_remote_faults", stats.mac_remote_faults),
123 I40E_PF_STAT("tx_timeout", tx_timeout_count),
124 I40E_PF_STAT("rx_csum_bad", hw_csum_rx_error),
125 I40E_PF_STAT("rx_length_errors", stats.rx_length_errors),
126 I40E_PF_STAT("link_xon_rx", stats.link_xon_rx),
127 I40E_PF_STAT("link_xoff_rx", stats.link_xoff_rx),
128 I40E_PF_STAT("link_xon_tx", stats.link_xon_tx),
129 I40E_PF_STAT("link_xoff_tx", stats.link_xoff_tx),
130 I40E_PF_STAT("rx_size_64", stats.rx_size_64),
131 I40E_PF_STAT("rx_size_127", stats.rx_size_127),
132 I40E_PF_STAT("rx_size_255", stats.rx_size_255),
133 I40E_PF_STAT("rx_size_511", stats.rx_size_511),
134 I40E_PF_STAT("rx_size_1023", stats.rx_size_1023),
135 I40E_PF_STAT("rx_size_1522", stats.rx_size_1522),
136 I40E_PF_STAT("rx_size_big", stats.rx_size_big),
137 I40E_PF_STAT("tx_size_64", stats.tx_size_64),
138 I40E_PF_STAT("tx_size_127", stats.tx_size_127),
139 I40E_PF_STAT("tx_size_255", stats.tx_size_255),
140 I40E_PF_STAT("tx_size_511", stats.tx_size_511),
141 I40E_PF_STAT("tx_size_1023", stats.tx_size_1023),
142 I40E_PF_STAT("tx_size_1522", stats.tx_size_1522),
143 I40E_PF_STAT("tx_size_big", stats.tx_size_big),
144 I40E_PF_STAT("rx_undersize", stats.rx_undersize),
145 I40E_PF_STAT("rx_fragments", stats.rx_fragments),
146 I40E_PF_STAT("rx_oversize", stats.rx_oversize),
147 I40E_PF_STAT("rx_jabber", stats.rx_jabber),
148 I40E_PF_STAT("VF_admin_queue_requests", vf_aq_requests),
149 I40E_PF_STAT("arq_overflows", arq_overflows),
150 I40E_PF_STAT("rx_hwtstamp_cleared", rx_hwtstamp_cleared),
151 I40E_PF_STAT("fdir_flush_cnt", fd_flush_cnt),
152 I40E_PF_STAT("fdir_atr_match", stats.fd_atr_match),
153 I40E_PF_STAT("fdir_atr_tunnel_match", stats.fd_atr_tunnel_match),
154 I40E_PF_STAT("fdir_atr_status", stats.fd_atr_status),
155 I40E_PF_STAT("fdir_sb_match", stats.fd_sb_match),
156 I40E_PF_STAT("fdir_sb_status", stats.fd_sb_status),
157
158 /* LPI stats */
159 I40E_PF_STAT("tx_lpi_status", stats.tx_lpi_status),
160 I40E_PF_STAT("rx_lpi_status", stats.rx_lpi_status),
161 I40E_PF_STAT("tx_lpi_count", stats.tx_lpi_count),
162 I40E_PF_STAT("rx_lpi_count", stats.rx_lpi_count),
163};
164
165#ifdef I40E_FCOE
166static const struct i40e_stats i40e_gstrings_fcoe_stats[] = {
167 I40E_VSI_STAT("fcoe_bad_fccrc", fcoe_stats.fcoe_bad_fccrc),
168 I40E_VSI_STAT("rx_fcoe_dropped", fcoe_stats.rx_fcoe_dropped),
169 I40E_VSI_STAT("rx_fcoe_packets", fcoe_stats.rx_fcoe_packets),
170 I40E_VSI_STAT("rx_fcoe_dwords", fcoe_stats.rx_fcoe_dwords),
171 I40E_VSI_STAT("fcoe_ddp_count", fcoe_stats.fcoe_ddp_count),
172 I40E_VSI_STAT("fcoe_last_error", fcoe_stats.fcoe_last_error),
173 I40E_VSI_STAT("tx_fcoe_packets", fcoe_stats.tx_fcoe_packets),
174 I40E_VSI_STAT("tx_fcoe_dwords", fcoe_stats.tx_fcoe_dwords),
175};
176
177#endif /* I40E_FCOE */
178#define I40E_QUEUE_STATS_LEN(n) \
179 (((struct i40e_netdev_priv *)netdev_priv((n)))->vsi->num_queue_pairs \
180 * 2 /* Tx and Rx together */ \
181 * (sizeof(struct i40e_queue_stats) / sizeof(u64)))
182#define I40E_GLOBAL_STATS_LEN ARRAY_SIZE(i40e_gstrings_stats)
183#define I40E_NETDEV_STATS_LEN ARRAY_SIZE(i40e_gstrings_net_stats)
184#define I40E_MISC_STATS_LEN ARRAY_SIZE(i40e_gstrings_misc_stats)
185#ifdef I40E_FCOE
186#define I40E_FCOE_STATS_LEN ARRAY_SIZE(i40e_gstrings_fcoe_stats)
187#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
188 I40E_FCOE_STATS_LEN + \
189 I40E_MISC_STATS_LEN + \
190 I40E_QUEUE_STATS_LEN((n)))
191#else
192#define I40E_VSI_STATS_LEN(n) (I40E_NETDEV_STATS_LEN + \
193 I40E_MISC_STATS_LEN + \
194 I40E_QUEUE_STATS_LEN((n)))
195#endif /* I40E_FCOE */
196#define I40E_PFC_STATS_LEN ( \
197 (FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_rx) + \
198 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_rx) + \
199 FIELD_SIZEOF(struct i40e_pf, stats.priority_xoff_tx) + \
200 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_tx) + \
201 FIELD_SIZEOF(struct i40e_pf, stats.priority_xon_2_xoff)) \
202 / sizeof(u64))
203#define I40E_VEB_TC_STATS_LEN ( \
204 (FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_packets) + \
205 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_rx_bytes) + \
206 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_packets) + \
207 FIELD_SIZEOF(struct i40e_veb, tc_stats.tc_tx_bytes)) \
208 / sizeof(u64))
209#define I40E_VEB_STATS_LEN ARRAY_SIZE(i40e_gstrings_veb_stats)
210#define I40E_VEB_STATS_TOTAL (I40E_VEB_STATS_LEN + I40E_VEB_TC_STATS_LEN)
211#define I40E_PF_STATS_LEN(n) (I40E_GLOBAL_STATS_LEN + \
212 I40E_PFC_STATS_LEN + \
213 I40E_VSI_STATS_LEN((n)))
214
215enum i40e_ethtool_test_id {
216 I40E_ETH_TEST_REG = 0,
217 I40E_ETH_TEST_EEPROM,
218 I40E_ETH_TEST_INTR,
219 I40E_ETH_TEST_LINK,
220};
221
222static const char i40e_gstrings_test[][ETH_GSTRING_LEN] = {
223 "Register test (offline)",
224 "Eeprom test (offline)",
225 "Interrupt test (offline)",
226 "Link test (on/offline)"
227};
228
229#define I40E_TEST_LEN (sizeof(i40e_gstrings_test) / ETH_GSTRING_LEN)
230
231static const char i40e_priv_flags_strings[][ETH_GSTRING_LEN] = {
232 "MFP",
233 "LinkPolling",
234 "flow-director-atr",
235 "veb-stats",
236 "hw-atr-eviction",
237};
238
239#define I40E_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_priv_flags_strings)
240
241/* Private flags with a global effect, restricted to PF 0 */
242static const char i40e_gl_priv_flags_strings[][ETH_GSTRING_LEN] = {
243 "vf-true-promisc-support",
244};
245
246#define I40E_GL_PRIV_FLAGS_STR_LEN ARRAY_SIZE(i40e_gl_priv_flags_strings)
247
248/**
249 * i40e_partition_setting_complaint - generic complaint for MFP restriction
250 * @pf: the PF struct
251 **/
252static void i40e_partition_setting_complaint(struct i40e_pf *pf)
253{
254 dev_info(&pf->pdev->dev,
255 "The link settings are allowed to be changed only from the first partition of a given port. Please switch to the first partition in order to change the setting.\n");
256}
257
258/**
259 * i40e_phy_type_to_ethtool - convert the phy_types to ethtool link modes
260 * @phy_types: PHY types to convert
261 * @supported: pointer to the ethtool supported variable to fill in
262 * @advertising: pointer to the ethtool advertising variable to fill in
263 *
264 **/
265static void i40e_phy_type_to_ethtool(struct i40e_pf *pf, u32 *supported,
266 u32 *advertising)
267{
268 struct i40e_link_status *hw_link_info = &pf->hw.phy.link_info;
269 u64 phy_types = pf->hw.phy.phy_types;
270
271 *supported = 0x0;
272 *advertising = 0x0;
273
274 if (phy_types & I40E_CAP_PHY_TYPE_SGMII) {
275 *supported |= SUPPORTED_Autoneg |
276 SUPPORTED_1000baseT_Full;
277 *advertising |= ADVERTISED_Autoneg;
278 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
279 *advertising |= ADVERTISED_1000baseT_Full;
280 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) {
281 *supported |= SUPPORTED_100baseT_Full;
282 *advertising |= ADVERTISED_100baseT_Full;
283 }
284 }
285 if (phy_types & I40E_CAP_PHY_TYPE_XAUI ||
286 phy_types & I40E_CAP_PHY_TYPE_XFI ||
287 phy_types & I40E_CAP_PHY_TYPE_SFI ||
288 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SFPP_CU ||
289 phy_types & I40E_CAP_PHY_TYPE_10GBASE_AOC)
290 *supported |= SUPPORTED_10000baseT_Full;
291 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1_CU ||
292 phy_types & I40E_CAP_PHY_TYPE_10GBASE_CR1 ||
293 phy_types & I40E_CAP_PHY_TYPE_10GBASE_T ||
294 phy_types & I40E_CAP_PHY_TYPE_10GBASE_SR ||
295 phy_types & I40E_CAP_PHY_TYPE_10GBASE_LR) {
296 *supported |= SUPPORTED_Autoneg |
297 SUPPORTED_10000baseT_Full;
298 *advertising |= ADVERTISED_Autoneg;
299 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
300 *advertising |= ADVERTISED_10000baseT_Full;
301 }
302 if (phy_types & I40E_CAP_PHY_TYPE_XLAUI ||
303 phy_types & I40E_CAP_PHY_TYPE_XLPPI ||
304 phy_types & I40E_CAP_PHY_TYPE_40GBASE_AOC)
305 *supported |= SUPPORTED_40000baseCR4_Full;
306 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4_CU ||
307 phy_types & I40E_CAP_PHY_TYPE_40GBASE_CR4) {
308 *supported |= SUPPORTED_Autoneg |
309 SUPPORTED_40000baseCR4_Full;
310 *advertising |= ADVERTISED_Autoneg;
311 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_40GB)
312 *advertising |= ADVERTISED_40000baseCR4_Full;
313 }
314 if (phy_types & I40E_CAP_PHY_TYPE_100BASE_TX) {
315 *supported |= SUPPORTED_Autoneg |
316 SUPPORTED_100baseT_Full;
317 *advertising |= ADVERTISED_Autoneg;
318 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
319 *advertising |= ADVERTISED_100baseT_Full;
320 }
321 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_T ||
322 phy_types & I40E_CAP_PHY_TYPE_1000BASE_SX ||
323 phy_types & I40E_CAP_PHY_TYPE_1000BASE_LX ||
324 phy_types & I40E_CAP_PHY_TYPE_1000BASE_T_OPTICAL) {
325 *supported |= SUPPORTED_Autoneg |
326 SUPPORTED_1000baseT_Full;
327 *advertising |= ADVERTISED_Autoneg;
328 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
329 *advertising |= ADVERTISED_1000baseT_Full;
330 }
331 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_SR4)
332 *supported |= SUPPORTED_40000baseSR4_Full;
333 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_LR4)
334 *supported |= SUPPORTED_40000baseLR4_Full;
335 if (phy_types & I40E_CAP_PHY_TYPE_40GBASE_KR4) {
336 *supported |= SUPPORTED_40000baseKR4_Full |
337 SUPPORTED_Autoneg;
338 *advertising |= ADVERTISED_40000baseKR4_Full |
339 ADVERTISED_Autoneg;
340 }
341 if (phy_types & I40E_CAP_PHY_TYPE_20GBASE_KR2) {
342 *supported |= SUPPORTED_20000baseKR2_Full |
343 SUPPORTED_Autoneg;
344 *advertising |= ADVERTISED_Autoneg;
345 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_20GB)
346 *advertising |= ADVERTISED_20000baseKR2_Full;
347 }
348 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KR) {
349 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))
350 *supported |= SUPPORTED_10000baseKR_Full |
351 SUPPORTED_Autoneg;
352 *advertising |= ADVERTISED_Autoneg;
353 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
354 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))
355 *advertising |= ADVERTISED_10000baseKR_Full;
356 }
357 if (phy_types & I40E_CAP_PHY_TYPE_10GBASE_KX4) {
358 *supported |= SUPPORTED_10000baseKX4_Full |
359 SUPPORTED_Autoneg;
360 *advertising |= ADVERTISED_Autoneg;
361 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
362 *advertising |= ADVERTISED_10000baseKX4_Full;
363 }
364 if (phy_types & I40E_CAP_PHY_TYPE_1000BASE_KX) {
365 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))
366 *supported |= SUPPORTED_1000baseKX_Full |
367 SUPPORTED_Autoneg;
368 *advertising |= ADVERTISED_Autoneg;
369 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
370 if (!(pf->flags & I40E_FLAG_HAVE_CRT_RETIMER))
371 *advertising |= ADVERTISED_1000baseKX_Full;
372 }
373 if (phy_types & I40E_CAP_PHY_TYPE_25GBASE_KR ||
374 phy_types & I40E_CAP_PHY_TYPE_25GBASE_CR ||
375 phy_types & I40E_CAP_PHY_TYPE_25GBASE_SR ||
376 phy_types & I40E_CAP_PHY_TYPE_25GBASE_LR) {
377 *supported |= SUPPORTED_Autoneg;
378 *advertising |= ADVERTISED_Autoneg;
379 }
380}
381
382/**
383 * i40e_get_settings_link_up - Get the Link settings for when link is up
384 * @hw: hw structure
385 * @ecmd: ethtool command to fill in
386 * @netdev: network interface device structure
387 *
388 **/
389static void i40e_get_settings_link_up(struct i40e_hw *hw,
390 struct ethtool_cmd *ecmd,
391 struct net_device *netdev,
392 struct i40e_pf *pf)
393{
394 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
395 u32 link_speed = hw_link_info->link_speed;
396 u32 e_advertising = 0x0;
397 u32 e_supported = 0x0;
398
399 /* Initialize supported and advertised settings based on phy settings */
400 switch (hw_link_info->phy_type) {
401 case I40E_PHY_TYPE_40GBASE_CR4:
402 case I40E_PHY_TYPE_40GBASE_CR4_CU:
403 ecmd->supported = SUPPORTED_Autoneg |
404 SUPPORTED_40000baseCR4_Full;
405 ecmd->advertising = ADVERTISED_Autoneg |
406 ADVERTISED_40000baseCR4_Full;
407 break;
408 case I40E_PHY_TYPE_XLAUI:
409 case I40E_PHY_TYPE_XLPPI:
410 case I40E_PHY_TYPE_40GBASE_AOC:
411 ecmd->supported = SUPPORTED_40000baseCR4_Full;
412 break;
413 case I40E_PHY_TYPE_40GBASE_SR4:
414 ecmd->supported = SUPPORTED_40000baseSR4_Full;
415 break;
416 case I40E_PHY_TYPE_40GBASE_LR4:
417 ecmd->supported = SUPPORTED_40000baseLR4_Full;
418 break;
419 case I40E_PHY_TYPE_10GBASE_SR:
420 case I40E_PHY_TYPE_10GBASE_LR:
421 case I40E_PHY_TYPE_1000BASE_SX:
422 case I40E_PHY_TYPE_1000BASE_LX:
423 ecmd->supported = SUPPORTED_10000baseT_Full;
424 if (hw_link_info->module_type[2] &
425 I40E_MODULE_TYPE_1000BASE_SX ||
426 hw_link_info->module_type[2] &
427 I40E_MODULE_TYPE_1000BASE_LX) {
428 ecmd->supported |= SUPPORTED_1000baseT_Full;
429 if (hw_link_info->requested_speeds &
430 I40E_LINK_SPEED_1GB)
431 ecmd->advertising |= ADVERTISED_1000baseT_Full;
432 }
433 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
434 ecmd->advertising |= ADVERTISED_10000baseT_Full;
435 break;
436 case I40E_PHY_TYPE_10GBASE_T:
437 case I40E_PHY_TYPE_1000BASE_T:
438 case I40E_PHY_TYPE_100BASE_TX:
439 ecmd->supported = SUPPORTED_Autoneg |
440 SUPPORTED_10000baseT_Full |
441 SUPPORTED_1000baseT_Full |
442 SUPPORTED_100baseT_Full;
443 ecmd->advertising = ADVERTISED_Autoneg;
444 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_10GB)
445 ecmd->advertising |= ADVERTISED_10000baseT_Full;
446 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
447 ecmd->advertising |= ADVERTISED_1000baseT_Full;
448 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_100MB)
449 ecmd->advertising |= ADVERTISED_100baseT_Full;
450 break;
451 case I40E_PHY_TYPE_1000BASE_T_OPTICAL:
452 ecmd->supported = SUPPORTED_Autoneg |
453 SUPPORTED_1000baseT_Full;
454 ecmd->advertising = ADVERTISED_Autoneg |
455 ADVERTISED_1000baseT_Full;
456 break;
457 case I40E_PHY_TYPE_10GBASE_CR1_CU:
458 case I40E_PHY_TYPE_10GBASE_CR1:
459 ecmd->supported = SUPPORTED_Autoneg |
460 SUPPORTED_10000baseT_Full;
461 ecmd->advertising = ADVERTISED_Autoneg |
462 ADVERTISED_10000baseT_Full;
463 break;
464 case I40E_PHY_TYPE_XAUI:
465 case I40E_PHY_TYPE_XFI:
466 case I40E_PHY_TYPE_SFI:
467 case I40E_PHY_TYPE_10GBASE_SFPP_CU:
468 case I40E_PHY_TYPE_10GBASE_AOC:
469 ecmd->supported = SUPPORTED_10000baseT_Full;
470 ecmd->advertising = SUPPORTED_10000baseT_Full;
471 break;
472 case I40E_PHY_TYPE_SGMII:
473 ecmd->supported = SUPPORTED_Autoneg |
474 SUPPORTED_1000baseT_Full;
475 if (hw_link_info->requested_speeds & I40E_LINK_SPEED_1GB)
476 ecmd->advertising |= ADVERTISED_1000baseT_Full;
477 if (pf->flags & I40E_FLAG_100M_SGMII_CAPABLE) {
478 ecmd->supported |= SUPPORTED_100baseT_Full;
479 if (hw_link_info->requested_speeds &
480 I40E_LINK_SPEED_100MB)
481 ecmd->advertising |= ADVERTISED_100baseT_Full;
482 }
483 break;
484 case I40E_PHY_TYPE_40GBASE_KR4:
485 case I40E_PHY_TYPE_20GBASE_KR2:
486 case I40E_PHY_TYPE_10GBASE_KR:
487 case I40E_PHY_TYPE_10GBASE_KX4:
488 case I40E_PHY_TYPE_1000BASE_KX:
489 ecmd->supported |= SUPPORTED_40000baseKR4_Full |
490 SUPPORTED_20000baseKR2_Full |
491 SUPPORTED_10000baseKR_Full |
492 SUPPORTED_10000baseKX4_Full |
493 SUPPORTED_1000baseKX_Full |
494 SUPPORTED_Autoneg;
495 ecmd->advertising |= ADVERTISED_40000baseKR4_Full |
496 ADVERTISED_20000baseKR2_Full |
497 ADVERTISED_10000baseKR_Full |
498 ADVERTISED_10000baseKX4_Full |
499 ADVERTISED_1000baseKX_Full |
500 ADVERTISED_Autoneg;
501 break;
502 case I40E_PHY_TYPE_25GBASE_KR:
503 case I40E_PHY_TYPE_25GBASE_CR:
504 case I40E_PHY_TYPE_25GBASE_SR:
505 case I40E_PHY_TYPE_25GBASE_LR:
506 ecmd->supported = SUPPORTED_Autoneg;
507 ecmd->advertising = ADVERTISED_Autoneg;
508 /* TODO: add speeds when ethtool is ready to support*/
509 break;
510 default:
511 /* if we got here and link is up something bad is afoot */
512 netdev_info(netdev, "WARNING: Link is up but PHY type 0x%x is not recognized.\n",
513 hw_link_info->phy_type);
514 }
515
516 /* Now that we've worked out everything that could be supported by the
517 * current PHY type, get what is supported by the NVM and them to
518 * get what is truly supported
519 */
520 i40e_phy_type_to_ethtool(pf, &e_supported,
521 &e_advertising);
522
523 ecmd->supported = ecmd->supported & e_supported;
524 ecmd->advertising = ecmd->advertising & e_advertising;
525
526 /* Set speed and duplex */
527 switch (link_speed) {
528 case I40E_LINK_SPEED_40GB:
529 ethtool_cmd_speed_set(ecmd, SPEED_40000);
530 break;
531 case I40E_LINK_SPEED_25GB:
532#ifdef SPEED_25000
533 ethtool_cmd_speed_set(ecmd, SPEED_25000);
534#else
535 netdev_info(netdev,
536 "Speed is 25G, display not supported by this version of ethtool.\n");
537#endif
538 break;
539 case I40E_LINK_SPEED_20GB:
540 ethtool_cmd_speed_set(ecmd, SPEED_20000);
541 break;
542 case I40E_LINK_SPEED_10GB:
543 ethtool_cmd_speed_set(ecmd, SPEED_10000);
544 break;
545 case I40E_LINK_SPEED_1GB:
546 ethtool_cmd_speed_set(ecmd, SPEED_1000);
547 break;
548 case I40E_LINK_SPEED_100MB:
549 ethtool_cmd_speed_set(ecmd, SPEED_100);
550 break;
551 default:
552 break;
553 }
554 ecmd->duplex = DUPLEX_FULL;
555}
556
557/**
558 * i40e_get_settings_link_down - Get the Link settings for when link is down
559 * @hw: hw structure
560 * @ecmd: ethtool command to fill in
561 *
562 * Reports link settings that can be determined when link is down
563 **/
564static void i40e_get_settings_link_down(struct i40e_hw *hw,
565 struct ethtool_cmd *ecmd,
566 struct i40e_pf *pf)
567{
568 /* link is down and the driver needs to fall back on
569 * supported phy types to figure out what info to display
570 */
571 i40e_phy_type_to_ethtool(pf, &ecmd->supported,
572 &ecmd->advertising);
573
574 /* With no link speed and duplex are unknown */
575 ethtool_cmd_speed_set(ecmd, SPEED_UNKNOWN);
576 ecmd->duplex = DUPLEX_UNKNOWN;
577}
578
579/**
580 * i40e_get_settings - Get Link Speed and Duplex settings
581 * @netdev: network interface device structure
582 * @ecmd: ethtool command
583 *
584 * Reports speed/duplex settings based on media_type
585 **/
586static int i40e_get_settings(struct net_device *netdev,
587 struct ethtool_cmd *ecmd)
588{
589 struct i40e_netdev_priv *np = netdev_priv(netdev);
590 struct i40e_pf *pf = np->vsi->back;
591 struct i40e_hw *hw = &pf->hw;
592 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
593 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
594
595 if (link_up)
596 i40e_get_settings_link_up(hw, ecmd, netdev, pf);
597 else
598 i40e_get_settings_link_down(hw, ecmd, pf);
599
600 /* Now set the settings that don't rely on link being up/down */
601 /* Set autoneg settings */
602 ecmd->autoneg = ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
603 AUTONEG_ENABLE : AUTONEG_DISABLE);
604
605 switch (hw->phy.media_type) {
606 case I40E_MEDIA_TYPE_BACKPLANE:
607 ecmd->supported |= SUPPORTED_Autoneg |
608 SUPPORTED_Backplane;
609 ecmd->advertising |= ADVERTISED_Autoneg |
610 ADVERTISED_Backplane;
611 ecmd->port = PORT_NONE;
612 break;
613 case I40E_MEDIA_TYPE_BASET:
614 ecmd->supported |= SUPPORTED_TP;
615 ecmd->advertising |= ADVERTISED_TP;
616 ecmd->port = PORT_TP;
617 break;
618 case I40E_MEDIA_TYPE_DA:
619 case I40E_MEDIA_TYPE_CX4:
620 ecmd->supported |= SUPPORTED_FIBRE;
621 ecmd->advertising |= ADVERTISED_FIBRE;
622 ecmd->port = PORT_DA;
623 break;
624 case I40E_MEDIA_TYPE_FIBER:
625 ecmd->supported |= SUPPORTED_FIBRE;
626 ecmd->port = PORT_FIBRE;
627 break;
628 case I40E_MEDIA_TYPE_UNKNOWN:
629 default:
630 ecmd->port = PORT_OTHER;
631 break;
632 }
633
634 /* Set transceiver */
635 ecmd->transceiver = XCVR_EXTERNAL;
636
637 /* Set flow control settings */
638 ecmd->supported |= SUPPORTED_Pause;
639
640 switch (hw->fc.requested_mode) {
641 case I40E_FC_FULL:
642 ecmd->advertising |= ADVERTISED_Pause;
643 break;
644 case I40E_FC_TX_PAUSE:
645 ecmd->advertising |= ADVERTISED_Asym_Pause;
646 break;
647 case I40E_FC_RX_PAUSE:
648 ecmd->advertising |= (ADVERTISED_Pause |
649 ADVERTISED_Asym_Pause);
650 break;
651 default:
652 ecmd->advertising &= ~(ADVERTISED_Pause |
653 ADVERTISED_Asym_Pause);
654 break;
655 }
656
657 return 0;
658}
659
660/**
661 * i40e_set_settings - Set Speed and Duplex
662 * @netdev: network interface device structure
663 * @ecmd: ethtool command
664 *
665 * Set speed/duplex per media_types advertised/forced
666 **/
667static int i40e_set_settings(struct net_device *netdev,
668 struct ethtool_cmd *ecmd)
669{
670 struct i40e_netdev_priv *np = netdev_priv(netdev);
671 struct i40e_aq_get_phy_abilities_resp abilities;
672 struct i40e_aq_set_phy_config config;
673 struct i40e_pf *pf = np->vsi->back;
674 struct i40e_vsi *vsi = np->vsi;
675 struct i40e_hw *hw = &pf->hw;
676 struct ethtool_cmd safe_ecmd;
677 i40e_status status = 0;
678 bool change = false;
679 int err = 0;
680 u8 autoneg;
681 u32 advertise;
682
683 /* Changing port settings is not supported if this isn't the
684 * port's controlling PF
685 */
686 if (hw->partition_id != 1) {
687 i40e_partition_setting_complaint(pf);
688 return -EOPNOTSUPP;
689 }
690
691 if (vsi != pf->vsi[pf->lan_vsi])
692 return -EOPNOTSUPP;
693
694 if (hw->phy.media_type != I40E_MEDIA_TYPE_BASET &&
695 hw->phy.media_type != I40E_MEDIA_TYPE_FIBER &&
696 hw->phy.media_type != I40E_MEDIA_TYPE_BACKPLANE &&
697 hw->phy.media_type != I40E_MEDIA_TYPE_DA &&
698 hw->phy.link_info.link_info & I40E_AQ_LINK_UP)
699 return -EOPNOTSUPP;
700
701 if (hw->device_id == I40E_DEV_ID_KX_B ||
702 hw->device_id == I40E_DEV_ID_KX_C ||
703 hw->device_id == I40E_DEV_ID_20G_KR2 ||
704 hw->device_id == I40E_DEV_ID_20G_KR2_A) {
705 netdev_info(netdev, "Changing settings is not supported on backplane.\n");
706 return -EOPNOTSUPP;
707 }
708
709 /* get our own copy of the bits to check against */
710 memset(&safe_ecmd, 0, sizeof(struct ethtool_cmd));
711 i40e_get_settings(netdev, &safe_ecmd);
712
713 /* save autoneg and speed out of ecmd */
714 autoneg = ecmd->autoneg;
715 advertise = ecmd->advertising;
716
717 /* set autoneg and speed back to what they currently are */
718 ecmd->autoneg = safe_ecmd.autoneg;
719 ecmd->advertising = safe_ecmd.advertising;
720
721 ecmd->cmd = safe_ecmd.cmd;
722 /* If ecmd and safe_ecmd are not the same now, then they are
723 * trying to set something that we do not support
724 */
725 if (memcmp(ecmd, &safe_ecmd, sizeof(struct ethtool_cmd)))
726 return -EOPNOTSUPP;
727
728 while (test_bit(__I40E_CONFIG_BUSY, &vsi->state))
729 usleep_range(1000, 2000);
730
731 /* Get the current phy config */
732 status = i40e_aq_get_phy_capabilities(hw, false, false, &abilities,
733 NULL);
734 if (status)
735 return -EAGAIN;
736
737 /* Copy abilities to config in case autoneg is not
738 * set below
739 */
740 memset(&config, 0, sizeof(struct i40e_aq_set_phy_config));
741 config.abilities = abilities.abilities;
742
743 /* Check autoneg */
744 if (autoneg == AUTONEG_ENABLE) {
745 /* If autoneg was not already enabled */
746 if (!(hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED)) {
747 /* If autoneg is not supported, return error */
748 if (!(safe_ecmd.supported & SUPPORTED_Autoneg)) {
749 netdev_info(netdev, "Autoneg not supported on this phy\n");
750 return -EINVAL;
751 }
752 /* Autoneg is allowed to change */
753 config.abilities = abilities.abilities |
754 I40E_AQ_PHY_ENABLE_AN;
755 change = true;
756 }
757 } else {
758 /* If autoneg is currently enabled */
759 if (hw->phy.link_info.an_info & I40E_AQ_AN_COMPLETED) {
760 /* If autoneg is supported 10GBASE_T is the only PHY
761 * that can disable it, so otherwise return error
762 */
763 if (safe_ecmd.supported & SUPPORTED_Autoneg &&
764 hw->phy.link_info.phy_type !=
765 I40E_PHY_TYPE_10GBASE_T) {
766 netdev_info(netdev, "Autoneg cannot be disabled on this phy\n");
767 return -EINVAL;
768 }
769 /* Autoneg is allowed to change */
770 config.abilities = abilities.abilities &
771 ~I40E_AQ_PHY_ENABLE_AN;
772 change = true;
773 }
774 }
775
776 if (advertise & ~safe_ecmd.supported)
777 return -EINVAL;
778
779 if (advertise & ADVERTISED_100baseT_Full)
780 config.link_speed |= I40E_LINK_SPEED_100MB;
781 if (advertise & ADVERTISED_1000baseT_Full ||
782 advertise & ADVERTISED_1000baseKX_Full)
783 config.link_speed |= I40E_LINK_SPEED_1GB;
784 if (advertise & ADVERTISED_10000baseT_Full ||
785 advertise & ADVERTISED_10000baseKX4_Full ||
786 advertise & ADVERTISED_10000baseKR_Full)
787 config.link_speed |= I40E_LINK_SPEED_10GB;
788 if (advertise & ADVERTISED_20000baseKR2_Full)
789 config.link_speed |= I40E_LINK_SPEED_20GB;
790 if (advertise & ADVERTISED_40000baseKR4_Full ||
791 advertise & ADVERTISED_40000baseCR4_Full ||
792 advertise & ADVERTISED_40000baseSR4_Full ||
793 advertise & ADVERTISED_40000baseLR4_Full)
794 config.link_speed |= I40E_LINK_SPEED_40GB;
795
796 /* If speed didn't get set, set it to what it currently is.
797 * This is needed because if advertise is 0 (as it is when autoneg
798 * is disabled) then speed won't get set.
799 */
800 if (!config.link_speed)
801 config.link_speed = abilities.link_speed;
802
803 if (change || (abilities.link_speed != config.link_speed)) {
804 /* copy over the rest of the abilities */
805 config.phy_type = abilities.phy_type;
806 config.eee_capability = abilities.eee_capability;
807 config.eeer = abilities.eeer_val;
808 config.low_power_ctrl = abilities.d3_lpan;
809
810 /* save the requested speeds */
811 hw->phy.link_info.requested_speeds = config.link_speed;
812 /* set link and auto negotiation so changes take effect */
813 config.abilities |= I40E_AQ_PHY_ENABLE_ATOMIC_LINK;
814 /* If link is up put link down */
815 if (hw->phy.link_info.link_info & I40E_AQ_LINK_UP) {
816 /* Tell the OS link is going down, the link will go
817 * back up when fw says it is ready asynchronously
818 */
819 i40e_print_link_message(vsi, false);
820 netif_carrier_off(netdev);
821 netif_tx_stop_all_queues(netdev);
822 }
823
824 /* make the aq call */
825 status = i40e_aq_set_phy_config(hw, &config, NULL);
826 if (status) {
827 netdev_info(netdev, "Set phy config failed, err %s aq_err %s\n",
828 i40e_stat_str(hw, status),
829 i40e_aq_str(hw, hw->aq.asq_last_status));
830 return -EAGAIN;
831 }
832
833 status = i40e_update_link_info(hw);
834 if (status)
835 netdev_dbg(netdev, "Updating link info failed with err %s aq_err %s\n",
836 i40e_stat_str(hw, status),
837 i40e_aq_str(hw, hw->aq.asq_last_status));
838
839 } else {
840 netdev_info(netdev, "Nothing changed, exiting without setting anything.\n");
841 }
842
843 return err;
844}
845
846static int i40e_nway_reset(struct net_device *netdev)
847{
848 /* restart autonegotiation */
849 struct i40e_netdev_priv *np = netdev_priv(netdev);
850 struct i40e_pf *pf = np->vsi->back;
851 struct i40e_hw *hw = &pf->hw;
852 bool link_up = hw->phy.link_info.link_info & I40E_AQ_LINK_UP;
853 i40e_status ret = 0;
854
855 ret = i40e_aq_set_link_restart_an(hw, link_up, NULL);
856 if (ret) {
857 netdev_info(netdev, "link restart failed, err %s aq_err %s\n",
858 i40e_stat_str(hw, ret),
859 i40e_aq_str(hw, hw->aq.asq_last_status));
860 return -EIO;
861 }
862
863 return 0;
864}
865
866/**
867 * i40e_get_pauseparam - Get Flow Control status
868 * Return tx/rx-pause status
869 **/
870static void i40e_get_pauseparam(struct net_device *netdev,
871 struct ethtool_pauseparam *pause)
872{
873 struct i40e_netdev_priv *np = netdev_priv(netdev);
874 struct i40e_pf *pf = np->vsi->back;
875 struct i40e_hw *hw = &pf->hw;
876 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
877 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
878
879 pause->autoneg =
880 ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
881 AUTONEG_ENABLE : AUTONEG_DISABLE);
882
883 /* PFC enabled so report LFC as off */
884 if (dcbx_cfg->pfc.pfcenable) {
885 pause->rx_pause = 0;
886 pause->tx_pause = 0;
887 return;
888 }
889
890 if (hw->fc.current_mode == I40E_FC_RX_PAUSE) {
891 pause->rx_pause = 1;
892 } else if (hw->fc.current_mode == I40E_FC_TX_PAUSE) {
893 pause->tx_pause = 1;
894 } else if (hw->fc.current_mode == I40E_FC_FULL) {
895 pause->rx_pause = 1;
896 pause->tx_pause = 1;
897 }
898}
899
900/**
901 * i40e_set_pauseparam - Set Flow Control parameter
902 * @netdev: network interface device structure
903 * @pause: return tx/rx flow control status
904 **/
905static int i40e_set_pauseparam(struct net_device *netdev,
906 struct ethtool_pauseparam *pause)
907{
908 struct i40e_netdev_priv *np = netdev_priv(netdev);
909 struct i40e_pf *pf = np->vsi->back;
910 struct i40e_vsi *vsi = np->vsi;
911 struct i40e_hw *hw = &pf->hw;
912 struct i40e_link_status *hw_link_info = &hw->phy.link_info;
913 struct i40e_dcbx_config *dcbx_cfg = &hw->local_dcbx_config;
914 bool link_up = hw_link_info->link_info & I40E_AQ_LINK_UP;
915 i40e_status status;
916 u8 aq_failures;
917 int err = 0;
918
919 /* Changing the port's flow control is not supported if this isn't the
920 * port's controlling PF
921 */
922 if (hw->partition_id != 1) {
923 i40e_partition_setting_complaint(pf);
924 return -EOPNOTSUPP;
925 }
926
927 if (vsi != pf->vsi[pf->lan_vsi])
928 return -EOPNOTSUPP;
929
930 if (pause->autoneg != ((hw_link_info->an_info & I40E_AQ_AN_COMPLETED) ?
931 AUTONEG_ENABLE : AUTONEG_DISABLE)) {
932 netdev_info(netdev, "To change autoneg please use: ethtool -s <dev> autoneg <on|off>\n");
933 return -EOPNOTSUPP;
934 }
935
936 /* If we have link and don't have autoneg */
937 if (!test_bit(__I40E_DOWN, &pf->state) &&
938 !(hw_link_info->an_info & I40E_AQ_AN_COMPLETED)) {
939 /* Send message that it might not necessarily work*/
940 netdev_info(netdev, "Autoneg did not complete so changing settings may not result in an actual change.\n");
941 }
942
943 if (dcbx_cfg->pfc.pfcenable) {
944 netdev_info(netdev,
945 "Priority flow control enabled. Cannot set link flow control.\n");
946 return -EOPNOTSUPP;
947 }
948
949 if (pause->rx_pause && pause->tx_pause)
950 hw->fc.requested_mode = I40E_FC_FULL;
951 else if (pause->rx_pause && !pause->tx_pause)
952 hw->fc.requested_mode = I40E_FC_RX_PAUSE;
953 else if (!pause->rx_pause && pause->tx_pause)
954 hw->fc.requested_mode = I40E_FC_TX_PAUSE;
955 else if (!pause->rx_pause && !pause->tx_pause)
956 hw->fc.requested_mode = I40E_FC_NONE;
957 else
958 return -EINVAL;
959
960 /* Tell the OS link is going down, the link will go back up when fw
961 * says it is ready asynchronously
962 */
963 i40e_print_link_message(vsi, false);
964 netif_carrier_off(netdev);
965 netif_tx_stop_all_queues(netdev);
966
967 /* Set the fc mode and only restart an if link is up*/
968 status = i40e_set_fc(hw, &aq_failures, link_up);
969
970 if (aq_failures & I40E_SET_FC_AQ_FAIL_GET) {
971 netdev_info(netdev, "Set fc failed on the get_phy_capabilities call with err %s aq_err %s\n",
972 i40e_stat_str(hw, status),
973 i40e_aq_str(hw, hw->aq.asq_last_status));
974 err = -EAGAIN;
975 }
976 if (aq_failures & I40E_SET_FC_AQ_FAIL_SET) {
977 netdev_info(netdev, "Set fc failed on the set_phy_config call with err %s aq_err %s\n",
978 i40e_stat_str(hw, status),
979 i40e_aq_str(hw, hw->aq.asq_last_status));
980 err = -EAGAIN;
981 }
982 if (aq_failures & I40E_SET_FC_AQ_FAIL_UPDATE) {
983 netdev_info(netdev, "Set fc failed on the get_link_info call with err %s aq_err %s\n",
984 i40e_stat_str(hw, status),
985 i40e_aq_str(hw, hw->aq.asq_last_status));
986 err = -EAGAIN;
987 }
988
989 if (!test_bit(__I40E_DOWN, &pf->state)) {
990 /* Give it a little more time to try to come back */
991 msleep(75);
992 if (!test_bit(__I40E_DOWN, &pf->state))
993 return i40e_nway_reset(netdev);
994 }
995
996 return err;
997}
998
999static u32 i40e_get_msglevel(struct net_device *netdev)
1000{
1001 struct i40e_netdev_priv *np = netdev_priv(netdev);
1002 struct i40e_pf *pf = np->vsi->back;
1003 u32 debug_mask = pf->hw.debug_mask;
1004
1005 if (debug_mask)
1006 netdev_info(netdev, "i40e debug_mask: 0x%08X\n", debug_mask);
1007
1008 return pf->msg_enable;
1009}
1010
1011static void i40e_set_msglevel(struct net_device *netdev, u32 data)
1012{
1013 struct i40e_netdev_priv *np = netdev_priv(netdev);
1014 struct i40e_pf *pf = np->vsi->back;
1015
1016 if (I40E_DEBUG_USER & data)
1017 pf->hw.debug_mask = data;
1018 else
1019 pf->msg_enable = data;
1020}
1021
1022static int i40e_get_regs_len(struct net_device *netdev)
1023{
1024 int reg_count = 0;
1025 int i;
1026
1027 for (i = 0; i40e_reg_list[i].offset != 0; i++)
1028 reg_count += i40e_reg_list[i].elements;
1029
1030 return reg_count * sizeof(u32);
1031}
1032
1033static void i40e_get_regs(struct net_device *netdev, struct ethtool_regs *regs,
1034 void *p)
1035{
1036 struct i40e_netdev_priv *np = netdev_priv(netdev);
1037 struct i40e_pf *pf = np->vsi->back;
1038 struct i40e_hw *hw = &pf->hw;
1039 u32 *reg_buf = p;
1040 int i, j, ri;
1041 u32 reg;
1042
1043 /* Tell ethtool which driver-version-specific regs output we have.
1044 *
1045 * At some point, if we have ethtool doing special formatting of
1046 * this data, it will rely on this version number to know how to
1047 * interpret things. Hence, this needs to be updated if/when the
1048 * diags register table is changed.
1049 */
1050 regs->version = 1;
1051
1052 /* loop through the diags reg table for what to print */
1053 ri = 0;
1054 for (i = 0; i40e_reg_list[i].offset != 0; i++) {
1055 for (j = 0; j < i40e_reg_list[i].elements; j++) {
1056 reg = i40e_reg_list[i].offset
1057 + (j * i40e_reg_list[i].stride);
1058 reg_buf[ri++] = rd32(hw, reg);
1059 }
1060 }
1061
1062}
1063
1064static int i40e_get_eeprom(struct net_device *netdev,
1065 struct ethtool_eeprom *eeprom, u8 *bytes)
1066{
1067 struct i40e_netdev_priv *np = netdev_priv(netdev);
1068 struct i40e_hw *hw = &np->vsi->back->hw;
1069 struct i40e_pf *pf = np->vsi->back;
1070 int ret_val = 0, len, offset;
1071 u8 *eeprom_buff;
1072 u16 i, sectors;
1073 bool last;
1074 u32 magic;
1075
1076#define I40E_NVM_SECTOR_SIZE 4096
1077 if (eeprom->len == 0)
1078 return -EINVAL;
1079
1080 /* check for NVMUpdate access method */
1081 magic = hw->vendor_id | (hw->device_id << 16);
1082 if (eeprom->magic && eeprom->magic != magic) {
1083 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1084 int errno = 0;
1085
1086 /* make sure it is the right magic for NVMUpdate */
1087 if ((eeprom->magic >> 16) != hw->device_id)
1088 errno = -EINVAL;
1089 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
1090 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
1091 errno = -EBUSY;
1092 else
1093 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1094
1095 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1096 dev_info(&pf->pdev->dev,
1097 "NVMUpdate read failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1098 ret_val, hw->aq.asq_last_status, errno,
1099 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1100 cmd->offset, cmd->data_size);
1101
1102 return errno;
1103 }
1104
1105 /* normal ethtool get_eeprom support */
1106 eeprom->magic = hw->vendor_id | (hw->device_id << 16);
1107
1108 eeprom_buff = kzalloc(eeprom->len, GFP_KERNEL);
1109 if (!eeprom_buff)
1110 return -ENOMEM;
1111
1112 ret_val = i40e_acquire_nvm(hw, I40E_RESOURCE_READ);
1113 if (ret_val) {
1114 dev_info(&pf->pdev->dev,
1115 "Failed Acquiring NVM resource for read err=%d status=0x%x\n",
1116 ret_val, hw->aq.asq_last_status);
1117 goto free_buff;
1118 }
1119
1120 sectors = eeprom->len / I40E_NVM_SECTOR_SIZE;
1121 sectors += (eeprom->len % I40E_NVM_SECTOR_SIZE) ? 1 : 0;
1122 len = I40E_NVM_SECTOR_SIZE;
1123 last = false;
1124 for (i = 0; i < sectors; i++) {
1125 if (i == (sectors - 1)) {
1126 len = eeprom->len - (I40E_NVM_SECTOR_SIZE * i);
1127 last = true;
1128 }
1129 offset = eeprom->offset + (I40E_NVM_SECTOR_SIZE * i),
1130 ret_val = i40e_aq_read_nvm(hw, 0x0, offset, len,
1131 (u8 *)eeprom_buff + (I40E_NVM_SECTOR_SIZE * i),
1132 last, NULL);
1133 if (ret_val && hw->aq.asq_last_status == I40E_AQ_RC_EPERM) {
1134 dev_info(&pf->pdev->dev,
1135 "read NVM failed, invalid offset 0x%x\n",
1136 offset);
1137 break;
1138 } else if (ret_val &&
1139 hw->aq.asq_last_status == I40E_AQ_RC_EACCES) {
1140 dev_info(&pf->pdev->dev,
1141 "read NVM failed, access, offset 0x%x\n",
1142 offset);
1143 break;
1144 } else if (ret_val) {
1145 dev_info(&pf->pdev->dev,
1146 "read NVM failed offset %d err=%d status=0x%x\n",
1147 offset, ret_val, hw->aq.asq_last_status);
1148 break;
1149 }
1150 }
1151
1152 i40e_release_nvm(hw);
1153 memcpy(bytes, (u8 *)eeprom_buff, eeprom->len);
1154free_buff:
1155 kfree(eeprom_buff);
1156 return ret_val;
1157}
1158
1159static int i40e_get_eeprom_len(struct net_device *netdev)
1160{
1161 struct i40e_netdev_priv *np = netdev_priv(netdev);
1162 struct i40e_hw *hw = &np->vsi->back->hw;
1163 u32 val;
1164
1165 val = (rd32(hw, I40E_GLPCI_LBARCTRL)
1166 & I40E_GLPCI_LBARCTRL_FL_SIZE_MASK)
1167 >> I40E_GLPCI_LBARCTRL_FL_SIZE_SHIFT;
1168 /* register returns value in power of 2, 64Kbyte chunks. */
1169 val = (64 * 1024) * BIT(val);
1170 return val;
1171}
1172
1173static int i40e_set_eeprom(struct net_device *netdev,
1174 struct ethtool_eeprom *eeprom, u8 *bytes)
1175{
1176 struct i40e_netdev_priv *np = netdev_priv(netdev);
1177 struct i40e_hw *hw = &np->vsi->back->hw;
1178 struct i40e_pf *pf = np->vsi->back;
1179 struct i40e_nvm_access *cmd = (struct i40e_nvm_access *)eeprom;
1180 int ret_val = 0;
1181 int errno = 0;
1182 u32 magic;
1183
1184 /* normal ethtool set_eeprom is not supported */
1185 magic = hw->vendor_id | (hw->device_id << 16);
1186 if (eeprom->magic == magic)
1187 errno = -EOPNOTSUPP;
1188 /* check for NVMUpdate access method */
1189 else if (!eeprom->magic || (eeprom->magic >> 16) != hw->device_id)
1190 errno = -EINVAL;
1191 else if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
1192 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
1193 errno = -EBUSY;
1194 else
1195 ret_val = i40e_nvmupd_command(hw, cmd, bytes, &errno);
1196
1197 if ((errno || ret_val) && (hw->debug_mask & I40E_DEBUG_NVM))
1198 dev_info(&pf->pdev->dev,
1199 "NVMUpdate write failed err=%d status=0x%x errno=%d module=%d offset=0x%x size=%d\n",
1200 ret_val, hw->aq.asq_last_status, errno,
1201 (u8)(cmd->config & I40E_NVM_MOD_PNT_MASK),
1202 cmd->offset, cmd->data_size);
1203
1204 return errno;
1205}
1206
1207static void i40e_get_drvinfo(struct net_device *netdev,
1208 struct ethtool_drvinfo *drvinfo)
1209{
1210 struct i40e_netdev_priv *np = netdev_priv(netdev);
1211 struct i40e_vsi *vsi = np->vsi;
1212 struct i40e_pf *pf = vsi->back;
1213
1214 strlcpy(drvinfo->driver, i40e_driver_name, sizeof(drvinfo->driver));
1215 strlcpy(drvinfo->version, i40e_driver_version_str,
1216 sizeof(drvinfo->version));
1217 strlcpy(drvinfo->fw_version, i40e_nvm_version_str(&pf->hw),
1218 sizeof(drvinfo->fw_version));
1219 strlcpy(drvinfo->bus_info, pci_name(pf->pdev),
1220 sizeof(drvinfo->bus_info));
1221 drvinfo->n_priv_flags = I40E_PRIV_FLAGS_STR_LEN;
1222 if (pf->hw.pf_id == 0)
1223 drvinfo->n_priv_flags += I40E_GL_PRIV_FLAGS_STR_LEN;
1224}
1225
1226static void i40e_get_ringparam(struct net_device *netdev,
1227 struct ethtool_ringparam *ring)
1228{
1229 struct i40e_netdev_priv *np = netdev_priv(netdev);
1230 struct i40e_pf *pf = np->vsi->back;
1231 struct i40e_vsi *vsi = pf->vsi[pf->lan_vsi];
1232
1233 ring->rx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1234 ring->tx_max_pending = I40E_MAX_NUM_DESCRIPTORS;
1235 ring->rx_mini_max_pending = 0;
1236 ring->rx_jumbo_max_pending = 0;
1237 ring->rx_pending = vsi->rx_rings[0]->count;
1238 ring->tx_pending = vsi->tx_rings[0]->count;
1239 ring->rx_mini_pending = 0;
1240 ring->rx_jumbo_pending = 0;
1241}
1242
1243static int i40e_set_ringparam(struct net_device *netdev,
1244 struct ethtool_ringparam *ring)
1245{
1246 struct i40e_ring *tx_rings = NULL, *rx_rings = NULL;
1247 struct i40e_netdev_priv *np = netdev_priv(netdev);
1248 struct i40e_hw *hw = &np->vsi->back->hw;
1249 struct i40e_vsi *vsi = np->vsi;
1250 struct i40e_pf *pf = vsi->back;
1251 u32 new_rx_count, new_tx_count;
1252 int i, err = 0;
1253
1254 if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
1255 return -EINVAL;
1256
1257 if (ring->tx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1258 ring->tx_pending < I40E_MIN_NUM_DESCRIPTORS ||
1259 ring->rx_pending > I40E_MAX_NUM_DESCRIPTORS ||
1260 ring->rx_pending < I40E_MIN_NUM_DESCRIPTORS) {
1261 netdev_info(netdev,
1262 "Descriptors requested (Tx: %d / Rx: %d) out of range [%d-%d]\n",
1263 ring->tx_pending, ring->rx_pending,
1264 I40E_MIN_NUM_DESCRIPTORS, I40E_MAX_NUM_DESCRIPTORS);
1265 return -EINVAL;
1266 }
1267
1268 new_tx_count = ALIGN(ring->tx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1269 new_rx_count = ALIGN(ring->rx_pending, I40E_REQ_DESCRIPTOR_MULTIPLE);
1270
1271 /* if nothing to do return success */
1272 if ((new_tx_count == vsi->tx_rings[0]->count) &&
1273 (new_rx_count == vsi->rx_rings[0]->count))
1274 return 0;
1275
1276 while (test_and_set_bit(__I40E_CONFIG_BUSY, &pf->state))
1277 usleep_range(1000, 2000);
1278
1279 if (!netif_running(vsi->netdev)) {
1280 /* simple case - set for the next time the netdev is started */
1281 for (i = 0; i < vsi->num_queue_pairs; i++) {
1282 vsi->tx_rings[i]->count = new_tx_count;
1283 vsi->rx_rings[i]->count = new_rx_count;
1284 }
1285 goto done;
1286 }
1287
1288 /* We can't just free everything and then setup again,
1289 * because the ISRs in MSI-X mode get passed pointers
1290 * to the Tx and Rx ring structs.
1291 */
1292
1293 /* alloc updated Tx resources */
1294 if (new_tx_count != vsi->tx_rings[0]->count) {
1295 netdev_info(netdev,
1296 "Changing Tx descriptor count from %d to %d.\n",
1297 vsi->tx_rings[0]->count, new_tx_count);
1298 tx_rings = kcalloc(vsi->alloc_queue_pairs,
1299 sizeof(struct i40e_ring), GFP_KERNEL);
1300 if (!tx_rings) {
1301 err = -ENOMEM;
1302 goto done;
1303 }
1304
1305 for (i = 0; i < vsi->num_queue_pairs; i++) {
1306 /* clone ring and setup updated count */
1307 tx_rings[i] = *vsi->tx_rings[i];
1308 tx_rings[i].count = new_tx_count;
1309 /* the desc and bi pointers will be reallocated in the
1310 * setup call
1311 */
1312 tx_rings[i].desc = NULL;
1313 tx_rings[i].rx_bi = NULL;
1314 err = i40e_setup_tx_descriptors(&tx_rings[i]);
1315 if (err) {
1316 while (i) {
1317 i--;
1318 i40e_free_tx_resources(&tx_rings[i]);
1319 }
1320 kfree(tx_rings);
1321 tx_rings = NULL;
1322
1323 goto done;
1324 }
1325 }
1326 }
1327
1328 /* alloc updated Rx resources */
1329 if (new_rx_count != vsi->rx_rings[0]->count) {
1330 netdev_info(netdev,
1331 "Changing Rx descriptor count from %d to %d\n",
1332 vsi->rx_rings[0]->count, new_rx_count);
1333 rx_rings = kcalloc(vsi->alloc_queue_pairs,
1334 sizeof(struct i40e_ring), GFP_KERNEL);
1335 if (!rx_rings) {
1336 err = -ENOMEM;
1337 goto free_tx;
1338 }
1339
1340 for (i = 0; i < vsi->num_queue_pairs; i++) {
1341 struct i40e_ring *ring;
1342 u16 unused;
1343
1344 /* clone ring and setup updated count */
1345 rx_rings[i] = *vsi->rx_rings[i];
1346 rx_rings[i].count = new_rx_count;
1347 /* the desc and bi pointers will be reallocated in the
1348 * setup call
1349 */
1350 rx_rings[i].desc = NULL;
1351 rx_rings[i].rx_bi = NULL;
1352 /* this is to allow wr32 to have something to write to
1353 * during early allocation of Rx buffers
1354 */
1355 rx_rings[i].tail = hw->hw_addr + I40E_PRTGEN_STATUS;
1356 err = i40e_setup_rx_descriptors(&rx_rings[i]);
1357 if (err)
1358 goto rx_unwind;
1359
1360 /* now allocate the Rx buffers to make sure the OS
1361 * has enough memory, any failure here means abort
1362 */
1363 ring = &rx_rings[i];
1364 unused = I40E_DESC_UNUSED(ring);
1365 err = i40e_alloc_rx_buffers(ring, unused);
1366rx_unwind:
1367 if (err) {
1368 do {
1369 i40e_free_rx_resources(&rx_rings[i]);
1370 } while (i--);
1371 kfree(rx_rings);
1372 rx_rings = NULL;
1373
1374 goto free_tx;
1375 }
1376 }
1377 }
1378
1379 /* Bring interface down, copy in the new ring info,
1380 * then restore the interface
1381 */
1382 i40e_down(vsi);
1383
1384 if (tx_rings) {
1385 for (i = 0; i < vsi->num_queue_pairs; i++) {
1386 i40e_free_tx_resources(vsi->tx_rings[i]);
1387 *vsi->tx_rings[i] = tx_rings[i];
1388 }
1389 kfree(tx_rings);
1390 tx_rings = NULL;
1391 }
1392
1393 if (rx_rings) {
1394 for (i = 0; i < vsi->num_queue_pairs; i++) {
1395 i40e_free_rx_resources(vsi->rx_rings[i]);
1396 /* get the real tail offset */
1397 rx_rings[i].tail = vsi->rx_rings[i]->tail;
1398 /* this is to fake out the allocation routine
1399 * into thinking it has to realloc everything
1400 * but the recycling logic will let us re-use
1401 * the buffers allocated above
1402 */
1403 rx_rings[i].next_to_use = 0;
1404 rx_rings[i].next_to_clean = 0;
1405 rx_rings[i].next_to_alloc = 0;
1406 /* do a struct copy */
1407 *vsi->rx_rings[i] = rx_rings[i];
1408 }
1409 kfree(rx_rings);
1410 rx_rings = NULL;
1411 }
1412
1413 i40e_up(vsi);
1414
1415free_tx:
1416 /* error cleanup if the Rx allocations failed after getting Tx */
1417 if (tx_rings) {
1418 for (i = 0; i < vsi->num_queue_pairs; i++)
1419 i40e_free_tx_resources(&tx_rings[i]);
1420 kfree(tx_rings);
1421 tx_rings = NULL;
1422 }
1423
1424done:
1425 clear_bit(__I40E_CONFIG_BUSY, &pf->state);
1426
1427 return err;
1428}
1429
1430static int i40e_get_sset_count(struct net_device *netdev, int sset)
1431{
1432 struct i40e_netdev_priv *np = netdev_priv(netdev);
1433 struct i40e_vsi *vsi = np->vsi;
1434 struct i40e_pf *pf = vsi->back;
1435
1436 switch (sset) {
1437 case ETH_SS_TEST:
1438 return I40E_TEST_LEN;
1439 case ETH_SS_STATS:
1440 if (vsi == pf->vsi[pf->lan_vsi] && pf->hw.partition_id == 1) {
1441 int len = I40E_PF_STATS_LEN(netdev);
1442
1443 if ((pf->lan_veb != I40E_NO_VEB) &&
1444 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED))
1445 len += I40E_VEB_STATS_TOTAL;
1446 return len;
1447 } else {
1448 return I40E_VSI_STATS_LEN(netdev);
1449 }
1450 case ETH_SS_PRIV_FLAGS:
1451 return I40E_PRIV_FLAGS_STR_LEN +
1452 (pf->hw.pf_id == 0 ? I40E_GL_PRIV_FLAGS_STR_LEN : 0);
1453 default:
1454 return -EOPNOTSUPP;
1455 }
1456}
1457
1458static void i40e_get_ethtool_stats(struct net_device *netdev,
1459 struct ethtool_stats *stats, u64 *data)
1460{
1461 struct i40e_netdev_priv *np = netdev_priv(netdev);
1462 struct i40e_ring *tx_ring, *rx_ring;
1463 struct i40e_vsi *vsi = np->vsi;
1464 struct i40e_pf *pf = vsi->back;
1465 int i = 0;
1466 char *p;
1467 int j;
1468 struct rtnl_link_stats64 *net_stats = i40e_get_vsi_stats_struct(vsi);
1469 unsigned int start;
1470
1471 i40e_update_stats(vsi);
1472
1473 for (j = 0; j < I40E_NETDEV_STATS_LEN; j++) {
1474 p = (char *)net_stats + i40e_gstrings_net_stats[j].stat_offset;
1475 data[i++] = (i40e_gstrings_net_stats[j].sizeof_stat ==
1476 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1477 }
1478 for (j = 0; j < I40E_MISC_STATS_LEN; j++) {
1479 p = (char *)vsi + i40e_gstrings_misc_stats[j].stat_offset;
1480 data[i++] = (i40e_gstrings_misc_stats[j].sizeof_stat ==
1481 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1482 }
1483#ifdef I40E_FCOE
1484 for (j = 0; j < I40E_FCOE_STATS_LEN; j++) {
1485 p = (char *)vsi + i40e_gstrings_fcoe_stats[j].stat_offset;
1486 data[i++] = (i40e_gstrings_fcoe_stats[j].sizeof_stat ==
1487 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1488 }
1489#endif
1490 rcu_read_lock();
1491 for (j = 0; j < vsi->num_queue_pairs; j++) {
1492 tx_ring = ACCESS_ONCE(vsi->tx_rings[j]);
1493
1494 if (!tx_ring)
1495 continue;
1496
1497 /* process Tx ring statistics */
1498 do {
1499 start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
1500 data[i] = tx_ring->stats.packets;
1501 data[i + 1] = tx_ring->stats.bytes;
1502 } while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
1503 i += 2;
1504
1505 /* Rx ring is the 2nd half of the queue pair */
1506 rx_ring = &tx_ring[1];
1507 do {
1508 start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
1509 data[i] = rx_ring->stats.packets;
1510 data[i + 1] = rx_ring->stats.bytes;
1511 } while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
1512 i += 2;
1513 }
1514 rcu_read_unlock();
1515 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1516 return;
1517
1518 if ((pf->lan_veb != I40E_NO_VEB) &&
1519 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1520 struct i40e_veb *veb = pf->veb[pf->lan_veb];
1521
1522 for (j = 0; j < I40E_VEB_STATS_LEN; j++) {
1523 p = (char *)veb;
1524 p += i40e_gstrings_veb_stats[j].stat_offset;
1525 data[i++] = (i40e_gstrings_veb_stats[j].sizeof_stat ==
1526 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1527 }
1528 for (j = 0; j < I40E_MAX_TRAFFIC_CLASS; j++) {
1529 data[i++] = veb->tc_stats.tc_tx_packets[j];
1530 data[i++] = veb->tc_stats.tc_tx_bytes[j];
1531 data[i++] = veb->tc_stats.tc_rx_packets[j];
1532 data[i++] = veb->tc_stats.tc_rx_bytes[j];
1533 }
1534 }
1535 for (j = 0; j < I40E_GLOBAL_STATS_LEN; j++) {
1536 p = (char *)pf + i40e_gstrings_stats[j].stat_offset;
1537 data[i++] = (i40e_gstrings_stats[j].sizeof_stat ==
1538 sizeof(u64)) ? *(u64 *)p : *(u32 *)p;
1539 }
1540 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1541 data[i++] = pf->stats.priority_xon_tx[j];
1542 data[i++] = pf->stats.priority_xoff_tx[j];
1543 }
1544 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++) {
1545 data[i++] = pf->stats.priority_xon_rx[j];
1546 data[i++] = pf->stats.priority_xoff_rx[j];
1547 }
1548 for (j = 0; j < I40E_MAX_USER_PRIORITY; j++)
1549 data[i++] = pf->stats.priority_xon_2_xoff[j];
1550}
1551
1552static void i40e_get_strings(struct net_device *netdev, u32 stringset,
1553 u8 *data)
1554{
1555 struct i40e_netdev_priv *np = netdev_priv(netdev);
1556 struct i40e_vsi *vsi = np->vsi;
1557 struct i40e_pf *pf = vsi->back;
1558 char *p = (char *)data;
1559 int i;
1560
1561 switch (stringset) {
1562 case ETH_SS_TEST:
1563 memcpy(data, i40e_gstrings_test,
1564 I40E_TEST_LEN * ETH_GSTRING_LEN);
1565 break;
1566 case ETH_SS_STATS:
1567 for (i = 0; i < I40E_NETDEV_STATS_LEN; i++) {
1568 snprintf(p, ETH_GSTRING_LEN, "%s",
1569 i40e_gstrings_net_stats[i].stat_string);
1570 p += ETH_GSTRING_LEN;
1571 }
1572 for (i = 0; i < I40E_MISC_STATS_LEN; i++) {
1573 snprintf(p, ETH_GSTRING_LEN, "%s",
1574 i40e_gstrings_misc_stats[i].stat_string);
1575 p += ETH_GSTRING_LEN;
1576 }
1577#ifdef I40E_FCOE
1578 for (i = 0; i < I40E_FCOE_STATS_LEN; i++) {
1579 snprintf(p, ETH_GSTRING_LEN, "%s",
1580 i40e_gstrings_fcoe_stats[i].stat_string);
1581 p += ETH_GSTRING_LEN;
1582 }
1583#endif
1584 for (i = 0; i < vsi->num_queue_pairs; i++) {
1585 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_packets", i);
1586 p += ETH_GSTRING_LEN;
1587 snprintf(p, ETH_GSTRING_LEN, "tx-%d.tx_bytes", i);
1588 p += ETH_GSTRING_LEN;
1589 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_packets", i);
1590 p += ETH_GSTRING_LEN;
1591 snprintf(p, ETH_GSTRING_LEN, "rx-%d.rx_bytes", i);
1592 p += ETH_GSTRING_LEN;
1593 }
1594 if (vsi != pf->vsi[pf->lan_vsi] || pf->hw.partition_id != 1)
1595 return;
1596
1597 if ((pf->lan_veb != I40E_NO_VEB) &&
1598 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
1599 for (i = 0; i < I40E_VEB_STATS_LEN; i++) {
1600 snprintf(p, ETH_GSTRING_LEN, "veb.%s",
1601 i40e_gstrings_veb_stats[i].stat_string);
1602 p += ETH_GSTRING_LEN;
1603 }
1604 for (i = 0; i < I40E_MAX_TRAFFIC_CLASS; i++) {
1605 snprintf(p, ETH_GSTRING_LEN,
1606 "veb.tc_%d_tx_packets", i);
1607 p += ETH_GSTRING_LEN;
1608 snprintf(p, ETH_GSTRING_LEN,
1609 "veb.tc_%d_tx_bytes", i);
1610 p += ETH_GSTRING_LEN;
1611 snprintf(p, ETH_GSTRING_LEN,
1612 "veb.tc_%d_rx_packets", i);
1613 p += ETH_GSTRING_LEN;
1614 snprintf(p, ETH_GSTRING_LEN,
1615 "veb.tc_%d_rx_bytes", i);
1616 p += ETH_GSTRING_LEN;
1617 }
1618 }
1619 for (i = 0; i < I40E_GLOBAL_STATS_LEN; i++) {
1620 snprintf(p, ETH_GSTRING_LEN, "port.%s",
1621 i40e_gstrings_stats[i].stat_string);
1622 p += ETH_GSTRING_LEN;
1623 }
1624 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1625 snprintf(p, ETH_GSTRING_LEN,
1626 "port.tx_priority_%d_xon", i);
1627 p += ETH_GSTRING_LEN;
1628 snprintf(p, ETH_GSTRING_LEN,
1629 "port.tx_priority_%d_xoff", i);
1630 p += ETH_GSTRING_LEN;
1631 }
1632 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1633 snprintf(p, ETH_GSTRING_LEN,
1634 "port.rx_priority_%d_xon", i);
1635 p += ETH_GSTRING_LEN;
1636 snprintf(p, ETH_GSTRING_LEN,
1637 "port.rx_priority_%d_xoff", i);
1638 p += ETH_GSTRING_LEN;
1639 }
1640 for (i = 0; i < I40E_MAX_USER_PRIORITY; i++) {
1641 snprintf(p, ETH_GSTRING_LEN,
1642 "port.rx_priority_%d_xon_2_xoff", i);
1643 p += ETH_GSTRING_LEN;
1644 }
1645 /* BUG_ON(p - data != I40E_STATS_LEN * ETH_GSTRING_LEN); */
1646 break;
1647 case ETH_SS_PRIV_FLAGS:
1648 memcpy(data, i40e_priv_flags_strings,
1649 I40E_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
1650 data += I40E_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN;
1651 if (pf->hw.pf_id == 0)
1652 memcpy(data, i40e_gl_priv_flags_strings,
1653 I40E_GL_PRIV_FLAGS_STR_LEN * ETH_GSTRING_LEN);
1654 break;
1655 default:
1656 break;
1657 }
1658}
1659
1660static int i40e_get_ts_info(struct net_device *dev,
1661 struct ethtool_ts_info *info)
1662{
1663 struct i40e_pf *pf = i40e_netdev_to_pf(dev);
1664
1665 /* only report HW timestamping if PTP is enabled */
1666 if (!(pf->flags & I40E_FLAG_PTP))
1667 return ethtool_op_get_ts_info(dev, info);
1668
1669 info->so_timestamping = SOF_TIMESTAMPING_TX_SOFTWARE |
1670 SOF_TIMESTAMPING_RX_SOFTWARE |
1671 SOF_TIMESTAMPING_SOFTWARE |
1672 SOF_TIMESTAMPING_TX_HARDWARE |
1673 SOF_TIMESTAMPING_RX_HARDWARE |
1674 SOF_TIMESTAMPING_RAW_HARDWARE;
1675
1676 if (pf->ptp_clock)
1677 info->phc_index = ptp_clock_index(pf->ptp_clock);
1678 else
1679 info->phc_index = -1;
1680
1681 info->tx_types = BIT(HWTSTAMP_TX_OFF) | BIT(HWTSTAMP_TX_ON);
1682
1683 info->rx_filters = BIT(HWTSTAMP_FILTER_NONE) |
1684 BIT(HWTSTAMP_FILTER_PTP_V2_L2_EVENT) |
1685 BIT(HWTSTAMP_FILTER_PTP_V2_L2_SYNC) |
1686 BIT(HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ);
1687
1688 if (pf->flags & I40E_FLAG_PTP_L4_CAPABLE)
1689 info->rx_filters |= BIT(HWTSTAMP_FILTER_PTP_V1_L4_SYNC) |
1690 BIT(HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) |
1691 BIT(HWTSTAMP_FILTER_PTP_V2_EVENT) |
1692 BIT(HWTSTAMP_FILTER_PTP_V2_L4_EVENT) |
1693 BIT(HWTSTAMP_FILTER_PTP_V2_SYNC) |
1694 BIT(HWTSTAMP_FILTER_PTP_V2_L4_SYNC) |
1695 BIT(HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) |
1696 BIT(HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ);
1697
1698 return 0;
1699}
1700
1701static int i40e_link_test(struct net_device *netdev, u64 *data)
1702{
1703 struct i40e_netdev_priv *np = netdev_priv(netdev);
1704 struct i40e_pf *pf = np->vsi->back;
1705 i40e_status status;
1706 bool link_up = false;
1707
1708 netif_info(pf, hw, netdev, "link test\n");
1709 status = i40e_get_link_status(&pf->hw, &link_up);
1710 if (status) {
1711 netif_err(pf, drv, netdev, "link query timed out, please retry test\n");
1712 *data = 1;
1713 return *data;
1714 }
1715
1716 if (link_up)
1717 *data = 0;
1718 else
1719 *data = 1;
1720
1721 return *data;
1722}
1723
1724static int i40e_reg_test(struct net_device *netdev, u64 *data)
1725{
1726 struct i40e_netdev_priv *np = netdev_priv(netdev);
1727 struct i40e_pf *pf = np->vsi->back;
1728
1729 netif_info(pf, hw, netdev, "register test\n");
1730 *data = i40e_diag_reg_test(&pf->hw);
1731
1732 return *data;
1733}
1734
1735static int i40e_eeprom_test(struct net_device *netdev, u64 *data)
1736{
1737 struct i40e_netdev_priv *np = netdev_priv(netdev);
1738 struct i40e_pf *pf = np->vsi->back;
1739
1740 netif_info(pf, hw, netdev, "eeprom test\n");
1741 *data = i40e_diag_eeprom_test(&pf->hw);
1742
1743 /* forcebly clear the NVM Update state machine */
1744 pf->hw.nvmupd_state = I40E_NVMUPD_STATE_INIT;
1745
1746 return *data;
1747}
1748
1749static int i40e_intr_test(struct net_device *netdev, u64 *data)
1750{
1751 struct i40e_netdev_priv *np = netdev_priv(netdev);
1752 struct i40e_pf *pf = np->vsi->back;
1753 u16 swc_old = pf->sw_int_count;
1754
1755 netif_info(pf, hw, netdev, "interrupt test\n");
1756 wr32(&pf->hw, I40E_PFINT_DYN_CTL0,
1757 (I40E_PFINT_DYN_CTL0_INTENA_MASK |
1758 I40E_PFINT_DYN_CTL0_SWINT_TRIG_MASK |
1759 I40E_PFINT_DYN_CTL0_ITR_INDX_MASK |
1760 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_ENA_MASK |
1761 I40E_PFINT_DYN_CTL0_SW_ITR_INDX_MASK));
1762 usleep_range(1000, 2000);
1763 *data = (swc_old == pf->sw_int_count);
1764
1765 return *data;
1766}
1767
1768static inline bool i40e_active_vfs(struct i40e_pf *pf)
1769{
1770 struct i40e_vf *vfs = pf->vf;
1771 int i;
1772
1773 for (i = 0; i < pf->num_alloc_vfs; i++)
1774 if (test_bit(I40E_VF_STAT_ACTIVE, &vfs[i].vf_states))
1775 return true;
1776 return false;
1777}
1778
1779static inline bool i40e_active_vmdqs(struct i40e_pf *pf)
1780{
1781 return !!i40e_find_vsi_by_type(pf, I40E_VSI_VMDQ2);
1782}
1783
1784static void i40e_diag_test(struct net_device *netdev,
1785 struct ethtool_test *eth_test, u64 *data)
1786{
1787 struct i40e_netdev_priv *np = netdev_priv(netdev);
1788 bool if_running = netif_running(netdev);
1789 struct i40e_pf *pf = np->vsi->back;
1790
1791 if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
1792 /* Offline tests */
1793 netif_info(pf, drv, netdev, "offline testing starting\n");
1794
1795 set_bit(__I40E_TESTING, &pf->state);
1796
1797 if (i40e_active_vfs(pf) || i40e_active_vmdqs(pf)) {
1798 dev_warn(&pf->pdev->dev,
1799 "Please take active VFs and Netqueues offline and restart the adapter before running NIC diagnostics\n");
1800 data[I40E_ETH_TEST_REG] = 1;
1801 data[I40E_ETH_TEST_EEPROM] = 1;
1802 data[I40E_ETH_TEST_INTR] = 1;
1803 data[I40E_ETH_TEST_LINK] = 1;
1804 eth_test->flags |= ETH_TEST_FL_FAILED;
1805 clear_bit(__I40E_TESTING, &pf->state);
1806 goto skip_ol_tests;
1807 }
1808
1809 /* If the device is online then take it offline */
1810 if (if_running)
1811 /* indicate we're in test mode */
1812 i40e_close(netdev);
1813 else
1814 /* This reset does not affect link - if it is
1815 * changed to a type of reset that does affect
1816 * link then the following link test would have
1817 * to be moved to before the reset
1818 */
1819 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED));
1820
1821 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
1822 eth_test->flags |= ETH_TEST_FL_FAILED;
1823
1824 if (i40e_eeprom_test(netdev, &data[I40E_ETH_TEST_EEPROM]))
1825 eth_test->flags |= ETH_TEST_FL_FAILED;
1826
1827 if (i40e_intr_test(netdev, &data[I40E_ETH_TEST_INTR]))
1828 eth_test->flags |= ETH_TEST_FL_FAILED;
1829
1830 /* run reg test last, a reset is required after it */
1831 if (i40e_reg_test(netdev, &data[I40E_ETH_TEST_REG]))
1832 eth_test->flags |= ETH_TEST_FL_FAILED;
1833
1834 clear_bit(__I40E_TESTING, &pf->state);
1835 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED));
1836
1837 if (if_running)
1838 i40e_open(netdev);
1839 } else {
1840 /* Online tests */
1841 netif_info(pf, drv, netdev, "online testing starting\n");
1842
1843 if (i40e_link_test(netdev, &data[I40E_ETH_TEST_LINK]))
1844 eth_test->flags |= ETH_TEST_FL_FAILED;
1845
1846 /* Offline only tests, not run in online; pass by default */
1847 data[I40E_ETH_TEST_REG] = 0;
1848 data[I40E_ETH_TEST_EEPROM] = 0;
1849 data[I40E_ETH_TEST_INTR] = 0;
1850 }
1851
1852skip_ol_tests:
1853
1854 netif_info(pf, drv, netdev, "testing finished\n");
1855}
1856
1857static void i40e_get_wol(struct net_device *netdev,
1858 struct ethtool_wolinfo *wol)
1859{
1860 struct i40e_netdev_priv *np = netdev_priv(netdev);
1861 struct i40e_pf *pf = np->vsi->back;
1862 struct i40e_hw *hw = &pf->hw;
1863 u16 wol_nvm_bits;
1864
1865 /* NVM bit on means WoL disabled for the port */
1866 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1867 if ((BIT(hw->port) & wol_nvm_bits) || (hw->partition_id != 1)) {
1868 wol->supported = 0;
1869 wol->wolopts = 0;
1870 } else {
1871 wol->supported = WAKE_MAGIC;
1872 wol->wolopts = (pf->wol_en ? WAKE_MAGIC : 0);
1873 }
1874}
1875
1876/**
1877 * i40e_set_wol - set the WakeOnLAN configuration
1878 * @netdev: the netdev in question
1879 * @wol: the ethtool WoL setting data
1880 **/
1881static int i40e_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
1882{
1883 struct i40e_netdev_priv *np = netdev_priv(netdev);
1884 struct i40e_pf *pf = np->vsi->back;
1885 struct i40e_vsi *vsi = np->vsi;
1886 struct i40e_hw *hw = &pf->hw;
1887 u16 wol_nvm_bits;
1888
1889 /* WoL not supported if this isn't the controlling PF on the port */
1890 if (hw->partition_id != 1) {
1891 i40e_partition_setting_complaint(pf);
1892 return -EOPNOTSUPP;
1893 }
1894
1895 if (vsi != pf->vsi[pf->lan_vsi])
1896 return -EOPNOTSUPP;
1897
1898 /* NVM bit on means WoL disabled for the port */
1899 i40e_read_nvm_word(hw, I40E_SR_NVM_WAKE_ON_LAN, &wol_nvm_bits);
1900 if (BIT(hw->port) & wol_nvm_bits)
1901 return -EOPNOTSUPP;
1902
1903 /* only magic packet is supported */
1904 if (wol->wolopts && (wol->wolopts != WAKE_MAGIC))
1905 return -EOPNOTSUPP;
1906
1907 /* is this a new value? */
1908 if (pf->wol_en != !!wol->wolopts) {
1909 pf->wol_en = !!wol->wolopts;
1910 device_set_wakeup_enable(&pf->pdev->dev, pf->wol_en);
1911 }
1912
1913 return 0;
1914}
1915
1916static int i40e_set_phys_id(struct net_device *netdev,
1917 enum ethtool_phys_id_state state)
1918{
1919 struct i40e_netdev_priv *np = netdev_priv(netdev);
1920 i40e_status ret = 0;
1921 struct i40e_pf *pf = np->vsi->back;
1922 struct i40e_hw *hw = &pf->hw;
1923 int blink_freq = 2;
1924 u16 temp_status;
1925
1926 switch (state) {
1927 case ETHTOOL_ID_ACTIVE:
1928 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) {
1929 pf->led_status = i40e_led_get(hw);
1930 } else {
1931 i40e_aq_set_phy_debug(hw, I40E_PHY_DEBUG_ALL, NULL);
1932 ret = i40e_led_get_phy(hw, &temp_status,
1933 &pf->phy_led_val);
1934 pf->led_status = temp_status;
1935 }
1936 return blink_freq;
1937 case ETHTOOL_ID_ON:
1938 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS))
1939 i40e_led_set(hw, 0xf, false);
1940 else
1941 ret = i40e_led_set_phy(hw, true, pf->led_status, 0);
1942 break;
1943 case ETHTOOL_ID_OFF:
1944 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS))
1945 i40e_led_set(hw, 0x0, false);
1946 else
1947 ret = i40e_led_set_phy(hw, false, pf->led_status, 0);
1948 break;
1949 case ETHTOOL_ID_INACTIVE:
1950 if (!(pf->flags & I40E_FLAG_PHY_CONTROLS_LEDS)) {
1951 i40e_led_set(hw, pf->led_status, false);
1952 } else {
1953 ret = i40e_led_set_phy(hw, false, pf->led_status,
1954 (pf->phy_led_val |
1955 I40E_PHY_LED_MODE_ORIG));
1956 i40e_aq_set_phy_debug(hw, 0, NULL);
1957 }
1958 break;
1959 default:
1960 break;
1961 }
1962 if (ret)
1963 return -ENOENT;
1964 else
1965 return 0;
1966}
1967
1968/* NOTE: i40e hardware uses a conversion factor of 2 for Interrupt
1969 * Throttle Rate (ITR) ie. ITR(1) = 2us ITR(10) = 20 us, and also
1970 * 125us (8000 interrupts per second) == ITR(62)
1971 */
1972
1973/**
1974 * __i40e_get_coalesce - get per-queue coalesce settings
1975 * @netdev: the netdev to check
1976 * @ec: ethtool coalesce data structure
1977 * @queue: which queue to pick
1978 *
1979 * Gets the per-queue settings for coalescence. Specifically Rx and Tx usecs
1980 * are per queue. If queue is <0 then we default to queue 0 as the
1981 * representative value.
1982 **/
1983static int __i40e_get_coalesce(struct net_device *netdev,
1984 struct ethtool_coalesce *ec,
1985 int queue)
1986{
1987 struct i40e_netdev_priv *np = netdev_priv(netdev);
1988 struct i40e_ring *rx_ring, *tx_ring;
1989 struct i40e_vsi *vsi = np->vsi;
1990
1991 ec->tx_max_coalesced_frames_irq = vsi->work_limit;
1992 ec->rx_max_coalesced_frames_irq = vsi->work_limit;
1993
1994 /* rx and tx usecs has per queue value. If user doesn't specify the queue,
1995 * return queue 0's value to represent.
1996 */
1997 if (queue < 0) {
1998 queue = 0;
1999 } else if (queue >= vsi->num_queue_pairs) {
2000 return -EINVAL;
2001 }
2002
2003 rx_ring = vsi->rx_rings[queue];
2004 tx_ring = vsi->tx_rings[queue];
2005
2006 if (ITR_IS_DYNAMIC(rx_ring->rx_itr_setting))
2007 ec->use_adaptive_rx_coalesce = 1;
2008
2009 if (ITR_IS_DYNAMIC(tx_ring->tx_itr_setting))
2010 ec->use_adaptive_tx_coalesce = 1;
2011
2012 ec->rx_coalesce_usecs = rx_ring->rx_itr_setting & ~I40E_ITR_DYNAMIC;
2013 ec->tx_coalesce_usecs = tx_ring->tx_itr_setting & ~I40E_ITR_DYNAMIC;
2014
2015
2016 /* we use the _usecs_high to store/set the interrupt rate limit
2017 * that the hardware supports, that almost but not quite
2018 * fits the original intent of the ethtool variable,
2019 * the rx_coalesce_usecs_high limits total interrupts
2020 * per second from both tx/rx sources.
2021 */
2022 ec->rx_coalesce_usecs_high = vsi->int_rate_limit;
2023 ec->tx_coalesce_usecs_high = vsi->int_rate_limit;
2024
2025 return 0;
2026}
2027
2028/**
2029 * i40e_get_coalesce - get a netdev's coalesce settings
2030 * @netdev: the netdev to check
2031 * @ec: ethtool coalesce data structure
2032 *
2033 * Gets the coalesce settings for a particular netdev. Note that if user has
2034 * modified per-queue settings, this only guarantees to represent queue 0. See
2035 * __i40e_get_coalesce for more details.
2036 **/
2037static int i40e_get_coalesce(struct net_device *netdev,
2038 struct ethtool_coalesce *ec)
2039{
2040 return __i40e_get_coalesce(netdev, ec, -1);
2041}
2042
2043/**
2044 * i40e_get_per_queue_coalesce - gets coalesce settings for particular queue
2045 * @netdev: netdev structure
2046 * @ec: ethtool's coalesce settings
2047 * @queue: the particular queue to read
2048 *
2049 * Will read a specific queue's coalesce settings
2050 **/
2051static int i40e_get_per_queue_coalesce(struct net_device *netdev, u32 queue,
2052 struct ethtool_coalesce *ec)
2053{
2054 return __i40e_get_coalesce(netdev, ec, queue);
2055}
2056
2057/**
2058 * i40e_set_itr_per_queue - set ITR values for specific queue
2059 * @vsi: the VSI to set values for
2060 * @ec: coalesce settings from ethtool
2061 * @queue: the queue to modify
2062 *
2063 * Change the ITR settings for a specific queue.
2064 **/
2065
2066static void i40e_set_itr_per_queue(struct i40e_vsi *vsi,
2067 struct ethtool_coalesce *ec,
2068 int queue)
2069{
2070 struct i40e_pf *pf = vsi->back;
2071 struct i40e_hw *hw = &pf->hw;
2072 struct i40e_q_vector *q_vector;
2073 u16 vector, intrl;
2074
2075 intrl = INTRL_USEC_TO_REG(vsi->int_rate_limit);
2076
2077 vsi->rx_rings[queue]->rx_itr_setting = ec->rx_coalesce_usecs;
2078 vsi->tx_rings[queue]->tx_itr_setting = ec->tx_coalesce_usecs;
2079
2080 if (ec->use_adaptive_rx_coalesce)
2081 vsi->rx_rings[queue]->rx_itr_setting |= I40E_ITR_DYNAMIC;
2082 else
2083 vsi->rx_rings[queue]->rx_itr_setting &= ~I40E_ITR_DYNAMIC;
2084
2085 if (ec->use_adaptive_tx_coalesce)
2086 vsi->tx_rings[queue]->tx_itr_setting |= I40E_ITR_DYNAMIC;
2087 else
2088 vsi->tx_rings[queue]->tx_itr_setting &= ~I40E_ITR_DYNAMIC;
2089
2090 q_vector = vsi->rx_rings[queue]->q_vector;
2091 q_vector->rx.itr = ITR_TO_REG(vsi->rx_rings[queue]->rx_itr_setting);
2092 vector = vsi->base_vector + q_vector->v_idx;
2093 wr32(hw, I40E_PFINT_ITRN(I40E_RX_ITR, vector - 1), q_vector->rx.itr);
2094
2095 q_vector = vsi->tx_rings[queue]->q_vector;
2096 q_vector->tx.itr = ITR_TO_REG(vsi->tx_rings[queue]->tx_itr_setting);
2097 vector = vsi->base_vector + q_vector->v_idx;
2098 wr32(hw, I40E_PFINT_ITRN(I40E_TX_ITR, vector - 1), q_vector->tx.itr);
2099
2100 wr32(hw, I40E_PFINT_RATEN(vector - 1), intrl);
2101 i40e_flush(hw);
2102}
2103
2104/**
2105 * __i40e_set_coalesce - set coalesce settings for particular queue
2106 * @netdev: the netdev to change
2107 * @ec: ethtool coalesce settings
2108 * @queue: the queue to change
2109 *
2110 * Sets the coalesce settings for a particular queue.
2111 **/
2112static int __i40e_set_coalesce(struct net_device *netdev,
2113 struct ethtool_coalesce *ec,
2114 int queue)
2115{
2116 struct i40e_netdev_priv *np = netdev_priv(netdev);
2117 struct i40e_vsi *vsi = np->vsi;
2118 struct i40e_pf *pf = vsi->back;
2119 int i;
2120
2121 if (ec->tx_max_coalesced_frames_irq || ec->rx_max_coalesced_frames_irq)
2122 vsi->work_limit = ec->tx_max_coalesced_frames_irq;
2123
2124 /* tx_coalesce_usecs_high is ignored, use rx-usecs-high instead */
2125 if (ec->tx_coalesce_usecs_high != vsi->int_rate_limit) {
2126 netif_info(pf, drv, netdev, "tx-usecs-high is not used, please program rx-usecs-high\n");
2127 return -EINVAL;
2128 }
2129
2130 if (ec->rx_coalesce_usecs_high >= INTRL_REG_TO_USEC(I40E_MAX_INTRL)) {
2131 netif_info(pf, drv, netdev, "Invalid value, rx-usecs-high range is 0-235\n");
2132 return -EINVAL;
2133 }
2134
2135 if (ec->rx_coalesce_usecs == 0) {
2136 if (ec->use_adaptive_rx_coalesce)
2137 netif_info(pf, drv, netdev, "rx-usecs=0, need to disable adaptive-rx for a complete disable\n");
2138 } else if ((ec->rx_coalesce_usecs < (I40E_MIN_ITR << 1)) ||
2139 (ec->rx_coalesce_usecs > (I40E_MAX_ITR << 1))) {
2140 netif_info(pf, drv, netdev, "Invalid value, rx-usecs range is 0-8160\n");
2141 return -EINVAL;
2142 }
2143
2144 vsi->int_rate_limit = ec->rx_coalesce_usecs_high;
2145
2146 if (ec->tx_coalesce_usecs == 0) {
2147 if (ec->use_adaptive_tx_coalesce)
2148 netif_info(pf, drv, netdev, "tx-usecs=0, need to disable adaptive-tx for a complete disable\n");
2149 } else if ((ec->tx_coalesce_usecs < (I40E_MIN_ITR << 1)) ||
2150 (ec->tx_coalesce_usecs > (I40E_MAX_ITR << 1))) {
2151 netif_info(pf, drv, netdev, "Invalid value, tx-usecs range is 0-8160\n");
2152 return -EINVAL;
2153 }
2154
2155 /* rx and tx usecs has per queue value. If user doesn't specify the queue,
2156 * apply to all queues.
2157 */
2158 if (queue < 0) {
2159 for (i = 0; i < vsi->num_queue_pairs; i++)
2160 i40e_set_itr_per_queue(vsi, ec, i);
2161 } else if (queue < vsi->num_queue_pairs) {
2162 i40e_set_itr_per_queue(vsi, ec, queue);
2163 } else {
2164 netif_info(pf, drv, netdev, "Invalid queue value, queue range is 0 - %d\n",
2165 vsi->num_queue_pairs - 1);
2166 return -EINVAL;
2167 }
2168
2169 return 0;
2170}
2171
2172/**
2173 * i40e_set_coalesce - set coalesce settings for every queue on the netdev
2174 * @netdev: the netdev to change
2175 * @ec: ethtool coalesce settings
2176 *
2177 * This will set each queue to the same coalesce settings.
2178 **/
2179static int i40e_set_coalesce(struct net_device *netdev,
2180 struct ethtool_coalesce *ec)
2181{
2182 return __i40e_set_coalesce(netdev, ec, -1);
2183}
2184
2185/**
2186 * i40e_set_per_queue_coalesce - set specific queue's coalesce settings
2187 * @netdev: the netdev to change
2188 * @ec: ethtool's coalesce settings
2189 * @queue: the queue to change
2190 *
2191 * Sets the specified queue's coalesce settings.
2192 **/
2193static int i40e_set_per_queue_coalesce(struct net_device *netdev, u32 queue,
2194 struct ethtool_coalesce *ec)
2195{
2196 return __i40e_set_coalesce(netdev, ec, queue);
2197}
2198
2199/**
2200 * i40e_get_rss_hash_opts - Get RSS hash Input Set for each flow type
2201 * @pf: pointer to the physical function struct
2202 * @cmd: ethtool rxnfc command
2203 *
2204 * Returns Success if the flow is supported, else Invalid Input.
2205 **/
2206static int i40e_get_rss_hash_opts(struct i40e_pf *pf, struct ethtool_rxnfc *cmd)
2207{
2208 struct i40e_hw *hw = &pf->hw;
2209 u8 flow_pctype = 0;
2210 u64 i_set = 0;
2211
2212 cmd->data = 0;
2213
2214 switch (cmd->flow_type) {
2215 case TCP_V4_FLOW:
2216 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2217 break;
2218 case UDP_V4_FLOW:
2219 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2220 break;
2221 case TCP_V6_FLOW:
2222 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2223 break;
2224 case UDP_V6_FLOW:
2225 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2226 break;
2227 case SCTP_V4_FLOW:
2228 case AH_ESP_V4_FLOW:
2229 case AH_V4_FLOW:
2230 case ESP_V4_FLOW:
2231 case IPV4_FLOW:
2232 case SCTP_V6_FLOW:
2233 case AH_ESP_V6_FLOW:
2234 case AH_V6_FLOW:
2235 case ESP_V6_FLOW:
2236 case IPV6_FLOW:
2237 /* Default is src/dest for IP, no matter the L4 hashing */
2238 cmd->data |= RXH_IP_SRC | RXH_IP_DST;
2239 break;
2240 default:
2241 return -EINVAL;
2242 }
2243
2244 /* Read flow based hash input set register */
2245 if (flow_pctype) {
2246 i_set = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2247 flow_pctype)) |
2248 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2249 flow_pctype)) << 32);
2250 }
2251
2252 /* Process bits of hash input set */
2253 if (i_set) {
2254 if (i_set & I40E_L4_SRC_MASK)
2255 cmd->data |= RXH_L4_B_0_1;
2256 if (i_set & I40E_L4_DST_MASK)
2257 cmd->data |= RXH_L4_B_2_3;
2258
2259 if (cmd->flow_type == TCP_V4_FLOW ||
2260 cmd->flow_type == UDP_V4_FLOW) {
2261 if (i_set & I40E_L3_SRC_MASK)
2262 cmd->data |= RXH_IP_SRC;
2263 if (i_set & I40E_L3_DST_MASK)
2264 cmd->data |= RXH_IP_DST;
2265 } else if (cmd->flow_type == TCP_V6_FLOW ||
2266 cmd->flow_type == UDP_V6_FLOW) {
2267 if (i_set & I40E_L3_V6_SRC_MASK)
2268 cmd->data |= RXH_IP_SRC;
2269 if (i_set & I40E_L3_V6_DST_MASK)
2270 cmd->data |= RXH_IP_DST;
2271 }
2272 }
2273
2274 return 0;
2275}
2276
2277/**
2278 * i40e_get_ethtool_fdir_all - Populates the rule count of a command
2279 * @pf: Pointer to the physical function struct
2280 * @cmd: The command to get or set Rx flow classification rules
2281 * @rule_locs: Array of used rule locations
2282 *
2283 * This function populates both the total and actual rule count of
2284 * the ethtool flow classification command
2285 *
2286 * Returns 0 on success or -EMSGSIZE if entry not found
2287 **/
2288static int i40e_get_ethtool_fdir_all(struct i40e_pf *pf,
2289 struct ethtool_rxnfc *cmd,
2290 u32 *rule_locs)
2291{
2292 struct i40e_fdir_filter *rule;
2293 struct hlist_node *node2;
2294 int cnt = 0;
2295
2296 /* report total rule count */
2297 cmd->data = i40e_get_fd_cnt_all(pf);
2298
2299 hlist_for_each_entry_safe(rule, node2,
2300 &pf->fdir_filter_list, fdir_node) {
2301 if (cnt == cmd->rule_cnt)
2302 return -EMSGSIZE;
2303
2304 rule_locs[cnt] = rule->fd_id;
2305 cnt++;
2306 }
2307
2308 cmd->rule_cnt = cnt;
2309
2310 return 0;
2311}
2312
2313/**
2314 * i40e_get_ethtool_fdir_entry - Look up a filter based on Rx flow
2315 * @pf: Pointer to the physical function struct
2316 * @cmd: The command to get or set Rx flow classification rules
2317 *
2318 * This function looks up a filter based on the Rx flow classification
2319 * command and fills the flow spec info for it if found
2320 *
2321 * Returns 0 on success or -EINVAL if filter not found
2322 **/
2323static int i40e_get_ethtool_fdir_entry(struct i40e_pf *pf,
2324 struct ethtool_rxnfc *cmd)
2325{
2326 struct ethtool_rx_flow_spec *fsp =
2327 (struct ethtool_rx_flow_spec *)&cmd->fs;
2328 struct i40e_fdir_filter *rule = NULL;
2329 struct hlist_node *node2;
2330
2331 hlist_for_each_entry_safe(rule, node2,
2332 &pf->fdir_filter_list, fdir_node) {
2333 if (fsp->location <= rule->fd_id)
2334 break;
2335 }
2336
2337 if (!rule || fsp->location != rule->fd_id)
2338 return -EINVAL;
2339
2340 fsp->flow_type = rule->flow_type;
2341 if (fsp->flow_type == IP_USER_FLOW) {
2342 fsp->h_u.usr_ip4_spec.ip_ver = ETH_RX_NFC_IP4;
2343 fsp->h_u.usr_ip4_spec.proto = 0;
2344 fsp->m_u.usr_ip4_spec.proto = 0;
2345 }
2346
2347 /* Reverse the src and dest notion, since the HW views them from
2348 * Tx perspective where as the user expects it from Rx filter view.
2349 */
2350 fsp->h_u.tcp_ip4_spec.psrc = rule->dst_port;
2351 fsp->h_u.tcp_ip4_spec.pdst = rule->src_port;
2352 fsp->h_u.tcp_ip4_spec.ip4src = rule->dst_ip[0];
2353 fsp->h_u.tcp_ip4_spec.ip4dst = rule->src_ip[0];
2354
2355 if (rule->dest_ctl == I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET)
2356 fsp->ring_cookie = RX_CLS_FLOW_DISC;
2357 else
2358 fsp->ring_cookie = rule->q_index;
2359
2360 if (rule->dest_vsi != pf->vsi[pf->lan_vsi]->id) {
2361 struct i40e_vsi *vsi;
2362
2363 vsi = i40e_find_vsi_from_id(pf, rule->dest_vsi);
2364 if (vsi && vsi->type == I40E_VSI_SRIOV) {
2365 fsp->h_ext.data[1] = htonl(vsi->vf_id);
2366 fsp->m_ext.data[1] = htonl(0x1);
2367 }
2368 }
2369
2370 return 0;
2371}
2372
2373/**
2374 * i40e_get_rxnfc - command to get RX flow classification rules
2375 * @netdev: network interface device structure
2376 * @cmd: ethtool rxnfc command
2377 *
2378 * Returns Success if the command is supported.
2379 **/
2380static int i40e_get_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd,
2381 u32 *rule_locs)
2382{
2383 struct i40e_netdev_priv *np = netdev_priv(netdev);
2384 struct i40e_vsi *vsi = np->vsi;
2385 struct i40e_pf *pf = vsi->back;
2386 int ret = -EOPNOTSUPP;
2387
2388 switch (cmd->cmd) {
2389 case ETHTOOL_GRXRINGS:
2390 cmd->data = vsi->num_queue_pairs;
2391 ret = 0;
2392 break;
2393 case ETHTOOL_GRXFH:
2394 ret = i40e_get_rss_hash_opts(pf, cmd);
2395 break;
2396 case ETHTOOL_GRXCLSRLCNT:
2397 cmd->rule_cnt = pf->fdir_pf_active_filters;
2398 /* report total rule count */
2399 cmd->data = i40e_get_fd_cnt_all(pf);
2400 ret = 0;
2401 break;
2402 case ETHTOOL_GRXCLSRULE:
2403 ret = i40e_get_ethtool_fdir_entry(pf, cmd);
2404 break;
2405 case ETHTOOL_GRXCLSRLALL:
2406 ret = i40e_get_ethtool_fdir_all(pf, cmd, rule_locs);
2407 break;
2408 default:
2409 break;
2410 }
2411
2412 return ret;
2413}
2414
2415/**
2416 * i40e_get_rss_hash_bits - Read RSS Hash bits from register
2417 * @nfc: pointer to user request
2418 * @i_setc bits currently set
2419 *
2420 * Returns value of bits to be set per user request
2421 **/
2422static u64 i40e_get_rss_hash_bits(struct ethtool_rxnfc *nfc, u64 i_setc)
2423{
2424 u64 i_set = i_setc;
2425 u64 src_l3 = 0, dst_l3 = 0;
2426
2427 if (nfc->data & RXH_L4_B_0_1)
2428 i_set |= I40E_L4_SRC_MASK;
2429 else
2430 i_set &= ~I40E_L4_SRC_MASK;
2431 if (nfc->data & RXH_L4_B_2_3)
2432 i_set |= I40E_L4_DST_MASK;
2433 else
2434 i_set &= ~I40E_L4_DST_MASK;
2435
2436 if (nfc->flow_type == TCP_V6_FLOW || nfc->flow_type == UDP_V6_FLOW) {
2437 src_l3 = I40E_L3_V6_SRC_MASK;
2438 dst_l3 = I40E_L3_V6_DST_MASK;
2439 } else if (nfc->flow_type == TCP_V4_FLOW ||
2440 nfc->flow_type == UDP_V4_FLOW) {
2441 src_l3 = I40E_L3_SRC_MASK;
2442 dst_l3 = I40E_L3_DST_MASK;
2443 } else {
2444 /* Any other flow type are not supported here */
2445 return i_set;
2446 }
2447
2448 if (nfc->data & RXH_IP_SRC)
2449 i_set |= src_l3;
2450 else
2451 i_set &= ~src_l3;
2452 if (nfc->data & RXH_IP_DST)
2453 i_set |= dst_l3;
2454 else
2455 i_set &= ~dst_l3;
2456
2457 return i_set;
2458}
2459
2460/**
2461 * i40e_set_rss_hash_opt - Enable/Disable flow types for RSS hash
2462 * @pf: pointer to the physical function struct
2463 * @cmd: ethtool rxnfc command
2464 *
2465 * Returns Success if the flow input set is supported.
2466 **/
2467static int i40e_set_rss_hash_opt(struct i40e_pf *pf, struct ethtool_rxnfc *nfc)
2468{
2469 struct i40e_hw *hw = &pf->hw;
2470 u64 hena = (u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(0)) |
2471 ((u64)i40e_read_rx_ctl(hw, I40E_PFQF_HENA(1)) << 32);
2472 u8 flow_pctype = 0;
2473 u64 i_set, i_setc;
2474
2475 /* RSS does not support anything other than hashing
2476 * to queues on src and dst IPs and ports
2477 */
2478 if (nfc->data & ~(RXH_IP_SRC | RXH_IP_DST |
2479 RXH_L4_B_0_1 | RXH_L4_B_2_3))
2480 return -EINVAL;
2481
2482 switch (nfc->flow_type) {
2483 case TCP_V4_FLOW:
2484 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_TCP;
2485 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2486 hena |=
2487 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
2488 break;
2489 case TCP_V6_FLOW:
2490 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_TCP;
2491 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2492 hena |=
2493 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_TCP_SYN_NO_ACK);
2494 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2495 hena |=
2496 BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_TCP_SYN_NO_ACK);
2497 break;
2498 case UDP_V4_FLOW:
2499 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV4_UDP;
2500 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2501 hena |=
2502 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV4_UDP) |
2503 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV4_UDP);
2504
2505 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2506 break;
2507 case UDP_V6_FLOW:
2508 flow_pctype = I40E_FILTER_PCTYPE_NONF_IPV6_UDP;
2509 if (pf->flags & I40E_FLAG_MULTIPLE_TCP_UDP_RSS_PCTYPE)
2510 hena |=
2511 BIT_ULL(I40E_FILTER_PCTYPE_NONF_UNICAST_IPV6_UDP) |
2512 BIT_ULL(I40E_FILTER_PCTYPE_NONF_MULTICAST_IPV6_UDP);
2513
2514 hena |= BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2515 break;
2516 case AH_ESP_V4_FLOW:
2517 case AH_V4_FLOW:
2518 case ESP_V4_FLOW:
2519 case SCTP_V4_FLOW:
2520 if ((nfc->data & RXH_L4_B_0_1) ||
2521 (nfc->data & RXH_L4_B_2_3))
2522 return -EINVAL;
2523 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER);
2524 break;
2525 case AH_ESP_V6_FLOW:
2526 case AH_V6_FLOW:
2527 case ESP_V6_FLOW:
2528 case SCTP_V6_FLOW:
2529 if ((nfc->data & RXH_L4_B_0_1) ||
2530 (nfc->data & RXH_L4_B_2_3))
2531 return -EINVAL;
2532 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER);
2533 break;
2534 case IPV4_FLOW:
2535 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV4_OTHER) |
2536 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV4);
2537 break;
2538 case IPV6_FLOW:
2539 hena |= BIT_ULL(I40E_FILTER_PCTYPE_NONF_IPV6_OTHER) |
2540 BIT_ULL(I40E_FILTER_PCTYPE_FRAG_IPV6);
2541 break;
2542 default:
2543 return -EINVAL;
2544 }
2545
2546 if (flow_pctype) {
2547 i_setc = (u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(0,
2548 flow_pctype)) |
2549 ((u64)i40e_read_rx_ctl(hw, I40E_GLQF_HASH_INSET(1,
2550 flow_pctype)) << 32);
2551 i_set = i40e_get_rss_hash_bits(nfc, i_setc);
2552 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(0, flow_pctype),
2553 (u32)i_set);
2554 i40e_write_rx_ctl(hw, I40E_GLQF_HASH_INSET(1, flow_pctype),
2555 (u32)(i_set >> 32));
2556 hena |= BIT_ULL(flow_pctype);
2557 }
2558
2559 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(0), (u32)hena);
2560 i40e_write_rx_ctl(hw, I40E_PFQF_HENA(1), (u32)(hena >> 32));
2561 i40e_flush(hw);
2562
2563 return 0;
2564}
2565
2566/**
2567 * i40e_match_fdir_input_set - Match a new filter against an existing one
2568 * @rule: The filter already added
2569 * @input: The new filter to comapre against
2570 *
2571 * Returns true if the two input set match
2572 **/
2573static bool i40e_match_fdir_input_set(struct i40e_fdir_filter *rule,
2574 struct i40e_fdir_filter *input)
2575{
2576 if ((rule->dst_ip[0] != input->dst_ip[0]) ||
2577 (rule->src_ip[0] != input->src_ip[0]) ||
2578 (rule->dst_port != input->dst_port) ||
2579 (rule->src_port != input->src_port))
2580 return false;
2581 return true;
2582}
2583
2584/**
2585 * i40e_update_ethtool_fdir_entry - Updates the fdir filter entry
2586 * @vsi: Pointer to the targeted VSI
2587 * @input: The filter to update or NULL to indicate deletion
2588 * @sw_idx: Software index to the filter
2589 * @cmd: The command to get or set Rx flow classification rules
2590 *
2591 * This function updates (or deletes) a Flow Director entry from
2592 * the hlist of the corresponding PF
2593 *
2594 * Returns 0 on success
2595 **/
2596static int i40e_update_ethtool_fdir_entry(struct i40e_vsi *vsi,
2597 struct i40e_fdir_filter *input,
2598 u16 sw_idx,
2599 struct ethtool_rxnfc *cmd)
2600{
2601 struct i40e_fdir_filter *rule, *parent;
2602 struct i40e_pf *pf = vsi->back;
2603 struct hlist_node *node2;
2604 int err = -EINVAL;
2605
2606 parent = NULL;
2607 rule = NULL;
2608
2609 hlist_for_each_entry_safe(rule, node2,
2610 &pf->fdir_filter_list, fdir_node) {
2611 /* hash found, or no matching entry */
2612 if (rule->fd_id >= sw_idx)
2613 break;
2614 parent = rule;
2615 }
2616
2617 /* if there is an old rule occupying our place remove it */
2618 if (rule && (rule->fd_id == sw_idx)) {
2619 if (input && !i40e_match_fdir_input_set(rule, input))
2620 err = i40e_add_del_fdir(vsi, rule, false);
2621 else if (!input)
2622 err = i40e_add_del_fdir(vsi, rule, false);
2623 hlist_del(&rule->fdir_node);
2624 kfree(rule);
2625 pf->fdir_pf_active_filters--;
2626 }
2627
2628 /* If no input this was a delete, err should be 0 if a rule was
2629 * successfully found and removed from the list else -EINVAL
2630 */
2631 if (!input)
2632 return err;
2633
2634 /* initialize node and set software index */
2635 INIT_HLIST_NODE(&input->fdir_node);
2636
2637 /* add filter to the list */
2638 if (parent)
2639 hlist_add_behind(&input->fdir_node, &parent->fdir_node);
2640 else
2641 hlist_add_head(&input->fdir_node,
2642 &pf->fdir_filter_list);
2643
2644 /* update counts */
2645 pf->fdir_pf_active_filters++;
2646
2647 return 0;
2648}
2649
2650/**
2651 * i40e_del_fdir_entry - Deletes a Flow Director filter entry
2652 * @vsi: Pointer to the targeted VSI
2653 * @cmd: The command to get or set Rx flow classification rules
2654 *
2655 * The function removes a Flow Director filter entry from the
2656 * hlist of the corresponding PF
2657 *
2658 * Returns 0 on success
2659 */
2660static int i40e_del_fdir_entry(struct i40e_vsi *vsi,
2661 struct ethtool_rxnfc *cmd)
2662{
2663 struct ethtool_rx_flow_spec *fsp =
2664 (struct ethtool_rx_flow_spec *)&cmd->fs;
2665 struct i40e_pf *pf = vsi->back;
2666 int ret = 0;
2667
2668 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
2669 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
2670 return -EBUSY;
2671
2672 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
2673 return -EBUSY;
2674
2675 ret = i40e_update_ethtool_fdir_entry(vsi, NULL, fsp->location, cmd);
2676
2677 i40e_fdir_check_and_reenable(pf);
2678 return ret;
2679}
2680
2681/**
2682 * i40e_add_fdir_ethtool - Add/Remove Flow Director filters
2683 * @vsi: pointer to the targeted VSI
2684 * @cmd: command to get or set RX flow classification rules
2685 *
2686 * Add Flow Director filters for a specific flow spec based on their
2687 * protocol. Returns 0 if the filters were successfully added.
2688 **/
2689static int i40e_add_fdir_ethtool(struct i40e_vsi *vsi,
2690 struct ethtool_rxnfc *cmd)
2691{
2692 struct ethtool_rx_flow_spec *fsp;
2693 struct i40e_fdir_filter *input;
2694 struct i40e_pf *pf;
2695 int ret = -EINVAL;
2696 u16 vf_id;
2697
2698 if (!vsi)
2699 return -EINVAL;
2700 pf = vsi->back;
2701
2702 if (!(pf->flags & I40E_FLAG_FD_SB_ENABLED))
2703 return -EOPNOTSUPP;
2704
2705 if (pf->auto_disable_flags & I40E_FLAG_FD_SB_ENABLED)
2706 return -ENOSPC;
2707
2708 if (test_bit(__I40E_RESET_RECOVERY_PENDING, &pf->state) ||
2709 test_bit(__I40E_RESET_INTR_RECEIVED, &pf->state))
2710 return -EBUSY;
2711
2712 if (test_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state))
2713 return -EBUSY;
2714
2715 fsp = (struct ethtool_rx_flow_spec *)&cmd->fs;
2716
2717 if (fsp->location >= (pf->hw.func_caps.fd_filters_best_effort +
2718 pf->hw.func_caps.fd_filters_guaranteed)) {
2719 return -EINVAL;
2720 }
2721
2722 if ((fsp->ring_cookie != RX_CLS_FLOW_DISC) &&
2723 (fsp->ring_cookie >= vsi->num_queue_pairs))
2724 return -EINVAL;
2725
2726 input = kzalloc(sizeof(*input), GFP_KERNEL);
2727
2728 if (!input)
2729 return -ENOMEM;
2730
2731 input->fd_id = fsp->location;
2732
2733 if (fsp->ring_cookie == RX_CLS_FLOW_DISC)
2734 input->dest_ctl = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
2735 else
2736 input->dest_ctl =
2737 I40E_FILTER_PROGRAM_DESC_DEST_DIRECT_PACKET_QINDEX;
2738
2739 input->q_index = fsp->ring_cookie;
2740 input->flex_off = 0;
2741 input->pctype = 0;
2742 input->dest_vsi = vsi->id;
2743 input->fd_status = I40E_FILTER_PROGRAM_DESC_FD_STATUS_FD_ID;
2744 input->cnt_index = I40E_FD_SB_STAT_IDX(pf->hw.pf_id);
2745 input->flow_type = fsp->flow_type;
2746 input->ip4_proto = fsp->h_u.usr_ip4_spec.proto;
2747
2748 /* Reverse the src and dest notion, since the HW expects them to be from
2749 * Tx perspective where as the input from user is from Rx filter view.
2750 */
2751 input->dst_port = fsp->h_u.tcp_ip4_spec.psrc;
2752 input->src_port = fsp->h_u.tcp_ip4_spec.pdst;
2753 input->dst_ip[0] = fsp->h_u.tcp_ip4_spec.ip4src;
2754 input->src_ip[0] = fsp->h_u.tcp_ip4_spec.ip4dst;
2755
2756 if (ntohl(fsp->m_ext.data[1])) {
2757 vf_id = ntohl(fsp->h_ext.data[1]);
2758 if (vf_id >= pf->num_alloc_vfs) {
2759 netif_info(pf, drv, vsi->netdev,
2760 "Invalid VF id %d\n", vf_id);
2761 goto free_input;
2762 }
2763 /* Find vsi id from vf id and override dest vsi */
2764 input->dest_vsi = pf->vf[vf_id].lan_vsi_id;
2765 if (input->q_index >= pf->vf[vf_id].num_queue_pairs) {
2766 netif_info(pf, drv, vsi->netdev,
2767 "Invalid queue id %d for VF %d\n",
2768 input->q_index, vf_id);
2769 goto free_input;
2770 }
2771 }
2772
2773 ret = i40e_add_del_fdir(vsi, input, true);
2774free_input:
2775 if (ret)
2776 kfree(input);
2777 else
2778 i40e_update_ethtool_fdir_entry(vsi, input, fsp->location, NULL);
2779
2780 return ret;
2781}
2782
2783/**
2784 * i40e_set_rxnfc - command to set RX flow classification rules
2785 * @netdev: network interface device structure
2786 * @cmd: ethtool rxnfc command
2787 *
2788 * Returns Success if the command is supported.
2789 **/
2790static int i40e_set_rxnfc(struct net_device *netdev, struct ethtool_rxnfc *cmd)
2791{
2792 struct i40e_netdev_priv *np = netdev_priv(netdev);
2793 struct i40e_vsi *vsi = np->vsi;
2794 struct i40e_pf *pf = vsi->back;
2795 int ret = -EOPNOTSUPP;
2796
2797 switch (cmd->cmd) {
2798 case ETHTOOL_SRXFH:
2799 ret = i40e_set_rss_hash_opt(pf, cmd);
2800 break;
2801 case ETHTOOL_SRXCLSRLINS:
2802 ret = i40e_add_fdir_ethtool(vsi, cmd);
2803 break;
2804 case ETHTOOL_SRXCLSRLDEL:
2805 ret = i40e_del_fdir_entry(vsi, cmd);
2806 break;
2807 default:
2808 break;
2809 }
2810
2811 return ret;
2812}
2813
2814/**
2815 * i40e_max_channels - get Max number of combined channels supported
2816 * @vsi: vsi pointer
2817 **/
2818static unsigned int i40e_max_channels(struct i40e_vsi *vsi)
2819{
2820 /* TODO: This code assumes DCB and FD is disabled for now. */
2821 return vsi->alloc_queue_pairs;
2822}
2823
2824/**
2825 * i40e_get_channels - Get the current channels enabled and max supported etc.
2826 * @netdev: network interface device structure
2827 * @ch: ethtool channels structure
2828 *
2829 * We don't support separate tx and rx queues as channels. The other count
2830 * represents how many queues are being used for control. max_combined counts
2831 * how many queue pairs we can support. They may not be mapped 1 to 1 with
2832 * q_vectors since we support a lot more queue pairs than q_vectors.
2833 **/
2834static void i40e_get_channels(struct net_device *dev,
2835 struct ethtool_channels *ch)
2836{
2837 struct i40e_netdev_priv *np = netdev_priv(dev);
2838 struct i40e_vsi *vsi = np->vsi;
2839 struct i40e_pf *pf = vsi->back;
2840
2841 /* report maximum channels */
2842 ch->max_combined = i40e_max_channels(vsi);
2843
2844 /* report info for other vector */
2845 ch->other_count = (pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0;
2846 ch->max_other = ch->other_count;
2847
2848 /* Note: This code assumes DCB is disabled for now. */
2849 ch->combined_count = vsi->num_queue_pairs;
2850}
2851
2852/**
2853 * i40e_set_channels - Set the new channels count.
2854 * @netdev: network interface device structure
2855 * @ch: ethtool channels structure
2856 *
2857 * The new channels count may not be the same as requested by the user
2858 * since it gets rounded down to a power of 2 value.
2859 **/
2860static int i40e_set_channels(struct net_device *dev,
2861 struct ethtool_channels *ch)
2862{
2863 const u8 drop = I40E_FILTER_PROGRAM_DESC_DEST_DROP_PACKET;
2864 struct i40e_netdev_priv *np = netdev_priv(dev);
2865 unsigned int count = ch->combined_count;
2866 struct i40e_vsi *vsi = np->vsi;
2867 struct i40e_pf *pf = vsi->back;
2868 struct i40e_fdir_filter *rule;
2869 struct hlist_node *node2;
2870 int new_count;
2871 int err = 0;
2872
2873 /* We do not support setting channels for any other VSI at present */
2874 if (vsi->type != I40E_VSI_MAIN)
2875 return -EINVAL;
2876
2877 /* verify they are not requesting separate vectors */
2878 if (!count || ch->rx_count || ch->tx_count)
2879 return -EINVAL;
2880
2881 /* verify other_count has not changed */
2882 if (ch->other_count != ((pf->flags & I40E_FLAG_FD_SB_ENABLED) ? 1 : 0))
2883 return -EINVAL;
2884
2885 /* verify the number of channels does not exceed hardware limits */
2886 if (count > i40e_max_channels(vsi))
2887 return -EINVAL;
2888
2889 /* verify that the number of channels does not invalidate any current
2890 * flow director rules
2891 */
2892 hlist_for_each_entry_safe(rule, node2,
2893 &pf->fdir_filter_list, fdir_node) {
2894 if (rule->dest_ctl != drop && count <= rule->q_index) {
2895 dev_warn(&pf->pdev->dev,
2896 "Existing user defined filter %d assigns flow to queue %d\n",
2897 rule->fd_id, rule->q_index);
2898 err = -EINVAL;
2899 }
2900 }
2901
2902 if (err) {
2903 dev_err(&pf->pdev->dev,
2904 "Existing filter rules must be deleted to reduce combined channel count to %d\n",
2905 count);
2906 return err;
2907 }
2908
2909 /* update feature limits from largest to smallest supported values */
2910 /* TODO: Flow director limit, DCB etc */
2911
2912 /* use rss_reconfig to rebuild with new queue count and update traffic
2913 * class queue mapping
2914 */
2915 new_count = i40e_reconfig_rss_queues(pf, count);
2916 if (new_count > 0)
2917 return 0;
2918 else
2919 return -EINVAL;
2920}
2921
2922/**
2923 * i40e_get_rxfh_key_size - get the RSS hash key size
2924 * @netdev: network interface device structure
2925 *
2926 * Returns the table size.
2927 **/
2928static u32 i40e_get_rxfh_key_size(struct net_device *netdev)
2929{
2930 return I40E_HKEY_ARRAY_SIZE;
2931}
2932
2933/**
2934 * i40e_get_rxfh_indir_size - get the rx flow hash indirection table size
2935 * @netdev: network interface device structure
2936 *
2937 * Returns the table size.
2938 **/
2939static u32 i40e_get_rxfh_indir_size(struct net_device *netdev)
2940{
2941 return I40E_HLUT_ARRAY_SIZE;
2942}
2943
2944static int i40e_get_rxfh(struct net_device *netdev, u32 *indir, u8 *key,
2945 u8 *hfunc)
2946{
2947 struct i40e_netdev_priv *np = netdev_priv(netdev);
2948 struct i40e_vsi *vsi = np->vsi;
2949 u8 *lut, *seed = NULL;
2950 int ret;
2951 u16 i;
2952
2953 if (hfunc)
2954 *hfunc = ETH_RSS_HASH_TOP;
2955
2956 if (!indir)
2957 return 0;
2958
2959 seed = key;
2960 lut = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
2961 if (!lut)
2962 return -ENOMEM;
2963 ret = i40e_get_rss(vsi, seed, lut, I40E_HLUT_ARRAY_SIZE);
2964 if (ret)
2965 goto out;
2966 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
2967 indir[i] = (u32)(lut[i]);
2968
2969out:
2970 kfree(lut);
2971
2972 return ret;
2973}
2974
2975/**
2976 * i40e_set_rxfh - set the rx flow hash indirection table
2977 * @netdev: network interface device structure
2978 * @indir: indirection table
2979 * @key: hash key
2980 *
2981 * Returns -EINVAL if the table specifies an invalid queue id, otherwise
2982 * returns 0 after programming the table.
2983 **/
2984static int i40e_set_rxfh(struct net_device *netdev, const u32 *indir,
2985 const u8 *key, const u8 hfunc)
2986{
2987 struct i40e_netdev_priv *np = netdev_priv(netdev);
2988 struct i40e_vsi *vsi = np->vsi;
2989 struct i40e_pf *pf = vsi->back;
2990 u8 *seed = NULL;
2991 u16 i;
2992
2993 if (hfunc != ETH_RSS_HASH_NO_CHANGE && hfunc != ETH_RSS_HASH_TOP)
2994 return -EOPNOTSUPP;
2995
2996 if (key) {
2997 if (!vsi->rss_hkey_user) {
2998 vsi->rss_hkey_user = kzalloc(I40E_HKEY_ARRAY_SIZE,
2999 GFP_KERNEL);
3000 if (!vsi->rss_hkey_user)
3001 return -ENOMEM;
3002 }
3003 memcpy(vsi->rss_hkey_user, key, I40E_HKEY_ARRAY_SIZE);
3004 seed = vsi->rss_hkey_user;
3005 }
3006 if (!vsi->rss_lut_user) {
3007 vsi->rss_lut_user = kzalloc(I40E_HLUT_ARRAY_SIZE, GFP_KERNEL);
3008 if (!vsi->rss_lut_user)
3009 return -ENOMEM;
3010 }
3011
3012 /* Each 32 bits pointed by 'indir' is stored with a lut entry */
3013 if (indir)
3014 for (i = 0; i < I40E_HLUT_ARRAY_SIZE; i++)
3015 vsi->rss_lut_user[i] = (u8)(indir[i]);
3016 else
3017 i40e_fill_rss_lut(pf, vsi->rss_lut_user, I40E_HLUT_ARRAY_SIZE,
3018 vsi->rss_size);
3019
3020 return i40e_config_rss(vsi, seed, vsi->rss_lut_user,
3021 I40E_HLUT_ARRAY_SIZE);
3022}
3023
3024/**
3025 * i40e_get_priv_flags - report device private flags
3026 * @dev: network interface device structure
3027 *
3028 * The get string set count and the string set should be matched for each
3029 * flag returned. Add new strings for each flag to the i40e_priv_flags_strings
3030 * array.
3031 *
3032 * Returns a u32 bitmap of flags.
3033 **/
3034static u32 i40e_get_priv_flags(struct net_device *dev)
3035{
3036 struct i40e_netdev_priv *np = netdev_priv(dev);
3037 struct i40e_vsi *vsi = np->vsi;
3038 struct i40e_pf *pf = vsi->back;
3039 u32 ret_flags = 0;
3040
3041 ret_flags |= pf->flags & I40E_FLAG_LINK_POLLING_ENABLED ?
3042 I40E_PRIV_FLAGS_LINKPOLL_FLAG : 0;
3043 ret_flags |= pf->flags & I40E_FLAG_FD_ATR_ENABLED ?
3044 I40E_PRIV_FLAGS_FD_ATR : 0;
3045 ret_flags |= pf->flags & I40E_FLAG_VEB_STATS_ENABLED ?
3046 I40E_PRIV_FLAGS_VEB_STATS : 0;
3047 ret_flags |= pf->auto_disable_flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE ?
3048 0 : I40E_PRIV_FLAGS_HW_ATR_EVICT;
3049 if (pf->hw.pf_id == 0) {
3050 ret_flags |= pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT ?
3051 I40E_PRIV_FLAGS_TRUE_PROMISC_SUPPORT : 0;
3052 }
3053
3054 return ret_flags;
3055}
3056
3057/**
3058 * i40e_set_priv_flags - set private flags
3059 * @dev: network interface device structure
3060 * @flags: bit flags to be set
3061 **/
3062static int i40e_set_priv_flags(struct net_device *dev, u32 flags)
3063{
3064 struct i40e_netdev_priv *np = netdev_priv(dev);
3065 struct i40e_vsi *vsi = np->vsi;
3066 struct i40e_pf *pf = vsi->back;
3067 u16 sw_flags = 0, valid_flags = 0;
3068 bool reset_required = false;
3069 bool promisc_change = false;
3070 int ret;
3071
3072 /* NOTE: MFP is not settable */
3073
3074 if (flags & I40E_PRIV_FLAGS_LINKPOLL_FLAG)
3075 pf->flags |= I40E_FLAG_LINK_POLLING_ENABLED;
3076 else
3077 pf->flags &= ~I40E_FLAG_LINK_POLLING_ENABLED;
3078
3079 /* allow the user to control the state of the Flow
3080 * Director ATR (Application Targeted Routing) feature
3081 * of the driver
3082 */
3083 if (flags & I40E_PRIV_FLAGS_FD_ATR) {
3084 pf->flags |= I40E_FLAG_FD_ATR_ENABLED;
3085 } else {
3086 pf->flags &= ~I40E_FLAG_FD_ATR_ENABLED;
3087 pf->auto_disable_flags |= I40E_FLAG_FD_ATR_ENABLED;
3088
3089 /* flush current ATR settings */
3090 set_bit(__I40E_FD_FLUSH_REQUESTED, &pf->state);
3091 }
3092
3093 if ((flags & I40E_PRIV_FLAGS_VEB_STATS) &&
3094 !(pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
3095 pf->flags |= I40E_FLAG_VEB_STATS_ENABLED;
3096 reset_required = true;
3097 } else if (!(flags & I40E_PRIV_FLAGS_VEB_STATS) &&
3098 (pf->flags & I40E_FLAG_VEB_STATS_ENABLED)) {
3099 pf->flags &= ~I40E_FLAG_VEB_STATS_ENABLED;
3100 reset_required = true;
3101 }
3102
3103 if (pf->hw.pf_id == 0) {
3104 if ((flags & I40E_PRIV_FLAGS_TRUE_PROMISC_SUPPORT) &&
3105 !(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
3106 pf->flags |= I40E_FLAG_TRUE_PROMISC_SUPPORT;
3107 promisc_change = true;
3108 } else if (!(flags & I40E_PRIV_FLAGS_TRUE_PROMISC_SUPPORT) &&
3109 (pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT)) {
3110 pf->flags &= ~I40E_FLAG_TRUE_PROMISC_SUPPORT;
3111 promisc_change = true;
3112 }
3113 }
3114 if (promisc_change) {
3115 if (!(pf->flags & I40E_FLAG_TRUE_PROMISC_SUPPORT))
3116 sw_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
3117 valid_flags = I40E_AQ_SET_SWITCH_CFG_PROMISC;
3118 ret = i40e_aq_set_switch_config(&pf->hw, sw_flags, valid_flags,
3119 NULL);
3120 if (ret && pf->hw.aq.asq_last_status != I40E_AQ_RC_ESRCH) {
3121 dev_info(&pf->pdev->dev,
3122 "couldn't set switch config bits, err %s aq_err %s\n",
3123 i40e_stat_str(&pf->hw, ret),
3124 i40e_aq_str(&pf->hw,
3125 pf->hw.aq.asq_last_status));
3126 /* not a fatal problem, just keep going */
3127 }
3128 }
3129
3130 if ((flags & I40E_PRIV_FLAGS_HW_ATR_EVICT) &&
3131 (pf->flags & I40E_FLAG_HW_ATR_EVICT_CAPABLE))
3132 pf->auto_disable_flags &= ~I40E_FLAG_HW_ATR_EVICT_CAPABLE;
3133 else
3134 pf->auto_disable_flags |= I40E_FLAG_HW_ATR_EVICT_CAPABLE;
3135
3136 /* if needed, issue reset to cause things to take effect */
3137 if (reset_required)
3138 i40e_do_reset(pf, BIT(__I40E_PF_RESET_REQUESTED));
3139
3140 return 0;
3141}
3142
3143static const struct ethtool_ops i40e_ethtool_ops = {
3144 .get_settings = i40e_get_settings,
3145 .set_settings = i40e_set_settings,
3146 .get_drvinfo = i40e_get_drvinfo,
3147 .get_regs_len = i40e_get_regs_len,
3148 .get_regs = i40e_get_regs,
3149 .nway_reset = i40e_nway_reset,
3150 .get_link = ethtool_op_get_link,
3151 .get_wol = i40e_get_wol,
3152 .set_wol = i40e_set_wol,
3153 .set_eeprom = i40e_set_eeprom,
3154 .get_eeprom_len = i40e_get_eeprom_len,
3155 .get_eeprom = i40e_get_eeprom,
3156 .get_ringparam = i40e_get_ringparam,
3157 .set_ringparam = i40e_set_ringparam,
3158 .get_pauseparam = i40e_get_pauseparam,
3159 .set_pauseparam = i40e_set_pauseparam,
3160 .get_msglevel = i40e_get_msglevel,
3161 .set_msglevel = i40e_set_msglevel,
3162 .get_rxnfc = i40e_get_rxnfc,
3163 .set_rxnfc = i40e_set_rxnfc,
3164 .self_test = i40e_diag_test,
3165 .get_strings = i40e_get_strings,
3166 .set_phys_id = i40e_set_phys_id,
3167 .get_sset_count = i40e_get_sset_count,
3168 .get_ethtool_stats = i40e_get_ethtool_stats,
3169 .get_coalesce = i40e_get_coalesce,
3170 .set_coalesce = i40e_set_coalesce,
3171 .get_rxfh_key_size = i40e_get_rxfh_key_size,
3172 .get_rxfh_indir_size = i40e_get_rxfh_indir_size,
3173 .get_rxfh = i40e_get_rxfh,
3174 .set_rxfh = i40e_set_rxfh,
3175 .get_channels = i40e_get_channels,
3176 .set_channels = i40e_set_channels,
3177 .get_ts_info = i40e_get_ts_info,
3178 .get_priv_flags = i40e_get_priv_flags,
3179 .set_priv_flags = i40e_set_priv_flags,
3180 .get_per_queue_coalesce = i40e_get_per_queue_coalesce,
3181 .set_per_queue_coalesce = i40e_set_per_queue_coalesce,
3182};
3183
3184void i40e_set_ethtool_ops(struct net_device *netdev)
3185{
3186 netdev->ethtool_ops = &i40e_ethtool_ops;
3187}