1/*
  2 * Copyright 2017 Valve Corporation
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice shall be included in
 12 * all copies or substantial portions of the Software.
 13 *
 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 20 * OTHER DEALINGS IN THE SOFTWARE.
 21 *
 22 * Authors: Andres Rodriguez <andresx7@gmail.com>
 23 */
 24
 25#include <linux/file.h>
 26#include <linux/pid.h>
 27
 28#include <drm/amdgpu_drm.h>
 29
 30#include "amdgpu.h"
 31#include "amdgpu_sched.h"
 32#include "amdgpu_vm.h"
 33
 34static int amdgpu_sched_process_priority_override(struct amdgpu_device *adev,
 35						  int fd,
 36						  int32_t priority)
 37{
 38	CLASS(fd, f)(fd);
 39	struct amdgpu_fpriv *fpriv;
 40	struct amdgpu_ctx_mgr *mgr;
 41	struct amdgpu_ctx *ctx;
 42	uint32_t id;
 43	int r;
 44
 45	if (fd_empty(f))
 46		return -EINVAL;
 47
 48	r = amdgpu_file_to_fpriv(fd_file(f), &fpriv);
 49	if (r)
 50		return r;
 51
 52	mgr = &fpriv->ctx_mgr;
 53	mutex_lock(&mgr->lock);
 54	idr_for_each_entry(&mgr->ctx_handles, ctx, id)
 55		amdgpu_ctx_priority_override(ctx, priority);
 56	mutex_unlock(&mgr->lock);
 57
 58	return 0;
 59}
 60
 61static int amdgpu_sched_context_priority_override(struct amdgpu_device *adev,
 62						  int fd,
 63						  unsigned ctx_id,
 64						  int32_t priority)
 65{
 66	CLASS(fd, f)(fd);
 67	struct amdgpu_fpriv *fpriv;
 68	struct amdgpu_ctx *ctx;
 69	int r;
 70
 71	if (fd_empty(f))
 72		return -EINVAL;
 73
 74	r = amdgpu_file_to_fpriv(fd_file(f), &fpriv);
 75	if (r)
 76		return r;
 77
 78	ctx = amdgpu_ctx_get(fpriv, ctx_id);
 79
 80	if (!ctx)
 81		return -EINVAL;
 82
 83	amdgpu_ctx_priority_override(ctx, priority);
 84	amdgpu_ctx_put(ctx);
 85	return 0;
 86}
 87
 88int amdgpu_sched_ioctl(struct drm_device *dev, void *data,
 89		       struct drm_file *filp)
 90{
 91	union drm_amdgpu_sched *args = data;
 92	struct amdgpu_device *adev = drm_to_adev(dev);
 93	int r;
 94
 95	/* First check the op, then the op's argument.
 96	 */
 97	switch (args->in.op) {
 98	case AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE:
 99	case AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE:
100		break;
101	default:
102		DRM_ERROR("Invalid sched op specified: %d\n", args->in.op);
103		return -EINVAL;
104	}
105
106	if (!amdgpu_ctx_priority_is_valid(args->in.priority)) {
107		WARN(1, "Invalid context priority %d\n", args->in.priority);
108		return -EINVAL;
109	}
110
111	switch (args->in.op) {
112	case AMDGPU_SCHED_OP_PROCESS_PRIORITY_OVERRIDE:
113		r = amdgpu_sched_process_priority_override(adev,
114							   args->in.fd,
115							   args->in.priority);
116		break;
117	case AMDGPU_SCHED_OP_CONTEXT_PRIORITY_OVERRIDE:
118		r = amdgpu_sched_context_priority_override(adev,
119							   args->in.fd,
120							   args->in.ctx_id,
121							   args->in.priority);
122		break;
123	default:
124		/* Impossible.
125		 */
126		r = -EINVAL;
127		break;
128	}
129
130	return r;
131}